Changes in / [3194d83:69c1995] in mainline


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1 added
10 edited

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  • HelenOS.config

    r3194d83 r69c1995  
    9999! [PLATFORM=arm32&MACHINE=beagleboardxm] PROCESSOR (choice)
    100100
    101 
    102101% RAM disk format
    103102@ "tmpfs" TMPFS image
    … …  
    347346% FPU support
    348347! [PLATFORM=mips32&(MACHINE=lgxemul|MACHINE=bgxemul)] CONFIG_FPU (y)
     348
     349## armv7 made fpu hardware compulsory
     350% FPU support
     351! [PLATFORM=arm32&PROCESSOR=armv7_a] CONFIG_FPU (y)
     352
     353% FPU support
     354! [PLATFORM=arm32&MACHINE=integratorcp] CONFIG_FPU (y)
    349355
    350356

  • kernel/arch/arm32/Makefile.inc

    r3194d83 r69c1995  
    3535GCC_CFLAGS += -fno-omit-frame-pointer -mapcs-frame -march=$(subst _,-,$(PROCESSOR)) -mno-unaligned-access
    3636
     37ifeq ($(CONFIG_FPU),y)
     38# This is necessary to allow vmsr insn and fpexc manipulation
     39# Use vfp32 to allow context save/restore of d16-d31 regs.
     40GCC_CFLAGS += -mfloat-abi=hard -mfpu=vfp3
     41endif
     42
    3743BITS = 32
    3844ENDIANESS = LE
    … …  
    4652        arch/$(KARCH)/src/machine_func.c \
    4753        arch/$(KARCH)/src/context.S \
     54        arch/$(KARCH)/src/fpu_context.c \
    4855        arch/$(KARCH)/src/dummy.S \
    4956        arch/$(KARCH)/src/cpu/cpu.c \

  • kernel/arch/arm32/include/cpu.h

    r3194d83 r69c1995  
    4343/** Struct representing ARM CPU identification. */
    4444typedef struct {
    45         /** Implementator (vendor) number. */
     45        /** Implementor (vendor) number. */
    4646        uint32_t imp_num;
    4747

  • kernel/arch/arm32/include/fpu_context.h

    r3194d83 r69c1995  
    4141#include <typedefs.h>
    4242
    43 #define FPU_CONTEXT_ALIGN    0
     43#define FPU_CONTEXT_ALIGN    8
    4444
     45/* ARM Architecture reference manual, p B-1529.
     46 */
    4547typedef struct {
     48        uint32_t fpexc;
     49        uint32_t fpscr;
     50        uint32_t s[64];
    4651} fpu_context_t;
     52
     53void fpu_setup(void);
     54
     55bool handle_if_fpu_exception(void);
    4756
    4857#endif

  • kernel/arch/arm32/src/cpu/cpu.c

    r3194d83 r69c1995  
    3939#include <print.h>
    4040
    41 /** Number of indexes left out in the #imp_data array */
    42 #define IMP_DATA_START_OFFSET 0x40
    43 
    44 /** Implementators (vendor) names */
    45 static const char *imp_data[] = {
    46         "?",                                     /* IMP_DATA_START_OFFSET */
    47         "ARM Limited",                           /* 0x41 */
    48         "", "",                                  /* 0x42 - 0x43 */
    49         "Digital Equipment Corporation",         /* 0x44 */
    50         "", "", "", "", "", "", "", "",          /* 0x45 - 0x4c */
    51         "Motorola, Freescale Semicondutor Inc.", /* 0x4d */
    52         "", "", "",                              /* 0x4e - 0x50 */
    53         "Qualcomm Inc.",                         /* 0x51 */
    54         "", "", "", "",                          /* 0x52 - 0x55 */
    55         "Marvell Semiconductor",                 /* 0x56 */
    56         "", "", "", "", "", "", "", "", "", "",  /* 0x57 - 0x60 */
    57         "", "", "", "", "", "", "", "",          /* 0x61 - 0x68 */
    58         "Intel Corporation"                      /* 0x69 */
    59 };
    60 
    61 /** Length of the #imp_data array */
    62 static unsigned int imp_data_length = sizeof(imp_data) / sizeof(char *);
     41/** Implementers (vendor) names */
     42static const char * implementer(unsigned id)
     43{
     44        switch (id)
     45        {
     46        case 0x41: return "ARM Limited";
     47        case 0x44: return "Digital Equipment Corporation";
     48        case 0x4d: return "Motorola, Freescale Semiconductor Inc.";
     49        case 0x51: return "Qualcomm Inc.";
     50        case 0x56: return "Marvell Semiconductor Inc.";
     51        case 0x69: return "Intel Corporation";
     52        }
     53        return "Unknown implementer";
     54}
    6355
    6456/** Architecture names */
    65 static const char *arch_data[] = {
    66         "?",       /* 0x0 */
    67         "4",       /* 0x1 */
    68         "4T",      /* 0x2 */
    69         "5",       /* 0x3 */
    70         "5T",      /* 0x4 */
    71         "5TE",     /* 0x5 */
    72         "5TEJ",    /* 0x6 */
    73         "6"        /* 0x7 */
    74 };
    75 
    76 /** Length of the #arch_data array */
    77 static unsigned int arch_data_length = sizeof(arch_data) / sizeof(char *);
     57static const char * architecture_string(cpu_arch_t *arch)
     58{
     59        static const char *arch_data[] = {
     60                "ARM",       /* 0x0 */
     61                "ARMv4",       /* 0x1 */
     62                "ARMv4T",      /* 0x2 */
     63                "ARMv5",       /* 0x3 */
     64                "ARMv5T",      /* 0x4 */
     65                "ARMv5TE",     /* 0x5 */
     66                "ARMv5TEJ",    /* 0x6 */
     67                "ARMv6"        /* 0x7 */
     68        };
     69        if (arch->arch_num < (sizeof(arch_data) / sizeof(arch_data[0])))
     70                return arch_data[arch->arch_num];
     71        else
     72                return arch_data[0];
     73}
    7874
    7975
    8076/** Retrieves processor identification from CP15 register 0.
    81  * 
     77 *
    8278 * @param cpu Structure for storing CPU identification.
     79 * See page B4-1630 of ARM Architecture Reference Manual.
    8380 */
    8481static void arch_cpu_identify(cpu_arch_t *cpu)
    … …  
    9592        cpu->prim_part_num = (ident << 16) >> 20;
    9693        cpu->rev_num = (ident << 28) >> 28;
     94        // TODO CPUs with arch_num == 0xf use CPUID scheme for identification
    9795}
    9896
    … …  
    136134        );
    137135#endif
     136#ifdef CONFIG_FPU
     137        fpu_setup();
     138#endif
    138139}
    139140
    … …  
    147148void cpu_print_report(cpu_t *m)
    148149{
    149         const char *vendor = imp_data[0];
    150         const char *architecture = arch_data[0];
    151         cpu_arch_t * cpu_arch = &m->arch;
    152 
    153         const unsigned imp_offset = cpu_arch->imp_num - IMP_DATA_START_OFFSET;
    154 
    155         if (imp_offset < imp_data_length) {
    156                 vendor = imp_data[cpu_arch->imp_num - IMP_DATA_START_OFFSET];
    157         }
    158 
    159         // TODO CPUs with arch_num == 0xf use CPUID scheme for identification
    160         if (cpu_arch->arch_num < arch_data_length) {
    161                 architecture = arch_data[cpu_arch->arch_num];
    162         }
    163 
    164         printf("cpu%d: vendor=%s, architecture=ARM%s, part number=%x, "
     150        printf("cpu%d: vendor=%s, architecture=%s, part number=%x, "
    165151            "variant=%x, revision=%x\n",
    166             m->id, vendor, architecture, cpu_arch->prim_part_num,
    167             cpu_arch->variant_num, cpu_arch->rev_num);
     152            m->id, implementer(m->arch.imp_num),
     153            architecture_string(&m->arch), m->arch.prim_part_num,
     154            m->arch.variant_num, m->arch.rev_num);
    168155}
    169156

  • kernel/arch/arm32/src/dummy.S

    r3194d83 r69c1995  
    3232.global asm_delay_loop
    3333
    34 .global fpu_context_restore
    35 .global fpu_context_save
    36 .global fpu_enable
    37 .global fpu_init
    38 
    3934.global sys_tls_set
    4035.global dummy
    … …  
    4641        mov     pc, lr
    4742
    48 fpu_context_restore:
    49         mov     pc, lr
    50    
    51 fpu_context_save:
    52         mov     pc, lr
    53    
    54 fpu_enable:
    55         mov     pc, lr
    56 
    57 fpu_init:
    58         mov     pc, lr
    59    
    6043# not used on ARM
    6144sys_tls_set:

  • kernel/arch/arm32/src/exception.c

    r3194d83 r69c1995  
    161161}
    162162
     163/** Undefined instruction exception handler.
     164 *
     165 * Calls scheduler_fpu_lazy_request
     166 */
     167static void undef_insn_exception(unsigned int exc_no, istate_t *istate)
     168{
     169        if (!handle_if_fpu_exception()) {
     170                fault_if_from_uspace(istate, "Undefined instruction.");
     171                panic_badtrap(istate, exc_no, "Undefined instruction.");
     172        } else {
     173                /*
     174                 * Retry the failing instruction,
     175                 * ARM Architecture Reference Manual says on p.B1-1169
     176                 * that offset for undef instruction exception is 4
     177                 */
     178                istate->pc -= 4;
     179        }
     180}
     181
    163182/** Initializes exception handling.
    164183 *
    … …  
    174193        install_exception_handlers();
    175194       
     195        exc_register(EXC_UNDEF_INSTR, "undefined instruction", true,
     196            (iroutine_t) undef_insn_exception);
    176197        exc_register(EXC_IRQ, "interrupt", true,
    177198            (iroutine_t) irq_exception);

  • kernel/arch/arm32/src/ras.c

    r3194d83 r69c1995  
    6767void ras_check(unsigned int n, istate_t *istate)
    6868{
    69         uintptr_t rewrite_pc = istate->pc;
     69        bool restart = false;
    7070
    7171        if (istate_from_uspace(istate)) {
    … …  
    7373                        if ((ras_page[RAS_START] < istate->pc) &&
    7474                            (ras_page[RAS_END] > istate->pc)) {
    75                                 rewrite_pc = ras_page[RAS_START];
     75                                restart = true;
    7676                        }
    7777                        ras_page[RAS_START] = 0;
    7878                        ras_page[RAS_END] = 0xffffffff;
    79                 }       
     79                }
    8080        }
    8181
    8282        exc_dispatch(n, istate);
    83 
    84         istate->pc = rewrite_pc;
     83        if (restart)
     84                istate->pc = ras_page[RAS_START];
    8585}
    8686

  • tools/toolchain.sh

    r3194d83 r69c1995  
    5353EOF
    5454
    55 BINUTILS_VERSION="2.22"
     55BINUTILS_VERSION="2.23.1"
    5656BINUTILS_RELEASE=""
    5757GCC_VERSION="4.7.2"
    … …  
    274274        GDB_SOURCE="ftp://ftp.gnu.org/gnu/gdb/"
    275275       
    276         download_fetch "${BINUTILS_SOURCE}" "${BINUTILS}" "ee0f10756c84979622b992a4a61ea3f5"
     276        download_fetch "${BINUTILS_SOURCE}" "${BINUTILS}" "33adb18c3048d057ac58d07a3f1adb38"
    277277        download_fetch "${GCC_SOURCE}" "${GCC}" "cc308a0891e778cfda7a151ab8a6e762"
    278278        download_fetch "${GDB_SOURCE}" "${GDB}" "24a6779a9fe0260667710de1b082ef61"

  • uspace/lib/c/arch/arm32/Makefile.common

    r3194d83 r69c1995  
    2828#
    2929
     30GCC_CFLAGS += -ffixed-r9 -mtp=soft -fno-omit-frame-pointer -mapcs-frame -march=$(subst _,-,$(PROCESSOR))
     31
     32ifeq ($(CONFIG_FPU),y)
     33GCC_CFLAGS += -mfloat-abi=hard
     34else
    3035BASE_LIBS += $(LIBSOFTFLOAT_PREFIX)/libsoftfloat.a
    31 GCC_CFLAGS += -ffixed-r9 -mtp=soft -fno-omit-frame-pointer -mapcs-frame -march=$(subst _,-,$(PROCESSOR))
     36endif
    3237
    3338ENDIANESS = LE
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