Changeset 690d2e7 in mainline for uspace/drv/bus/pci/pciintel/pci.c
- Timestamp:
- 2012-01-24T04:28:54Z (13 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- cb3dbb63
- Parents:
- 230385c
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
uspace/drv/bus/pci/pciintel/pci.c
r230385c r690d2e7 38 38 39 39 #include <assert.h> 40 #include <byteorder.h> 40 41 #include <stdio.h> 41 42 #include <errno.h> … … 231 232 void *addr = bus->conf_data_port + (reg & 3); 232 233 233 pio_write_32(bus->conf_addr_port, conf_addr);234 pio_write_32(bus->conf_addr_port, host2uint32_t_le(conf_addr)); 234 235 235 236 switch (len) { 236 237 case 1: 238 /* No endianness change for 1 byte */ 237 239 buf[0] = pio_read_8(addr); 238 240 break; 239 241 case 2: 240 ((uint16_t *) buf)[0] = pio_read_16(addr);242 ((uint16_t *) buf)[0] = uint16_t_le2host(pio_read_16(addr)); 241 243 break; 242 244 case 4: 243 ((uint32_t *) buf)[0] = pio_read_32(addr);245 ((uint32_t *) buf)[0] = uint32_t_le2host(pio_read_32(addr)); 244 246 break; 245 247 } … … 254 256 fibril_mutex_lock(&bus->conf_mutex); 255 257 256 uint32_t conf_addr; 257 conf_addr = CONF_ADDR(fun->bus, fun->dev, fun->fn, reg); 258 const uint32_t conf_addr = CONF_ADDR(fun->bus, fun->dev, fun->fn, reg); 258 259 void *addr = bus->conf_data_port + (reg & 3); 259 260 260 pio_write_32(bus->conf_addr_port, conf_addr);261 pio_write_32(bus->conf_addr_port, host2uint32_t_le(conf_addr)); 261 262 262 263 switch (len) { 263 264 case 1: 265 /* No endianness change for 1 byte */ 264 266 pio_write_8(addr, buf[0]); 265 267 break; 266 268 case 2: 267 pio_write_16(addr, ((uint16_t *) buf)[0]);269 pio_write_16(addr, host2uint16_t_le(((uint16_t *) buf)[0])); 268 270 break; 269 271 case 4: 270 pio_write_32(addr, ((uint32_t *) buf)[0]);272 pio_write_32(addr, host2uint32_t_le(((uint32_t *) buf)[0])); 271 273 break; 272 274 }
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