Changeset 66b628a in mainline for uspace/srv/hw/netif/dp8390/dp8390.h
- Timestamp:
- 2011-01-06T23:23:53Z (14 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 7922dea
- Parents:
- e3fe7df
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
uspace/srv/hw/netif/dp8390/dp8390.h
re3fe7df r66b628a 89 89 90 90 /** Page 1, read/write */ 91 #define DP_PAR0 0x1 /* Physical Address Register 0*/92 #define DP_PAR1 0x2 /* Physical Address Register 1*/93 #define DP_PAR2 0x3 /* Physical Address Register 2*/94 #define DP_PAR3 0x4 /* Physical Address Register 3*/95 #define DP_PAR4 0x5 /* Physical Address Register 4*/96 #define DP_PAR5 0x6 /* Physical Address Register 5*/97 #define DP_CURR 0x7 /* Current Page Register*/98 #define DP_MAR0 0x8 /* Multicast Address Register 0*/99 #define DP_MAR1 0x9 /* Multicast Address Register 1*/100 #define DP_MAR2 0xA /* Multicast Address Register 2*/101 #define DP_MAR3 0xB /* Multicast Address Register 3*/102 #define DP_MAR4 0xC /* Multicast Address Register 4*/103 #define DP_MAR5 0xD /* Multicast Address Register 5*/104 #define DP_MAR6 0xE /* Multicast Address Register 6*/105 #define DP_MAR7 0xF /* Multicast Address Register 7*/91 #define DP_PAR0 0x01 /**< Physical Address Register 0 */ 92 #define DP_PAR1 0x02 /**< Physical Address Register 1 */ 93 #define DP_PAR2 0x03 /**< Physical Address Register 2 */ 94 #define DP_PAR3 0x04 /**< Physical Address Register 3 */ 95 #define DP_PAR4 0x05 /**< Physical Address Register 4 */ 96 #define DP_PAR5 0x06 /**< Physical Address Register 5 */ 97 #define DP_CURR 0x07 /**< Current Page Register */ 98 #define DP_MAR0 0x08 /**< Multicast Address Register 0 */ 99 #define DP_MAR1 0x09 /**< Multicast Address Register 1 */ 100 #define DP_MAR2 0x0a /**< Multicast Address Register 2 */ 101 #define DP_MAR3 0x0b /**< Multicast Address Register 3 */ 102 #define DP_MAR4 0x0c /**< Multicast Address Register 4 */ 103 #define DP_MAR5 0x0d /**< Multicast Address Register 5 */ 104 #define DP_MAR6 0x0e /**< Multicast Address Register 6 */ 105 #define DP_MAR7 0x0f /**< Multicast Address Register 7 */ 106 106 107 107 /* Bits in dp_cr */ … … 271 271 dp_initf_t de_initf; 272 272 dp_stopf_t de_stopf; 273 char de_name[sizeof("dp8390#n")];274 273 275 274 /* … … 300 299 301 300 /* Fields for internal use by the dp8390 driver. */ 302 int de_flags;303 int de_mode;304 301 eth_stat_t de_stat; 305 302 dp_user2nicf_t de_user2nicf; … … 308 305 309 306 /* Driver flags */ 307 bool up; 308 bool enabled; 309 bool stopped; 310 310 bool sending; 311 311 bool send_avail; 312 312 } dpeth_t; 313 313 314 #define DEF_PROMISC 0x040315 #define DEF_MULTI 0x080316 #define DEF_BROAD 0x100317 #define DEF_ENABLED 0x200318 #define DEF_STOPPED 0x400319 320 #define DEM_DISABLED 0x0321 #define DEM_ENABLED 0x2322 323 314 #endif 324 315
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