Index: kernel/arch/arm32/include/security_ext.h
===================================================================
--- kernel/arch/arm32/include/security_ext.h	(revision cd8db93275d8a97a97acd69e5ce3f778b5d8fe66)
+++ kernel/arch/arm32/include/security_ext.h	(revision 660e8fa5f008667505ce6541fbd616bd84304641)
@@ -40,4 +40,10 @@
 #include <arch/regutils.h>
 
+/** Test whether the current cpu supports security extensions.
+ * return true if security extensions are supported, false otherwise.
+ * @note The Processor Feature Register 1 that provides this information
+ * is available only on armv7+. This function returns false on all\
+ * older archs.
+ */
 static inline bool sec_ext_is_implemented()
 {
@@ -49,4 +55,9 @@
 }
 
+/** Test whether we are running in monitor mode.
+ * return true, if the current mode is Monitor mode, false otherwise.
+ * @note this is safe to call even on machines that do not implement monitor
+ * mode.
+ */
 static inline bool sec_ext_is_monitor_mode()
 {
@@ -54,4 +65,14 @@
 }
 
+/** Test whether we are running in a secure state.
+ * return true if the current state is secure, false otherwise.
+ *
+ * @note: This functions will cause undef isntruction trap if we
+ * are not running in the secure state.
+ *
+ * @note: u-boot enables non-secure access to cp 10/11, as well as some other
+ * features and switches to non-secure state during boot.
+ * Look for 'secureworld_exit' in arch/arm/cpu/armv7/omap3/board.c.
+ */
 static inline bool sec_ext_is_secure()
 {
@@ -60,18 +81,5 @@
 }
 
-typedef enum {
-	SECURITY_CALL_ENABLE_CP10_11 = 0xaaaa
-} sec_ext_call_t;
-
-static inline void sec_ext_call(sec_ext_call_t call)
-{
-	asm volatile ("mov r0, %0\nsmc #0" ::"r"(call));
-}
-
-int sec_ext_handle_call(sec_ext_call_t call);
-
 #endif
-
 /** @}
  */
-
Index: kernel/arch/arm32/src/fpu_context.c
===================================================================
--- kernel/arch/arm32/src/fpu_context.c	(revision cd8db93275d8a97a97acd69e5ce3f778b5d8fe66)
+++ kernel/arch/arm32/src/fpu_context.c	(revision 660e8fa5f008667505ce6541fbd616bd84304641)
@@ -114,15 +114,4 @@
 static void (*restore_context)(fpu_context_t *ctx);
 
-int sec_ext_handle_call(sec_ext_call_t call)
-{
-	printf("Handling secure call %x in %s context (%s mode-%x)\n",
-		call, sec_ext_is_secure() ? "secure" : "unsecure",
-		sec_ext_is_monitor_mode() ? "monitor" : "other",
-		current_status_reg_read());
-	if (sec_ext_is_monitor_mode() && call == SECURITY_CALL_ENABLE_CP10_11)
-		return 1;
-	return 0;
-}
-
 static int fpu_have_coprocessor_access()
 {
@@ -162,15 +151,4 @@
 	return;
 #endif
-	if (sec_ext_is_implemented()) {
-		if (!sec_ext_is_monitor_mode()) {
-		// TODO enable this when we implement SMC handling
-		//	sec_ext_call(SECURITY_CALL_ENABLE_CP10_11);
-		} else {
-			uint32_t nsacr = NSACR_read();
-			nsacr |= (NSACR_CP_FLAG(10) | NSACR_CP_FLAG(11));
-			NSACR_write(nsacr);
-			smc_coherence(0);
-		}
-	}
 
 	/* Allow coprocessor access */
