Changeset 655f70b in mainline for kernel/arch/ppc32/src/mm/tlb.c

Timestamp:

2011-05-23T20:40:49Z (13 years ago)

Author:

Martin Decky <martin@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

d4c472b

Parents:

f66b565

Message:

ppc32: reimplement tlb_invalidate_all, this finally allows a real-world PowerPC G4 machine to operate correctly
(the original inline assembly with the .rept directive did not inline correctly and it wiped out the first TLB entry 64 times instead of wiping all 64 entries)

File:

• kernel/arch/ppc32/src/mm/tlb.c (modified) (1 diff)

kernel/arch/ppc32/src/mm/tlb.c

@@ -81 +81 @@
 void tlb_invalidate_all(void)
 {
-        uint32_t index;
+        asm volatile (
+                "sync\n"
+        );
+        
+        for (unsigned int i = 0; i < 0x00040000; i += 0x00001000) {
+                asm volatile (
+                        "tlbie %[i]\n"
+                        :: [i] "r" (i)
+                );
+        }
         
         asm volatile (
-                "li %[index], 0\n"
-                "sync\n"
-                
-                ".rept 64\n"
-                "       tlbie %[index]\n"
-                "       addi %[index], %[index], 0x1000\n"
-                ".endr\n"
-                
                 "eieio\n"
                 "tlbsync\n"
                 "sync\n"
-                : [index] "=r" (index)
         );
 }