Index: uspace/lib/c/generic/device/hw_res.c
===================================================================
--- uspace/lib/c/generic/device/hw_res.c	(revision 758f8d55da31118ef5accb99051c4f46cc5c880a)
+++ uspace/lib/c/generic/device/hw_res.c	(revision 64f3d3b30214b99ffdce5634420154819c802b37)
@@ -44,6 +44,5 @@
 	
 	async_exch_t *exch = async_exchange_begin(sess);
-	if (exch == NULL)
-		return ENOMEM;
+	
 	int rc = async_req_1_1(exch, DEV_IFACE_ID(HW_RES_DEV_IFACE),
 	    HW_RES_GET_RESOURCE_LIST, &count);
@@ -79,6 +78,5 @@
 {
 	async_exch_t *exch = async_exchange_begin(sess);
-	if (exch == NULL)
-		return false;
+	
 	int rc = async_req_1_0(exch, DEV_IFACE_ID(HW_RES_DEV_IFACE),
 	    HW_RES_ENABLE_INTERRUPT);
@@ -88,16 +86,17 @@
 }
 
-/**
- * Setup DMA channel to specified place and mode.
- * @param channel DMA Channel 1,2,3 for 8 bit transfers, 5,6,7 for 16 bit.
- * @param pa Physical address of the buffer. Must be < 16MB for 16 bit and < 1MB
- *           for 8 bit transfers.
- * @param size DMA buffer size, limited to 64K.
- * @param mode Mode of the DMA channel:
- *              - Read or Write
- *              - Allow automatic reset
- *              - Use address decrement instead of increment
- *              - Use SINGLE/BLOCK/ON DEMAND transfer mode
+/** Setup DMA channel to specified place and mode.
+ *
+ * @param channel DMA channel.
+ * @param pa      Physical address of the buffer.
+ * @param size    DMA buffer size.
+ * @param mode    Mode of the DMA channel:
+ *                 - Read or Write
+ *                 - Allow automatic reset
+ *                 - Use address decrement instead of increment
+ *                 - Use SINGLE/BLOCK/ON DEMAND transfer mode
+ *
  * @return Error code.
+ *
  */
 int hw_res_dma_channel_setup(async_sess_t *sess,
@@ -105,30 +104,35 @@
 {
 	async_exch_t *exch = async_exchange_begin(sess);
-	if (exch == NULL)
-		return ENOMEM;
+	
 	const uint32_t packed = (channel & 0xffff) | (mode << 16);
 	const int ret = async_req_4_0(exch, DEV_IFACE_ID(HW_RES_DEV_IFACE),
 	    HW_RES_DMA_CHANNEL_SETUP, packed, pa, size);
+	
 	async_exchange_end(exch);
-
+	
 	return ret;
 }
 
-/**
- * Query remaining bytes in the buffer.
- * @param channel DMA Channel 1,2,3 for 8 bit transfers, 5,6,7 for 16 bit.
- * @return Number of bytes remaining in the buffer(>=0) or error code(<0).
+/** Query remaining bytes in the buffer.
+ *
+ * @param channel DMA channel.
+ *
+ * @return Number of bytes remaining in the buffer if positive.
+ * @return Error code if negative.
+ *
  */
 int hw_res_dma_channel_remain(async_sess_t *sess, unsigned channel)
 {
 	async_exch_t *exch = async_exchange_begin(sess);
-	if (exch == NULL)
-		return ENOMEM;
+	
 	sysarg_t remain;
 	const int ret = async_req_2_1(exch, DEV_IFACE_ID(HW_RES_DEV_IFACE),
 	    HW_RES_DMA_CHANNEL_REMAIN, channel, &remain);
+	
 	async_exchange_end(exch);
+	
 	if (ret == EOK)
 		return remain;
+	
 	return ret;
 }
