Changeset 64bbf13 in mainline
- Timestamp:
- 2010-07-01T18:39:48Z (14 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 75c9852
- Parents:
- fc14438
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/amd64/src/asm_utils.S
rfc14438 r64bbf13 1 # 2 #Copyright (c) 2005 Ondrej Palkovsky3 #All rights reserved.4 # 5 #Redistribution and use in source and binary forms, with or without6 #modification, are permitted provided that the following conditions7 #are met:8 # 9 #- Redistributions of source code must retain the above copyright10 #notice, this list of conditions and the following disclaimer.11 #- Redistributions in binary form must reproduce the above copyright12 #notice, this list of conditions and the following disclaimer in the13 #documentation and/or other materials provided with the distribution.14 #- The name of the author may not be used to endorse or promote products15 #derived from this software without specific prior written permission.16 # 17 #THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR18 #IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES19 #OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.20 #IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,21 #INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT22 #NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,23 #DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY24 #THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT25 #(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF26 #THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.27 # 1 /* 2 * Copyright (c) 2005 Ondrej Palkovsky 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 9 * - Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * - Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * - The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 28 29 29 #define IREGISTER_SPACE 80 … … 40 40 #define IOFFSET_RBP 0x48 41 41 42 # Mask for interrupts 0 - 31 (bits 0 - 31) where 0 means that int 43 # has no error word and 1 means interrupt with error word 44 42 /** 43 * Mask for interrupts 0 - 31 (bits 0 - 31) where 0 means that int 44 * has no error word and 1 means interrupt with error word 45 * 46 */ 45 47 #define ERROR_WORD_INTERRUPT_LIST 0x00027D00 46 48 … … 63 65 .global memcpy_to_uspace_failover_address 64 66 65 # Wrapper for generic memsetb 67 /* Wrapper for generic memsetb */ 66 68 memsetb: 67 69 jmp _memsetb 68 70 69 # Wrapper for generic memsetw 71 /* Wrapper for generic memsetw */ 70 72 memsetw: 71 73 jmp _memsetw … … 115 117 ret 116 118 117 ## Determine CPUID support 118 # 119 # Return 0 in EAX if CPUID is not support, 1 if supported. 120 # 119 /** Determine CPUID support 120 * 121 * @return 0 in EAX if CPUID is not support, 1 if supported. 122 * 123 */ 121 124 has_cpuid: 122 pushfq # store flags 123 popq %rax # read flags 124 movq %rax, %rdx # copy flags 125 btcl $21, %edx # swap the ID bit 125 /* Load RFLAGS */ 126 pushfq 127 popq %rax 128 movq %rax, %rdx 129 130 /* Flip the ID bit */ 131 btcl $21, %edx 132 133 /* Store RFLAGS */ 126 134 pushq %rdx 127 popfq # propagate the change into flags135 popfq 128 136 pushfq 129 popq %rdx # read flags 130 andl $(1 << 21), %eax # interested only in ID bit 137 138 /* Get the ID bit again */ 139 popq %rdx 140 andl $(1 << 21), %eax 131 141 andl $(1 << 21), %edx 132 xorl %edx, %eax # 0 if not supported, 1 if supported 142 143 /* 0 if not supported, 1 if supported */ 144 xorl %edx, %eax 133 145 ret 134 146 135 147 cpuid: 136 movq %rbx, %r10 # we have to preserve rbx across function calls 137 138 movl %edi,%eax # load the command into %eax 148 /* Preserve %rbx across function calls */ 149 movq %rbx, %r10 150 151 /* Load the command into %eax */ 152 movl %edi, %eax 139 153 140 154 cpuid … … 154 168 ret 155 169 156 read_efer_flag: 170 read_efer_flag: 157 171 movq $0xc0000080, %rcx 158 172 rdmsr 159 173 ret 160 174 161 # Push all volatile general purpose registers on stack 175 /** Push all volatile general purpose registers on stack 176 * 177 */ 162 178 .macro save_all_gpr 163 179 movq %rax, IOFFSET_RAX(%rsp) … … 188 204 #define INTERRUPT_ALIGN 128 189 205 190 ## Declare interrupt handlers 191 # 192 # Declare interrupt handlers for n interrupt 193 # vectors starting at vector i. 194 # 195 # The handlers call exc_dispatch(). 196 # 206 /** Declare interrupt handlers 207 * 208 * Declare interrupt handlers for n interrupt 209 * vectors starting at vector i. 210 * 211 * The handlers call exc_dispatch(). 212 * 213 */ 197 214 .macro handler i n 198 215 … … 227 244 save_all_gpr 228 245 cld 229 230 #231 #Stop stack traces here if we came from userspace.232 #246 247 /* 248 * Stop stack traces here if we came from userspace. 249 */ 233 250 movq %cs, %rax 234 251 xorq %rdx, %rdx … … 236 253 cmovneq %rdx, %rbp 237 254 238 movq $(\i), %rdi # %rdi - first parameter 239 movq %rsp, %rsi # %rsi - pointer to istate 240 call exc_dispatch # exc_dispatch(i, istate) 255 movq $(\i), %rdi /* %rdi - first argument */ 256 movq %rsp, %rsi /* %rsi - pointer to istate */ 257 258 /* Call exc_dispatch(i, istate) */ 259 call exc_dispatch 241 260 242 261 restore_all_gpr 243 # $8 = Skip error word 262 263 /* $8 = Skip error word */ 244 264 addq $(IREGISTER_SPACE + 8), %rsp 245 265 iretq … … 257 277 h_end: 258 278 259 ## Low-level syscall handler 260 # 261 # Registers on entry: 262 # 263 # @param rcx Userspace return address. 264 # @param r11 Userspace RLFAGS. 265 # 266 # @param rax Syscall number. 267 # @param rdi 1st syscall argument. 268 # @param rsi 2nd syscall argument. 269 # @param rdx 3rd syscall argument. 270 # @param r10 4th syscall argument. Used instead of RCX because 271 # the SYSCALL instruction clobbers it. 272 # @param r8 5th syscall argument. 273 # @param r9 6th syscall argument. 274 # 275 # @return Return value is in rax. 276 # 279 /** Low-level syscall handler 280 * 281 * Registers on entry: 282 * 283 * @param %rcx Userspace return address. 284 * @param %r11 Userspace RLFAGS. 285 * 286 * @param %rax Syscall number. 287 * @param %rdi 1st syscall argument. 288 * @param %rsi 2nd syscall argument. 289 * @param %rdx 3rd syscall argument. 290 * @param %r10 4th syscall argument. Used instead of RCX because 291 * the SYSCALL instruction clobbers it. 292 * @param %r8 5th syscall argument. 293 * @param %r9 6th syscall argument. 294 * 295 * @return Return value is in %rax. 296 * 297 */ 277 298 syscall_entry: 278 swapgs # Switch to hidden gs 279 # 280 # %gs:0 Scratch space for this thread's user RSP 281 # %gs:8 Address to be used as this thread's kernel RSP 282 # 283 movq %rsp, %gs:0 # Save this thread's user RSP 284 movq %gs:8, %rsp # Set this thread's kernel RSP 285 swapgs # Switch back to remain consistent 299 /* Switch to hidden %gs */ 300 swapgs 301 302 /* 303 * %gs:0 Scratch space for this thread's user RSP 304 * %gs:8 Address to be used as this thread's kernel RSP 305 */ 306 307 movq %rsp, %gs:0 /* save this thread's user RSP */ 308 movq %gs:8, %rsp /* set this thread's kernel RSP */ 309 310 /* Switch back to remain consistent */ 311 swapgs 286 312 sti 287 313 … … 289 315 pushq %r11 290 316 pushq %rbp 291 292 xorq %rbp, %rbp # stop the stack traces here 293 294 movq %r10, %rcx # Copy the 4th argument where it is expected 317 318 xorq %rbp, %rbp /* stop the stack traces here */ 319 320 /* Copy the 4th argument where it is expected */ 321 movq %r10, %rcx 295 322 pushq %rax 323 296 324 call syscall_handler 325 297 326 addq $8, %rsp 298 327 299 328 popq %rbp 300 329 popq %r11 … … 303 332 cli 304 333 swapgs 305 movq %gs:0, %rsp # Restore the user RSP 334 335 /* Restore the user RSP */ 336 movq %gs:0, %rsp 306 337 swapgs 307 338
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