Index: kernel/arch/arm32/include/arch/cp15.h =================================================================== --- kernel/arch/arm32/include/arch/cp15.h (revision 6ff23ff32c8aa9d6ad8d06f1743ca1b0d68c14bc) +++ kernel/arch/arm32/include/arch/cp15.h (revision 6413967015f267b604e85eb4c9a5f071af52a1b0) @@ -40,5 +40,6 @@ /** See ARM Architecture reference manual ch. B3.17.1 page B3-1456 - * for the list */ + * for the list + */ #define CONTROL_REG_GEN_READ(name, crn, opc1, crm, opc2) \ @@ -183,4 +184,6 @@ CCSIDR_LINESIZE_MASK = 0x7, CCSIDR_LINESIZE_SHIFT = 0, +}; + #define CCSIDR_SETS(val) \ (((val >> CCSIDR_NUMSETS_SHIFT) & CCSIDR_NUMSETS_MASK) + 1) @@ -190,5 +193,5 @@ #define CCSIDR_LINESIZE_LOG(val) \ (((val >> CCSIDR_LINESIZE_SHIFT) & CCSIDR_LINESIZE_MASK) + 2 + 2) -}; + CONTROL_REG_GEN_READ(CCSIDR, c0, 1, c0, 0); @@ -206,7 +209,9 @@ CLIDR_UNI_CACHE = 0x4, CLIDR_CACHE_MASK = 0x7, +}; + /** levels counted from 0 */ #define CLIDR_CACHE(level, val) ((val >> (level * 3)) & CLIDR_CACHE_MASK) -}; + CONTROL_REG_GEN_READ(CLIDR, c0, 1, c0, 1); CONTROL_REG_GEN_READ(AIDR, c0, 1, c0, 7); /* Implementation defined or MIDR */ @@ -225,6 +230,8 @@ /* System control registers */ -/* COntrol register bit values see ch. B4.1.130 of ARM Architecture Reference - * Manual ARMv7-A and ARMv7-R edition, page 1687 */ +/* + * Control register bit values see ch. B4.1.130 of ARM Architecture Reference + * Manual ARMv7-A and ARMv7-R edition, page 1687 + */ enum { SCTLR_MMU_EN_FLAG = 1 << 0, Index: kernel/arch/sparc64/include/arch/mm/sun4u/tsb.h =================================================================== --- kernel/arch/sparc64/include/arch/mm/sun4u/tsb.h (revision 6ff23ff32c8aa9d6ad8d06f1743ca1b0d68c14bc) +++ kernel/arch/sparc64/include/arch/mm/sun4u/tsb.h (revision 6413967015f267b604e85eb4c9a5f071af52a1b0) @@ -66,13 +66,13 @@ uint64_t value; struct { - uint64_t base : 51; /**< TSB base address, bits 63:13. */ - unsigned split : 1; /**< Split vs. common TSB for 8K and 64K - * pages. HelenOS uses only 8K pages - * for user mappings, so we always set - * this to 0. - */ + /** TSB base address, bits 63:13. */ + uint64_t base : 51; + /** Split vs. common TSB for 8K and 64K pages. HelenOS uses + * only 8K pages for user mappings, so we always set this to 0. + */ + unsigned split : 1; unsigned : 9; - unsigned size : 3; /**< TSB size. Number of entries is - * 512 * 2^size. */ + /** TSB size. Number of entries is 512 * 2^size. */ + unsigned size : 3; } __attribute__((packed)); } tsb_base_reg_t; Index: kernel/arch/sparc64/include/arch/sun4u/cpu.h =================================================================== --- kernel/arch/sparc64/include/arch/sun4u/cpu.h (revision 6ff23ff32c8aa9d6ad8d06f1743ca1b0d68c14bc) +++ kernel/arch/sparc64/include/arch/sun4u/cpu.h (revision 6413967015f267b604e85eb4c9a5f071af52a1b0) @@ -62,11 +62,13 @@ typedef struct { - uint32_t mid; /**< Processor ID as read from - UPA_CONFIG/FIREPLANE_CONFIG. */ + /** Processor ID as read from UPA_CONFIG/FIREPLANE_CONFIG. */ + uint32_t mid; ver_reg_t ver; - uint32_t clock_frequency; /**< Processor frequency in Hz. */ - uint64_t next_tick_cmpr; /**< Next clock interrupt should be - generated when the TICK register - matches this value. */ + /** Processor frequency in Hz. */ + uint32_t clock_frequency; + /** Next clock interrupt should be generated when the TICK register + * matches this value. + */ + uint64_t next_tick_cmpr; } cpu_arch_t; Index: kernel/arch/sparc64/include/arch/sun4v/cpu.h =================================================================== --- kernel/arch/sparc64/include/arch/sun4v/cpu.h (revision 6ff23ff32c8aa9d6ad8d06f1743ca1b0d68c14bc) +++ kernel/arch/sparc64/include/arch/sun4v/cpu.h (revision 6413967015f267b604e85eb4c9a5f071af52a1b0) @@ -59,12 +59,16 @@ typedef struct cpu_arch { - uint64_t id; /**< virtual processor ID */ - uint32_t clock_frequency; /**< Processor frequency in Hz. */ - uint64_t next_tick_cmpr; /**< Next clock interrupt should be - generated when the TICK register - matches this value. */ - exec_unit_t *exec_unit; /**< Physical core. */ - unsigned long proposed_nrdy; /**< Proposed No. of ready threads - so that cores are equally balanced. */ + /** Virtual processor ID */ + uint64_t id; + /** Processor frequency in Hz */ + uint32_t clock_frequency; + /** Next clock interrupt should be generated when the TICK register + * matches this value. + */ + uint64_t next_tick_cmpr; + /** Physical core. */ + exec_unit_t *exec_unit; + /** Proposed No. of ready threads so that cores are equally balanced. */ + unsigned long proposed_nrdy; } cpu_arch_t; Index: kernel/arch/sparc64/src/mm/sun4u/tsb.c =================================================================== --- kernel/arch/sparc64/src/mm/sun4u/tsb.c (revision 6ff23ff32c8aa9d6ad8d06f1743ca1b0d68c14bc) +++ kernel/arch/sparc64/src/mm/sun4u/tsb.c (revision 6413967015f267b604e85eb4c9a5f071af52a1b0) @@ -97,7 +97,6 @@ */ - tte->tag.invalid = true; /* invalidate the entry - * (tag target has this - * set to 0) */ + /* Invalidate the entry (tag target has this set to 0) */ + tte->tag.invalid = true; write_barrier(); @@ -142,7 +141,6 @@ */ - tte->tag.invalid = true; /* invalidate the entry - * (tag target has this - * set to 0) */ + /* Invalidate the entry (tag target has this set to 0) */ + tte->tag.invalid = true; write_barrier(); Index: kernel/arch/sparc64/src/sun4v/md.c =================================================================== --- kernel/arch/sparc64/src/sun4v/md.c (revision 6ff23ff32c8aa9d6ad8d06f1743ca1b0d68c14bc) +++ kernel/arch/sparc64/src/sun4v/md.c (revision 6413967015f267b604e85eb4c9a5f071af52a1b0) @@ -66,10 +66,15 @@ /** machine description element (in the node block) */ typedef struct { - uint8_t tag; /**< Type of element */ - uint8_t name_len; /**< Length in bytes of element name */ - uint16_t _reserved_field; /**< reserved field (zeros) */ - uint32_t name_offset; /**< Location offset of name associated - with this element relative to - start of name block */ + /** Type of element */ + uint8_t tag; + /** Length in bytes of element name */ + uint8_t name_len; + /** Reserved field (zeros) */ + uint16_t _reserved_field; + /** Location offset of name associated with this element relative to + * start of name block + */ + uint32_t name_offset; + union { /** for elements of type “PROP_STR” and of type “PROP_DATA” */ Index: kernel/doc/doxygroups.h =================================================================== --- kernel/doc/doxygroups.h (revision 6ff23ff32c8aa9d6ad8d06f1743ca1b0d68c14bc) +++ kernel/doc/doxygroups.h (revision 6413967015f267b604e85eb4c9a5f071af52a1b0) @@ -1,4 +1,7 @@ /* Definitions of modules and its relations for generating Doxygen documentation */ + +/** @defgroup kernel Kernel + */ /** @defgroup genericadt Data types @@ -14,74 +17,72 @@ */ -/** - * @defgroup time Time management - * @ingroup kernel - */ - -/** - * @defgroup proc Scheduling - * @ingroup kernel - */ - - /** @defgroup genericproc generic - * @ingroup proc - */ - - - /** - * @cond amd64 - * @defgroup amd64proc amd64 - * @ingroup proc - * @endcond - */ - - /** - * @cond arm32 - * @defgroup arm32proc arm32 - * @ingroup proc - * @endcond - */ - - /** - * @cond ia32 - * @defgroup ia32proc ia32 - * @ingroup proc - * @endcond - */ - - /** - * @cond ia64 - * @defgroup ia64proc ia64 - * @ingroup proc - * @endcond - */ - - /** - * @cond mips32 - * @defgroup mips32proc mips32 - * @ingroup proc - * @endcond - */ - - /** - * @cond ppc32 - * @defgroup ppc32proc ppc32 - * @ingroup proc - * @endcond - */ - - /** - * @cond ppc64 - * @defgroup ppc64proc ppc64 - * @ingroup proc - * @endcond - */ - - /** - * @cond sparc64 - * @defgroup sparc64proc sparc64 - * @ingroup proc - * @endcond - */ +/** @defgroup time Time management + * @ingroup kernel + */ + +/** @defgroup proc Scheduling + * @ingroup kernel + */ + +/** @defgroup genericproc generic + * @ingroup proc + */ + + +/** + * @cond amd64 + * @defgroup amd64proc amd64 + * @ingroup proc + * @endcond + */ + +/** + * @cond arm32 + * @defgroup arm32proc arm32 + * @ingroup proc + * @endcond + */ + +/** + * @cond ia32 + * @defgroup ia32proc ia32 + * @ingroup proc + * @endcond + */ + +/** + * @cond ia64 + * @defgroup ia64proc ia64 + * @ingroup proc + * @endcond + */ + +/** + * @cond mips32 + * @defgroup mips32proc mips32 + * @ingroup proc + * @endcond + */ + +/** + * @cond ppc32 + * @defgroup ppc32proc ppc32 + * @ingroup proc + * @endcond + */ + +/** + * @cond ppc64 + * @defgroup ppc64proc ppc64 + * @ingroup proc + * @endcond + */ + +/** + * @cond sparc64 + * @defgroup sparc64proc sparc64 + * @ingroup proc + * @endcond + */ @@ -91,73 +92,73 @@ - /** @defgroup mm Memory management - * @ingroup kernel - */ - - /** - * @defgroup genericmm generic - * @ingroup mm - */ - - /** - * @defgroup genarchmm genarch - * @ingroup mm - */ - - /** - * @cond amd64 - * @defgroup amd64mm amd64 - * @ingroup mm - * @endcond - */ - - /** - * @cond arm32 - * @defgroup arm32mm arm32 - * @ingroup mm - * @endcond - */ - - /** - * @cond ia32 - * @defgroup ia32mm ia32 - * @ingroup mm - * @endcond - */ - - /** - * @cond ia64 - * @defgroup ia64mm ia64 - * @ingroup mm - * @endcond - */ - - /** - * @cond mips32 - * @defgroup mips32mm mips32 - * @ingroup mm - * @endcond - */ - - /** - * @cond ppc32 - * @defgroup ppc32mm ppc32 - * @ingroup mm - * @endcond - */ - - /** - * @cond ppc64 - * @defgroup ppc64mm ppc64 - * @ingroup mm - * @endcond - */ - - /** - * @cond sparc64 - * @defgroup sparc64mm sparc64 - * @ingroup mm - * @endcond - */ +/** @defgroup mm Memory management + * @ingroup kernel + */ + +/** + * @defgroup genericmm generic + * @ingroup mm + */ + +/** + * @defgroup genarchmm genarch + * @ingroup mm + */ + +/** + * @cond amd64 + * @defgroup amd64mm amd64 + * @ingroup mm + * @endcond + */ + +/** + * @cond arm32 + * @defgroup arm32mm arm32 + * @ingroup mm + * @endcond + */ + +/** + * @cond ia32 + * @defgroup ia32mm ia32 + * @ingroup mm + * @endcond + */ + +/** + * @cond ia64 + * @defgroup ia64mm ia64 + * @ingroup mm + * @endcond + */ + +/** + * @cond mips32 + * @defgroup mips32mm mips32 + * @ingroup mm + * @endcond + */ + +/** + * @cond ppc32 + * @defgroup ppc32mm ppc32 + * @ingroup mm + * @endcond + */ + +/** + * @cond ppc64 + * @defgroup ppc64mm ppc64 + * @ingroup mm + * @endcond + */ + +/** + * @cond sparc64 + * @defgroup sparc64mm sparc64 + * @ingroup mm + * @endcond + */ @@ -177,191 +178,193 @@ */ - /** @defgroup genericddi generic - * @ingroup ddi - */ - - /** - * @cond amd64 - * @defgroup amd64ddi amd64 - * @ingroup ddi - * @endcond - */ - - /** - * @cond arm32 - * @defgroup arm32ddi arm32 - * @ingroup ddi - * @endcond - */ - - /** - * @cond ia32 - * @defgroup ia32ddi ia32 - * @ingroup ddi - * @endcond - */ - - /** - * @cond ia64 - * @defgroup ia64ddi ia64 - * @ingroup ddi - * @endcond - */ - - /** - * @cond mips32 - * @defgroup mips32ddi mips32 - * @ingroup ddi - * @endcond - */ - - /** - * @cond ppc32 - * @defgroup ppc32ddi ppc32 - * @ingroup ddi - * @endcond - */ - - /** - * @cond ppc64 - * @defgroup ppc64ddi ppc64 - * @ingroup ddi - * @endcond - */ - - /** - * @cond sparc64 - * @defgroup sparc64ddi sparc64 - * @ingroup ddi - * @endcond - */ - - /** @defgroup debug Debugging +/** + * @defgroup genericddi generic + * @ingroup ddi + */ + +/** + * @cond amd64 + * @defgroup amd64ddi amd64 + * @ingroup ddi + * @endcond + */ + +/** + * @cond arm32 + * @defgroup arm32ddi arm32 + * @ingroup ddi + * @endcond + */ + +/** + * @cond ia32 + * @defgroup ia32ddi ia32 + * @ingroup ddi + * @endcond + */ + +/** + * @cond ia64 + * @defgroup ia64ddi ia64 + * @ingroup ddi + * @endcond + */ + +/** + * @cond mips32 + * @defgroup mips32ddi mips32 + * @ingroup ddi + * @endcond + */ + +/** + * @cond ppc32 + * @defgroup ppc32ddi ppc32 + * @ingroup ddi + * @endcond + */ + +/** + * @cond ppc64 + * @defgroup ppc64ddi ppc64 + * @ingroup ddi + * @endcond + */ + +/** + * @cond sparc64 + * @defgroup sparc64ddi sparc64 + * @ingroup ddi + * @endcond + */ + +/** @defgroup debug Debugging * @ingroup others */ - /** @defgroup genericdebug generic - * @ingroup debug - */ - - /** - * @cond amd64 - * @defgroup amd64debug ia32/amd64 - * @ingroup debug - * @endcond - */ - - /** - * @cond arm32 - * @defgroup arm32debug arm32 - * @ingroup debug - * @endcond - */ - - /** - * @cond ia32 - * @defgroup amd64debug ia32/amd64 - * @ingroup debug - * @endcond - */ - - /** - * @cond ia64 - * @defgroup ia64debug ia64 - * @ingroup debug - * @endcond - */ - - /** - * @cond mips32 - * @defgroup mips32debug mips32 - * @ingroup debug - * @endcond - */ - - /** - * @cond ppc32 - * @defgroup ppc32debug ppc32 - * @ingroup debug - * @endcond - */ - - /** - * @cond ppc64 - * @defgroup ppc64debug ppc64 - * @ingroup debug - * @endcond - */ - - /** - * @cond sparc64 - * @defgroup sparc64debug sparc64 - * @ingroup debug - * @endcond - */ - - /** @defgroup interrupt Interrupt handling and dispatching - * @ingroup kernel - */ - /** - * @defgroup genericinterrupt generic - * @ingroup interrupt - */ - - /** - * @cond amd64 - * @defgroup amd64interrupt amd64 - * @ingroup interrupt - * @endcond - */ - - /** - * @cond arm32 - * @defgroup arm32interrupt arm32 - * @ingroup interrupt - * @endcond - */ - - /** - * @cond ia32 - * @defgroup ia32interrupt ia32 - * @ingroup interrupt - * @endcond - */ - - /** - * @cond ia64 - * @defgroup ia64interrupt ia64 - * @ingroup interrupt - * @endcond - */ - - /** - * @cond mips32 - * @defgroup mips32interrupt mips32 - * @ingroup interrupt - * @endcond - */ - - /** - * @cond ppc32 - * @defgroup ppc32interrupt ppc32 - * @ingroup interrupt - * @endcond - */ - - /** - * @cond ppc64 - * @defgroup ppc64interrupt ppc64 - * @ingroup interrupt - * @endcond - */ - - /** - * @cond sparc64 - * @defgroup sparc64interrupt sparc64 - * @ingroup interrupt - * @endcond - */ +/** + * @defgroup genericdebug generic + * @ingroup debug + */ + +/** + * @cond amd64 + * @defgroup amd64debug ia32/amd64 + * @ingroup debug + * @endcond + */ + +/** + * @cond arm32 + * @defgroup arm32debug arm32 + * @ingroup debug + * @endcond + */ + +/** + * @cond ia32 + * @defgroup amd64debug ia32/amd64 + * @ingroup debug + * @endcond + */ + +/** + * @cond ia64 + * @defgroup ia64debug ia64 + * @ingroup debug + * @endcond + */ + +/** + * @cond mips32 + * @defgroup mips32debug mips32 + * @ingroup debug + * @endcond + */ + +/** + * @cond ppc32 + * @defgroup ppc32debug ppc32 + * @ingroup debug + * @endcond + */ + +/** + * @cond ppc64 + * @defgroup ppc64debug ppc64 + * @ingroup debug + * @endcond + */ + +/** + * @cond sparc64 + * @defgroup sparc64debug sparc64 + * @ingroup debug + * @endcond + */ + +/** @defgroup interrupt Interrupt handling and dispatching + * @ingroup kernel + */ +/** + * @defgroup genericinterrupt generic + * @ingroup interrupt + */ + +/** + * @cond amd64 + * @defgroup amd64interrupt amd64 + * @ingroup interrupt + * @endcond + */ + +/** + * @cond arm32 + * @defgroup arm32interrupt arm32 + * @ingroup interrupt + * @endcond + */ + +/** + * @cond ia32 + * @defgroup ia32interrupt ia32 + * @ingroup interrupt + * @endcond + */ + +/** + * @cond ia64 + * @defgroup ia64interrupt ia64 + * @ingroup interrupt + * @endcond + */ + +/** + * @cond mips32 + * @defgroup mips32interrupt mips32 + * @ingroup interrupt + * @endcond + */ + +/** + * @cond ppc32 + * @defgroup ppc32interrupt ppc32 + * @ingroup interrupt + * @endcond + */ + +/** + * @cond ppc64 + * @defgroup ppc64interrupt ppc64 + * @ingroup interrupt + * @endcond + */ + +/** + * @cond sparc64 + * @defgroup sparc64interrupt sparc64 + * @ingroup interrupt + * @endcond + */ @@ -369,65 +372,68 @@ * @ingroup kernel */ - /** @defgroup generic generic - * @ingroup others - */ - - /** @defgroup genarch genarch - * @ingroup others - */ - - /** - * @cond amd64 - * @defgroup amd64 amd64 - * @ingroup others - * @endcond - */ - - /** - * @cond arm32 - * @defgroup arm32 arm32 - * @ingroup others - * @endcond - */ - - /** - * @cond ia32 - * @defgroup ia32 ia32 - * @ingroup others - * @endcond - */ - - /** - * @cond ia64 - * @defgroup ia64 ia64 - * @ingroup others - * @endcond - */ - - /** - * @cond mips32 - * @defgroup mips32 mips32 - * @ingroup others - * @endcond - */ - - /** - * @cond ppc32 - * @defgroup ppc32 ppc32 - * @ingroup others - * @endcond - */ - - /** - * @cond ppc64 - * @defgroup ppc64 ppc64 - * @ingroup others - * @endcond - */ - - /** - * @cond sparc64 - * @defgroup sparc64 sparc64 - * @ingroup others - * @endcond - */ + +/** + * @defgroup generic generic + * @ingroup others + */ + +/** + * @defgroup genarch genarch + * @ingroup others + */ + +/** + * @cond amd64 + * @defgroup amd64 amd64 + * @ingroup others + * @endcond + */ + +/** + * @cond arm32 + * @defgroup arm32 arm32 + * @ingroup others + * @endcond + */ + +/** + * @cond ia32 + * @defgroup ia32 ia32 + * @ingroup others + * @endcond + */ + +/** + * @cond ia64 + * @defgroup ia64 ia64 + * @ingroup others + * @endcond + */ + +/** + * @cond mips32 + * @defgroup mips32 mips32 + * @ingroup others + * @endcond + */ + +/** + * @cond ppc32 + * @defgroup ppc32 ppc32 + * @ingroup others + * @endcond + */ + +/** + * @cond ppc64 + * @defgroup ppc64 ppc64 + * @ingroup others + * @endcond + */ + +/** + * @cond sparc64 + * @defgroup sparc64 sparc64 + * @ingroup others + * @endcond + */ Index: kernel/genarch/include/genarch/drivers/omap/irc.h =================================================================== --- kernel/genarch/include/genarch/drivers/omap/irc.h (revision 6ff23ff32c8aa9d6ad8d06f1743ca1b0d68c14bc) +++ kernel/genarch/include/genarch/drivers/omap/irc.h (revision 6413967015f267b604e85eb4c9a5f071af52a1b0) @@ -50,5 +50,6 @@ const uint8_t padd0[12]; - /* This register controls the various parameters + /* + * This register controls the various parameters * of the OCP interface. */ @@ -78,5 +79,6 @@ #define OMAP_IRC_CONTROL_NEWFIQAGR_FLAG (1 << 1) - /* This register controls protection of the other registers. + /* + * This register controls protection of the other registers. * This register can only be accessed in priviledged mode, regardless * of the current value of the protection bit. @@ -85,5 +87,6 @@ #define OMAP_IRC_PROTECTION_FLAG (1 << 0) - /* This register controls the clock auto-idle for the functional + /* + * This register controls the clock auto-idle for the functional * clock and the input synchronizers. */ @@ -119,15 +122,18 @@ ioport32_t mir; - /* This register is used to clear the interrupt mask bits, + /* + * This register is used to clear the interrupt mask bits, * Write 1 clears the mask bit to 0. */ ioport32_t mir_clear; - /* This register is used to set the interrupt mask bits, + /* + * This register is used to set the interrupt mask bits, * Write 1 sets the mask bit to 1. */ ioport32_t mir_set; - /* This register is used to set the software interrupt bits, + /* + * This register is used to set the software interrupt bits, * it is also used to read the current active software * interrupts. @@ -136,5 +142,6 @@ ioport32_t isr_set; - /* This register is used to clear the software interrups bits. + /* + * This register is used to clear the software interrups bits. * Write 1 clears the software interrupt bits to 0. */ @@ -150,8 +157,12 @@ const uint32_t padd4[8 * OMAP_IRC_IRQ_GROUPS_PAD]; - /* These registers contain the priority for the interrups and + /* + * These registers contain the priority for the interrups and * the FIQ/IRQ steering. */ ioport32_t ilr[OMAP_IRC_IRQ_COUNT]; + +} omap_irc_regs_t; + /* 0 = Interrupt routed to IRQ, 1 = interrupt routed to FIQ */ #define OMAP_IRC_ILR_FIQNIRQ_FLAG (1 << 0) @@ -159,6 +170,4 @@ #define OMAP_IRC_ILR_PRIORITY_SHIFT 2 -} omap_irc_regs_t; - static inline void omap_irc_init(omap_irc_regs_t *regs) { @@ -167,10 +176,12 @@ /* Initialization sequence */ - /* 1 - Program the SYSCONFIG register: if necessary, enable the + /* + * 1 - Program the SYSCONFIG register: if necessary, enable the * autogating by setting the AUTOIDLE bit. */ regs->sysconfig &= ~OMAP_IRC_SYSCONFIG_AUTOIDLE_FLAG; - /* 2 - Program the IDLE register: if necessary, disable functional + /* + * 2 - Program the IDLE register: if necessary, disable functional * clock autogating or enable synchronizer autogating by setting * the FUNCIDLE bit or the TURBO bit accordingly. @@ -179,5 +190,6 @@ regs->idle &= ~OMAP_IRC_IDLE_TURBO_FLAG; - /* 3 - Program ILRm register for each interrupt line: Assign a + /* + * 3 - Program ILRm register for each interrupt line: Assign a * priority level and set the FIQNIRQ bit for an FIQ interrupt * (by default, interrupts are mapped to IRQ and @@ -188,5 +200,6 @@ regs->ilr[i] = 0; - /* 4 - Program the MIRn register: Enable interrupts (by default, + /* + * 4 - Program the MIRn register: Enable interrupts (by default, * all interrupt lines are masked). */ Index: kernel/generic/include/ddi/ddi.h =================================================================== --- kernel/generic/include/ddi/ddi.h (revision 6ff23ff32c8aa9d6ad8d06f1743ca1b0d68c14bc) +++ kernel/generic/include/ddi/ddi.h (revision 6413967015f267b604e85eb4c9a5f071af52a1b0) @@ -43,11 +43,15 @@ /** Structure representing contiguous physical memory area. */ typedef struct { - link_t link; /**< Linked list link */ + /** Linked list link */ + link_t link; - uintptr_t pbase; /**< Physical base of the area. */ - pfn_t frames; /**< Number of frames in the area. */ - bool unpriv; /**< Allow mapping by unprivileged tasks. */ - bool mapped; /**< Indicate whether the area is actually - mapped. */ + /** Physical base of the area. */ + uintptr_t pbase; + /** Number of frames in the area. */ + pfn_t frames; + /** Allow mapping by unprivileged tasks. */ + bool unpriv; + /** Indicate whether the area is actually mapped. */ + bool mapped; } parea_t;