Changeset 61c0402 in mainline for kernel/arch


Ignore:
Timestamp:
2010-01-15T19:36:53Z (16 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
92bee46
Parents:
50f9c3a (diff), 963462af (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.
Message:

Merge mainline changes.

Location:
kernel/arch
Files:
16 added
68 edited

Legend:

Unmodified
Added
Removed

  • kernel/arch/amd64/Makefile.inc

    r50f9c3a r61c0402  
    3838
    3939FPU_NO_CFLAGS = -mno-sse -mno-sse2
    40 CMN1 = -m64 -mcmodel=kernel -mno-red-zone -fno-unwind-tables
     40CMN1 = -m64 -mcmodel=kernel -mno-red-zone -fno-unwind-tables -fno-omit-frame-pointer
    4141GCC_CFLAGS += $(CMN1)
    4242ICC_CFLAGS += $(CMN1)
    … …  
    6060        arch/$(KARCH)/src/boot/boot.S \
    6161        arch/$(KARCH)/src/boot/memmap.c \
     62        arch/$(KARCH)/src/debug/stacktrace.c \
     63        arch/$(KARCH)/src/debug/stacktrace_asm.S \
    6264        arch/$(KARCH)/src/pm.c \
    6365        arch/$(KARCH)/src/context.S \

  • kernel/arch/amd64/_link.ld.in

    r50f9c3a r61c0402  
    4444                *(COMMON);              /* global variables */
    4545
     46                . = ALIGN(8);
    4647                symbol_table = .;
    4748                *(symtab.*);            /* Symbol table, must be LAST symbol!*/

  • kernel/arch/amd64/include/context.h

    r50f9c3a r61c0402  
    4646#define SP_DELTA     16
    4747
     48#define context_set(c, _pc, stack, size) \
     49        do { \
     50                (c)->pc = (uintptr_t) (_pc); \
     51                (c)->sp = ((uintptr_t) (stack)) + (size) - SP_DELTA; \
     52                (c)->rbp = 0; \
     53        } while (0)
     54
    4855#endif /* KERNEL */
    4956

  • kernel/arch/amd64/include/interrupt.h

    r50f9c3a r61c0402  
    7070
    7171/** This is passed to interrupt handlers */
    72 typedef struct {
     72typedef struct istate {
    7373        uint64_t rax;
    7474        uint64_t rcx;
    … …  
    8080        uint64_t r10;
    8181        uint64_t r11;
     82        uint64_t rbp;
    8283        uint64_t error_word;
    8384        uint64_t rip;
    … …  
    101102        return istate->rip;
    102103}
     104static inline unative_t istate_get_fp(istate_t *istate)
     105{
     106        return istate->rbp;
     107}
    103108
    104109extern void (* disable_irqs_function)(uint16_t irqmask);

  • kernel/arch/amd64/include/mm/page.h

    r50f9c3a r61c0402  
    177177#define PFERR_CODE_ID           (1 << 4)
    178178
    179 static inline int get_pt_flags(pte_t *pt, size_t i)
     179/** Page Table Entry. */
     180typedef struct {
     181        unsigned present : 1;
     182        unsigned writeable : 1;
     183        unsigned uaccessible : 1;
     184        unsigned page_write_through : 1;
     185        unsigned page_cache_disable : 1;
     186        unsigned accessed : 1;
     187        unsigned dirty : 1;
     188        unsigned unused: 1;
     189        unsigned global : 1;
     190        unsigned soft_valid : 1;                /**< Valid content even if present bit is cleared. */
     191        unsigned avl : 2;
     192        unsigned addr_12_31 : 30;
     193        unsigned addr_32_51 : 21;
     194        unsigned no_execute : 1;
     195} __attribute__ ((packed)) pte_t;
     196
     197static inline unsigned int get_pt_flags(pte_t *pt, size_t i)
    180198{
    181199        pte_t *p = &pt[i];

  • kernel/arch/amd64/include/types.h

    r50f9c3a r61c0402  
    8282#define PRIxn "llx"
    8383
    84 /** Page Table Entry. */
    85 typedef struct {
    86         unsigned present : 1;
    87         unsigned writeable : 1;
    88         unsigned uaccessible : 1;
    89         unsigned page_write_through : 1;
    90         unsigned page_cache_disable : 1;
    91         unsigned accessed : 1;
    92         unsigned dirty : 1;
    93         unsigned unused: 1;
    94         unsigned global : 1;
    95         unsigned soft_valid : 1;                /**< Valid content even if present bit is cleared. */
    96         unsigned avl : 2;
    97         unsigned addr_12_31 : 30;
    98         unsigned addr_32_51 : 21;
    99         unsigned no_execute : 1;
    100 } __attribute__ ((packed)) pte_t;
    101 
    10284#endif
    10385

  • kernel/arch/amd64/src/amd64.c

    r50f9c3a r61c0402  
    6767#include <ddi/irq.h>
    6868#include <sysinfo/sysinfo.h>
     69#include <memstr.h>
    6970
    7071/** Disable I/O on non-privileged levels
    … …  
    211212                        i8042_wire(i8042_instance, kbrd);
    212213                        trap_virtual_enable_irqs(1 << IRQ_KBD);
     214                        trap_virtual_enable_irqs(1 << IRQ_MOUSE);
    213215                }
    214216        }
    … …  
    218220         * self-sufficient.
    219221         */
    220         sysinfo_set_item_val("kbd", NULL, true);
    221         sysinfo_set_item_val("kbd.inr", NULL, IRQ_KBD);
    222         sysinfo_set_item_val("kbd.address.physical", NULL,
     222        sysinfo_set_item_val("i8042", NULL, true);
     223        sysinfo_set_item_val("i8042.inr_a", NULL, IRQ_KBD);
     224        sysinfo_set_item_val("i8042.inr_b", NULL, IRQ_MOUSE);
     225        sysinfo_set_item_val("i8042.address.physical", NULL,
    223226            (uintptr_t) I8042_BASE);
    224         sysinfo_set_item_val("kbd.address.kernel", NULL,
     227        sysinfo_set_item_val("i8042.address.kernel", NULL,
    225228            (uintptr_t) I8042_BASE);
    226229#endif

  • kernel/arch/amd64/src/asm_utils.S

    r50f9c3a r61c0402  
    2727#
    2828
    29 #define IREGISTER_SPACE 72
     29#define IREGISTER_SPACE 80
    3030
    3131#define IOFFSET_RAX     0x0
    … …  
    3838#define IOFFSET_R10     0x38
    3939#define IOFFSET_R11     0x40
     40#define IOFFSET_RBP     0x48
    4041
    4142#  Mask for interrupts 0 - 31 (bits 0 - 31) where 0 means that int has no error word
    … …  
    179180        movq %r10, IOFFSET_R10(%rsp)
    180181        movq %r11, IOFFSET_R11(%rsp)
     182        movq %rbp, IOFFSET_RBP(%rsp)
    181183.endm
    182184
    … …  
    191193        movq IOFFSET_R10(%rsp), %r10
    192194        movq IOFFSET_R11(%rsp), %r11
     195        movq IOFFSET_RBP(%rsp), %rbp
    193196.endm
    194197
    … …  
    235238        cld
    236239
     240        # Stop stack traces here
     241        xorq %rbp, %rbp
     242
    237243        movq $(\i), %rdi        # %rdi - first parameter
    238244        movq %rsp, %rsi         # %rsi - pointer to istate

  • kernel/arch/amd64/src/boot/boot.S

    r50f9c3a r61c0402  
    174174        call arch_pre_main
    175175       
     176        # create the first stack frame
     177        pushq $0
     178        movq %rsp, %rbp
     179
    176180        call main_bsp
    177181       
    … …  
    329333
    330334extended_cpuid_msg:
    331         .asciz "Extended CPUID not supported. System halted."
     335        .asciz "Error: Extended CPUID not supported -- CPU is not 64-bit. System halted."
    332336long_mode_msg:
    333         .asciz "64 bit long mode not supported. System halted."
     337        .asciz "Error: 64-bit long mode not supported. System halted."
    334338noexecute_msg:
    335         .asciz "No-execute pages not supported. System halted."
     339        .asciz "Error: No-execute pages not supported. System halted."
    336340fx_msg:
    337         .asciz "FXSAVE/FXRESTORE instructions not supported. System halted."
     341        .asciz "Error: FXSAVE/FXRESTORE instructions not supported. System halted."
    338342sse2_msg:
    339         .asciz "SSE2 instructions not supported. System halted."
     343        .asciz "Error: SSE2 instructions not supported. System halted."

  • kernel/arch/amd64/src/interrupt.c

    r50f9c3a r61c0402  
    5353#include <ddi/irq.h>
    5454#include <symtab.h>
     55#include <stacktrace.h>
    5556
    5657/*
    … …  
    8081            istate->r10, istate->r11);
    8182        printf("%%rsp=%#llx\n", &istate->stack[0]);
     83       
     84        stack_trace_istate(istate);
    8285}
    8386
    … …  
    9699        decode_istate(n, istate);
    97100        panic("Unserviced interrupt.");
     101}
     102
     103static void de_fault(int n, istate_t *istate)
     104{
     105        fault_if_from_uspace(istate, "Divide error.");
     106        decode_istate(n, istate);
     107        panic("Divide error.");
    98108}
    99109
    … …  
    200210        }
    201211       
     212        exc_register(0, "de_fault", (iroutine) de_fault);
    202213        exc_register(7, "nm_fault", (iroutine) nm_fault);
    203214        exc_register(12, "ss_fault", (iroutine) ss_fault);

  • kernel/arch/amd64/src/mm/page.c

    r50f9c3a r61c0402  
    203203{
    204204        if (last_frame + ALIGN_UP(size, PAGE_SIZE) > KA2PA(KERNEL_ADDRESS_SPACE_END_ARCH))
    205                 panic("Unable to map physical memory %p (%d bytes).", physaddr, size)
     205                panic("Unable to map physical memory %p (%d bytes).", physaddr,
     206                    size);
    206207       
    207208        uintptr_t virtaddr = PA2KA(last_frame);

  • kernel/arch/amd64/src/smp/ap.S

    r50f9c3a r61c0402  
    9999start64:
    100100        movq (ctx), %rsp
     101        pushq $0
     102        movq %rsp, %rbp
    101103        call main_ap - AP_BOOT_OFFSET + BOOT_OFFSET   # never returns
    102104

  • kernel/arch/arm32/Makefile.inc

    r50f9c3a r61c0402  
    3838ATSIGN = %
    3939
    40 GCC_CFLAGS += -fno-zero-initialized-in-bss
     40GCC_CFLAGS += -fno-zero-initialized-in-bss -mapcs-frame
    4141
    4242BITS = 32
    … …  
    5757        arch/$(KARCH)/src/exception.c \
    5858        arch/$(KARCH)/src/userspace.c \
     59        arch/$(KARCH)/src/debug/stacktrace.c \
     60        arch/$(KARCH)/src/debug/stacktrace_asm.S \
    5961        arch/$(KARCH)/src/mm/as.c \
    6062        arch/$(KARCH)/src/mm/frame.c \
    6163        arch/$(KARCH)/src/mm/page.c \
    6264        arch/$(KARCH)/src/mm/tlb.c \
    63         arch/$(KARCH)/src/mm/page_fault.c
     65        arch/$(KARCH)/src/mm/page_fault.c \
     66        arch/$(KARCH)/src/ras.c
    6467
    6568ifeq ($(MACHINE),testarm)

  • kernel/arch/arm32/_link.ld.in

    r50f9c3a r61c0402  
    3434                *(.sdata);
    3535                *(.reginfo);
     36                . = ALIGN(8);
    3637                symbol_table = .;
    3738                *(symtab.*);

  • kernel/arch/arm32/include/atomic.h

    r50f9c3a r61c0402  
    3737#define KERN_arm32_ATOMIC_H_
    3838
     39#include <arch/asm.h>
     40
    3941/** Atomic addition.
    4042 *
    … …  
    4749static inline long atomic_add(atomic_t *val, int i)
    4850{
    49         int ret;
    50         volatile long *mem = &(val->count);
    51        
    52         asm volatile (
    53                 "1:\n"
    54                         "ldr r2, [%[mem]]\n"
    55                         "add r3, r2, %[i]\n"
    56                         "str r3, %[ret]\n"
    57                         "swp r3, r3, [%[mem]]\n"
    58                         "cmp r3, r2\n"
    59                         "bne 1b\n"
    60                 : [ret] "=m" (ret)
    61                 : [mem] "r" (mem), [i] "r" (i)
    62                 : "r3", "r2"
    63         );
     51        long ret;
     52
     53        /*
     54         * This implementation is for UP pre-ARMv6 systems where we do not have
     55         * the LDREX and STREX instructions.
     56         */
     57        ipl_t ipl = interrupts_disable();
     58        val->count += i;
     59        ret = val->count;
     60        interrupts_restore(ipl);
    6461       
    6562        return ret;

  • kernel/arch/arm32/include/context.h

    r50f9c3a r61c0402  
    4343#define SP_DELTA  (0 + ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT))
    4444
     45#define context_set(c, _pc, stack, size) \
     46        do { \
     47                (c)->pc = (uintptr_t) (_pc); \
     48                (c)->sp = ((uintptr_t) (stack)) + (size) - SP_DELTA; \
     49                (c)->fp = 0; \
     50        } while (0)
     51
    4552#ifndef __ASM__
    4653
    … …  
    6269        uint32_t r9;
    6370        uint32_t r10;
    64         uint32_t r11;
     71        uint32_t fp;    /* r11 */
    6572       
    6673        ipl_t ipl;

  • kernel/arch/arm32/include/exception.h

    r50f9c3a r61c0402  
    8686
    8787/** Struct representing CPU state saved when an exception occurs. */
    88 typedef struct {
     88typedef struct istate {
    8989        uint32_t spsr;
    9090        uint32_t sp;
    … …  
    102102        uint32_t r9;
    103103        uint32_t r10;
    104         uint32_t r11;
     104        uint32_t fp;
    105105        uint32_t r12;
    106106
    … …  
    133133}
    134134
     135static inline unative_t istate_get_fp(istate_t *istate)
     136{
     137        return istate->fp;
     138}
     139
    135140
    136141extern void install_exception_handlers(void);

  • kernel/arch/arm32/include/mm/as.h

    r50f9c3a r61c0402  
    5454#define as_destructor_arch(as)                  (as != as)
    5555#define as_create_arch(as, flags)               (as != as)
    56 #define as_install_arch(as)
    5756#define as_deinstall_arch(as)
    5857#define as_invalidate_translation_cache(as, page, cnt)

  • kernel/arch/arm32/include/mm/page.h

    r50f9c3a r61c0402  
    7575/* Get PTE address accessors for each level. */
    7676#define GET_PTL1_ADDRESS_ARCH(ptl0, i) \
    77         ((pte_t *) ((((pte_level0_t *)(ptl0))[(i)]).coarse_table_addr << 10))
     77        ((pte_t *) ((((pte_t *)(ptl0))[(i)].l0).coarse_table_addr << 10))
    7878#define GET_PTL2_ADDRESS_ARCH(ptl1, i) \
    7979        (ptl1)
    … …  
    8181        (ptl2)
    8282#define GET_FRAME_ADDRESS_ARCH(ptl3, i) \
    83         ((uintptr_t) ((((pte_level1_t *)(ptl3))[(i)]).frame_base_addr << 12))
     83        ((uintptr_t) ((((pte_t *)(ptl3))[(i)].l1).frame_base_addr << 12))
    8484
    8585/* Set PTE address accessors for each level. */
    8686#define SET_PTL0_ADDRESS_ARCH(ptl0) \
    87         (set_ptl0_addr((pte_level0_t *) (ptl0)))
     87        (set_ptl0_addr((pte_t *) (ptl0)))
    8888#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) \
    89         (((pte_level0_t *) (ptl0))[(i)].coarse_table_addr = (a) >> 10)
     89        (((pte_t *) (ptl0))[(i)].l0.coarse_table_addr = (a) >> 10)
    9090#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a)
    9191#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a)
    9292#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) \
    93         (((pte_level1_t *) (ptl3))[(i)].frame_base_addr = (a) >> 12)
     93        (((pte_t *) (ptl3))[(i)].l1.frame_base_addr = (a) >> 12)
    9494
    9595/* Get PTE flags accessors for each level. */
    9696#define GET_PTL1_FLAGS_ARCH(ptl0, i) \
    97         get_pt_level0_flags((pte_level0_t *) (ptl0), (size_t) (i))
     97        get_pt_level0_flags((pte_t *) (ptl0), (size_t) (i))
    9898#define GET_PTL2_FLAGS_ARCH(ptl1, i) \
    9999        PAGE_PRESENT
    … …  
    101101        PAGE_PRESENT
    102102#define GET_FRAME_FLAGS_ARCH(ptl3, i) \
    103         get_pt_level1_flags((pte_level1_t *) (ptl3), (size_t) (i))
     103        get_pt_level1_flags((pte_t *) (ptl3), (size_t) (i))
    104104
    105105/* Set PTE flags accessors for each level. */
    106106#define SET_PTL1_FLAGS_ARCH(ptl0, i, x) \
    107         set_pt_level0_flags((pte_level0_t *) (ptl0), (size_t) (i), (x))
     107        set_pt_level0_flags((pte_t *) (ptl0), (size_t) (i), (x))
    108108#define SET_PTL2_FLAGS_ARCH(ptl1, i, x)
    109109#define SET_PTL3_FLAGS_ARCH(ptl2, i, x)
    110110#define SET_FRAME_FLAGS_ARCH(ptl3, i, x) \
    111         set_pt_level1_flags((pte_level1_t *) (ptl3), (size_t) (i), (x))
     111        set_pt_level1_flags((pte_t *) (ptl3), (size_t) (i), (x))
    112112
    113113/* Macros for querying the last-level PTE entries. */
    … …  
    115115        (*((uint32_t *) (pte)) != 0)
    116116#define PTE_PRESENT_ARCH(pte) \
    117         (((pte_level0_t *) (pte))->descriptor_type != 0)
     117        (((pte_t *) (pte))->l0.descriptor_type != 0)
    118118#define PTE_GET_FRAME_ARCH(pte) \
    119         (((pte_level1_t *) (pte))->frame_base_addr << FRAME_WIDTH)
     119        (((pte_t *) (pte))->l1.frame_base_addr << FRAME_WIDTH)
    120120#define PTE_WRITABLE_ARCH(pte) \
    121         (((pte_level1_t *) (pte))->access_permission_0 == \
    122             PTE_AP_USER_RW_KERNEL_RW)
     121        (((pte_t *) (pte))->l1.access_permission_0 == PTE_AP_USER_RW_KERNEL_RW)
    123122#define PTE_EXECUTABLE_ARCH(pte) \
    124123        1
    … …  
    159158} ATTRIBUTE_PACKED pte_level1_t;
    160159
     160typedef union {
     161        pte_level0_t l0;
     162        pte_level1_t l1;
     163} pte_t;
    161164
    162165/* Level 1 page tables access permissions */
    … …  
    191194 * @param pt    Pointer to the page table to set.
    192195 */   
    193 static inline void set_ptl0_addr(pte_level0_t *pt)
     196static inline void set_ptl0_addr(pte_t *pt)
    194197{
    195198        asm volatile (
    … …  
    205208 *  @param i      Index of the entry to return.
    206209 */
    207 static inline int get_pt_level0_flags(pte_level0_t *pt, size_t i)
    208 {
    209         pte_level0_t *p = &pt[i];
     210static inline int get_pt_level0_flags(pte_t *pt, size_t i)
     211{
     212        pte_level0_t *p = &pt[i].l0;
    210213        int np = (p->descriptor_type == PTE_DESCRIPTOR_NOT_PRESENT);
    211214
    … …  
    220223 *  @param i      Index of the entry to return.
    221224 */
    222 static inline int get_pt_level1_flags(pte_level1_t *pt, size_t i)
    223 {
    224         pte_level1_t *p = &pt[i];
     225static inline int get_pt_level1_flags(pte_t *pt, size_t i)
     226{
     227        pte_level1_t *p = &pt[i].l1;
    225228
    226229        int dt = p->descriptor_type;
    … …  
    245248 *  @param flags  new flags
    246249 */
    247 static inline void set_pt_level0_flags(pte_level0_t *pt, size_t i, int flags)
    248 {
    249         pte_level0_t *p = &pt[i];
     250static inline void set_pt_level0_flags(pte_t *pt, size_t i, int flags)
     251{
     252        pte_level0_t *p = &pt[i].l0;
    250253
    251254        if (flags & PAGE_NOT_PRESENT) {
    … …  
    273276 *  @param flags  New flags.
    274277 */ 
    275 static inline void set_pt_level1_flags(pte_level1_t *pt, size_t i, int flags)
    276 {
    277         pte_level1_t *p = &pt[i];
     278static inline void set_pt_level1_flags(pte_t *pt, size_t i, int flags)
     279{
     280        pte_level1_t *p = &pt[i].l1;
    278281       
    279282        if (flags & PAGE_NOT_PRESENT) {

  • kernel/arch/arm32/include/types.h

    r50f9c3a r61c0402  
    8787#define PRIxn "x"       /**< Format for hexadecimal (u)native_t. */
    8888
    89 /** Page table entry.
    90  *
    91  *  We have different structs for level 0 and level 1 page table entries.
    92  *  See page.h for definition of pte_level*_t.
    93  */
    94 typedef struct {
    95         unsigned dummy : 32;
    96 } pte_t;
    97 
    9889#endif
    9990

  • kernel/arch/arm32/src/arm32.c

    r50f9c3a r61c0402  
    4848#include <macros.h>
    4949#include <string.h>
     50#include <arch/ras.h>
    5051
    5152#ifdef MACHINE_testarm
    … …  
    8889        exception_init();
    8990        interrupt_init();
     91
     92        /* Initialize Restartable Atomic Sequences support. */
     93        ras_init();
    9094       
    9195        machine_output_init();
    … …  
    136140        uint8_t *stck;
    137141       
    138         tlb_invalidate_all();
    139142        stck = &THREAD->kstack[THREAD_STACK_SIZE - SP_DELTA];
    140143        supervisor_sp = (uintptr_t) stck;

  • kernel/arch/arm32/src/exc_handler.S

    r50f9c3a r61c0402  
    123123        stmfd r13!, {r2}
    1241242:
     125        # Stop stack traces here
     126        mov fp, #0
    125127.endm
    126128
    … …  
    148150        mov r0, #0
    149151        mov r1, r13
    150         bl exc_dispatch
     152        bl ras_check
    151153        LOAD_REGS_FROM_STACK
    152154
    … …  
    156158        mov r0, #5
    157159        mov r1, r13
    158         bl exc_dispatch
     160        bl ras_check
    159161        LOAD_REGS_FROM_STACK
    160162
    … …  
    164166        mov r0, #6
    165167        mov r1, r13
    166         bl exc_dispatch
     168        bl ras_check
    167169        LOAD_REGS_FROM_STACK
    168170
    … …  
    171173        mov r0, #1
    172174        mov r1, r13
    173         bl exc_dispatch
     175        bl ras_check
    174176        LOAD_REGS_FROM_STACK
    175177
    … …  
    179181        mov r0, #3
    180182        mov r1, r13
    181         bl exc_dispatch
     183        bl ras_check
    182184        LOAD_REGS_FROM_STACK
    183185
    … …  
    187189        mov r0, #4
    188190        mov r1, r13
    189         bl exc_dispatch
     191        bl ras_check
    190192        LOAD_REGS_FROM_STACK
    191193
    … …  
    195197        mov r0, #2
    196198        mov r1, r13
    197         bl exc_dispatch
    198         LOAD_REGS_FROM_STACK
    199 
     199        bl ras_check
     200        LOAD_REGS_FROM_STACK
     201

  • kernel/arch/arm32/src/exception.c

    r50f9c3a r61c0402  
    4242#include <print.h>
    4343#include <syscall/syscall.h>
     44#include <stacktrace.h>
    4445
    4546#ifdef MACHINE_testarm
    … …  
    183184        printf(" r4: %x    r5: %x    r6: %x    r7: %x\n",
    184185            istate->r4, istate->r5, istate->r6, istate->r7);
    185         printf(" r8: %x    r8: %x   r10: %x   r11: %x\n",
    186             istate->r8, istate->r9, istate->r10, istate->r11);
     186        printf(" r8: %x    r8: %x   r10: %x    fp: %x\n",
     187            istate->r8, istate->r9, istate->r10, istate->fp);
    187188        printf(" r12: %x    sp: %x    lr: %x  spsr: %x\n",
    188189            istate->r12, istate->sp, istate->lr, istate->spsr);
    189190       
    190191        printf(" pc: %x\n", istate->pc);
     192
     193        stack_trace_istate(istate);
    191194}
    192195

  • kernel/arch/arm32/src/mm/as.c

    r50f9c3a r61c0402  
    3636#include <arch/mm/as.h>
    3737#include <genarch/mm/as_pt.h>
     38#include <genarch/mm/page_pt.h>
    3839#include <genarch/mm/asid_fifo.h>
    3940#include <mm/as.h>
     41#include <mm/tlb.h>
    4042#include <arch.h>
    4143
    … …  
    4951}
    5052
     53void as_install_arch(as_t *as)
     54{
     55        tlb_invalidate_all();
     56}
     57
    5158/** @}
    5259 */

  • kernel/arch/arm32/src/mm/page.c

    r50f9c3a r61c0402  
    8888            KA2PA(KERNEL_ADDRESS_SPACE_END_ARCH)) {
    8989                panic("Unable to map physical memory %p (%d bytes).",
    90                     physaddr, size)
     90                    physaddr, size);
    9191        }
    9292       

  • kernel/arch/arm32/src/mm/page_fault.c

    r50f9c3a r61c0402  
    181181
    182182        if (ret == AS_PF_FAULT) {
     183                fault_if_from_uspace(istate, "Page fault: %#x.", badvaddr);
    183184                print_istate(istate);
    184185                printf("page fault - pc: %x, va: %x, status: %x(%x), "
    … …  
    186187                    access);
    187188               
    188                 fault_if_from_uspace(istate, "Page fault: %#x.", badvaddr);
    189189                panic("Page fault.");
    190190        }

  • kernel/arch/arm32/src/start.S

    r50f9c3a r61c0402  
    6969        bl arch_pre_main
    7070       
     71        #
     72        # Create the first stack frame.
     73        #
     74        mov fp, #0
     75        mov ip, sp
     76        push {fp, ip, lr, pc}
     77        sub fp, ip, #4
     78
    7179        bl main_bsp
    7280

  • kernel/arch/arm32/src/userspace.c

    r50f9c3a r61c0402  
    3535
    3636#include <userspace.h>
     37#include <arch/ras.h>
    3738
    3839/** Struct for holding all general purpose registers.
    … …  
    7475        ustate.r1 = 0;
    7576
     77        /* pass the RAS page address in %r2 */
     78        ustate.r2 = (uintptr_t) ras_page;
     79
    7680        /* clear other registers */
    77         ustate.r2 = ustate.r3  = ustate.r4  = ustate.r5 =
    78             ustate.r6  = ustate.r7  = ustate.r8  = ustate.r9 = ustate.r10 =
    79             ustate.r11 = ustate.r12 = ustate.lr = 0;
     81        ustate.r3  = ustate.r4  = ustate.r5 = ustate.r6 = ustate.r7 =
     82            ustate.r8 = ustate.r9 = ustate.r10 = ustate.r11 = ustate.r12 =
     83            ustate.lr = 0;
    8084
    8185        /* set user stack */

  • kernel/arch/ia32/Makefile.inc

    r50f9c3a r61c0402  
    7878        arch/$(KARCH)/src/context.S \
    7979        arch/$(KARCH)/src/debug/panic.s \
     80        arch/$(KARCH)/src/debug/stacktrace.c \
     81        arch/$(KARCH)/src/debug/stacktrace_asm.S \
    8082        arch/$(KARCH)/src/delay.s \
    8183        arch/$(KARCH)/src/asm.S \

  • kernel/arch/ia32/_link.ld.in

    r50f9c3a r61c0402  
    4242                hardcoded_unmapped_kdata_size = .;
    4343                LONG(unmapped_kdata_end - unmapped_kdata_start);
     44                . = ALIGN(8);
    4445                symbol_table = .;
    4546                *(symtab.*);            /* Symbol table, must be LAST symbol! */

  • kernel/arch/ia32/include/context.h

    r50f9c3a r61c0402  
    4949#define SP_DELTA        (8 + STACK_ITEM_SIZE)
    5050
     51#define context_set(c, _pc, stack, size) \
     52        do { \
     53                (c)->pc = (uintptr_t) (_pc); \
     54                (c)->sp = ((uintptr_t) (stack)) + (size) - SP_DELTA; \
     55                (c)->ebp = 0; \
     56        } while (0)
     57
    5158#endif /* KERNEL */
    5259

  • kernel/arch/ia32/include/interrupt.h

    r50f9c3a r61c0402  
    6969#define VECTOR_DEBUG_IPI                (IVT_FREEBASE + 2)
    7070
    71 typedef struct {
     71typedef struct istate {
    7272        uint32_t eax;
    7373        uint32_t ecx;
    7474        uint32_t edx;
     75        uint32_t ebp;
    7576
    7677        uint32_t gs;
    … …  
    102103}
    103104
     105static inline unative_t istate_get_fp(istate_t *istate)
     106{
     107        return istate->ebp;
     108}
     109
    104110extern void (* disable_irqs_function)(uint16_t irqmask);
    105111extern void (* enable_irqs_function)(uint16_t irqmask);

  • kernel/arch/ia32/include/mm/page.h

    r50f9c3a r61c0402  
    146146#define PFERR_CODE_RSVD         (1 << 3)       
    147147
    148 static inline int get_pt_flags(pte_t *pt, size_t i)
     148/** Page Table Entry. */
     149typedef struct {
     150        unsigned present : 1;
     151        unsigned writeable : 1;
     152        unsigned uaccessible : 1;
     153        unsigned page_write_through : 1;
     154        unsigned page_cache_disable : 1;
     155        unsigned accessed : 1;
     156        unsigned dirty : 1;
     157        unsigned pat : 1;
     158        unsigned global : 1;
     159        unsigned soft_valid : 1;        /**< Valid content even if the present bit is not set. */
     160        unsigned avl : 2;
     161        unsigned frame_address : 20;
     162} __attribute__ ((packed)) pte_t;
     163
     164static inline unsigned int get_pt_flags(pte_t *pt, size_t i)
    149165{
    150166        pte_t *p = &pt[i];

  • kernel/arch/ia32/include/types.h

    r50f9c3a r61c0402  
    8080#define PRIxn "x"       /**< Format for hexadecimal (u)native_t. */
    8181
    82 /** Page Table Entry. */
    83 typedef struct {
    84         unsigned present : 1;
    85         unsigned writeable : 1;
    86         unsigned uaccessible : 1;
    87         unsigned page_write_through : 1;
    88         unsigned page_cache_disable : 1;
    89         unsigned accessed : 1;
    90         unsigned dirty : 1;
    91         unsigned pat : 1;
    92         unsigned global : 1;
    93         unsigned soft_valid : 1;        /**< Valid content even if the present bit is not set. */
    94         unsigned avl : 2;
    95         unsigned frame_address : 20;
    96 } __attribute__ ((packed)) pte_t;
    97 
    9882#endif
    9983

  • kernel/arch/ia32/src/asm.S

    r50f9c3a r61c0402  
    269269        pushl %gs
    270270
     271        pushl %ebp
    271272        pushl %edx
    272273        pushl %ecx
    … …  
    278279        movw %ax, %es
    279280
    280         cld
     281        # stop stack traces here
     282        xorl %ebp, %ebp
    281283
    282284        pushl %esp          # *istate
    … …  
    290292        popl %ecx
    291293        popl %edx
     294        popl %ebp
    292295       
    293296        popl %gs

  • kernel/arch/ia32/src/boot/boot.S

    r50f9c3a r61c0402  
    9494        pushl grub_eax
    9595        call arch_pre_main
     96
     97        # Create the first stack frame
     98        pushl $0
     99        movl %esp, %ebp
    96100       
    97101        call main_bsp

  • kernel/arch/ia32/src/ia32.c

    r50f9c3a r61c0402  
    6868#include <sysinfo/sysinfo.h>
    6969#include <arch/boot/boot.h>
     70#include <memstr.h>
    7071
    7172#ifdef CONFIG_SMP
    … …  
    169170                        i8042_wire(i8042_instance, kbrd);
    170171                        trap_virtual_enable_irqs(1 << IRQ_KBD);
     172                        trap_virtual_enable_irqs(1 << IRQ_MOUSE);
    171173                }
    172174        }
    … …  
    176178         * self-sufficient.
    177179         */
    178         sysinfo_set_item_val("kbd", NULL, true);
    179         sysinfo_set_item_val("kbd.inr", NULL, IRQ_KBD);
    180         sysinfo_set_item_val("kbd.address.physical", NULL,
     180        sysinfo_set_item_val("i8042", NULL, true);
     181        sysinfo_set_item_val("i8042.inr_a", NULL, IRQ_KBD);
     182        sysinfo_set_item_val("i8042.inr_b", NULL, IRQ_MOUSE);
     183        sysinfo_set_item_val("i8042.address.physical", NULL,
    181184            (uintptr_t) I8042_BASE);
    182         sysinfo_set_item_val("kbd.address.kernel", NULL,
     185        sysinfo_set_item_val("i8042.address.kernel", NULL,
    183186            (uintptr_t) I8042_BASE);
    184187#endif

  • kernel/arch/ia32/src/interrupt.c

    r50f9c3a r61c0402  
    5353#include <ddi/irq.h>
    5454#include <symtab.h>
     55#include <stacktrace.h>
    5556
    5657/*
    … …  
    7980        printf("stack: %#lx, %#lx, %#lx, %#lx\n", istate->stack[0], istate->stack[1], istate->stack[2], istate->stack[3]);
    8081        printf("       %#lx, %#lx, %#lx, %#lx\n", istate->stack[4], istate->stack[5], istate->stack[6], istate->stack[7]);
     82
     83        stack_trace_istate(istate);
    8184}
    8285
    … …  
    9699        decode_istate(istate);
    97100        panic("Unserviced interrupt: %d.", n);
     101}
     102
     103static void de_fault(int n, istate_t *istate)
     104{
     105        fault_if_from_uspace(istate, "Divide error.");
     106
     107        decode_istate(istate);
     108        panic("Divide error.");
    98109}
    99110
    … …  
    215226        }
    216227       
     228        exc_register(0, "de_fault", (iroutine) de_fault);
    217229        exc_register(7, "nm_fault", (iroutine) nm_fault);
    218230        exc_register(12, "ss_fault", (iroutine) ss_fault);

  • kernel/arch/ia32/src/mm/page.c

    r50f9c3a r61c0402  
    8080{
    8181        if (last_frame + ALIGN_UP(size, PAGE_SIZE) > KA2PA(KERNEL_ADDRESS_SPACE_END_ARCH))
    82                 panic("Unable to map physical memory %p (%d bytes).", physaddr, size)
     82                panic("Unable to map physical memory %p (%d bytes).", physaddr, size);
    8383       
    8484        uintptr_t virtaddr = PA2KA(last_frame);

  • kernel/arch/ia32/src/smp/ap.S

    r50f9c3a r61c0402  
    7878        addl $0x80000000, %esp                  # PA2KA(ctx.sp)
    7979       
     80        pushl $0                                # create the first stack frame
     81        movl %esp, %ebp
     82
    8083        jmpl $KTEXT, $main_ap
    8184

  • kernel/arch/ia64/Makefile.inc

    r50f9c3a r61c0402  
    5353        arch/$(KARCH)/src/context.S \
    5454        arch/$(KARCH)/src/cpu/cpu.c \
     55        arch/$(KARCH)/src/debug/stacktrace.c \
     56        arch/$(KARCH)/src/debug/stacktrace_asm.S \
    5557        arch/$(KARCH)/src/ivt.S \
    5658        arch/$(KARCH)/src/interrupt.c \

  • kernel/arch/ia64/_link.ld.in

    r50f9c3a r61c0402  
    3737                *(COMMON);
    3838
     39                . = ALIGN(8);
    3940                symbol_table = .;
    4041                *(symtab.*);            /* Symbol table, must be LAST symbol!*/

  • kernel/arch/ia64/include/interrupt.h

    r50f9c3a r61c0402  
    7272#define EOI  0  /**< The actual value doesn't matter. */
    7373
    74 typedef struct {
     74typedef struct istate {
    7575        uint128_t f2;
    7676        uint128_t f3;
    … …  
    143143}
    144144
     145static inline unative_t istate_get_fp(istate_t *istate)
     146{
     147        return 0;       /* FIXME */
     148}
     149
    145150static inline int istate_from_uspace(istate_t *istate)
    146151{

  • kernel/arch/ia64/include/mm/asid.h

    r50f9c3a r61c0402  
    5050 * but those extra bits are not used by the kernel.
    5151 */
    52 #define RIDS_PER_ASID           7
     52#define RIDS_PER_ASID           8
    5353
    5454#define RID_MAX                 262143          /* 2^18 - 1 */
    55 #define RID_KERNEL              0
    56 #define RID_INVALID             1
     55#define RID_KERNEL7             7
    5756
    58 #define ASID2RID(asid, vrn)     (((asid)>RIDS_PER_ASID)?(((asid)*RIDS_PER_ASID)+(vrn)):(asid))
    59 #define RID2ASID(rid)           ((rid)/RIDS_PER_ASID)
     57#define ASID2RID(asid, vrn) \
     58        ((asid) * RIDS_PER_ASID + (vrn))
    6059
    61 #define ASID_MAX_ARCH           (RID_MAX/RIDS_PER_ASID)
     60#define RID2ASID(rid) \
     61        ((rid) / RIDS_PER_ASID)
     62
     63#define ASID_MAX_ARCH           (RID_MAX / RIDS_PER_ASID)
    6264
    6365#endif

  • kernel/arch/ia64/src/cpu/cpu.c

    r50f9c3a r61c0402  
    3737#include <arch/register.h>
    3838#include <print.h>
     39#include <memstr.h>
    3940
    4041void cpu_arch_init(void)

  • kernel/arch/ia64/src/ia64.c

    r50f9c3a r61c0402  
    203203        }
    204204       
    205         sysinfo_set_item_val("kbd", NULL, true);
    206         sysinfo_set_item_val("kbd.inr", NULL, IRQ_KBD);
    207         sysinfo_set_item_val("kbd.type", NULL, KBD_LEGACY);
    208         sysinfo_set_item_val("kbd.address.physical", NULL,
     205        sysinfo_set_item_val("i8042", NULL, true);
     206        sysinfo_set_item_val("i8042.inr_a", NULL, IRQ_KBD);
     207        sysinfo_set_item_val("i8042.inr_b", NULL, IRQ_MOUSE);
     208        sysinfo_set_item_val("i8042.address.physical", NULL,
    209209            (uintptr_t) I8042_BASE);
    210         sysinfo_set_item_val("kbd.address.kernel", NULL,
     210        sysinfo_set_item_val("i8042.address.kernel", NULL,
    211211            (uintptr_t) I8042_BASE);
    212212#endif

  • kernel/arch/ia64/src/mm/page.c

    r50f9c3a r61c0402  
    7171
    7272        /*
    73          * First set up kernel region register.
    74          * This is redundant (see start.S) but we keep it here just for sure.
    75          */
    76         rr.word = rr_read(VRN_KERNEL);
    77         rr.map.ve = 0;                  /* disable VHPT walker */
    78         rr.map.ps = PAGE_WIDTH;
    79         rr.map.rid = ASID2RID(ASID_KERNEL, VRN_KERNEL);
    80         rr_write(VRN_KERNEL, rr.word);
    81         srlz_i();
    82         srlz_d();
    83 
    84         /*
    85          * And setup the rest of region register.
     73         * Set up kernel region registers.
     74         * VRN_KERNEL has already been set in start.S.
     75         * For paranoia reasons, we set it again.
    8676         */
    8777        for(i = 0; i < REGION_REGISTERS; i++) {
    88                 /* skip kernel rr */
    89                 if (i == VRN_KERNEL)
    90                         continue;
    91        
    9278                rr.word = rr_read(i);
    9379                rr.map.ve = 0;          /* disable VHPT walker */
    94                 rr.map.rid = RID_KERNEL;
     80                rr.map.rid = ASID2RID(ASID_KERNEL, i);
    9581                rr.map.ps = PAGE_WIDTH;
    9682                rr_write(i, rr.word);

  • kernel/arch/ia64/src/start.S

    r50f9c3a r61c0402  
    7474        movl r10 = (RR_MASK)
    7575        and r9 = r10, r9
    76         movl r10 = ((RID_KERNEL << RID_SHIFT) | (KERNEL_PAGE_WIDTH << PS_SHIFT))
     76        movl r10 = (((RID_KERNEL7) << RID_SHIFT) | (KERNEL_PAGE_WIDTH << PS_SHIFT))
    7777        or r9 = r10, r9
    7878       

  • kernel/arch/mips32/Makefile.inc

    r50f9c3a r61c0402  
    7070        arch/$(KARCH)/src/debugger.c \
    7171        arch/$(KARCH)/src/cpu/cpu.c \
     72        arch/$(KARCH)/src/debug/stacktrace.c \
     73        arch/$(KARCH)/src/debug/stacktrace_asm.S \
    7274        arch/$(KARCH)/src/mm/frame.c \
    7375        arch/$(KARCH)/src/mm/page.c \

  • kernel/arch/mips32/_link.ld.in

    r50f9c3a r61c0402  
    3838                *(.bss);                        /* uninitialized static variables */
    3939                *(COMMON);                      /* global variables */
     40                . = ALIGN(8);
    4041                symbol_table = .;
    4142                *(symtab.*);

  • kernel/arch/mips32/include/exception.h

    r50f9c3a r61c0402  
    5858#define EXC_VCED        31
    5959
    60 typedef struct {
     60typedef struct istate {
    6161        uint32_t at;
    6262        uint32_t v0;
    … …  
    102102        return istate->epc;
    103103}
     104static inline unative_t istate_get_fp(istate_t *istate)
     105{
     106        return 0;       /* FIXME */
     107}
    104108
    105109extern void exception(istate_t *istate);

  • kernel/arch/mips32/include/mm/page.h

    r50f9c3a r61c0402  
    141141#include <arch/exception.h>
    142142
    143 static inline int get_pt_flags(pte_t *pt, size_t i)
     143/** Page Table Entry. */
     144typedef struct {
     145        unsigned g : 1;                 /**< Global bit. */
     146        unsigned p : 1;                 /**< Present bit. */
     147        unsigned d : 1;                 /**< Dirty bit. */
     148        unsigned cacheable : 1;         /**< Cacheable bit. */
     149        unsigned : 1;                   /**< Unused. */
     150        unsigned soft_valid : 1;        /**< Valid content even if not present. */
     151        unsigned pfn : 24;              /**< Physical frame number. */
     152        unsigned w : 1;                 /**< Page writable bit. */
     153        unsigned a : 1;                 /**< Accessed bit. */
     154} pte_t;
     155
     156
     157static inline unsigned int get_pt_flags(pte_t *pt, size_t i)
    144158{
    145159        pte_t *p = &pt[i];

  • kernel/arch/mips32/include/types.h

    r50f9c3a r61c0402  
    8080#define PRIxn "x"       /**< Format for hexadecimal (u)native_t. */
    8181
    82 /** Page Table Entry. */
    83 typedef struct {
    84         unsigned g : 1;                 /**< Global bit. */
    85         unsigned p : 1;                 /**< Present bit. */
    86         unsigned d : 1;                 /**< Dirty bit. */
    87         unsigned cacheable : 1;         /**< Cacheable bit. */
    88         unsigned : 1;                   /**< Unused. */
    89         unsigned soft_valid : 1;        /**< Valid content even if not present. */
    90         unsigned pfn : 24;              /**< Physical frame number. */
    91         unsigned w : 1;                 /**< Page writable bit. */
    92         unsigned a : 1;                 /**< Accessed bit. */
    93 } pte_t;
    94 
    9582#endif
    9683

  • kernel/arch/ppc32/Makefile.inc

    r50f9c3a r61c0402  
    4646        arch/$(KARCH)/src/context.S \
    4747        arch/$(KARCH)/src/debug/panic.s \
     48        arch/$(KARCH)/src/debug/stacktrace.c \
     49        arch/$(KARCH)/src/debug/stacktrace_asm.S \
    4850        arch/$(KARCH)/src/fpu_context.S \
    4951        arch/$(KARCH)/src/boot/boot.S \

  • kernel/arch/ppc32/_link.ld.in

    r50f9c3a r61c0402  
    5151                *(COMMON);      /* global variables */
    5252               
     53                . = ALIGN(8);
    5354                symbol_table = .;
    5455                *(symtab.*);    /* Symbol table, must be LAST symbol!*/

  • kernel/arch/ppc32/include/exception.h

    r50f9c3a r61c0402  
    3939#include <arch/regutils.h>
    4040
    41 typedef struct {
     41typedef struct istate {
    4242        uint32_t r0;
    4343        uint32_t r2;
    … …  
    9898}
    9999
     100static inline unative_t istate_get_fp(istate_t *istate)
     101{
     102        return istate->sp;
     103}
     104
    100105#endif
    101106

  • kernel/arch/ppc32/include/mm/page.h

    r50f9c3a r61c0402  
    131131#include <arch/interrupt.h>
    132132
    133 static inline int get_pt_flags(pte_t *pt, size_t i)
     133/** Page Table Entry. */
     134typedef struct {
     135        unsigned present : 1;             /**< Present bit. */
     136        unsigned page_write_through : 1;  /**< Write thought caching. */
     137        unsigned page_cache_disable : 1;  /**< No caching. */
     138        unsigned accessed : 1;            /**< Accessed bit. */
     139        unsigned global : 1;              /**< Global bit. */
     140        unsigned valid : 1;               /**< Valid content even if not present. */
     141        unsigned pfn : 20;                /**< Physical frame number. */
     142} pte_t;
     143
     144static inline unsigned int get_pt_flags(pte_t *pt, size_t i)
    134145{
    135146        pte_t *p = &pt[i];

  • kernel/arch/ppc32/include/types.h

    r50f9c3a r61c0402  
    8282#define PRIxn "x"
    8383
    84 /** Page Table Entry. */
    85 typedef struct {
    86         unsigned present : 1;             /**< Present bit. */
    87         unsigned page_write_through : 1;  /**< Write thought caching. */
    88         unsigned page_cache_disable : 1;  /**< No caching. */
    89         unsigned accessed : 1;            /**< Accessed bit. */
    90         unsigned global : 1;              /**< Global bit. */
    91         unsigned valid : 1;               /**< Valid content even if not present. */
    92         unsigned pfn : 20;                /**< Physical frame number. */
    93 } pte_t;
    94 
    9584#endif
    9685

  • kernel/arch/ppc32/src/mm/as.c

    r50f9c3a r61c0402  
    3535#include <arch/mm/as.h>
    3636#include <genarch/mm/as_pt.h>
     37#include <genarch/mm/page_pt.h>
    3738#include <genarch/mm/asid_fifo.h>
    3839#include <arch.h>

  • kernel/arch/ppc32/src/mm/page.c

    r50f9c3a r61c0402  
    5151            KA2PA(KERNEL_ADDRESS_SPACE_END_ARCH))
    5252                panic("Unable to map physical memory %p (%" PRIs " bytes).",
    53                     physaddr, size)
     53                    physaddr, size);
    5454       
    5555        uintptr_t virtaddr = PA2KA(last_frame);

  • kernel/arch/ppc32/src/mm/tlb.c

    r50f9c3a r61c0402  
    3838#include <interrupt.h>
    3939#include <mm/as.h>
     40#include <mm/page.h>
    4041#include <arch.h>
    4142#include <print.h>

  • kernel/arch/ppc32/src/ppc32.c

    r50f9c3a r61c0402  
    4444#include <genarch/ofw/pci.h>
    4545#include <userspace.h>
     46#include <mm/page.h>
    4647#include <proc/uarg.h>
    4748#include <console/console.h>

  • kernel/arch/sparc64/Makefile.inc

    r50f9c3a r61c0402  
    5454ARCH_SOURCES = \
    5555        arch/$(KARCH)/src/cpu/cpu.c \
     56        arch/$(KARCH)/src/debug/stacktrace.c \
     57        arch/$(KARCH)/src/debug/stacktrace_asm.S \
    5658        arch/$(KARCH)/src/asm.S \
    5759        arch/$(KARCH)/src/panic.S \

  • kernel/arch/sparc64/_link.ld.in

    r50f9c3a r61c0402  
    3636                *(COMMON);                  /* global variables */
    3737               
     38                . = ALIGN(8);
    3839                symbol_table = .;
    3940                *(symtab.*);                /* Symbol table, must be LAST symbol!*/

  • kernel/arch/sparc64/include/interrupt.h

    r50f9c3a r61c0402  
    5050};             
    5151
    52 typedef struct {
     52typedef struct istate {
    5353        uint64_t        tnpc;
    5454        uint64_t        tpc;
    … …  
    7171}
    7272
     73static inline unative_t istate_get_fp(istate_t *istate)
     74{
     75        return 0;       /* TODO */
     76}
     77
    7378#endif
    7479

  • kernel/arch/sparc64/src/context.S

    r50f9c3a r61c0402  
    2828
    2929#include <arch/context_offset.h>
    30 
    31 /**
    32  * Both context_save_arch() and context_restore_arch() are
    33  * leaf-optimized procedures. This kind of optimization
    34  * is very important and prevents any implicit window
    35  * spill/fill/clean traps in these very core kernel
    36  * functions.
    37  */
    38        
    39 #include <arch/context_offset.h>
     30#include <arch/arch.h>
     31#include <arch/regdef.h>
    4032
    4133.text   
    … …  
    4436.global context_restore_arch
    4537
     38/*
     39 * context_save_arch() is required not to create its own stack frame. See the
     40 * generic context.h for explanation.
     41 */
    4642context_save_arch:
     43        #
     44        # Force all our active register windows to memory so that we can find
     45        # them there even if e.g. the thread is migrated to another processor.
     46        #
     47        flushw
     48
    4749        CONTEXT_SAVE_ARCH_CORE %o0
    4850        retl
    … …  
    5153context_restore_arch:
    5254        #
    53         # Flush all active windows.
    54         # This is essential, because CONTEXT_LOAD overwrites
    55         # %sp of CWP - 1 with the value written to %fp of CWP.
    56         # Flushing all active windows mitigates this problem
    57         # as CWP - 1 becomes the overlap window.
     55        # Forget all previous windows, they are not going to be needed again.
     56        # Enforce a window fill on the next RESTORE instruction by setting
     57        # CANRESTORE to zero and other window configuration registers
     58        # accordingly. Note that the same can be achieved by executing the
     59        # FLUSHW instruction, but since we don't need to remember the previous
     60        # windows, we do the former and save thus some unnecessary window
     61        # spills.
    5862        #
    59         flushw
    60        
     63        rdpr %pstate, %l0
     64        andn %l0, PSTATE_IE_BIT, %l1
     65        wrpr %l1, %pstate
     66        wrpr %g0, 0, %canrestore
     67        wrpr %g0, 0, %otherwin
     68        wrpr %g0, NWINDOWS - 2, %cansave
     69        wrpr %l0, %pstate
     70
    6171        CONTEXT_RESTORE_ARCH_CORE %o0
    6272        retl

  • kernel/arch/sparc64/src/mm/tlb.c

    r50f9c3a r61c0402  
    3737#include <mm/as.h>
    3838#include <mm/asid.h>
     39#include <genarch/mm/page_ht.h>
    3940#include <arch/mm/frame.h>
    4041#include <arch/mm/page.h>

  • kernel/arch/sparc64/src/trap/trap_table.S

    r50f9c3a r61c0402  
    652652         * spilled to kernel memory (i.e. register window buffer). Moreover,
    653653         * if the scheduler was called in the meantime, all valid windows
    654          * belonging to other threads were spilled by context_restore().
     654         * belonging to other threads were spilled by context_save().
    655655         * If OTHERWIN is non-zero, then some userspace windows are still
    656656         * valid. Others might have been spilled. However, the CWP pointer
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