Changeset 5f97ef44 in mainline for uspace/drv/audio
- Timestamp:
- 2018-07-13T14:10:15Z (8 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- e3787a0
- Parents:
- 9912f49
- git-author:
- Jiří Zárevúcky <jiri.zarevucky@…> (2018-07-13 14:08:57)
- git-committer:
- Jiří Zárevúcky <jiri.zarevucky@…> (2018-07-13 14:10:15)
- Location:
- uspace/drv/audio/hdaudio
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
uspace/drv/audio/hdaudio/hdactl.c
r9912f49 r5f97ef44 78 78 break; 79 79 80 async_usleep(1000);80 fibril_usleep(1000); 81 81 --wcnt; 82 82 } … … 94 94 break; 95 95 96 async_usleep(1000);96 fibril_usleep(1000); 97 97 --wcnt; 98 98 } … … 415 415 wcnt = corb_wait_max; 416 416 while (hda_corb_avail(hda) < 1 && wcnt > 0) { 417 async_usleep(100);417 fibril_usleep(100); 418 418 --wcnt; 419 419 } … … 558 558 559 559 ddf_msg(LVL_NOTE, "Waiting for controller to initialize."); 560 async_usleep(100 * 1000);560 fibril_usleep(100 * 1000); 561 561 --cnt; 562 562 } … … 579 579 ctl->iss, ctl->oss, ctl->bss); 580 580 /* Give codecs enough time to enumerate themselves */ 581 async_usleep(codec_enum_wait_us);581 fibril_usleep(codec_enum_wait_us); 582 582 583 583 ddf_msg(LVL_NOTE, "STATESTS = 0x%x", -
uspace/drv/audio/hdaudio/stream.c
r9912f49 r5f97ef44 206 206 hda_reg8_write(&sdregs->ctl1, ctl); 207 207 208 async_usleep(100 * 1000);208 fibril_usleep(100 * 1000); 209 209 210 210 ctl = hda_reg8_read(&sdregs->ctl1); … … 212 212 hda_reg8_write(&sdregs->ctl1, ctl); 213 213 214 async_usleep(100 * 1000);214 fibril_usleep(100 * 1000); 215 215 } 216 216
Note:
See TracChangeset
for help on using the changeset viewer.
