Changeset 5f70118 in mainline for kernel/arch/amd64/src

Timestamp:

2010-01-10T12:16:59Z (16 years ago)

Author:

Jiri Svoboda <jiri@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

c77a64f

Parents:

309ede1 (diff), 1ac3a52 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.

Message:

Merge mainline changes.

Location:

kernel/arch/amd64/src

Files:

• amd64.c (modified) (3 diffs)
• asm_utils.S (modified) (5 diffs)
• boot/boot.S (modified) (2 diffs)
• cpu/cpu.c (modified) (2 diffs)
• debug/stacktrace.c (added)
• debug/stacktrace_asm.S (added)
• interrupt.c (modified) (4 diffs)
• mm/page.c (modified) (1 diff)
• smp/ap.S (modified) (1 diff)

kernel/arch/amd64/src/amd64.c

@@ -67 +67 @@
 #include <ddi/irq.h>
 #include <sysinfo/sysinfo.h>
+#include <memstr.h>
 
 /** Disable I/O on non-privileged levels
@@ -211 +212 @@
                         i8042_wire(i8042_instance, kbrd);
                         trap_virtual_enable_irqs(1 << IRQ_KBD);
+                        trap_virtual_enable_irqs(1 << IRQ_MOUSE);
                 }
         }
@@ -218 +220 @@
          * self-sufficient.
          */
-        sysinfo_set_item_val("kbd", NULL, true);
-        sysinfo_set_item_val("kbd.inr", NULL, IRQ_KBD);
-        sysinfo_set_item_val("kbd.address.physical", NULL,
+        sysinfo_set_item_val("i8042", NULL, true);
+        sysinfo_set_item_val("i8042.inr_a", NULL, IRQ_KBD);
+        sysinfo_set_item_val("i8042.inr_b", NULL, IRQ_MOUSE);
+        sysinfo_set_item_val("i8042.address.physical", NULL,
             (uintptr_t) I8042_BASE);
-        sysinfo_set_item_val("kbd.address.kernel", NULL,
+        sysinfo_set_item_val("i8042.address.kernel", NULL,
             (uintptr_t) I8042_BASE);
 #endif

kernel/arch/amd64/src/asm_utils.S

@@ -27 +27 @@
 #
 
-#define IREGISTER_SPACE 72 
+#define IREGISTER_SPACE 80
 
 #define IOFFSET_RAX     0x0
@@ -38 +38 @@
 #define IOFFSET_R10     0x38
 #define IOFFSET_R11     0x40
+#define IOFFSET_RBP     0x48
 
 #  Mask for interrupts 0 - 31 (bits 0 - 31) where 0 means that int has no error word
@@ -179 +180 @@
         movq %r10, IOFFSET_R10(%rsp)
         movq %r11, IOFFSET_R11(%rsp)
+        movq %rbp, IOFFSET_RBP(%rsp)
 .endm
 
@@ -191 +193 @@
         movq IOFFSET_R10(%rsp), %r10
         movq IOFFSET_R11(%rsp), %r11
+        movq IOFFSET_RBP(%rsp), %rbp
 .endm
 
@@ -235 +238 @@
         cld
 
+        # Stop stack traces here
+        xorq %rbp, %rbp
+
         movq $(\i), %rdi        # %rdi - first parameter
         movq %rsp, %rsi         # %rsi - pointer to istate

kernel/arch/amd64/src/boot/boot.S

@@ -174 +174 @@
         call arch_pre_main
         
+        # create the first stack frame
+        pushq $0
+        movq %rsp, %rbp
+
         call main_bsp
         
@@ -329 +333 @@
 
 extended_cpuid_msg:
-        .asciz "Extended CPUID not supported. System halted."
+        .asciz "Error: Extended CPUID not supported -- CPU is not 64-bit. System halted."
 long_mode_msg:
-        .asciz "64 bit long mode not supported. System halted."
+        .asciz "Error: 64-bit long mode not supported. System halted."
 noexecute_msg:
-        .asciz "No-execute pages not supported. System halted."
+        .asciz "Error: No-execute pages not supported. System halted."
 fx_msg:
-        .asciz "FXSAVE/FXRESTORE instructions not supported. System halted."
+        .asciz "Error: FXSAVE/FXRESTORE instructions not supported. System halted."
 sse2_msg:
-        .asciz "SSE2 instructions not supported. System halted."
+        .asciz "Error: SSE2 instructions not supported. System halted."

kernel/arch/amd64/src/cpu/cpu.c

@@ -130 +130 @@
         CPU->arch.vendor = VendorUnknown;
         if (has_cpuid()) {
-                cpuid(0, &info);
+                cpuid(INTEL_CPUID_LEVEL, &info);
 
                 /*
@@ -150 +150 @@
                 }
                                 
-                cpuid(1, &info);
+                cpuid(INTEL_CPUID_STANDARD, &info);
                 CPU->arch.family = (info.cpuid_eax >> 8) & 0xf;
                 CPU->arch.model = (info.cpuid_eax >> 4) & 0xf;

kernel/arch/amd64/src/interrupt.c

@@ -53 +53 @@
 #include <ddi/irq.h>
 #include <symtab.h>
+#include <stacktrace.h>
 
 /*
@@ -80 +81 @@
             istate->r10, istate->r11);
         printf("%%rsp=%#llx\n", &istate->stack[0]);
+        
+        stack_trace_istate(istate);
 }
 
@@ -96 +99 @@
         decode_istate(n, istate);
         panic("Unserviced interrupt.");
+}
+
+static void de_fault(int n, istate_t *istate)
+{
+        fault_if_from_uspace(istate, "Divide error.");
+        decode_istate(n, istate);
+        panic("Divide error.");
 }
 
@@ -200 +210 @@
         }
         
+        exc_register(0, "de_fault", (iroutine) de_fault);
         exc_register(7, "nm_fault", (iroutine) nm_fault);
         exc_register(12, "ss_fault", (iroutine) ss_fault);

kernel/arch/amd64/src/mm/page.c

@@ -203 +203 @@
 {
         if (last_frame + ALIGN_UP(size, PAGE_SIZE) > KA2PA(KERNEL_ADDRESS_SPACE_END_ARCH))
-                panic("Unable to map physical memory %p (%d bytes).", physaddr, size)
+                panic("Unable to map physical memory %p (%d bytes).", physaddr,
+                    size);
         
         uintptr_t virtaddr = PA2KA(last_frame);

kernel/arch/amd64/src/smp/ap.S

@@ -99 +99 @@
 start64:
         movq (ctx), %rsp
+        pushq $0
+        movq %rsp, %rbp
         call main_ap - AP_BOOT_OFFSET + BOOT_OFFSET   # never returns