Changeset 5d36062 in mainline for uspace/drv/bus/usb/ohci/ohci_regs.h

Timestamp:

2011-07-13T21:02:44Z (13 years ago)

Author:

Jan Vesely <jano.vesely@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

159100a

Parents:

ca2815e

Message:

OHCI: Replace volatile uint with ioport type.

File:

• uspace/drv/bus/usb/ohci/ohci_regs.h (modified) (10 diffs)

uspace/drv/bus/usb/ohci/ohci_regs.h

@@ -34 +34 @@
 #ifndef DRV_OHCI_OHCI_REGS_H
 #define DRV_OHCI_OHCI_REGS_H
-#include <stdint.h>
+#include <sys/types.h>
 
 #define LEGACY_REGS_OFFSET 0x100
@@ -40 +40 @@
 /** OHCI memory mapped registers structure */
 typedef struct ohci_regs {
-        const volatile uint32_t revision;
+        const ioport32_t revision;
 #define R_REVISION_MASK (0x3f)
 #define R_REVISION_SHIFT (0)
 #define R_LEGACY_FLAG   (0x80)
 
-        volatile uint32_t control;
+        ioport32_t control;
 #define C_CBSR_MASK (0x3) /* Control-bulk service ratio */
 #define C_CBSR_1_1  (0x0)
@@ -78 +78 @@
 #define C_RWE (1 << 10)  /* Remote wakeup enable */
 
-        volatile uint32_t command_status;
+        ioport32_t command_status;
 #define CS_HCR (1 << 0)   /* Host controller reset */
 #define CS_CLF (1 << 1)   /* Control list filled */
@@ -90 +90 @@
          * writing causes enable/disable,
          * status is write-clean (writing 1 clears the bit*/
-        volatile uint32_t interrupt_status;
-        volatile uint32_t interrupt_enable;
-        volatile uint32_t interrupt_disable;
+        ioport32_t interrupt_status;
+        ioport32_t interrupt_enable;
+        ioport32_t interrupt_disable;
 #define I_SO   (1 << 0)   /* Scheduling overrun */
 #define I_WDH  (1 << 1)   /* Done head write-back */
@@ -104 +104 @@
 
         /** HCCA pointer (see hw_struct hcca.h) */
-        volatile uint32_t hcca;
+        ioport32_t hcca;
 #define HCCA_PTR_MASK 0xffffff00 /* HCCA is 256B aligned */
 
         /** Currently executed periodic endpoint */
-        const volatile uint32_t periodic_current;
+        const ioport32_t periodic_current;
 
         /** The first control endpoint */
-        volatile uint32_t control_head;
+        ioport32_t control_head;
 
         /** Currently executed control endpoint */
-        volatile uint32_t control_current;
+        ioport32_t control_current;
 
         /** The first bulk endpoint */
-        volatile uint32_t bulk_head;
+        ioport32_t bulk_head;
 
         /** Currently executed bulk endpoint */
-        volatile uint32_t bulk_current;
+        ioport32_t bulk_current;
 
         /** Done TD list, this value is periodically written to HCCA */
-        const volatile uint32_t done_head;
+        const ioport32_t done_head;
 
         /** Frame time and max packet size for all transfers */
-        volatile uint32_t fm_interval;
+        ioport32_t fm_interval;
 #define FMI_FI_MASK (0x3fff) /* Frame interval in bit times (should be 11999)*/
 #define FMI_FI_SHIFT (0)
@@ -134 +134 @@
 
         /** Bit times remaining in current frame */
-        const volatile uint32_t fm_remaining;
+        const ioport32_t fm_remaining;
 #define FMR_FR_MASK FMI_FI_MASK
 #define FMR_FR_SHIFT FMI_FI_SHIFT
@@ -140 +140 @@
 
         /** Frame number */
-        const volatile uint32_t fm_number;
+        const ioport32_t fm_number;
 #define FMN_NUMBER_MASK (0xffff)
 
         /** Remaining bit time in frame to start periodic transfers */
-        volatile uint32_t periodic_start;
+        ioport32_t periodic_start;
 #define PS_PS_MASK (0x3fff) /* bit time when periodic get priority (0x3e67) */
 
         /** Threshold for starting LS transaction */
-        volatile uint32_t ls_threshold;
+        ioport32_t ls_threshold;
 #define LST_LST_MASK (0x7fff)
 
         /** The first root hub control register */
-        volatile uint32_t rh_desc_a;
+        ioport32_t rh_desc_a;
 #define RHDA_NDS_MASK (0xff) /* Number of downstream ports, max 15 */
 #define RHDA_NDS_SHIFT (0)
@@ -164 +164 @@
 
         /** The other root hub control register */
-        volatile uint32_t rh_desc_b;
+        ioport32_t rh_desc_b;
 #define RHDB_DR_MASK (0xffff) /* Device removable mask */
 #define RHDB_DR_SHIFT (0)
@@ -176 +176 @@
 
         /** Root hub status register */
-        volatile uint32_t rh_status;
+        ioport32_t rh_status;
 #define RHS_LPS_FLAG  (1 <<  0)/* read: 0,
                                 * write: 0-no effect,
@@ -198 +198 @@
 
         /** Root hub per port status */
-        volatile uint32_t rh_port_status[];
+        ioport32_t rh_port_status[];
 #define RHPS_CCS_FLAG (1 << 0) /* r: current connect status,
                                 * w: 1-clear port enable, 0-nothing */