Changeset 5c5f522 in mainline
- Timestamp:
- 2012-01-25T20:09:29Z (13 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- cf858877
- Parents:
- 3ce5162 (diff), 5cd3d67 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the(diff)links above to see all the changes relative to each parent. - Location:
- uspace/drv/nic/rtl8139
- Files:
-
- 4 edited
Legend:
- Unmodified
- Added
- Removed
-
uspace/drv/nic/rtl8139/defs.h
r3ce5162 r5c5f522 29 29 /** @file rtl8139_defs.h 30 30 * 31 * Registers, bit positions and masks definition of the RTL8139 network family 32 * cards 33 */ 34 35 #ifndef RTL8139_DEFS_H_INCLUDED_ 36 #define RTL8139_DEFS_H_INCLUDED_ 31 * Registers, bit positions and masks definition 32 * of the RTL8139 network family cards 33 */ 34 35 #ifndef RTL8139_DEFS_H_ 36 #define RTL8139_DEFS_H_ 37 37 38 #include <sys/types.h> 38 39 #include <libarch/ddi.h> 39 40 40 41 /** The size of RTL8139 registers address space */ 42 #define RTL8139_IO_SIZE 256 43 44 /** The maximal transmitted frame length in bytes allowed according to RTL8139 45 * documentation (see SIZE part of TSD documentation) 46 */ 47 #define RTL8139_FRAME_MAX_LENGTH 1792 48 41 /** Size of RTL8139 registers address space */ 42 #define RTL8139_IO_SIZE 256 43 44 /** Maximal transmitted frame length 45 * 46 * Maximal transmitted frame length in bytes 47 * allowed according to the RTL8139 documentation 48 * (see SIZE part of TSD documentation). 49 * 50 */ 51 #define RTL8139_FRAME_MAX_LENGTH 1792 49 52 50 53 /** HW version 51 54 * 52 * as can be detected from HWVERID part of TCR 53 * (Transmit Configuration Register) 54 */ 55 enum rtl8139_version_id { 55 * As can be detected from HWVERID part of TCR 56 * (Transmit Configuration Register). 57 * 58 */ 59 typedef enum { 56 60 RTL8139 = 0, /**< RTL8139 */ 57 61 RTL8139A, /**< RTL8139A */ … … 66 70 RTL8101, /**< RTL8101 */ 67 71 RTL8139_VER_COUNT /**< Count of known RTL versions, the last value */ 68 }; 69 70 extern const char* model_names[RTL8139_VER_COUNT]; 72 } rtl8139_version_id_t; 71 73 72 74 /** Registers of RTL8139 family card offsets from the memory address base */ … … 75 77 MAC0 = IDR0, /**< Alias for IDR0 */ 76 78 77 // 0x 6 - 0x7 reserved79 // 0x06 - 0x07 reserved 78 80 79 81 MAR0 = 0x08, /**< Multicast mask registers 8 1b registers sequence */ … … 213 215 pio_write_8(io_base + CR9346, RTL8139_REGS_LOCKED); 214 216 } 217 215 218 /** Allow to change Config0-4 and BMCR register */ 216 219 static inline void rtl8139_regs_unlock(void *io_base) … … 417 420 418 421 /** Maximal runt frame size + 1 */ 419 #define RTL8139_RUNT_MAX_SIZE 64422 #define RTL8139_RUNT_MAX_SIZE 64 420 423 421 424 /** Bits in frame header */ … … 470 473 471 474 /** Mapping of HW version -> version ID */ 472 struct rtl8139_hwver_map { 473 uint32_t hwverid; 474 enum rtl8139_version_idver_id; /**< appropriate version id */475 struct rtl8139_hwver_map { 476 uint32_t hwverid; /**< HW version value in the register */ 477 rtl8139_version_id_t ver_id; /**< appropriate version id */ 475 478 }; 476 479 477 480 /** Mapping of HW version -> version ID */ 478 481 extern const struct rtl8139_hwver_map rtl8139_versions[RTL8139_VER_COUNT + 1]; 482 extern const char* model_names[RTL8139_VER_COUNT]; 479 483 480 484 /** Size in the frame header while copying from RxFIFO to Rx buffer */ 481 #define RTL8139_EARLY_SIZE UINT16_C(0xfff0) 485 #define RTL8139_EARLY_SIZE UINT16_C(0xfff0) 486 482 487 /** The only supported pause frame time value */ 483 #define RTL8139_PAUSE_VAL UINT16_C(0xFFFF)488 #define RTL8139_PAUSE_VAL UINT16_C(0xFFFF) 484 489 485 490 /** Size of the frame header in front of the received frame */ 486 #define RTL_FRAME_HEADER_SIZE 4491 #define RTL_FRAME_HEADER_SIZE 4 487 492 488 493 /** 8k buffer */ -
uspace/drv/nic/rtl8139/driver.c
r3ce5162 r5c5f522 55 55 /** Global mutex for work with shared irq structure */ 56 56 FIBRIL_MUTEX_INITIALIZE(irq_reg_lock); 57 57 58 /** Lock interrupt structure mutex */ 58 #define RTL8139_IRQ_STRUCT_LOCK() fibril_mutex_lock(&irq_reg_lock) 59 #define RTL8139_IRQ_STRUCT_LOCK() \ 60 fibril_mutex_lock(&irq_reg_lock) 61 59 62 /** Unlock interrupt structure mutex */ 60 #define RTL8139_IRQ_STRUCT_UNLOCK() fibril_mutex_unlock(&irq_reg_lock) 63 #define RTL8139_IRQ_STRUCT_UNLOCK() \ 64 fibril_mutex_unlock(&irq_reg_lock) 61 65 62 66 /** PCI clock frequency in kHz */ 63 #define RTL8139_PCI_FREQ_KHZ 3300064 65 #define RTL8139_AUTONEG_CAPS (ETH_AUTONEG_10BASE_T_HALF \66 | ETH_AUTONEG_10BASE_T_FULL | ETH_AUTONEG_100BASE_TX_HALF\67 |ETH_AUTONEG_100BASE_TX_FULL | ETH_AUTONEG_PAUSE_SYMETRIC)67 #define RTL8139_PCI_FREQ_KHZ 33000 68 69 #define RTL8139_AUTONEG_CAPS (ETH_AUTONEG_10BASE_T_HALF | \ 70 ETH_AUTONEG_10BASE_T_FULL | ETH_AUTONEG_100BASE_TX_HALF | \ 71 ETH_AUTONEG_100BASE_TX_FULL | ETH_AUTONEG_PAUSE_SYMETRIC) 68 72 69 73 /** Lock transmitter and receiver data 70 * This function shall be called whenever both transmitter and receiver locking 71 * to force safe lock ordering (deadlock prevention) 72 * 73 * @param rtl8139 RTL8139 private data 74 * 75 * This function shall be called whenever 76 * both transmitter and receiver locking 77 * to force safe lock ordering (deadlock prevention) 78 * 79 * @param rtl8139 RTL8139 private data 80 * 74 81 */ 75 82 inline static void rtl8139_lock_all(rtl8139_t *rtl8139) … … 82 89 /** Unlock transmitter and receiver data 83 90 * 84 * @param rtl8139 RTL8139 private data 91 * @param rtl8139 RTL8139 private data 92 * 85 93 */ 86 94 inline static void rtl8139_unlock_all(rtl8139_t *rtl8139) … … 457 465 pio_write_32(tsd, tsd_value); 458 466 return; 459 467 460 468 err_busy_no_inc: 461 469 err_size: … … 513 521 * 514 522 * @return The frame list node (not connected) 523 * 515 524 */ 516 525 static nic_frame_t *rtl8139_read_frame(nic_t *nic_data, … … 1215 1224 ddf_msg(LVL_DEBUG, "The device is initialized"); 1216 1225 return ret; 1217 1226 1218 1227 failed: 1219 1228 ddf_msg(LVL_ERROR, "The device initialization failed"); … … 1342 1351 1343 1352 return EOK; 1344 1353 1345 1354 err_fun_bind: 1346 1355 ddf_fun_unbind(fun); -
uspace/drv/nic/rtl8139/driver.h
r3ce5162 r5c5f522 30 30 #define RTL8139_DRIVER_H_ 31 31 32 #include <sys/types.h> 33 #include <stdint.h> 32 34 #include "defs.h" 33 35 #include "general.h" 34 #include <sys/types.h>35 #include <stdint.h>36 36 37 37 /** The driver name */ 38 #define NAME "rtl8139" 38 #define NAME "rtl8139" 39 39 40 /** Transmittion buffers count */ 40 #define TX_BUFF_COUNT 441 /** Size of buffer for one frame 42 * - 2kB 43 */ 44 #define TX_BUFF_SIZE (2 * 1024) 45 /** Countof pages to allocate for TxBuffers */46 #define TX_PAGES 241 #define TX_BUFF_COUNT 4 42 43 /** Size of buffer for one frame (2kB) */ 44 #define TX_BUFF_SIZE (2 * 1024) 45 46 /** Number of pages to allocate for TxBuffers */ 47 #define TX_PAGES 2 47 48 48 49 /** Size of the CRC after the received frame in the receiver buffer */ 49 #define RTL8139_CRC_SIZE 450 #define RTL8139_CRC_SIZE 4 50 51 51 52 /** The default mode of accepting unicast frames */ 52 #define RTL8139_RCR_UCAST_DEFAULT RCR_ACCEPT_PHYS_MATCH 53 #define RTL8139_RCR_UCAST_DEFAULT RCR_ACCEPT_PHYS_MATCH 54 53 55 /** The default mode of accepting multicast frames */ 54 #define RTL8139_RCR_MCAST_DEFAULT 0 56 #define RTL8139_RCR_MCAST_DEFAULT 0 57 55 58 /** The default mode of accepting broadcast frames */ 56 #define RTL8139_RCR_BCAST_DEFAULT RCR_ACCEPT_BROADCAST 59 #define RTL8139_RCR_BCAST_DEFAULT RCR_ACCEPT_BROADCAST 60 57 61 /** The default mode of accepting defect frames */ 58 #define RTL8139_RCR_DEFECT_DEFAULT 062 #define RTL8139_RCR_DEFECT_DEFAULT 0 59 63 60 64 /** Mask for accepting all multicast */ 61 #define RTL8139_MCAST_MASK_PROMISC UINT64_MAX62 63 /** Data 65 #define RTL8139_MCAST_MASK_PROMISC UINT64_MAX 66 67 /** Data */ 64 68 struct rtl8139_rcr_data { 65 69 /** Configuration part of RCR */ … … 134 138 135 139 /** Version of RT8139 controller */ 136 enum rtl8139_version_idhw_version;140 rtl8139_version_id_t hw_version; 137 141 } rtl8139_t; 138 139 142 140 143 /* ***** Pointers casting - for both amd64 and ia32 ***** */ … … 160 163 */ 161 164 #define IOADDR_TO_PTR(ioaddr) ((void*)((size_t)(ioaddr))) 162 163 164 165 165 166 /* ***** Bit operation macros ***** */ … … 177 178 * @return New value 178 179 */ 179 #define bit_set_part_g( src, value, mask, type) \180 #define bit_set_part_g(src, value, mask, type) \ 180 181 ((type)(((src) & ~((type)(mask))) | ((value) & (type)(mask)))) 181 182 … … 237 238 bit_set_part_32(tsd_value, (size) << TSD_SIZE_SHIFT, TSD_SIZE_MASK << TSD_SIZE_SHIFT) 238 239 239 240 240 #endif -
uspace/drv/nic/rtl8139/general.h
r3ce5162 r5c5f522 37 37 #include <unistd.h> 38 38 39 extern void* rtl8139_memcpy_wrapped(void *dest, const void *src_buf, 40 size_t src_offset, size_t src_size, size_t data_size); 41 39 /** Number of microseconds in second */ 40 #define RTL8139_USEC_IN_SEC 1000000 42 41 43 42 /** Structure for HW timer control */ 44 typedef struct rtl8139_timer_act{43 typedef struct { 45 44 /** Register value set in the last timer period */ 46 45 uint32_t last_val; 46 47 47 /** Register value set in the common timer period */ 48 48 uint32_t full_val; 49 49 50 50 /** Amount of full register periods in timer period */ 51 51 size_t full_skips; 52 52 53 /** Remaining full register periods to the next period end */ 53 54 size_t full_skips_remains; 55 54 56 /** Mark if there is a last run */ 55 57 int last_run; 56 58 } rtl8139_timer_act_t; 57 59 58 /** Count of microseconds in second */ 59 #define RTL8139_USEC_IN_SEC 1000000 60 61 extern int rtl8139_timer_act_init(rtl8139_timer_act_t *ta, uint32_t timer_freq, 62 const struct timeval *time); 63 extern int rtl8139_timer_act_step(rtl8139_timer_act_t *ta, uint32_t *new_reg); 64 60 extern void *rtl8139_memcpy_wrapped(void *, const void *, size_t, size_t, 61 size_t); 62 extern int rtl8139_timer_act_init(rtl8139_timer_act_t *, uint32_t, 63 const struct timeval *); 64 extern int rtl8139_timer_act_step(rtl8139_timer_act_t *, uint32_t *); 65 65 66 66 #endif
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