Index: kernel/genarch/include/genarch/drivers/omap/irc.h
===================================================================
--- kernel/genarch/include/genarch/drivers/omap/irc.h	(revision c310f9b28fce022b97a4f2d6a6cfcba70ee6e090)
+++ kernel/genarch/include/genarch/drivers/omap/irc.h	(revision 5bf69ac6ffa4fe1a737fc18458a2129f6c61ec96)
@@ -1,4 +1,5 @@
 /*
  * Copyright (c) 2012 Maurizio Lombardi
+ *
  * All rights reserved.
  *
@@ -38,6 +39,7 @@
 #define KERN_OMAP_IRQC_H_
 
-#include <genarch/drivers/omap/irc_regs.h>
 #include <typedefs.h>
+
+#define OMAP_IRC_IRQ_GROUPS_PAD (4 - OMAP_IRC_IRQ_GROUPS_COUNT)
 
 typedef struct {
@@ -107,5 +109,5 @@
 #define OMAP_IRC_THRESHOLD_PRIORITYTHRESHOLD_DISABLED 0xFF
 
-	const uint8_t padd[20];
+	const uint8_t padd3[20];
 
 	struct {
@@ -143,5 +145,7 @@
 		/* This register contains the FIQ status after masking. */
 		const ioport32_t pending_fiq;
-	} interrupts[4];
+	} interrupts[OMAP_IRC_IRQ_GROUPS_COUNT];
+
+	const uint32_t padd4[32 * OMAP_IRC_IRQ_GROUPS_PAD];
 
 	/* These registers contain the priority for the interrups and
@@ -156,5 +160,5 @@
 } omap_irc_regs_t;
 
-static inline void omap_irc_init(am335x_irc_regs_t *regs)
+static inline void omap_irc_init(omap_irc_regs_t *regs)
 {
 	int i;
@@ -186,5 +190,5 @@
 	 *     all interrupt lines are masked).
 	 */
-	for (i = 0; i < 4; ++i)
+	for (i = 0; i < OMAP_IRC_IRQ_GROUPS_COUNT; ++i)
 		regs->interrupts[i].mir_set = 0xFFFFFFFF;
 }
@@ -196,5 +200,5 @@
  * @return         The active IRQ interrupt number
  */
-static inline unsigned omap_irc_inum_get(am335x_irc_regs_t *regs)
+static inline unsigned omap_irc_inum_get(omap_irc_regs_t *regs)
 {
 	return regs->sir_irq & OMAP_IRC_SIR_IRQ_ACTIVEIRQ_MASK;
@@ -205,5 +209,5 @@
  * @param regs    Pointer to the irc memory mapped registers
  */
-static inline void omap_irc_irq_ack(am335x_irc_regs_t *regs)
+static inline void omap_irc_irq_ack(omap_irc_regs_t *regs)
 {
 	regs->control = OMAP_IRC_CONTROL_NEWIRQAGR_FLAG;
@@ -214,5 +218,5 @@
  * @param regs    Pointer to the irc memory mapped registers
  */
-static inline void omap_irc_fiq_ack(am335x_irc_regs_t *regs)
+static inline void omap_irc_fiq_ack(omap_irc_regs_t *regs)
 {
 	regs->control = OMAP_IRC_CONTROL_NEWFIQAGR_FLAG;
@@ -224,5 +228,5 @@
  * @param inum    The interrupt to be enabled
  */
-static inline void omap_irc_enable(am335x_irc_regs_t *regs, unsigned inum)
+static inline void omap_irc_enable(omap_irc_regs_t *regs, unsigned inum)
 {
 	ASSERT(inum < OMAP_IRC_IRQ_COUNT);
@@ -237,5 +241,5 @@
  * @param inum    The interrupt to be disabled
  */
-static inline void omap_irc_disable(am335x_irc_regs_t *regs, unsigned inum)
+static inline void omap_irc_disable(omap_irc_regs_t *regs, unsigned inum)
 {
 	ASSERT(inum < OMAP_IRC_IRQ_COUNT);
@@ -245,4 +249,35 @@
 }
 
+static inline void omap_irc_dump(omap_irc_regs_t *regs)
+{
+#define DUMP_REG(name) \
+	printf("%s %p(%x).\n", #name, &regs->name, regs->name);
+
+	DUMP_REG(revision);
+	DUMP_REG(sysconfig);
+	DUMP_REG(sysstatus);
+	DUMP_REG(sir_irq);
+	DUMP_REG(sir_fiq);
+	DUMP_REG(control);
+	DUMP_REG(protection);
+	DUMP_REG(idle);
+	DUMP_REG(irq_priority);
+	DUMP_REG(fiq_priority);
+	DUMP_REG(threshold);
+
+	for (int i = 0; i < OMAP_IRC_IRQ_GROUPS_COUNT; ++i) {
+		DUMP_REG(interrupts[i].itr);
+		DUMP_REG(interrupts[i].mir);
+		DUMP_REG(interrupts[i].isr_set);
+		DUMP_REG(interrupts[i].pending_irq);
+		DUMP_REG(interrupts[i].pending_fiq);
+	}
+	for (int i = 0; i < OMAP_IRC_IRQ_COUNT; ++i) {
+		DUMP_REG(ilr[i]);
+	}
+
+#undef DUMP_REG
+}
+
 #endif
 
