Index: arch/ia64/_link.ld.in
===================================================================
--- arch/ia64/_link.ld.in	(revision 7d53ef4494143ea6f3a781574dbddc99d2b181a4)
+++ arch/ia64/_link.ld.in	(revision 5ac2e615fb8586e042684848b35e368b21c3189f)
@@ -12,5 +12,5 @@
 
 SECTIONS {
-	.image 0x0000000000100000: AT (0x0000000000100000) { 
+	.image 0xe000000000100000: AT (0x0000000000100000) { 
 		ktext_start = .;
 		*(K_TEXT_START);
@@ -38,5 +38,5 @@
 	_hardcoded_ktext_size = ktext_end - ktext_start;
 	_hardcoded_kdata_size = kdata_end - kdata_start;
-	_hardcoded_load_address = 0x0000000000100000;
+	_hardcoded_load_address = 0xe000000000100000;
 
 }
Index: arch/ia64/include/faddr.h
===================================================================
--- arch/ia64/include/faddr.h	(revision 7d53ef4494143ea6f3a781574dbddc99d2b181a4)
+++ arch/ia64/include/faddr.h	(revision 5ac2e615fb8586e042684848b35e368b21c3189f)
@@ -46,9 +46,28 @@
 	
 	__asm__(
+		"nop 0;;"
+		"nop 0;;"
+		"nop 0;;"
+		"nop 0;;"
+		"nop 0;;"
+		"nop 0;;"
+		"nop 0;;"
+		"nop 0;;"
 		"ld8 %0 = [%1]\n\t"
+		"nop 0;;"
+		"nop 0;;"
+		"nop 0;;"
+		"nop 0;;"
+		"nop 0;;"
+		"nop 0;;"
+		"nop 0;;"
+		"nop 0;;"
+
 		: "=r" (faddr)
 		: "r" (fptr)
 	);
 	
+
+	/*faddr = *((__address *)(fptr));;*/
 	return faddr;
 }
Index: arch/ia64/include/mm/asid.h
===================================================================
--- arch/ia64/include/mm/asid.h	(revision 7d53ef4494143ea6f3a781574dbddc99d2b181a4)
+++ arch/ia64/include/mm/asid.h	(revision 5ac2e615fb8586e042684848b35e368b21c3189f)
@@ -30,4 +30,6 @@
 #define __ia64_ASID_H__
 
+#ifndef __ASM__
+
 #include <arch/types.h>
 
@@ -39,4 +41,6 @@
  * but those extra bits are not used by the kernel. 
  */
+#endif 
+ 
 #define RIDS_PER_ASID		7
 #define RID_MAX			262143		/* 2^18 - 1 */
@@ -45,5 +49,10 @@
 #define RID2ASID(rid)		((rid)/RIDS_PER_ASID)
 
+#ifndef __ASM__
+
+
 typedef __u32 rid_t;
+
+#endif
 
 #define ASID_MAX_ARCH		(RID_MAX/RIDS_PER_ASID)
Index: arch/ia64/include/mm/page.h
===================================================================
--- arch/ia64/include/mm/page.h	(revision 7d53ef4494143ea6f3a781574dbddc99d2b181a4)
+++ arch/ia64/include/mm/page.h	(revision 5ac2e615fb8586e042684848b35e368b21c3189f)
@@ -31,5 +31,9 @@
 #define __ia64_PAGE_H__
 
+#ifndef __ASM__
+
+
 #include <arch/mm/frame.h>
+#include <arch/barrier.h>
 #include <genarch/mm/page_ht.h>
 #include <arch/mm/asid.h>
@@ -38,9 +42,11 @@
 #include <debug.h>
 
+#endif
+
 #define PAGE_SIZE	FRAME_SIZE
 #define PAGE_WIDTH	FRAME_WIDTH
-
-#define KA2PA(x)	((__address) (x))
-#define PA2KA(x)	((__address) (x))
+#define KERNEL_PAGE_WIDTH	26
+
+
 
 #define SET_PTL0_ADDRESS_ARCH(x)	/**< To be removed as situation permits. */
@@ -50,6 +56,16 @@
 #define VRN_SHIFT			61
 #define VRN_MASK			(7LL << VRN_SHIFT)
-#define VRN_KERNEL	 		0
+
+#ifdef __ASM__
+#define VRN_KERNEL	 		7
+#else
+#define VRN_KERNEL	 		7LL
+#endif
+
 #define REGION_REGISTERS 		8
+
+#define KA2PA(x)	((__address) (x-(VRN_KERNEL<<VRN_SHIFT)))
+#define PA2KA(x)	((__address) (x+(VRN_KERNEL<<VRN_SHIFT)))
+
 
 #define VHPT_WIDTH 			20         	/* 1M */
@@ -77,5 +93,5 @@
 #define VA_REGION(va) (va>>VA_REGION_INDEX)
 
-
+#ifndef __ASM__
 
 struct vhpt_tag_info {
@@ -264,3 +280,18 @@
 extern void vhpt_set_record(vhpt_entry_t *v, __address page, asid_t asid, __address frame, int flags);
 
-#endif
+
+static inline void pokus(void)
+{
+	region_register rr;
+	rr.word=rr_read(0);
+	srlz_d();
+	rr_write(0,rr.word);
+	srlz_d();
+
+}
+
+#endif
+
+#endif
+
+
Index: arch/ia64/include/register.h
===================================================================
--- arch/ia64/include/register.h	(revision 7d53ef4494143ea6f3a781574dbddc99d2b181a4)
+++ arch/ia64/include/register.h	(revision 5ac2e615fb8586e042684848b35e368b21c3189f)
@@ -38,4 +38,10 @@
 #define PSR_I_MASK	0x4000
 #define PSR_PK_MASK	0x8000
+
+#define PSR_DT_MASK	(1<<17)
+#define PSR_RT_MASK	(1<<27)
+#define PSR_IT_MASK	0x0000001000000000
+
+
 
 /** Application registers. */
Index: arch/ia64/src/mm/page.c
===================================================================
--- arch/ia64/src/mm/page.c	(revision 7d53ef4494143ea6f3a781574dbddc99d2b181a4)
+++ arch/ia64/src/mm/page.c	(revision 5ac2e615fb8586e042684848b35e368b21c3189f)
@@ -56,8 +56,10 @@
 void set_environment(void)
 {
+
+//#ifdef NEVERDEFINED	
 	region_register rr;
 	pta_register pta;	
 	int i;
-	
+
 	/*
 	 * First set up kernel region register.
@@ -98,4 +100,9 @@
 	srlz_i();
 	srlz_d();
+	
+//#endif
+
+	return ;	
+	
 }
 
Index: arch/ia64/src/start.S
===================================================================
--- arch/ia64/src/start.S	(revision 7d53ef4494143ea6f3a781574dbddc99d2b181a4)
+++ arch/ia64/src/start.S	(revision 5ac2e615fb8586e042684848b35e368b21c3189f)
@@ -27,5 +27,19 @@
 #
 
+
 #include <arch/register.h>
+#include <arch/mm/page.h>
+#include <arch/mm/asid.h>
+#include <mm/asid.h>
+
+
+#define RR_MASK (0xFFFFFFFF00000002)
+#define RID_SHIFT 8
+#define PS_SHIFT 2
+
+
+#define KERNEL_TRANSLATION_I 0x0010000000000661
+#define KERNEL_TRANSLATION_D 0x0010000000000661
+
 
 .section K_TEXT_START
@@ -37,10 +51,80 @@
 	.auto
 
+	#Fill TR.i and TR.d and enable paging
+
+	mov r9=rr[r0]
+	movl r10=(RR_MASK)
+	and r9=r10,r9
+	movl r10=((ASID2RID(ASID_KERNEL,VRN_KERNEL)<<RID_SHIFT)|(KERNEL_PAGE_WIDTH<<PS_SHIFT))
+	or  r9=r10,r9
+	mov rr[r0]=r9
+
+	
+
+	movl r8=(VRN_KERNEL<<VRN_SHIFT)
+	mov r9=rr[r8]
+	movl r10=(RR_MASK)
+	and r9=r10,r9
+	movl r10=((ASID2RID(ASID_KERNEL,VRN_KERNEL)<<RID_SHIFT)|(KERNEL_PAGE_WIDTH<<PS_SHIFT))
+	or  r9=r10,r9
+	mov rr[r8]=r9
+
+
+	movl r8=(VRN_KERNEL<<VRN_SHIFT)
+	mov cr.ifa=r8
+	movl r10=(KERNEL_PAGE_WIDTH<<PS_SHIFT)
+	mov cr.itir=r10
+	movl r10=(KERNEL_TRANSLATION_I)
+	itr.i itr[r0]=r10
+
+#	mov cr.ifa=r0
+#	movl r10=(KERNEL_PAGE_WIDTH<<PS_SHIFT)
+#	mov cr.itir=r10
+	movl r10=(KERNEL_TRANSLATION_D)
+	itr.d dtr[r0]=r10
+
+
+
+
+
+
+
 	# initialize PSR
 	mov psr.l = r0
 	srlz.i
 	srlz.d
-	ssm PSR_IC_MASK
+	movl r10=(PSR_DT_MASK|PSR_RT_MASK|PSR_IT_MASK|PSR_IC_MASK)  /*Enable paging*/
+	mov r9=psr
+	or r10=r10,r9
+	mov cr.ipsr=r10
+	mov cr.ifs=r0
+#	movl r8=(paging_start+VRN_KERNEL<<VRN_SHIFT)
+	movl r8=paging_start
+	mov cr.iip=r8
 	srlz.d
+	srlz.i
+.explicit
+	{rfi;;}
+	{nop 0;;}
+	{nop 0;;}
+	{nop 0;;}
+	{nop 0;;}
+	{nop 0;;}
+	{nop 0;;}
+	{nop 0;;}
+	{nop 0;;}
+	{nop 0;;}
+	{nop 0;;}
+	{nop 0;;}
+	{nop 0;;}
+	{nop 0;;}
+	{nop 0;;}
+	{nop 0;;}
+	{nop 0;;}
+
+.global paging_start
+paging_start:
+
+.auto
 	
 	# switch to register bank 1
@@ -49,16 +133,21 @@
 	# initialize register stack
 	mov ar.rsc = r0
-	mov ar.bspstore = r0
+	movl r8=(VRN_KERNEL<<VRN_SHIFT)
+	mov ar.bspstore = r8
+#	mov ar.bspstore = r0
 	loadrs
 
 	.explicit
 	# initialize memory stack to some sane value
-	movl r12 = stack0	;;
+#	movl r12 = stack0	;;
+	movl r12 = stack0	+ (VRN_KERNEL<<VRN_SHIFT);;
+	
 	add r12 = - 16, r12	/* allocate a scratch area on the stack */
 
 	# initialize gp (Global Pointer) register
-	movl r1 = _hardcoded_load_address
+	movl r1 = _hardcoded_load_address	;;
+
+#	movl r1 = _hardcoded_load_address + (VRN_KERNEL<<VRN_SHIFT) ;;
 	
-	;;
 
 	#
@@ -72,9 +161,16 @@
 	addl r19 = @gprel(hardcoded_load_address), gp
 	;;
-	st8 [r17] = r14
-	st8 [r18] = r15
+	st4 [r17] = r14
+	st4 [r18] = r15
 	st8 [r19] = r16
+
+
+.auto
 	
-	br.call.sptk.many b0=main_bsp
+	movl r18=main_bsp 
+	mov b1=r18
+	br.call.sptk.many b0=b1
+
+#	br.call.sptk.many b0=main_bsp
 
 0:
Index: contrib/arch/ia64/vmaxlma.c
===================================================================
--- contrib/arch/ia64/vmaxlma.c	(revision 7d53ef4494143ea6f3a781574dbddc99d2b181a4)
+++ contrib/arch/ia64/vmaxlma.c	(revision 5ac2e615fb8586e042684848b35e368b21c3189f)
@@ -37,6 +37,7 @@
 }
 
-#define ELF_VMA	(0x88/sizeof(unsigned long long))
-#define ELF_LMA (0x90/sizeof(unsigned long long))
+#define ELF_VMA	(0x50/sizeof(unsigned long long))
+#define ELF_LMA (0x58/sizeof(unsigned long long))
+#define ELF_ENTRY (0x18/sizeof(unsigned long long))
 
 #define LENGTH	0x98
@@ -45,5 +46,5 @@
 {
 	int fd;
-	unsigned long long vma, lma;
+	unsigned long long vma, lma,entry;
 	unsigned long long *elf;
 
@@ -59,8 +60,12 @@
 		error("map failed");
 		
-	vma = elf[ELF_VMA];
+	/*vma = elf[ELF_VMA];*/
 	lma = elf[ELF_LMA];
 	elf[ELF_VMA] = lma;
-	elf[ELF_LMA] = vma;
+	entry = elf[ELF_ENTRY];
+	entry &= ((~0LL)>>3);
+	elf[ELF_ENTRY] = entry;
+	elf[ELF_ENTRY] = 0x100000;
+	/*elf[ELF_LMA] = vma;*/
 	
 	if (munmap(elf, LENGTH) == -1)
Index: generic/include/mm/asid.h
===================================================================
--- generic/include/mm/asid.h	(revision 7d53ef4494143ea6f3a781574dbddc99d2b181a4)
+++ generic/include/mm/asid.h	(revision 5ac2e615fb8586e042684848b35e368b21c3189f)
@@ -35,6 +35,10 @@
 #define __ASID_H__
 
+#ifndef __ASM__
+
 #include <arch/mm/asid.h>
 #include <typedefs.h>
+
+#endif
 
 #define ASID_KERNEL	0
@@ -43,11 +47,13 @@
 #define ASID_MAX	ASID_MAX_ARCH
 
+#ifndef __ASM__
+
+
 #define ASIDS_ALLOCABLE	((ASID_MAX+1)-ASID_START)
 
 extern spinlock_t asidlock;
+extern link_t as_with_asid_head;
 
-#ifndef asid_get
 extern asid_t asid_get(void);
-#endif /* !def asid_get */
 extern void asid_put(asid_t asid);
 
@@ -65,2 +71,5 @@
 
 #endif
+
+#endif
+
