Changeset 58775d30 in mainline for kernel/arch/amd64/include/arch/atomic.h

Timestamp:

2015-03-16T16:07:21Z (10 years ago)

Author:

Jan Vesely <jano.vesely@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

2003739

Parents:

6069061 (diff), 795e2bf (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.

Message:

Mainline changes

File:

• kernel/arch/amd64/include/arch/atomic.h (modified) (2 diffs)

kernel/arch/amd64/include/arch/atomic.h

@@ -1 +1 @@
 /*
  * Copyright (c) 2001-2004 Jakub Jermar
+ * Copyright (c) 2012      Adam Hraska
  * All rights reserved.
  *
@@ -140 +141 @@
 }
 
+
+#define _atomic_cas_impl(pptr, exp_val, new_val, old_val, prefix) \
+({ \
+        switch (sizeof(typeof(*(pptr)))) { \
+        case 1: \
+                asm volatile ( \
+                        prefix " cmpxchgb %[newval], %[ptr]\n" \
+                        : /* Output operands. */ \
+                        /* Old/current value is returned in eax. */ \
+                        [oldval] "=a" (old_val), \
+                        /* (*ptr) will be read and written to, hence "+" */ \
+                        [ptr] "+m" (*pptr) \
+                        : /* Input operands. */ \
+                        /* Expected value must be in eax. */ \
+                        [expval] "a" (exp_val), \
+                        /* The new value may be in any register. */ \
+                        [newval] "r" (new_val) \
+                        : "memory" \
+                ); \
+                break; \
+        case 2: \
+                asm volatile ( \
+                        prefix " cmpxchgw %[newval], %[ptr]\n" \
+                        : /* Output operands. */ \
+                        /* Old/current value is returned in eax. */ \
+                        [oldval] "=a" (old_val), \
+                        /* (*ptr) will be read and written to, hence "+" */ \
+                        [ptr] "+m" (*pptr) \
+                        : /* Input operands. */ \
+                        /* Expected value must be in eax. */ \
+                        [expval] "a" (exp_val), \
+                        /* The new value may be in any register. */ \
+                        [newval] "r" (new_val) \
+                        : "memory" \
+                ); \
+                break; \
+        case 4: \
+                asm volatile ( \
+                        prefix " cmpxchgl %[newval], %[ptr]\n" \
+                        : /* Output operands. */ \
+                        /* Old/current value is returned in eax. */ \
+                        [oldval] "=a" (old_val), \
+                        /* (*ptr) will be read and written to, hence "+" */ \
+                        [ptr] "+m" (*pptr) \
+                        : /* Input operands. */ \
+                        /* Expected value must be in eax. */ \
+                        [expval] "a" (exp_val), \
+                        /* The new value may be in any register. */ \
+                        [newval] "r" (new_val) \
+                        : "memory" \
+                ); \
+                break; \
+        case 8: \
+                asm volatile ( \
+                        prefix " cmpxchgq %[newval], %[ptr]\n" \
+                        : /* Output operands. */ \
+                        /* Old/current value is returned in eax. */ \
+                        [oldval] "=a" (old_val), \
+                        /* (*ptr) will be read and written to, hence "+" */ \
+                        [ptr] "+m" (*pptr) \
+                        : /* Input operands. */ \
+                        /* Expected value must be in eax. */ \
+                        [expval] "a" (exp_val), \
+                        /* The new value may be in any register. */ \
+                        [newval] "r" (new_val) \
+                        : "memory" \
+                ); \
+                break; \
+        } \
+})
+
+
+#ifndef local_atomic_cas
+
+#define local_atomic_cas(pptr, exp_val, new_val) \
+({ \
+        /* Use proper types and avoid name clashes */ \
+        typeof(*(pptr)) _old_val_cas; \
+        typeof(*(pptr)) _exp_val_cas = exp_val; \
+        typeof(*(pptr)) _new_val_cas = new_val; \
+        _atomic_cas_impl(pptr, _exp_val_cas, _new_val_cas, _old_val_cas, ""); \
+        \
+        _old_val_cas; \
+})
+
+#else
+/* Check if arch/atomic.h does not accidentally include /atomic.h .*/
+#error Architecture specific cpu local atomics already defined! Check your includes.
 #endif
 
+
+#ifndef local_atomic_exchange
+/* 
+ * Issuing a xchg instruction always implies lock prefix semantics.
+ * Therefore, it is cheaper to use a cmpxchg without a lock prefix 
+ * in a loop.
+ */
+#define local_atomic_exchange(pptr, new_val) \
+({ \
+        /* Use proper types and avoid name clashes */ \
+        typeof(*(pptr)) _exp_val_x; \
+        typeof(*(pptr)) _old_val_x; \
+        typeof(*(pptr)) _new_val_x = new_val; \
+        \
+        do { \
+                _exp_val_x = *pptr; \
+                _old_val_x = local_atomic_cas(pptr, _exp_val_x, _new_val_x); \
+        } while (_old_val_x != _exp_val_x); \
+        \
+        _old_val_x; \
+})
+
+#else
+/* Check if arch/atomic.h does not accidentally include /atomic.h .*/
+#error Architecture specific cpu local atomics already defined! Check your includes.
+#endif
+
+
+#endif
+
 /** @}
  */