Index: kernel/genarch/src/kbd/ns16550.c
===================================================================
--- kernel/genarch/src/kbd/ns16550.c	(revision 3e53ab7b0eacdf72743712841abf0bf6d897b956)
+++ kernel/genarch/src/kbd/ns16550.c	(revision 57e76cb2b99587198056fdcf3441d24f54f93a56)
@@ -108,9 +108,12 @@
 /** Initialize ns16550.
  *
- * @param devno Device number.
- * @param inr Interrupt number.
- * @param vaddr Virtual address of device's registers.
- */
-void ns16550_init(devno_t devno, inr_t inr, ioport_t port)
+ * @param devno		Device number.
+ * @param port		Virtual/IO address of device's registers.
+ * @param inr		Interrupt number.
+ * @param cir		Clear interrupt function.
+ * @param cir_arg	First argument to cir.
+ */
+void
+ns16550_init(devno_t devno, ioport_t port, inr_t inr, cir_t cir, void *cir_arg)
 {
 	chardev_initialize("ns16550_kbd", &kbrd, &ops);
@@ -125,4 +128,6 @@
 	ns16550_irq.claim = ns16550_claim;
 	ns16550_irq.handler = ns16550_irq_handler;
+	ns16550_irq.cir = cir;
+	ns16550_irq.cir_arg = cir_arg;
 	irq_register(&ns16550_irq);
 	
Index: kernel/genarch/src/kbd/z8530.c
===================================================================
--- kernel/genarch/src/kbd/z8530.c	(revision 3e53ab7b0eacdf72743712841abf0bf6d897b956)
+++ kernel/genarch/src/kbd/z8530.c	(revision 57e76cb2b99587198056fdcf3441d24f54f93a56)
@@ -44,5 +44,4 @@
 #include <arch/interrupt.h>
 #include <arch/drivers/kbd.h>
-#include <arch/drivers/fhc.h>
 #include <cpu.h>
 #include <arch/asm.h>
@@ -84,10 +83,12 @@
 	z8530_write_a(&z8530, WR0, WR0_TX_IP_RST);
 
-	z8530_write_a(&z8530, WR1, WR1_IARCSC);		/* interrupt on all characters */
+	/* interrupt on all characters */
+	z8530_write_a(&z8530, WR1, WR1_IARCSC);
 
 	/* 8 bits per character and enable receiver */
 	z8530_write_a(&z8530, WR3, WR3_RX8BITSCH | WR3_RX_ENABLE);
 	
-	z8530_write_a(&z8530, WR9, WR9_MIE);		/* Master Interrupt Enable. */
+	/* Master Interrupt Enable. */
+	z8530_write_a(&z8530, WR9, WR9_MIE);
 	
 	spinlock_lock(&z8530_irq.lock);
@@ -109,5 +110,6 @@
 
 /** Initialize z8530. */
-void z8530_init(devno_t devno, inr_t inr, uintptr_t vaddr)
+void
+z8530_init(devno_t devno, uintptr_t vaddr, inr_t inr, cir_t cir, void *cir_arg)
 {
 	chardev_initialize("z8530_kbd", &kbrd, &ops);
@@ -122,4 +124,6 @@
 	z8530_irq.claim = z8530_claim;
 	z8530_irq.handler = z8530_irq_handler;
+	z8530_irq.cir = cir;
+	z8530_irq.cir_arg = cir_arg;
 	irq_register(&z8530_irq);
 
@@ -198,16 +202,8 @@
 void z8530_irq_handler(irq_t *irq, void *arg, ...)
 {
-	/*
-	 * So far, we know we got this interrupt through the FHC.
-	 * Since we don't have enough documentation about the FHC
-	 * and because the interrupt looks like level sensitive,
-	 * we cannot handle it by scheduling one of the level
-	 * interrupt traps. Process the interrupt directly.
-	 */
 	if (irq->notif_cfg.notify && irq->notif_cfg.answerbox)
 		ipc_irq_send_notif(irq);
 	else
 		z8530_interrupt();
-	fhc_clear_interrupt(central_fhc, irq->inr);
 }
 
Index: kernel/genarch/src/ofw/ebus.c
===================================================================
--- kernel/genarch/src/ofw/ebus.c	(revision 3e53ab7b0eacdf72743712841abf0bf6d897b956)
+++ kernel/genarch/src/ofw/ebus.c	(revision 57e76cb2b99587198056fdcf3441d24f54f93a56)
@@ -45,5 +45,6 @@
 
 /** Apply EBUS ranges to EBUS register. */
-bool ofw_ebus_apply_ranges(ofw_tree_node_t *node, ofw_ebus_reg_t *reg, uintptr_t *pa)
+bool
+ofw_ebus_apply_ranges(ofw_tree_node_t *node, ofw_ebus_reg_t *reg, uintptr_t *pa)
 {
 	ofw_tree_property_t *prop;
@@ -63,9 +64,11 @@
 		if (reg->space != range[i].child_space)
 			continue;
-		if (overlaps(reg->addr, reg->size, range[i].child_base, range[i].size)) {
+		if (overlaps(reg->addr, reg->size, range[i].child_base,
+		    range[i].size)) {
 			ofw_pci_reg_t pci_reg;
 			
 			pci_reg.space = range[i].parent_space;
-			pci_reg.addr = range[i].parent_base + (reg->addr - range[i].child_base);
+			pci_reg.addr = range[i].parent_base +
+			    (reg->addr - range[i].child_base);
 			pci_reg.size = reg->size;
 			
@@ -77,5 +80,7 @@
 }
 
-bool ofw_ebus_map_interrupt(ofw_tree_node_t *node, ofw_ebus_reg_t *reg, uint32_t interrupt, int *inr)
+bool
+ofw_ebus_map_interrupt(ofw_tree_node_t *node, ofw_ebus_reg_t *reg,
+    uint32_t interrupt, int *inr, cir_t *cir, void **cir_arg)
 {
 	ofw_tree_property_t *prop;
@@ -105,6 +110,6 @@
 	unsigned int i;
 	for (i = 0; i < count; i++) {
-		if ((intr_map[i].space == space) && (intr_map[i].addr == addr)
-			&& (intr_map[i].intr == intr))
+		if ((intr_map[i].space == space) &&
+		    (intr_map[i].addr == addr) && (intr_map[i].intr == intr))
 			goto found;
 	}
@@ -114,8 +119,10 @@
 	/*
 	 * We found the device that functions as an interrupt controller
-	 * for the interrupt. We also found partial mapping from interrupt to INO.
+	 * for the interrupt. We also found partial mapping from interrupt to
+	 * INO.
 	 */
 
-	controller = ofw_tree_find_node_by_handle(ofw_tree_lookup("/"), intr_map[i].controller_handle);
+	controller = ofw_tree_find_node_by_handle(ofw_tree_lookup("/"),
+	    intr_map[i].controller_handle);
 	if (!controller)
 		return false;
@@ -131,5 +138,6 @@
 	 * Let the PCI do the next step in mapping the interrupt.
 	 */
-	if (!ofw_pci_map_interrupt(controller, NULL, intr_map[i].controller_ino, inr))
+	if (!ofw_pci_map_interrupt(controller, NULL, intr_map[i].controller_ino,
+	    inr, cir, cir_arg))
 		return false;
 
Index: kernel/genarch/src/ofw/fhc.c
===================================================================
--- kernel/genarch/src/ofw/fhc.c	(revision 3e53ab7b0eacdf72743712841abf0bf6d897b956)
+++ kernel/genarch/src/ofw/fhc.c	(revision 57e76cb2b99587198056fdcf3441d24f54f93a56)
@@ -110,5 +110,7 @@
 }
 
-bool ofw_fhc_map_interrupt(ofw_tree_node_t *node, ofw_fhc_reg_t *reg, uint32_t interrupt, int *inr)
+bool
+ofw_fhc_map_interrupt(ofw_tree_node_t *node, ofw_fhc_reg_t *reg,
+    uint32_t interrupt, int *inr, cir_t *cir, void **cir_arg)
 {
 	fhc_t *fhc = NULL;
@@ -127,4 +129,6 @@
 	
 	*inr = interrupt;
+	*cir = fhc_clear_interrupt;
+	*cir_arg = fhc;
 	return true;
 }
Index: kernel/genarch/src/ofw/pci.c
===================================================================
--- kernel/genarch/src/ofw/pci.c	(revision 3e53ab7b0eacdf72743712841abf0bf6d897b956)
+++ kernel/genarch/src/ofw/pci.c	(revision 57e76cb2b99587198056fdcf3441d24f54f93a56)
@@ -50,5 +50,6 @@
 #define PCI_IGN			0x1f
 
-bool ofw_pci_apply_ranges(ofw_tree_node_t *node, ofw_pci_reg_t *reg, uintptr_t *pa)
+bool
+ofw_pci_apply_ranges(ofw_tree_node_t *node, ofw_pci_reg_t *reg, uintptr_t *pa)
 {
 	ofw_tree_property_t *prop;
@@ -69,8 +70,11 @@
 	
 	for (i = 0; i < ranges; i++) {
-		if ((reg->space & PCI_SPACE_MASK) != (range[i].space & PCI_SPACE_MASK))
+		if ((reg->space & PCI_SPACE_MASK) !=
+		    (range[i].space & PCI_SPACE_MASK))
 			continue;
-		if (overlaps(reg->addr, reg->size, range[i].child_base, range[i].size)) {
-			*pa = range[i].parent_base + (reg->addr - range[i].child_base);
+		if (overlaps(reg->addr, reg->size, range[i].child_base,
+		    range[i].size)) {
+			*pa = range[i].parent_base +
+			    (reg->addr - range[i].child_base);
 			return true;
 		}
@@ -80,5 +84,7 @@
 }
 
-bool ofw_pci_reg_absolutize(ofw_tree_node_t *node, ofw_pci_reg_t *reg, ofw_pci_reg_t *out)
+bool
+ofw_pci_reg_absolutize(ofw_tree_node_t *node, ofw_pci_reg_t *reg,
+    ofw_pci_reg_t *out)
 {
 	if (reg->space & PCI_ABS_MASK) {
@@ -104,5 +110,6 @@
 	
 	for (i = 0; i < assigned_addresses; i++) {
-		if ((assigned_address[i].space & PCI_REG_MASK) == (reg->space & PCI_REG_MASK)) {
+		if ((assigned_address[i].space & PCI_REG_MASK) ==
+		    (reg->space & PCI_REG_MASK)) {
 			out->space = assigned_address[i].space;
 			out->addr = reg->addr + assigned_address[i].addr;
@@ -120,5 +127,7 @@
  * to a PCI bridge.
  */
-bool ofw_pci_map_interrupt(ofw_tree_node_t *node, ofw_pci_reg_t *reg, int ino, int *inr)
+bool
+ofw_pci_map_interrupt(ofw_tree_node_t *node, ofw_pci_reg_t *reg, int ino,
+    int *inr, cir_t *cir, void **cir_arg)
 {
 	pci_t *pci = node->device;
@@ -133,4 +142,6 @@
 
 	*inr = (PCI_IGN << IGN_SHIFT) | ino;
+	*cir = pci_clear_interrupt;
+	*cir_arg = pci;
 
 	return true;