Index: kernel/arch/sparc64/src/mm/as.c
===================================================================
--- kernel/arch/sparc64/src/mm/as.c	(revision f1d1f5d3d65116db3fe2744bb3cf38c85e99f14c)
+++ kernel/arch/sparc64/src/mm/as.c	(revision 57da95c482edb0cea2f17139f72f308e960ddd0f)
@@ -37,4 +37,9 @@
 #include <genarch/mm/as_ht.h>
 #include <genarch/mm/asid_fifo.h>
+#include <debug.h>
+
+#ifdef CONFIG_TSB
+#include <arch/mm/tsb.h>
+#endif
 
 /** Architecture dependent address space init. */
@@ -45,7 +50,20 @@
 }
 
+/** Perform sparc64-specific tasks when an address space becomes active on the processor.
+ *
+ * Install ASID and map TSBs.
+ *
+ * @param as Address space.
+ */
 void as_install_arch(as_t *as)
 {
 	tlb_context_reg_t ctx;
+	
+	/*
+	 * Note that we don't lock the address space.
+	 * That's correct - we can afford it here
+	 * because we only read members that are
+	 * currently read-only.
+	 */
 	
 	/*
@@ -59,4 +77,75 @@
 	ctx.context = as->asid;
 	mmu_secondary_context_write(ctx.v);
+
+#ifdef CONFIG_TSB	
+	if (as != AS_KERNEL) {
+		uintptr_t base = ALIGN_DOWN(config.base, 1 << KERNEL_PAGE_WIDTH);
+
+		ASSERT(as->arch.itsb && as->arch.dtsb);
+
+		uintptr_t tsb = as->arch.itsb;
+		
+		if (!overlaps(tsb, 8*PAGE_SIZE, base, 1 << KERNEL_PAGE_WIDTH)) {
+			/*
+			 * TSBs were allocated from memory not covered
+			 * by the locked 4M kernel DTLB entry. We need
+			 * to map both TSBs explicitly.
+			 */
+			dtlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_NUCLEUS, tsb);
+			dtlb_insert_mapping(tsb, KA2PA(tsb), PAGESIZE_64K, true, true);
+		}
+		
+		/*
+		 * Setup TSB Base registers.
+		 */
+		tsb_base_reg_t tsb_base;
+		
+		tsb_base.value = 0;
+		tsb_base.size = TSB_SIZE;
+		tsb_base.split = 0;
+
+		tsb_base.base = as->arch.itsb >> PAGE_WIDTH;
+		itsb_base_write(tsb_base.value);
+		tsb_base.base = as->arch.dtsb >> PAGE_WIDTH;
+		dtsb_base_write(tsb_base.value);
+	}
+#endif
+}
+
+/** Perform sparc64-specific tasks when an address space is removed from the processor.
+ *
+ * Demap TSBs.
+ *
+ * @param as Address space.
+ */
+void as_deinstall_arch(as_t *as)
+{
+
+	/*
+	 * Note that we don't lock the address space.
+	 * That's correct - we can afford it here
+	 * because we only read members that are
+	 * currently read-only.
+	 */
+
+#ifdef CONFIG_TSB
+	if (as != AS_KERNEL) {
+		uintptr_t base = ALIGN_DOWN(config.base, 1 << KERNEL_PAGE_WIDTH);
+
+		ASSERT(as->arch.itsb && as->arch.dtsb);
+
+		uintptr_t tsb = as->arch.itsb;
+		
+		if (!overlaps(tsb, 8*PAGE_SIZE, base, 1 << KERNEL_PAGE_WIDTH)) {
+			/*
+			 * TSBs were allocated from memory not covered
+			 * by the locked 4M kernel DTLB entry. We need
+			 * to demap the entry installed by as_install_arch().
+			 */
+			dtlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_NUCLEUS, tsb);
+		}
+		
+	}
+#endif
 }
 
Index: kernel/arch/sparc64/src/proc/scheduler.c
===================================================================
--- kernel/arch/sparc64/src/proc/scheduler.c	(revision f1d1f5d3d65116db3fe2744bb3cf38c85e99f14c)
+++ kernel/arch/sparc64/src/proc/scheduler.c	(revision 57da95c482edb0cea2f17139f72f308e960ddd0f)
@@ -121,7 +121,6 @@
 	if ((THREAD->flags & THREAD_FLAG_USPACE)) {
 		/*
-		 * If this thread executes also in userspace, we have to force all
-		 * its still-active userspace windows into the userspace window buffer
-		 * and demap the buffer from DTLB.
+		 * If this thread executes also in userspace, we have to
+		 * demap the userspace window buffer from DTLB.
 		 */
 		ASSERT(THREAD->arch.uspace_window_buffer);
