Index: kernel/arch/ia32/src/drivers/i8254.c
===================================================================
--- kernel/arch/ia32/src/drivers/i8254.c	(revision 80bcaed11c2e767559657092d6c13d1a7fdd449c)
+++ kernel/arch/ia32/src/drivers/i8254.c	(revision 557394294b6545575e0e9b328455da8ae4cf8a51)
@@ -69,5 +69,13 @@
 static void i8254_irq_handler(irq_t *irq, void *arg, ...)
 {
+	/*
+	 * This IRQ is responsible for kernel preemption.
+	 * Nevertheless, we are now holding a spinlock which prevents
+	 * preemption. For this particular IRQ, we don't need the
+	 * lock. We just release it, call clock() and then reacquire it again.
+	 */
+	spinlock_unlock(&irq->lock);
 	clock();
+	spinlock_lock(&irq->lock);
 }
 
@@ -137,5 +145,7 @@
 	o2 |= inb(CLK_PORT1) << 8;
 
-	CPU->delay_loop_const = ((MAGIC_NUMBER*LOOPS)/1000) / ((t1-t2)-(o1-o2)) + (((MAGIC_NUMBER*LOOPS)/1000) % ((t1-t2)-(o1-o2)) ? 1 : 0);
+	CPU->delay_loop_const =
+	    ((MAGIC_NUMBER * LOOPS) / 1000) / ((t1 - t2) - (o1 - o2)) +
+	    (((MAGIC_NUMBER * LOOPS) / 1000) % ((t1 - t2) - (o1 - o2)) ? 1 : 0);
 
 	clk1 = get_cycle();
Index: kernel/arch/ia32/src/drivers/i8259.c
===================================================================
--- kernel/arch/ia32/src/drivers/i8259.c	(revision 80bcaed11c2e767559657092d6c13d1a7fdd449c)
+++ kernel/arch/ia32/src/drivers/i8259.c	(revision 557394294b6545575e0e9b328455da8ae4cf8a51)
@@ -87,5 +87,5 @@
 
 	pic_disable_irqs(0xffff);		/* disable all irq's */
-	pic_enable_irqs(1<<IRQ_PIC1);		/* but enable pic1 */
+	pic_enable_irqs(1 << IRQ_PIC1);		/* but enable pic1 */
 }
 
@@ -120,6 +120,6 @@
 void pic_eoi(void)
 {
-	outb(0x20,0x20);
-	outb(0xa0,0x20);
+	outb(0x20, 0x20);
+	outb(0xa0, 0x20);
 }
 
Index: kernel/arch/ia32/src/ia32.c
===================================================================
--- kernel/arch/ia32/src/ia32.c	(revision 80bcaed11c2e767559657092d6c13d1a7fdd449c)
+++ kernel/arch/ia32/src/ia32.c	(revision 557394294b6545575e0e9b328455da8ae4cf8a51)
@@ -119,7 +119,7 @@
 		memory_print_map();
 		
-		#ifdef CONFIG_SMP
+#ifdef CONFIG_SMP
 		acpi_init();
-		#endif /* CONFIG_SMP */
+#endif /* CONFIG_SMP */
 	}
 }
Index: kernel/arch/ia32/src/interrupt.c
===================================================================
--- kernel/arch/ia32/src/interrupt.c	(revision 80bcaed11c2e767559657092d6c13d1a7fdd449c)
+++ kernel/arch/ia32/src/interrupt.c	(revision 557394294b6545575e0e9b328455da8ae4cf8a51)
@@ -141,11 +141,10 @@
 {
 	uint32_t mxcsr;
-	asm
-	(
+	asm (
 		"stmxcsr %0;\n"
 		:"=m"(mxcsr)
 	);
 	fault_if_from_uspace(istate, "SIMD FP exception(19), MXCSR: %#zx",
-			     (unative_t)mxcsr);
+	    (unative_t)mxcsr);
 
 	decode_istate(istate);
Index: kernel/arch/ia32/src/smp/smp.c
===================================================================
--- kernel/arch/ia32/src/smp/smp.c	(revision 80bcaed11c2e767559657092d6c13d1a7fdd449c)
+++ kernel/arch/ia32/src/smp/smp.c	(revision 557394294b6545575e0e9b328455da8ae4cf8a51)
@@ -113,6 +113,6 @@
 	 * Set the warm-reset vector to the real-mode address of 4K-aligned ap_boot()
 	 */
-	*((uint16_t *) (PA2KA(0x467+0))) =  ((uintptr_t) ap_boot) >> 4;	/* segment */
-	*((uint16_t *) (PA2KA(0x467+2))) =  0;				/* offset */
+	*((uint16_t *) (PA2KA(0x467 + 0))) =  ((uintptr_t) ap_boot) >> 4;	/* segment */
+	*((uint16_t *) (PA2KA(0x467 + 2))) =  0;				/* offset */
 	
 	/*
@@ -120,6 +120,6 @@
 	 * BIOS will not do the POST after the INIT signal.
 	 */
-	outb(0x70,0xf);
-	outb(0x71,0xa);
+	outb(0x70, 0xf);
+	outb(0x71, 0xa);
 
 	pic_disable_irqs(0xffff);
Index: kernel/arch/ia32xen/src/ia32xen.c
===================================================================
--- kernel/arch/ia32xen/src/ia32xen.c	(revision 80bcaed11c2e767559657092d6c13d1a7fdd449c)
+++ kernel/arch/ia32xen/src/ia32xen.c	(revision 557394294b6545575e0e9b328455da8ae4cf8a51)
@@ -163,7 +163,7 @@
 		memory_print_map();
 		
-		#ifdef CONFIG_SMP
+#ifdef CONFIG_SMP
 		acpi_init();
-		#endif /* CONFIG_SMP */
+#endif /* CONFIG_SMP */
 	}
 }
Index: kernel/arch/ia32xen/src/smp/apic.c
===================================================================
--- kernel/arch/ia32xen/src/smp/apic.c	(revision 80bcaed11c2e767559657092d6c13d1a7fdd449c)
+++ kernel/arch/ia32xen/src/smp/apic.c	(revision 557394294b6545575e0e9b328455da8ae4cf8a51)
@@ -152,5 +152,5 @@
 	 */
 	idreg.value = io_apic_read(IOAPICID);
-	if ((1<<idreg.apic_id) & apic_id_mask) {	/* see if IO APIC ID is used already */
+	if ((1 << idreg.apic_id) & apic_id_mask) {	/* see if IO APIC ID is used already */
 		for (i = 0; i < APIC_ID_COUNT; i++) {
 			if (!((1<<i) & apic_id_mask)) {
@@ -303,5 +303,5 @@
 		 * If this is not 82489DX-based l_apic we must send two STARTUP IPI's.
 		 */
-		for (i = 0; i<2; i++) {
+		for (i = 0; i < 2; i++) {
 			icr.lo = l_apic[ICRlo];
 			icr.delmod = DELMOD_STARTUP;
@@ -402,6 +402,6 @@
 	/* Program Logical Destination Register. */
 	ldr.value = l_apic[LDR];
-	if (CPU->id < sizeof(CPU->id)*8)	/* size in bits */
-		ldr.id = (1<<CPU->id);
+	if (CPU->id < sizeof(CPU->id) * 8)	/* size in bits */
+		ldr.id = (1 << CPU->id);
 	l_apic[LDR] = ldr.value;
 	
@@ -508,6 +508,6 @@
 		dlvr = DELMOD_LOWPRI;
 
-	reg.lo = io_apic_read(IOREDTBL + pin*2);
-	reg.hi = io_apic_read(IOREDTBL + pin*2 + 1);
+	reg.lo = io_apic_read(IOREDTBL + pin * 2);
+	reg.hi = io_apic_read(IOREDTBL + pin * 2 + 1);
 	
 	reg.dest = dest;
@@ -518,6 +518,6 @@
 	reg.intvec = v;
 
-	io_apic_write(IOREDTBL + pin*2, reg.lo);
-	io_apic_write(IOREDTBL + pin*2 + 1, reg.hi);
+	io_apic_write(IOREDTBL + pin * 2, reg.lo);
+	io_apic_write(IOREDTBL + pin * 2 + 1, reg.hi);
 }
 
@@ -540,5 +540,5 @@
 			pin = smp_irq_to_pin(i);
 			if (pin != -1) {
-				reg.lo = io_apic_read(IOREDTBL + pin*2);
+				reg.lo = io_apic_read(IOREDTBL + pin * 2);
 				reg.masked = true;
 				io_apic_write(IOREDTBL + pin*2, reg.lo);
@@ -567,5 +567,5 @@
 			pin = smp_irq_to_pin(i);
 			if (pin != -1) {
-				reg.lo = io_apic_read(IOREDTBL + pin*2);
+				reg.lo = io_apic_read(IOREDTBL + pin * 2);
 				reg.masked = false;
 				io_apic_write(IOREDTBL + pin*2, reg.lo);
Index: kernel/arch/ia64/src/drivers/it.c
===================================================================
--- kernel/arch/ia64/src/drivers/it.c	(revision 80bcaed11c2e767559657092d6c13d1a7fdd449c)
+++ kernel/arch/ia64/src/drivers/it.c	(revision 557394294b6545575e0e9b328455da8ae4cf8a51)
@@ -114,6 +114,12 @@
 	itm_write(m);
 	srlz_d();				/* propagate changes */
-	
+
+	/*
+	 * We are holding a lock which prevents preemption.
+	 * Release the lock, call clock() and reacquire the lock again.
+	 */
+	spinlock_unlock(&irq->lock);	
 	clock();
+	spinlock_lock(&irq->lock);
 }
 
Index: kernel/arch/ia64/src/ia64.c
===================================================================
--- kernel/arch/ia64/src/ia64.c	(revision 80bcaed11c2e767559657092d6c13d1a7fdd449c)
+++ kernel/arch/ia64/src/ia64.c	(revision 557394294b6545575e0e9b328455da8ae4cf8a51)
@@ -82,6 +82,4 @@
 	
 }
-
-
 
 void arch_post_mm_init(void)
Index: kernel/arch/mips32/src/interrupt.c
===================================================================
--- kernel/arch/mips32/src/interrupt.c	(revision 80bcaed11c2e767559657092d6c13d1a7fdd449c)
+++ kernel/arch/mips32/src/interrupt.c	(revision 557394294b6545575e0e9b328455da8ae4cf8a51)
@@ -114,5 +114,12 @@
 	nextcount = cp0_count_read() + cp0_compare_value - drift;
 	cp0_compare_write(nextcount);
+
+	/*
+	 * We are holding a lock which prevents preemption.
+	 * Release the lock, call clock() and reacquire the lock again.
+	 */
+	spinlock_unlock(&irq->lock);
 	clock();
+	spinlock_lock(&irq->lock);
 	
 	if (virtual_timer_fnc != NULL)
Index: kernel/arch/sparc64/src/drivers/tick.c
===================================================================
--- kernel/arch/sparc64/src/drivers/tick.c	(revision 80bcaed11c2e767559657092d6c13d1a7fdd449c)
+++ kernel/arch/sparc64/src/drivers/tick.c	(revision 557394294b6545575e0e9b328455da8ae4cf8a51)
@@ -100,6 +100,6 @@
 		CPU->missed_clock_ticks++;
 	}
-	CPU->arch.next_tick_cmpr = tick_read() + (CPU->arch.clock_frequency /
-		HZ) - drift;
+	CPU->arch.next_tick_cmpr = tick_read() +
+	    (CPU->arch.clock_frequency / HZ) - drift;
 	tick_compare_write(CPU->arch.next_tick_cmpr);
 	clock();
Index: kernel/arch/sparc64/src/sparc64.c
===================================================================
--- kernel/arch/sparc64/src/sparc64.c	(revision 80bcaed11c2e767559657092d6c13d1a7fdd449c)
+++ kernel/arch/sparc64/src/sparc64.c	(revision 557394294b6545575e0e9b328455da8ae4cf8a51)
@@ -137,5 +137,5 @@
 {
 	uint64_t stop = tick_read() + (uint64_t) usec * (uint64_t)
-		CPU->arch.clock_frequency / 1000000;
+	    CPU->arch.clock_frequency / 1000000;
 
 	while (tick_read() < stop)
@@ -147,7 +147,7 @@
 {
 	switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry,
-		((uintptr_t) kernel_uarg->uspace_stack) + STACK_SIZE
-		- (ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT) + STACK_BIAS),
-		(uintptr_t) kernel_uarg->uspace_uarg);
+	    ((uintptr_t) kernel_uarg->uspace_stack) + STACK_SIZE
+	    - (ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT) + STACK_BIAS),
+	    (uintptr_t) kernel_uarg->uspace_uarg);
 
 	for (;;)