Changeset 544a2e4 in mainline for kernel/arch


Ignore:
Timestamp:
2011-05-30T21:37:43Z (15 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
7b712b60
Parents:
18ba2e4f (diff), 0743493a (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.
Message:

Merge mainline changes.

Location:
kernel/arch
Files:
2 added
59 edited

Legend:

Unmodified
Added
Removed

  • kernel/arch/abs32le/include/mm/as.h

    r18ba2e4f r544a2e4  
    4343#define USER_ADDRESS_SPACE_END_ARCH      UINT32_C(0x7fffffff)
    4444
    45 #define USTACK_ADDRESS_ARCH  (USER_ADDRESS_SPACE_END_ARCH - (PAGE_SIZE - 1))
    46 
    4745typedef struct {
    4846} as_arch_t;

  • kernel/arch/abs32le/include/types.h

    r18ba2e4f r544a2e4  
    4040
    4141typedef uint32_t size_t;
     42typedef int32_t ssize_t;
    4243
    4344typedef uint32_t uintptr_t;

  • kernel/arch/amd64/include/mm/as.h

    r18ba2e4f r544a2e4  
    4343#define KERNEL_ADDRESS_SPACE_START_ARCH  UINT64_C(0xffff800000000000)
    4444#define KERNEL_ADDRESS_SPACE_END_ARCH    UINT64_C(0xffffffffffffffff)
    45 
    46 #define USER_ADDRESS_SPACE_START_ARCH  UINT64_C(0x0000000000000000)
    47 #define USER_ADDRESS_SPACE_END_ARCH    UINT64_C(0x00007fffffffffff)
    48 
    49 #define USTACK_ADDRESS_ARCH  (USER_ADDRESS_SPACE_END_ARCH - (PAGE_SIZE - 1))
     45#define USER_ADDRESS_SPACE_START_ARCH    UINT64_C(0x0000000000000000)
     46#define USER_ADDRESS_SPACE_END_ARCH      UINT64_C(0x00007fffffffffff)
    5047
    5148#define as_constructor_arch(as, flags)  (as != as)

  • kernel/arch/amd64/include/types.h

    r18ba2e4f r544a2e4  
    3737
    3838typedef uint64_t size_t;
     39typedef int64_t ssize_t;
    3940
    4041typedef uint64_t uintptr_t;

  • kernel/arch/amd64/src/interrupt.c

    r18ba2e4f r544a2e4  
    6666void istate_decode(istate_t *istate)
    6767{
    68         printf("cs =%#0" PRIx64 "\trip=%p\t"
    69             "rfl=%#0" PRIx64 "\terr=%#0" PRIx64 "\n",
    70             istate->cs, (void *) istate->rip,
    71             istate->rflags, istate->error_word);
     68        printf("cs =%0#18" PRIx64 "\trip=%0#18" PRIx64 "\t"
     69            "rfl=%0#18" PRIx64 "\terr=%0#18" PRIx64 "\n",
     70            istate->cs, istate->rip, istate->rflags, istate->error_word);
    7271       
    7372        if (istate_from_uspace(istate))
    74                 printf("ss =%#0" PRIx64 "\n", istate->ss);
    75        
    76         printf("rax=%#0" PRIx64 "\trbx=%#0" PRIx64 "\t"
    77             "rcx=%#0" PRIx64 "\trdx=%#0" PRIx64 "\n",
     73                printf("ss =%0#18" PRIx64 "\n", istate->ss);
     74       
     75        printf("rax=%0#18" PRIx64 "\trbx=%0#18" PRIx64 "\t"
     76            "rcx=%0#18" PRIx64 "\trdx=%0#18" PRIx64 "\n",
    7877            istate->rax, istate->rbx, istate->rcx, istate->rdx);
    7978       
    80         printf("rsi=%p\trdi=%p\trbp=%p\trsp=%p\n",
    81             (void *) istate->rsi, (void *) istate->rdi,
    82             (void *) istate->rbp,
    83             istate_from_uspace(istate) ? ((void *) istate->rsp) :
    84             &istate->rsp);
    85        
    86         printf("r8 =%#0" PRIx64 "\tr9 =%#0" PRIx64 "\t"
    87             "r10=%#0" PRIx64 "\tr11=%#0" PRIx64 "\n",
     79        printf("rsi=%0#18" PRIx64 "\trdi=%0#18" PRIx64 "\t"
     80            "rbp=%0#18" PRIx64 "\trsp=%0#18" PRIx64 "\n",
     81            istate->rsi, istate->rdi, istate->rbp,
     82            istate_from_uspace(istate) ? istate->rsp :
     83            (uintptr_t) &istate->rsp);
     84       
     85        printf("r8 =%0#18" PRIx64 "\tr9 =%0#18" PRIx64 "\t"
     86            "r10=%0#18" PRIx64 "\tr11=%0#18" PRIx64 "\n",
    8887            istate->r8, istate->r9, istate->r10, istate->r11);
    8988       
    90         printf("r12=%#0" PRIx64 "\tr13=%#0" PRIx64 "\t"
    91             "r14=%#0" PRIx64 "\tr15=%#0" PRIx64 "\n",
     89        printf("r12=%0#18" PRIx64 "\tr13=%0#18" PRIx64 "\t"
     90            "r14=%0#18" PRIx64 "\tr15=%0#18" PRIx64 "\n",
    9291            istate->r12, istate->r13, istate->r14, istate->r15);
    9392}

  • kernel/arch/amd64/src/proc/scheduler.c

    r18ba2e4f r544a2e4  
    5656{
    5757        CPU->arch.tss->rsp0 =
    58             (uintptr_t) &THREAD->kstack[THREAD_STACK_SIZE];
     58            (uintptr_t) &THREAD->kstack[STACK_SIZE];
    5959       
    6060        /*

  • kernel/arch/amd64/src/userspace.c

    r18ba2e4f r544a2e4  
    6666                "iretq\n"
    6767                :: [udata_des] "i" (GDT_SELECTOR(UDATA_DES) | PL_USER),
    68                    [stack_size] "r" (kernel_uarg->uspace_stack + THREAD_STACK_SIZE),
     68                   [stack_size] "r" (kernel_uarg->uspace_stack + STACK_SIZE),
    6969                   [ipl] "r" (ipl),
    7070                   [utext_des] "i" (GDT_SELECTOR(UTEXT_DES) | PL_USER),

  • kernel/arch/arm32/include/mm/as.h

    r18ba2e4f r544a2e4  
    3737#define KERN_arm32_AS_H_
    3838
    39 #define KERNEL_ADDRESS_SPACE_SHADOWED_ARCH      0
     39#define KERNEL_ADDRESS_SPACE_SHADOWED_ARCH  0
    4040
    41 #define KERNEL_ADDRESS_SPACE_START_ARCH     (unsigned long) 0x80000000
    42 #define KERNEL_ADDRESS_SPACE_END_ARCH       (unsigned long) 0xffffffff
    43 #define USER_ADDRESS_SPACE_START_ARCH       (unsigned long) 0x00000000
    44 #define USER_ADDRESS_SPACE_END_ARCH         (unsigned long) 0x7fffffff
    45 
    46 #define USTACK_ADDRESS_ARCH     (0x80000000 - PAGE_SIZE)
     41#define KERNEL_ADDRESS_SPACE_START_ARCH  UINT32_C(0x80000000)
     42#define KERNEL_ADDRESS_SPACE_END_ARCH    UINT32_C(0xffffffff)
     43#define USER_ADDRESS_SPACE_START_ARCH    UINT32_C(0x00000000)
     44#define USER_ADDRESS_SPACE_END_ARCH      UINT32_C(0x7fffffff)
    4745
    4846typedef struct {

  • kernel/arch/arm32/include/types.h

    r18ba2e4f r544a2e4  
    4444
    4545typedef uint32_t size_t;
     46typedef int32_t ssize_t;
    4647
    4748typedef uint32_t uintptr_t;

  • kernel/arch/arm32/src/arm32.c

    r18ba2e4f r544a2e4  
    134134        uint8_t *stck;
    135135       
    136         stck = &THREAD->kstack[THREAD_STACK_SIZE - SP_DELTA];
     136        stck = &THREAD->kstack[STACK_SIZE - SP_DELTA];
    137137        supervisor_sp = (uintptr_t) stck;
    138138}

  • kernel/arch/arm32/src/exception.c

    r18ba2e4f r544a2e4  
    174174void istate_decode(istate_t *istate)
    175175{
    176         printf("r0 =%#0" PRIx32 "\tr1 =%#0" PRIx32 "\t"
    177             "r2 =%#0" PRIx32 "\tr3 =%#0" PRIx32 "\n",
     176        printf("r0 =%0#10" PRIx32 "\tr1 =%0#10" PRIx32 "\t"
     177            "r2 =%0#10" PRIx32 "\tr3 =%0#10" PRIx32 "\n",
    178178            istate->r0, istate->r1, istate->r2, istate->r3);
    179         printf("r4 =%#" PRIx32 "\tr5 =%#0" PRIx32 "\t"
    180             "r6 =%#0" PRIx32 "\tr7 =%#0" PRIx32 "\n",
     179        printf("r4 =%0#10" PRIx32 "\tr5 =%0#10" PRIx32 "\t"
     180            "r6 =%0#10" PRIx32 "\tr7 =%0#10" PRIx32 "\n",
    181181            istate->r4, istate->r5, istate->r6, istate->r7);
    182         printf("r8 =%#0" PRIx32 "\tr9 =%#0" PRIx32 "\t"
    183             "r10=%#0" PRIx32 "\tfp =%p\n",
    184             istate->r8, istate->r9, istate->r10,
    185             (void *) istate->fp);
    186         printf("r12=%#0" PRIx32 "\tsp =%p\tlr =%p\tspsr=%p\n",
    187             istate->r12, (void *) istate->sp,
    188             (void *) istate->lr, (void *) istate->spsr);
     182        printf("r8 =%0#10" PRIx32 "\tr9 =%0#10" PRIx32 "\t"
     183            "r10=%0#10" PRIx32 "\tfp =%0#10" PRIx32 "\n",
     184            istate->r8, istate->r9, istate->r10, istate->fp);
     185        printf("r12=%0#10" PRIx32 "\tsp =%0#10" PRIx32 "\t"
     186            "lr =%0#10" PRIx32 "\tspsr=%0#10" PRIx32 "\n",
     187            istate->r12, istate->sp, istate->lr, istate->spsr);
    189188}
    190189

  • kernel/arch/arm32/src/userspace.c

    r18ba2e4f r544a2e4  
    3838
    3939/** Struct for holding all general purpose registers.
    40  * 
     40 *
    4141 *  Used to set registers when going to userspace.
    4242 */
    … …  
    6060} ustate_t;
    6161
    62 /** Changes processor mode and jumps to the address specified in the first
    63  * parameter.
     62/** Change processor mode
    6463 *
    65  *  @param kernel_uarg   Userspace settings (entry point, stack, ...).
     64 * @param kernel_uarg Userspace settings (entry point, stack, ...).
     65 *
    6666 */
    6767void userspace(uspace_arg_t *kernel_uarg)
    … …  
    7979
    8080        /* clear other registers */
    81         ustate.r3  = ustate.r4  = ustate.r5 = ustate.r6 = ustate.r7 =
    82             ustate.r8 = ustate.r9 = ustate.r10 = ustate.r11 = ustate.r12 =
    83             ustate.lr = 0;
     81        ustate.r3 = 0;
     82        ustate.r4 = 0;
     83        ustate.r5 = 0;
     84        ustate.r6 = 0;
     85        ustate.r7 = 0;
     86        ustate.r8 = 0;
     87        ustate.r9 = 0;
     88        ustate.r10 = 0;
     89        ustate.r11 = 0;
     90        ustate.r12 = 0;
     91        ustate.lr = 0;
    8492
    8593        /* set user stack */
    86         ustate.sp = ((uint32_t)kernel_uarg->uspace_stack) + PAGE_SIZE;
     94        ustate.sp = ((uint32_t)kernel_uarg->uspace_stack) + STACK_SIZE;
    8795
    8896        /* set where uspace execution starts */

  • kernel/arch/ia32/Makefile.inc

    r18ba2e4f r544a2e4  
    3535ENDIANESS = LE
    3636
    37 CMN1 = -m32
     37CMN1 = -m32 -fno-omit-frame-pointer
    3838GCC_CFLAGS += $(CMN1)
    3939ICC_CFLAGS += $(CMN1)

  • kernel/arch/ia32/include/barrier.h

    r18ba2e4f r544a2e4  
    5454NO_TRACE static inline void cpuid_serialization(void)
    5555{
     56#ifndef __IN_SHARED_LIBC__
    5657        asm volatile (
    5758                "xorl %%eax, %%eax\n"
    … …  
    5960                ::: "eax", "ebx", "ecx", "edx", "memory"
    6061        );
     62#else
     63        /* Must not clobber PIC register ebx */
     64        asm volatile (
     65                "movl %%ebx, %%esi\n"
     66                "xorl %%eax, %%eax\n"
     67                "cpuid\n"
     68                "movl %%esi, %%ebx\n"
     69                ::: "eax", "ecx", "edx", "esi", "memory"
     70        );
     71#endif
    6172}
    6273

  • kernel/arch/ia32/include/mm/as.h

    r18ba2e4f r544a2e4  
    4343#define USER_ADDRESS_SPACE_END_ARCH      UINT32_C(0x7fffffff)
    4444
    45 #define USTACK_ADDRESS_ARCH  (USER_ADDRESS_SPACE_END_ARCH - (PAGE_SIZE - 1))
    46 
    4745typedef struct {
    4846} as_arch_t;

  • kernel/arch/ia32/include/types.h

    r18ba2e4f r544a2e4  
    3737
    3838typedef uint32_t size_t;
     39typedef int32_t ssize_t;
    3940
    4041typedef uint32_t uintptr_t;

  • kernel/arch/ia32/src/interrupt.c

    r18ba2e4f r544a2e4  
    6666void istate_decode(istate_t *istate)
    6767{
    68         printf("cs =%#0" PRIx32 "\teip=%p\t"
    69             "efl=%#0" PRIx32 "\terr=%#0" PRIx32 "\n",
    70             istate->cs, (void *) istate->eip,
    71             istate->eflags, istate->error_word);
    72        
    73         printf("ds =%#0" PRIx32 "\tes =%#0" PRIx32 "\t"
    74             "fs =%#0" PRIx32 "\tgs =%#0" PRIx32 "\n",
     68        printf("cs =%0#10" PRIx32 "\teip=%0#10" PRIx32 "\t"
     69            "efl=%0#10" PRIx32 "\terr=%0#10" PRIx32 "\n",
     70            istate->cs, istate->eip, istate->eflags, istate->error_word);
     71       
     72        printf("ds =%0#10" PRIx32 "\tes =%0#10" PRIx32 "\t"
     73            "fs =%0#10" PRIx32 "\tgs =%0#10" PRIx32 "\n",
    7574            istate->ds, istate->es, istate->fs, istate->gs);
    7675       
    7776        if (istate_from_uspace(istate))
    78                 printf("ss =%#0" PRIx32 "\n", istate->ss);
    79        
    80         printf("eax=%#0" PRIx32 "\tebx=%#0" PRIx32 "\t"
    81             "ecx=%#0" PRIx32 "\tedx=%#0" PRIx32 "\n",
     77                printf("ss =%0#10" PRIx32 "\n", istate->ss);
     78       
     79        printf("eax=%0#10" PRIx32 "\tebx=%0#10" PRIx32 "\t"
     80            "ecx=%0#10" PRIx32 "\tedx=%0#10" PRIx32 "\n",
    8281            istate->eax, istate->ebx, istate->ecx, istate->edx);
    8382       
    84         printf("esi=%p\tedi=%p\tebp=%p\tesp=%p\n",
    85             (void *) istate->esi, (void *) istate->edi,
    86             (void *) istate->ebp,
    87             istate_from_uspace(istate) ? ((void *) istate->esp) :
    88             &istate->esp);
     83        printf("esi=%0#10" PRIx32 "\tedi=%0#10" PRIx32 "\t"
     84            "ebp=%0#10" PRIx32 "\tesp=%0#10" PRIx32 "\n",
     85            istate->esi, istate->edi, istate->ebp,
     86            istate_from_uspace(istate) ? istate->esp :
     87            (uintptr_t) &istate->esp);
    8988}
    9089

  • kernel/arch/ia32/src/proc/scheduler.c

    r18ba2e4f r544a2e4  
    5858void before_thread_runs_arch(void)
    5959{
    60         uintptr_t kstk = (uintptr_t) &THREAD->kstack[THREAD_STACK_SIZE];
     60        uintptr_t kstk = (uintptr_t) &THREAD->kstack[STACK_SIZE];
    6161       
    6262        if (CPU->arch.fi.bits.sep) {

  • kernel/arch/ia32/src/userspace.c

    r18ba2e4f r544a2e4  
    7676                :
    7777                : [udata_des] "i" (GDT_SELECTOR(UDATA_DES) | PL_USER),
    78                   [stack_size] "r" ((uint8_t *) kernel_uarg->uspace_stack + THREAD_STACK_SIZE),
     78                  [stack_size] "r" ((uint8_t *) kernel_uarg->uspace_stack + STACK_SIZE),
    7979                  [ipl] "r" (ipl),
    8080                  [utext_des] "i" (GDT_SELECTOR(UTEXT_DES) | PL_USER),

  • kernel/arch/ia64/include/arch.h

    r18ba2e4f r544a2e4  
    3636#define KERN_ia64_ARCH_H_
    3737
    38 #define LOADED_PROG_STACK_PAGES_NO 2
    39 
    4038#include <arch/drivers/ski.h>
    4139

  • kernel/arch/ia64/include/asm.h

    r18ba2e4f r544a2e4  
    122122}
    123123
    124 /** Return base address of current stack
    125  *
    126  * Return the base address of the current stack.
    127  * The stack is assumed to be STACK_SIZE long.
    128  * The stack must start on page boundary.
    129  *
     124/** Return base address of current memory stack.
     125 *
     126 * The memory stack is assumed to be STACK_SIZE / 2 long. Note that there is
     127 * also the RSE stack, which takes up the upper half of STACK_SIZE.
     128 * The memory stack must start on page boundary.
    130129 */
    131130NO_TRACE static inline uintptr_t get_stack_base(void)
    132131{
    133         uint64_t v;
    134        
    135         /*
    136          * I'm not sure why but this code inlines badly
    137          * in scheduler, resulting in THE shifting about
    138          * 16B and causing kernel panic.
    139          *
    140          * asm volatile (
    141          *     "and %[value] = %[mask], r12"
    142          *     : [value] "=r" (v)
    143          *     : [mask] "r" (~(STACK_SIZE - 1))
    144          * );
    145          * return v;
    146          *
    147          * The following code has the same semantics but
    148          * inlines correctly.
    149          *
    150          */
     132        uint64_t value;
    151133       
    152134        asm volatile (
    153135                "mov %[value] = r12"
    154                 : [value] "=r" (v)
    155         );
    156        
    157         return (v & (~(STACK_SIZE - 1)));
     136                : [value] "=r" (value)
     137        );
     138       
     139        return (value & (~(STACK_SIZE / 2 - 1)));
    158140}
    159141

  • kernel/arch/ia64/include/context.h

    r18ba2e4f r544a2e4  
    4949#define SP_DELTA        (0 + ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT))
    5050
    51 /* RSE stack starts at the bottom of memory stack. */
     51/* RSE stack starts at the bottom of memory stack, hence the division by 2. */
    5252#define context_set(c, _pc, stack, size)                                                                \
    5353        do {                                                                                            \
    5454                (c)->pc = (uintptr_t) _pc;                                                              \
    55                 (c)->bsp = ((uintptr_t) stack) + ALIGN_UP((size), REGISTER_STACK_ALIGNMENT);            \
     55                (c)->bsp = ((uintptr_t) stack) + ALIGN_UP((size / 2), REGISTER_STACK_ALIGNMENT);        \
    5656                (c)->ar_pfs &= PFM_MASK;                                                                \
    57                 (c)->sp = ((uintptr_t) stack) + ALIGN_UP((size), STACK_ALIGNMENT) - SP_DELTA;           \
     57                (c)->sp = ((uintptr_t) stack) + ALIGN_UP((size / 2), STACK_ALIGNMENT) - SP_DELTA;       \
    5858        } while (0);
    5959

  • kernel/arch/ia64/include/mm/as.h

    r18ba2e4f r544a2e4  
    3838#define KERNEL_ADDRESS_SPACE_SHADOWED_ARCH  0
    3939
    40 #define KERNEL_ADDRESS_SPACE_START_ARCH  ((unsigned long) 0xe000000000000000ULL)
    41 #define KERNEL_ADDRESS_SPACE_END_ARCH    ((unsigned long) 0xffffffffffffffffULL)
    42 #define USER_ADDRESS_SPACE_START_ARCH    ((unsigned long) 0x0000000000000000ULL)
    43 #define USER_ADDRESS_SPACE_END_ARCH      ((unsigned long) 0xdfffffffffffffffULL)
     40#define KERNEL_ADDRESS_SPACE_START_ARCH  UINT64_C(0xe000000000000000)
     41#define KERNEL_ADDRESS_SPACE_END_ARCH    UINT64_C(0xffffffffffffffff)
     42#define USER_ADDRESS_SPACE_START_ARCH    UINT64_C(0x0000000000000000)
     43#define USER_ADDRESS_SPACE_END_ARCH      UINT64_C(0xdfffffffffffffff)
    4444
    45 #define USTACK_ADDRESS_ARCH  0x0000000ff0000000ULL
     45#define USTACK_ADDRESS_ARCH  UINT64_C(0x0000000ff0000000)
    4646
    4747typedef struct {

  • kernel/arch/ia64/include/mm/frame.h

    r18ba2e4f r544a2e4  
    4949#define physmem_print()
    5050
    51 #define ARCH_STACK_FRAMES TWO_FRAMES
    52 
    5351#endif /* __ASM__ */
    5452#endif /* KERNEL */

  • kernel/arch/ia64/include/types.h

    r18ba2e4f r544a2e4  
    3737
    3838typedef uint64_t size_t;
     39typedef int64_t ssize_t;
    3940
    4041typedef uint64_t uintptr_t;

  • kernel/arch/ia64/src/ia64.c

    r18ba2e4f r544a2e4  
    249249        rsc.mode = 3;                   /* eager mode */
    250250
     251        /*
     252         * Switch to userspace.
     253         *
     254         * When calculating stack addresses, mind the stack split between the
     255         * memory stack and the RSE stack. Each occuppies STACK_SIZE / 2 bytes.
     256         */
    251257        switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry,
    252             ((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE -
     258            ((uintptr_t) kernel_uarg->uspace_stack) + STACK_SIZE / 2 -
    253259            ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT),
    254             ((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE,
     260            ((uintptr_t) kernel_uarg->uspace_stack) + STACK_SIZE / 2,
    255261            (uintptr_t) kernel_uarg->uspace_uarg, psr.value, rsc.value);
    256262

  • kernel/arch/ia64/src/mm/tlb.c

    r18ba2e4f r544a2e4  
    481481       
    482482        page_table_lock(AS, true);
    483         t = page_mapping_find(AS, va);
     483        t = page_mapping_find(AS, va, true);
    484484        if (t) {
    485485                /*
    … …  
    599599       
    600600        page_table_lock(AS, true);
    601         pte_t *entry = page_mapping_find(AS, va);
     601        pte_t *entry = page_mapping_find(AS, va, true);
    602602        if (entry) {
    603603                /*
    … …  
    651651       
    652652        page_table_lock(AS, true);
    653         t = page_mapping_find(AS, va);
     653        t = page_mapping_find(AS, va, true);
    654654        ASSERT((t) && (t->p));
    655655        if ((t) && (t->p) && (t->w)) {
    … …  
    684684       
    685685        page_table_lock(AS, true);
    686         t = page_mapping_find(AS, va);
     686        t = page_mapping_find(AS, va, true);
    687687        ASSERT((t) && (t->p));
    688688        if ((t) && (t->p) && (t->x)) {
    … …  
    717717       
    718718        page_table_lock(AS, true);
    719         t = page_mapping_find(AS, va);
     719        t = page_mapping_find(AS, va, true);
    720720        ASSERT((t) && (t->p));
    721721        if ((t) && (t->p)) {
    … …  
    753753         */
    754754        page_table_lock(AS, true);
    755         t = page_mapping_find(AS, va);
     755        t = page_mapping_find(AS, va, true);
    756756        ASSERT((t) && (t->p));
    757757        ASSERT(!t->w);
    … …  
    778778       
    779779        page_table_lock(AS, true);
    780         t = page_mapping_find(AS, va);
     780        t = page_mapping_find(AS, va, true);
    781781        ASSERT(t);
    782782       

  • kernel/arch/ia64/src/proc/scheduler.c

    r18ba2e4f r544a2e4  
    7979         * Record address of kernel stack to bank 0 r23.
    8080         * These values will be found there after switch from userspace.
     81         *
     82         * Mind the 1:1 split of the entire STACK_SIZE long region between the
     83         * memory stack and the RSE stack.
    8184         */
    8285        asm volatile (
    … …  
    8689                "bsw.1\n"
    8790                :
    88                 : "r" (&THREAD->kstack[THREAD_STACK_SIZE]),
    89                   "r" (&THREAD->kstack[THREAD_STACK_SIZE - SP_DELTA])
     91                : "r" (&THREAD->kstack[STACK_SIZE / 2]),
     92                  "r" (&THREAD->kstack[STACK_SIZE / 2 - SP_DELTA])
    9093                );
    9194}

  • kernel/arch/mips32/include/mm/as.h

    r18ba2e4f r544a2e4  
    3838#define KERNEL_ADDRESS_SPACE_SHADOWED_ARCH  0
    3939
    40 #define KERNEL_ADDRESS_SPACE_START_ARCH         (unsigned long) 0x80000000
    41 #define KERNEL_ADDRESS_SPACE_END_ARCH           (unsigned long) 0x9fffffff
    42 #define USER_ADDRESS_SPACE_START_ARCH           (unsigned long) 0x00000000
    43 #define USER_ADDRESS_SPACE_END_ARCH             (unsigned long) 0x7fffffff
    44 
    45 #define USTACK_ADDRESS_ARCH     (0x80000000 - PAGE_SIZE)
     40#define KERNEL_ADDRESS_SPACE_START_ARCH  UINT32_C(0x80000000)
     41#define KERNEL_ADDRESS_SPACE_END_ARCH    UINT32_C(0x9fffffff)
     42#define USER_ADDRESS_SPACE_START_ARCH    UINT32_C(0x00000000)
     43#define USER_ADDRESS_SPACE_END_ARCH      UINT32_C(0x7fffffff)
    4644
    4745typedef struct {

  • kernel/arch/mips32/include/types.h

    r18ba2e4f r544a2e4  
    3737
    3838typedef uint32_t size_t;
     39typedef int32_t ssize_t;
    3940
    4041typedef uint32_t uintptr_t;

  • kernel/arch/mips32/src/debugger.c

    r18ba2e4f r544a2e4  
    7979static cmd_info_t addbkpt_info = {
    8080        .name = "addbkpt",
    81         .description = "Add bkpoint (break on J/Branch insts unsupported).",
     81        .description = "Add bkpoint (break on j/branch insts unsupported).",
    8282        .func = cmd_add_breakpoint,
    8383        .argc = 1,

  • kernel/arch/mips32/src/exception.c

    r18ba2e4f r544a2e4  
    7474void istate_decode(istate_t *istate)
    7575{
    76         printf("epc=%p\tsta=%#010" PRIx32 "\t"
     76        printf("epc=%#010" PRIx32 "\tsta=%#010" PRIx32 "\t"
    7777            "lo =%#010" PRIx32 "\thi =%#010" PRIx32 "\n",
    78             (void *) istate->epc, istate->status,
    79             istate->lo, istate->hi);
     78            istate->epc, istate->status, istate->lo, istate->hi);
    8079       
    8180        printf("a0 =%#010" PRIx32 "\ta1 =%#010" PRIx32 "\t"
    … …  
    107106            istate->s8, istate->at, istate->kt0, istate->kt1);
    108107       
    109         printf("sp =%p\tra =%p\tgp =%p\n",
    110             (void *) istate->sp, (void *) istate->ra,
    111             (void *) istate->gp);
     108        printf("sp =%#010" PRIx32 "\tra =%#010" PRIx32 "\t"
     109            "gp =%#010" PRIx32 "\n",
     110            istate->sp, istate->ra, istate->gp);
    112111}
    113112

  • kernel/arch/mips32/src/mips32.c

    r18ba2e4f r544a2e4  
    220220            cp0_status_um_bit | cp0_status_ie_enabled_bit));
    221221        cp0_epc_write((uintptr_t) kernel_uarg->uspace_entry);
    222         userspace_asm(((uintptr_t) kernel_uarg->uspace_stack + PAGE_SIZE),
     222        userspace_asm(((uintptr_t) kernel_uarg->uspace_stack + STACK_SIZE),
    223223            (uintptr_t) kernel_uarg->uspace_uarg,
    224224            (uintptr_t) kernel_uarg->uspace_entry);
    … …  
    235235void before_thread_runs_arch(void)
    236236{
    237         supervisor_sp = (uintptr_t) &THREAD->kstack[THREAD_STACK_SIZE -
    238             SP_DELTA];
     237        supervisor_sp =
     238            (uintptr_t) &THREAD->kstack[STACK_SIZE - SP_DELTA];
    239239}
    240240

  • kernel/arch/mips32/src/mm/frame.c

    r18ba2e4f r544a2e4  
    8888        /* gxemul devices */
    8989        if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE,
    90             0x10000000, MB2SIZE(256)))
     90            0x10000000, MiB2SIZE(256)))
    9191                return false;
    9292#endif

  • kernel/arch/mips32/src/mm/tlb.c

    r18ba2e4f r544a2e4  
    100100        mutex_unlock(&AS->lock);
    101101       
    102         page_table_lock(AS, true);
    103        
    104102        pte = find_mapping_and_check(badvaddr, PF_ACCESS_READ, istate, &pfrc);
    105103        if (!pte) {
    … …  
    113111                         * or copy_to_uspace().
    114112                         */
    115                         page_table_unlock(AS, true);
    116113                        return;
    117114                default:
    … …  
    144141        tlbwr();
    145142
    146         page_table_unlock(AS, true);
    147143        return;
    148144       
    149145fail:
    150         page_table_unlock(AS, true);
    151146        tlb_refill_fail(istate);
    152147}
    … …  
    176171        index.value = cp0_index_read();
    177172
    178         page_table_lock(AS, true);     
    179        
    180173        /*
    181174         * Fail if the entry is not in TLB.
    … …  
    197190                         * or copy_to_uspace().
    198191                         */
    199                         page_table_unlock(AS, true);                     
    200192                        return;
    201193                default:
    … …  
    227219        tlbwi();
    228220
    229         page_table_unlock(AS, true);
    230221        return;
    231222       
    232223fail:
    233         page_table_unlock(AS, true);
    234224        tlb_invalid_fail(istate);
    235225}
    … …  
    259249        index.value = cp0_index_read();
    260250
    261         page_table_lock(AS, true);     
    262        
    263251        /*
    264252         * Fail if the entry is not in TLB.
    … …  
    280268                         * or copy_to_uspace().
    281269                         */
    282                         page_table_unlock(AS, true);                     
    283270                        return;
    284271                default:
    … …  
    311298        tlbwi();
    312299
    313         page_table_unlock(AS, true);
    314300        return;
    315301       
    316302fail:
    317         page_table_unlock(AS, true);
    318303        tlb_modified_fail(istate);
    319304}
    … …  
    364349        pte_t *pte;
    365350
    366         ASSERT(mutex_locked(&AS->lock));
    367 
    368351        hi.value = cp0_entry_hi_read();
    369352
    … …  
    379362         * Check if the mapping exists in page tables.
    380363         */     
    381         pte = page_mapping_find(AS, badvaddr);
     364        pte = page_mapping_find(AS, badvaddr, true);
    382365        if (pte && pte->p && (pte->w || access != PF_ACCESS_WRITE)) {
    383366                /*
    … …  
    393376                 * Resort to higher-level page fault handler.
    394377                 */
    395                 page_table_unlock(AS, true);
    396378                switch (rc = as_page_fault(badvaddr, access, istate)) {
    397379                case AS_PF_OK:
    … …  
    400382                         * The mapping ought to be in place.
    401383                         */
    402                         page_table_lock(AS, true);
    403                         pte = page_mapping_find(AS, badvaddr);
     384                        pte = page_mapping_find(AS, badvaddr, true);
    404385                        ASSERT(pte && pte->p);
    405386                        ASSERT(pte->w || access != PF_ACCESS_WRITE);
    … …  
    407388                        break;
    408389                case AS_PF_DEFER:
    409                         page_table_lock(AS, true);
    410390                        *pfrc = AS_PF_DEFER;
    411391                        return NULL;
    412392                        break;
    413393                case AS_PF_FAULT:
    414                         page_table_lock(AS, true);
    415394                        *pfrc = AS_PF_FAULT;
    416395                        return NULL;

  • kernel/arch/ppc32/Makefile.inc

    r18ba2e4f r544a2e4  
    5555        arch/$(KARCH)/src/mm/frame.c \
    5656        arch/$(KARCH)/src/mm/page.c \
     57        arch/$(KARCH)/src/mm/pht.c \
    5758        arch/$(KARCH)/src/mm/tlb.c \
    5859        arch/$(KARCH)/src/drivers/pic.c

  • kernel/arch/ppc32/include/boot/boot.h

    r18ba2e4f r544a2e4  
    3737
    3838#define BOOT_OFFSET  0x8000
    39 
    40 /* Temporary stack size for boot process */
    41 #define TEMP_STACK_SIZE  0x1000
    4239
    4340#define TASKMAP_MAX_RECORDS        32

  • kernel/arch/ppc32/include/interrupt.h

    r18ba2e4f r544a2e4  
    4545#define VECTOR_EXTERNAL             4
    4646#define VECTOR_DECREMENTER          8
     47#define VECTOR_ITLB_MISS            13
     48#define VECTOR_DTLB_MISS_LOAD       14
     49#define VECTOR_DTLB_MISS_STORE      15
    4750
    4851extern void start_decrementer(void);

  • kernel/arch/ppc32/include/istate.h

    r18ba2e4f r544a2e4  
    7373        uint32_t cr;
    7474        uint32_t pc;
    75         uint32_t srr1;
     75        uint32_t msr;
    7676        uint32_t lr;
    7777        uint32_t ctr;
    … …  
    9090/** Return true if exception happened while in userspace
    9191 *
    92  * The contexts of MSR register was stored in SRR1.
    93  *
    9492 */
    9593NO_TRACE static inline int istate_from_uspace(istate_t *istate)
    9694{
    97         return (istate->srr1 & MSR_PR) != 0;
     95        return (istate->msr & MSR_PR) != 0;
    9896}
    9997

  • kernel/arch/ppc32/include/mm/as.h

    r18ba2e4f r544a2e4  
    3636#define KERN_ppc32_AS_H_
    3737
     38#include <arch/mm/pht.h>
     39
    3840#define KERNEL_ADDRESS_SPACE_SHADOWED_ARCH  0
    3941
    40 #define KERNEL_ADDRESS_SPACE_START_ARCH  ((unsigned long) 0x80000000)
    41 #define KERNEL_ADDRESS_SPACE_END_ARCH    ((unsigned long) 0xffffffff)
    42 #define USER_ADDRESS_SPACE_START_ARCH    ((unsigned long) 0x00000000)
    43 #define USER_ADDRESS_SPACE_END_ARCH      ((unsigned long) 0x7fffffff)
    44 
    45 #define USTACK_ADDRESS_ARCH  (0x7fffffff - (PAGE_SIZE - 1))
     42#define KERNEL_ADDRESS_SPACE_START_ARCH  UINT32_C(0x80000000)
     43#define KERNEL_ADDRESS_SPACE_END_ARCH    UINT32_C(0xffffffff)
     44#define USER_ADDRESS_SPACE_START_ARCH    UINT32_C(0x00000000)
     45#define USER_ADDRESS_SPACE_END_ARCH      UINT32_C(0x7fffffff)
    4646
    4747typedef struct {
    … …  
    5454#define as_create_arch(as, flags)       (as != as)
    5555#define as_deinstall_arch(as)
    56 #define as_invalidate_translation_cache(as, page, cnt)
     56
     57#define as_invalidate_translation_cache(as, page, cnt) \
     58        pht_invalidate((as), (page), (cnt))
    5759
    5860extern void as_arch_init(void);

  • kernel/arch/ppc32/include/mm/tlb.h

    r18ba2e4f r544a2e4  
    3737
    3838#include <arch/interrupt.h>
    39 #include <typedefs.h>
    4039
    4140#define WIMG_GUARDED    0x01
    … …  
    7574} ptelo_t;
    7675
    77 extern void pht_init(void);
    78 extern void pht_refill(unsigned int, istate_t *);
    79 
    80 extern bool pht_refill_real(unsigned int, istate_t *)
    81     __attribute__ ((section("K_UNMAPPED_TEXT_START")));
    82 extern void tlb_refill_real(unsigned int, uint32_t, ptehi_t, ptelo_t,
    83     istate_t *) __attribute__ ((section("K_UNMAPPED_TEXT_START")));
     76extern void tlb_refill(unsigned int, istate_t *);
    8477
    8578#endif

  • kernel/arch/ppc32/include/types.h

    r18ba2e4f r544a2e4  
    3737
    3838typedef uint32_t size_t;
     39typedef int32_t ssize_t;
    3940
    4041typedef uint32_t uintptr_t;

  • kernel/arch/ppc32/src/boot/boot.S

    r18ba2e4f r544a2e4  
    2828
    2929#include <arch/asm/regname.h>
    30 #include <arch/boot/boot.h>
     30#include <config.h>
    3131
    3232.section K_TEXT_START, "ax"
    … …  
    5656.align 12
    5757kernel_stack_bottom:
    58         .space TEMP_STACK_SIZE
     58        .space STACK_SIZE
    5959kernel_stack:

  • kernel/arch/ppc32/src/exception.S

    r18ba2e4f r544a2e4  
    142142        CONTEXT_STORE
    143143       
    144         b data_storage
     144        li r3, 2
     145        b jump_to_kernel
    145146
    146147.org 0x400
    … …  
    149150        CONTEXT_STORE
    150151       
    151         b instruction_storage
     152        li r3, 3
     153        b jump_to_kernel
    152154
    153155.org 0x500
    … …  
    227229        CONTEXT_STORE
    228230       
    229         b tlb_miss
     231        li r3, 13
     232        b jump_to_kernel
    230233
    231234.org 0x1100
    … …  
    234237        CONTEXT_STORE
    235238       
    236         b tlb_miss
     239        li r3, 14
     240        b jump_to_kernel
    237241
    238242.org 0x1200
    … …  
    241245        CONTEXT_STORE
    242246       
    243         b tlb_miss
     247        li r3, 15
     248        b jump_to_kernel
    244249
    245250.org 0x4000
    246 data_storage:
    247         li r3, 2
    248         mr r4, sp
    249         addi r4, r4, 8
    250         bl pht_refill_real
    251        
    252         cmpwi r3, 0
    253         bne iret_real
    254        
    255         li r3, 2
    256         b jump_to_kernel
    257 
    258 instruction_storage:
    259         li r3, 3
    260         mr r4, sp
    261         addi r4, r4, 8
    262         bl pht_refill_real
    263        
    264         cmpwi r3, 0
    265         bne iret_real
    266        
    267         li r3, 3
    268         b jump_to_kernel
    269 
    270 tlb_miss:
    271         li r3, 16
    272         mfspr r4, tlbmiss
    273         mfspr r5, ptehi
    274         mfspr r6, ptelo
    275         mr r7, sp
    276         addi r7, r7, 20
    277        
    278         bl tlb_refill_real
    279         b iret_real
    280 
    281251jump_to_kernel:
    282252        lis r12, iret@ha
    … …  
    313283        addis sp, sp, 0x8000
    314284        rfi
    315 
    316 iret_real:
    317         lwz r0, 8(sp)
    318         lwz r2, 12(sp)
    319         lwz r3, 16(sp)
    320         lwz r4, 20(sp)
    321         lwz r5, 24(sp)
    322         lwz r6, 28(sp)
    323         lwz r7, 32(sp)
    324         lwz r8, 36(sp)
    325         lwz r9, 40(sp)
    326         lwz r10, 44(sp)
    327         lwz r11, 48(sp)
    328         lwz r13, 52(sp)
    329         lwz r14, 56(sp)
    330         lwz r15, 60(sp)
    331         lwz r16, 64(sp)
    332         lwz r17, 68(sp)
    333         lwz r18, 72(sp)
    334         lwz r19, 76(sp)
    335         lwz r20, 80(sp)
    336         lwz r21, 84(sp)
    337         lwz r22, 88(sp)
    338         lwz r23, 92(sp)
    339         lwz r24, 96(sp)
    340         lwz r25, 100(sp)
    341         lwz r26, 104(sp)
    342         lwz r27, 108(sp)
    343         lwz r28, 112(sp)
    344         lwz r29, 116(sp)
    345         lwz r30, 120(sp)
    346         lwz r31, 124(sp)
    347        
    348         lwz r12, 128(sp)
    349         mtcr r12
    350        
    351         lwz r12, 132(sp)
    352         mtsrr0 r12
    353        
    354         lwz r12, 136(sp)
    355         mtsrr1 r12
    356        
    357         lwz r12, 140(sp)
    358         mtlr r12
    359        
    360         lwz r12, 144(sp)
    361         mtctr r12
    362        
    363         lwz r12, 148(sp)
    364         mtxer r12
    365        
    366         lwz r12, 156(sp)
    367         lwz sp, 160(sp)
    368        
    369         rfi

  • kernel/arch/ppc32/src/interrupt.c

    r18ba2e4f r544a2e4  
    4242#include <arch/drivers/pic.h>
    4343#include <arch/mm/tlb.h>
     44#include <arch/mm/pht.h>
    4445#include <print.h>
    4546
    … …  
    5455void istate_decode(istate_t *istate)
    5556{
    56         printf("r0 =%#0" PRIx32 "\tr1 =%p\tr2 =%#0" PRIx32 "\n",
    57             istate->r0, (void *) istate->sp, istate->r2);
     57        printf("r0 =%0#10" PRIx32 "\tr1 =%0#10" PRIx32 "\t"
     58            "r2 =%0#10" PRIx32 "\n", istate->r0, istate->sp, istate->r2);
    5859       
    59         printf("r3 =%#0" PRIx32 "\tr4 =%#0" PRIx32 "\tr5 =%#0" PRIx32 "\n",
    60             istate->r3, istate->r4, istate->r5);
     60        printf("r3 =%0#10" PRIx32 "\tr4 =%0#10" PRIx32 "\t"
     61            "r5 =%0#10" PRIx32 "\n", istate->r3, istate->r4, istate->r5);
    6162       
    62         printf("r6 =%#0" PRIx32 "\tr7 =%#0" PRIx32 "\tr8 =%#0" PRIx32 "\n",
    63             istate->r6, istate->r7, istate->r8);
     63        printf("r6 =%0#10" PRIx32 "\tr7 =%0#10" PRIx32 "\t"
     64            "r8 =%0#10" PRIx32 "\n", istate->r6, istate->r7, istate->r8);
    6465       
    65         printf("r9 =%#0" PRIx32 "\tr10=%#0" PRIx32 "\tr11=%#0" PRIx32 "\n",
    66             istate->r9, istate->r10, istate->r11);
     66        printf("r9 =%0#10" PRIx32 "\tr10=%0#10" PRIx32 "\t"
     67            "r11=%0#10" PRIx32 "\n", istate->r9, istate->r10, istate->r11);
    6768       
    68         printf("r12=%#0" PRIx32 "\tr13=%#0" PRIx32 "\tr14=%#0" PRIx32 "\n",
    69             istate->r12, istate->r13, istate->r14);
     69        printf("r12=%0#10" PRIx32 "\tr13=%0#10" PRIx32 "\t"
     70            "r14=%0#10" PRIx32 "\n", istate->r12, istate->r13, istate->r14);
    7071       
    71         printf("r15=%#0" PRIx32 "\tr16=%#0" PRIx32 "\tr17=%#0" PRIx32 "\n",
    72             istate->r15, istate->r16, istate->r17);
     72        printf("r15=%0#10" PRIx32 "\tr16=%0#10" PRIx32 "\t"
     73            "r17=%0#10" PRIx32 "\n", istate->r15, istate->r16, istate->r17);
    7374       
    74         printf("r18=%#0" PRIx32 "\tr19=%#0" PRIx32 "\tr20=%#0" PRIx32 "\n",
    75             istate->r18, istate->r19, istate->r20);
     75        printf("r18=%0#10" PRIx32 "\tr19=%0#10" PRIx32 "\t"
     76            "r20=%0#10" PRIx32 "\n", istate->r18, istate->r19, istate->r20);
    7677       
    77         printf("r21=%#0" PRIx32 "\tr22=%#0" PRIx32 "\tr23=%#0" PRIx32 "\n",
    78             istate->r21, istate->r22, istate->r23);
     78        printf("r21=%0#10" PRIx32 "\tr22=%0#10" PRIx32 "\t"
     79            "r23=%0#10" PRIx32 "\n", istate->r21, istate->r22, istate->r23);
    7980       
    80         printf("r24=%#0" PRIx32 "\tr25=%#0" PRIx32 "\tr26=%#0" PRIx32 "\n",
    81             istate->r24, istate->r25, istate->r26);
     81        printf("r24=%0#10" PRIx32 "\tr25=%0#10" PRIx32 "\t"
     82            "r26=%0#10" PRIx32 "\n", istate->r24, istate->r25, istate->r26);
    8283       
    83         printf("r27=%#0" PRIx32 "\tr28=%#0" PRIx32 "\tr29=%#0" PRIx32 "\n",
    84             istate->r27, istate->r28, istate->r29);
     84        printf("r27=%0#10" PRIx32 "\tr28=%0#10" PRIx32 "\t"
     85            "r29=%0#10" PRIx32 "\n", istate->r27, istate->r28, istate->r29);
    8586       
    86         printf("r30=%#0" PRIx32 "\tr31=%#0" PRIx32 "\n",
     87        printf("r30=%0#10" PRIx32 "\tr31=%0#10" PRIx32 "\n",
    8788            istate->r30, istate->r31);
    8889       
    89         printf("cr =%#0" PRIx32 "\tpc =%p\tlr =%p\n",
    90             istate->cr, (void *) istate->pc, (void *) istate->lr);
     90        printf("cr =%0#10" PRIx32 "\tpc =%0#10" PRIx32 "\t"
     91            "lr =%0#10" PRIx32 "\n", istate->cr, istate->pc, istate->lr);
    9192       
    92         printf("ctr=%#0" PRIx32 "\txer=%#0" PRIx32 "\tdar=%#0" PRIx32 "\n",
    93             istate->ctr, istate->xer, istate->dar);
     93        printf("ctr=%0#10" PRIx32 "\txer=%0#10" PRIx32 "\t"
     94            "dar=%0#10" PRIx32 "\n", istate->ctr, istate->xer, istate->dar);
    9495       
    95         printf("srr1=%p\n", (void *) istate->srr1);
     96        printf("srr1=%0#10" PRIx32 "\n", istate->srr1);
    9697}
    9798
    … …  
    153154        exc_register(VECTOR_DECREMENTER, "timer", true,
    154155            exception_decrementer);
     156        exc_register(VECTOR_ITLB_MISS, "itlb_miss", true,
     157            tlb_refill);
     158        exc_register(VECTOR_DTLB_MISS_LOAD, "dtlb_miss_load", true,
     159            tlb_refill);
     160        exc_register(VECTOR_DTLB_MISS_STORE, "dtlb_miss_store", true,
     161            tlb_refill);
    155162}
    156163

  • kernel/arch/ppc32/src/mm/page.c

    r18ba2e4f r544a2e4  
    4343        if (config.cpu_active == 1)
    4444                page_mapping_operations = &pt_mapping_operations;
     45        as_switch(NULL, AS_KERNEL);
    4546}
    4647

  • kernel/arch/ppc32/src/mm/tlb.c

    r18ba2e4f r544a2e4  
    3333 */
    3434
    35 #include <mm/tlb.h>
    3635#include <arch/mm/tlb.h>
    37 #include <arch/interrupt.h>
    3836#include <interrupt.h>
    39 #include <mm/as.h>
    40 #include <mm/page.h>
    41 #include <arch.h>
    42 #include <print.h>
    43 #include <macros.h>
    44 #include <symtab.h>
     37#include <typedefs.h>
    4538
    46 static unsigned int seed = 10;
    47 static unsigned int seed_real
    48     __attribute__ ((section("K_UNMAPPED_DATA_START"))) = 42;
    49 
    50 /** Try to find PTE for faulting address
    51  *
    52  * @param as       Address space.
    53  * @param lock     Lock/unlock the address space.
    54  * @param badvaddr Faulting virtual address.
    55  * @param access   Access mode that caused the fault.
    56  * @param istate   Pointer to interrupted state.
    57  * @param pfrc     Pointer to variable where as_page_fault() return code
    58  *                 will be stored.
    59  *
    60  * @return PTE on success, NULL otherwise.
    61  *
    62  */
    63 static pte_t *find_mapping_and_check(as_t *as, uintptr_t badvaddr, int access,
    64     istate_t *istate, int *pfrc)
     39void tlb_refill(unsigned int n, istate_t *istate)
    6540{
    66         ASSERT(mutex_locked(&as->lock));
    67 
    68         /*
    69          * Check if the mapping exists in page tables.
    70          */
    71         pte_t *pte = page_mapping_find(as, badvaddr);
    72         if ((pte) && (pte->present)) {
    73                 /*
    74                  * Mapping found in page tables.
    75                  * Immediately succeed.
    76                  */
    77                 return pte;
    78         } else {
    79                 /*
    80                  * Mapping not found in page tables.
    81                  * Resort to higher-level page fault handler.
    82                  */
    83                 page_table_unlock(as, true);
    84                
    85                 int rc = as_page_fault(badvaddr, access, istate);
    86                 switch (rc) {
    87                 case AS_PF_OK:
    88                         /*
    89                          * The higher-level page fault handler succeeded,
    90                          * The mapping ought to be in place.
    91                          */
    92                         page_table_lock(as, true);
    93                         pte = page_mapping_find(as, badvaddr);
    94                         ASSERT((pte) && (pte->present));
    95                         *pfrc = 0;
    96                         return pte;
    97                 case AS_PF_DEFER:
    98                         page_table_lock(as, true);
    99                         *pfrc = rc;
    100                         return NULL;
    101                 case AS_PF_FAULT:
    102                         page_table_lock(as, true);
    103                         *pfrc = rc;
    104                         return NULL;
    105                 default:
    106                         panic("Unexpected rc (%d).", rc);
    107                 }
    108         }
    109 }
    110 
    111 static void pht_refill_fail(uintptr_t badvaddr, istate_t *istate)
    112 {
    113         fault_if_from_uspace(istate, "PHT Refill Exception on %p.",
    114             (void *) badvaddr);
    115         panic_memtrap(istate, PF_ACCESS_UNKNOWN, badvaddr,
    116             "PHT Refill Exception.");
    117 }
    118 
    119 static void pht_insert(const uintptr_t vaddr, const pte_t *pte)
    120 {
    121         uint32_t page = (vaddr >> 12) & 0xffff;
    122         uint32_t api = (vaddr >> 22) & 0x3f;
     41        uint32_t tlbmiss;
     42        ptehi_t ptehi;
     43        ptelo_t ptelo;
    12344       
    124         uint32_t vsid = sr_get(vaddr);
    125         uint32_t sdr1 = sdr1_get();
     45        asm volatile (
     46                "mfspr %[tlbmiss], 980\n"
     47                "mfspr %[ptehi], 981\n"
     48                "mfspr %[ptelo], 982\n"
     49                : [tlbmiss] "=r" (tlbmiss),
     50                  [ptehi] "=r" (ptehi),
     51                  [ptelo] "=r" (ptelo)
     52        );
    12653       
    127         // FIXME: compute size of PHT exactly
    128         phte_t *phte = (phte_t *) PA2KA(sdr1 & 0xffff0000);
    129        
    130         /* Primary hash (xor) */
    131         uint32_t h = 0;
    132         uint32_t hash = vsid ^ page;
    133         uint32_t base = (hash & 0x3ff) << 3;
    134         uint32_t i;
    135         bool found = false;
    136        
    137         /* Find colliding PTE in PTEG */
    138         for (i = 0; i < 8; i++) {
    139                 if ((phte[base + i].v)
    140                     && (phte[base + i].vsid == vsid)
    141                     && (phte[base + i].api == api)
    142                     && (phte[base + i].h == 0)) {
    143                         found = true;
    144                         break;
    145                 }
    146         }
    147        
    148         if (!found) {
    149                 /* Find unused PTE in PTEG */
    150                 for (i = 0; i < 8; i++) {
    151                         if (!phte[base + i].v) {
    152                                 found = true;
    153                                 break;
    154                         }
    155                 }
    156         }
    157        
    158         if (!found) {
    159                 /* Secondary hash (not) */
    160                 uint32_t base2 = (~hash & 0x3ff) << 3;
    161                
    162                 /* Find colliding PTE in PTEG */
    163                 for (i = 0; i < 8; i++) {
    164                         if ((phte[base2 + i].v)
    165                             && (phte[base2 + i].vsid == vsid)
    166                             && (phte[base2 + i].api == api)
    167                             && (phte[base2 + i].h == 1)) {
    168                                 found = true;
    169                                 base = base2;
    170                                 h = 1;
    171                                 break;
    172                         }
    173                 }
    174                
    175                 if (!found) {
    176                         /* Find unused PTE in PTEG */
    177                         for (i = 0; i < 8; i++) {
    178                                 if (!phte[base2 + i].v) {
    179                                         found = true;
    180                                         base = base2;
    181                                         h = 1;
    182                                         break;
    183                                 }
    184                         }
    185                 }
    186                
    187                 if (!found)
    188                         i = RANDI(seed) % 8;
    189         }
    190        
    191         phte[base + i].v = 1;
    192         phte[base + i].vsid = vsid;
    193         phte[base + i].h = h;
    194         phte[base + i].api = api;
    195         phte[base + i].rpn = pte->pfn;
    196         phte[base + i].r = 0;
    197         phte[base + i].c = 0;
    198         phte[base + i].wimg = (pte->page_cache_disable ? WIMG_NO_CACHE : 0);
    199         phte[base + i].pp = 2; // FIXME
    200 }
    201 
    202 /** Process Instruction/Data Storage Exception
    203  *
    204  * @param n      Exception vector number.
    205  * @param istate Interrupted register context.
    206  *
    207  */
    208 void pht_refill(unsigned int n, istate_t *istate)
    209 {
    210         as_t *as = (AS == NULL) ? AS_KERNEL : AS;
    211         uintptr_t badvaddr;
    212        
    213         if (n == VECTOR_DATA_STORAGE)
    214                 badvaddr = istate->dar;
    215         else
    216                 badvaddr = istate->pc;
    217        
    218         page_table_lock(as, true);
    219        
    220         int pfrc;
    221         pte_t *pte = find_mapping_and_check(as, badvaddr,
    222             PF_ACCESS_READ /* FIXME */, istate, &pfrc);
    223        
    224         if (!pte) {
    225                 switch (pfrc) {
    226                 case AS_PF_FAULT:
    227                         goto fail;
    228                         break;
    229                 case AS_PF_DEFER:
    230                         /*
    231                          * The page fault came during copy_from_uspace()
    232                          * or copy_to_uspace().
    233                          */
    234                         page_table_unlock(as, true);
    235                         return;
    236                 default:
    237                         panic("Unexpected pfrc (%d).", pfrc);
    238                 }
    239         }
    240        
    241         /* Record access to PTE */
    242         pte->accessed = 1;
    243         pht_insert(badvaddr, pte);
    244        
    245         page_table_unlock(as, true);
    246         return;
    247        
    248 fail:
    249         page_table_unlock(as, true);
    250         pht_refill_fail(badvaddr, istate);
    251 }
    252 
    253 /** Process Instruction/Data Storage Exception in Real Mode
    254  *
    255  * @param n      Exception vector number.
    256  * @param istate Interrupted register context.
    257  *
    258  */
    259 bool pht_refill_real(unsigned int n, istate_t *istate)
    260 {
    261         uintptr_t badvaddr;
    262        
    263         if (n == VECTOR_DATA_STORAGE)
    264                 badvaddr = istate->dar;
    265         else
    266                 badvaddr = istate->pc;
    267        
    268         uint32_t physmem = physmem_top();
    269        
    270         if ((badvaddr < PA2KA(0)) || (badvaddr >= PA2KA(physmem)))
    271                 return false;
    272        
    273         uint32_t page = (badvaddr >> 12) & 0xffff;
    274         uint32_t api = (badvaddr >> 22) & 0x3f;
    275        
    276         uint32_t vsid = sr_get(badvaddr);
    277         uint32_t sdr1 = sdr1_get();
    278        
    279         // FIXME: compute size of PHT exactly
    280         phte_t *phte_real = (phte_t *) (sdr1 & 0xffff0000);
    281        
    282         /* Primary hash (xor) */
    283         uint32_t h = 0;
    284         uint32_t hash = vsid ^ page;
    285         uint32_t base = (hash & 0x3ff) << 3;
    286         uint32_t i;
    287         bool found = false;
    288        
    289         /* Find colliding PTE in PTEG */
    290         for (i = 0; i < 8; i++) {
    291                 if ((phte_real[base + i].v)
    292                     && (phte_real[base + i].vsid == vsid)
    293                     && (phte_real[base + i].api == api)
    294                     && (phte_real[base + i].h == 0)) {
    295                         found = true;
    296                         break;
    297                 }
    298         }
    299        
    300         if (!found) {
    301                 /* Find unused PTE in PTEG */
    302                 for (i = 0; i < 8; i++) {
    303                         if (!phte_real[base + i].v) {
    304                                 found = true;
    305                                 break;
    306                         }
    307                 }
    308         }
    309        
    310         if (!found) {
    311                 /* Secondary hash (not) */
    312                 uint32_t base2 = (~hash & 0x3ff) << 3;
    313                
    314                 /* Find colliding PTE in PTEG */
    315                 for (i = 0; i < 8; i++) {
    316                         if ((phte_real[base2 + i].v)
    317                             && (phte_real[base2 + i].vsid == vsid)
    318                             && (phte_real[base2 + i].api == api)
    319                             && (phte_real[base2 + i].h == 1)) {
    320                                 found = true;
    321                                 base = base2;
    322                                 h = 1;
    323                                 break;
    324                         }
    325                 }
    326                
    327                 if (!found) {
    328                         /* Find unused PTE in PTEG */
    329                         for (i = 0; i < 8; i++) {
    330                                 if (!phte_real[base2 + i].v) {
    331                                         found = true;
    332                                         base = base2;
    333                                         h = 1;
    334                                         break;
    335                                 }
    336                         }
    337                 }
    338                
    339                 if (!found) {
    340                         /* Use secondary hash to avoid collisions
    341                            with usual PHT refill handler. */
    342                         i = RANDI(seed_real) % 8;
    343                         base = base2;
    344                         h = 1;
    345                 }
    346         }
    347        
    348         phte_real[base + i].v = 1;
    349         phte_real[base + i].vsid = vsid;
    350         phte_real[base + i].h = h;
    351         phte_real[base + i].api = api;
    352         phte_real[base + i].rpn = KA2PA(badvaddr) >> 12;
    353         phte_real[base + i].r = 0;
    354         phte_real[base + i].c = 0;
    355         phte_real[base + i].wimg = 0;
    356         phte_real[base + i].pp = 2; // FIXME
    357        
    358         return true;
    359 }
    360 
    361 /** Process ITLB/DTLB Miss Exception in Real Mode
    362  *
    363  *
    364  */
    365 void tlb_refill_real(unsigned int n, uint32_t tlbmiss, ptehi_t ptehi,
    366     ptelo_t ptelo, istate_t *istate)
    367 {
    36854        uint32_t badvaddr = tlbmiss & 0xfffffffc;
    36955        uint32_t physmem = physmem_top();
    … …  
    39581void tlb_invalidate_all(void)
    39682{
    397         uint32_t index;
     83        asm volatile (
     84                "sync\n"
     85        );
     86       
     87        for (unsigned int i = 0; i < 0x00040000; i += 0x00001000) {
     88                asm volatile (
     89                        "tlbie %[i]\n"
     90                        :: [i] "r" (i)
     91                );
     92        }
    39893       
    39994        asm volatile (
    400                 "li %[index], 0\n"
    401                 "sync\n"
    402                
    403                 ".rept 64\n"
    404                 "       tlbie %[index]\n"
    405                 "       addi %[index], %[index], 0x1000\n"
    406                 ".endr\n"
    407                
    40895                "eieio\n"
    40996                "tlbsync\n"
    41097                "sync\n"
    411                 : [index] "=r" (index)
    41298        );
    41399}
    … …  
    415101void tlb_invalidate_asid(asid_t asid)
    416102{
    417         uint32_t sdr1 = sdr1_get();
    418        
    419         // FIXME: compute size of PHT exactly
    420         phte_t *phte = (phte_t *) PA2KA(sdr1 & 0xffff0000);
    421        
    422         size_t i;
    423         for (i = 0; i < 8192; i++) {
    424                 if ((phte[i].v) && (phte[i].vsid >= (asid << 4)) &&
    425                     (phte[i].vsid < ((asid << 4) + 16)))
    426                         phte[i].v = 0;
    427         }
    428        
    429103        tlb_invalidate_all();
    430104}
    … …  
    432106void tlb_invalidate_pages(asid_t asid, uintptr_t page, size_t cnt)
    433107{
    434         // TODO
    435108        tlb_invalidate_all();
    436109}

  • kernel/arch/ppc32/src/ppc32.c

    r18ba2e4f r544a2e4  
    265265{
    266266        userspace_asm((uintptr_t) kernel_uarg->uspace_uarg,
    267             (uintptr_t) kernel_uarg->uspace_stack +
    268             THREAD_STACK_SIZE - SP_DELTA,
     267            (uintptr_t) kernel_uarg->uspace_stack + STACK_SIZE - SP_DELTA,
    269268            (uintptr_t) kernel_uarg->uspace_entry);
    270269       

  • kernel/arch/ppc32/src/proc/scheduler.c

    r18ba2e4f r544a2e4  
    5555        asm volatile (
    5656                "mtsprg0 %[ksp]\n"
    57                 :: [ksp] "r" (KA2PA(&THREAD->kstack[THREAD_STACK_SIZE - SP_DELTA]))
     57                :: [ksp] "r" (KA2PA(&THREAD->kstack[STACK_SIZE - SP_DELTA]))
    5858        );
    5959}

  • kernel/arch/sparc64/Makefile.inc

    r18ba2e4f r544a2e4  
    3131BFD = binary
    3232
    33 GCC_CFLAGS += -m64 -mcpu=ultrasparc -mcmodel=medlow
     33GCC_CFLAGS += -m64 -mcpu=ultrasparc -mcmodel=medlow -mno-fpu
    3434SUNCC_CFLAGS += -m64 -xarch=sparc -xregs=appl,no%float
    3535

  • kernel/arch/sparc64/include/cpu.h

    r18ba2e4f r544a2e4  
    5959#include <arch/asm.h>
    6060
    61 #ifdef CONFIG_SMP
    62 #include <arch/mm/cache.h>
    63 #endif
    64 
    65 
    6661#if defined (SUN4U)
    6762#include <arch/sun4u/cpu.h>

  • kernel/arch/sparc64/include/mm/sun4u/as.h

    r18ba2e4f r544a2e4  
    2727 */
    2828
    29 /** @addtogroup sparc64mm       
     29/** @addtogroup sparc64mm
    3030 * @{
    3131 */
    … …  
    3838#include <arch/mm/tte.h>
    3939
    40 #define KERNEL_ADDRESS_SPACE_SHADOWED_ARCH      1
     40#define KERNEL_ADDRESS_SPACE_SHADOWED_ARCH  1
    4141
    42 #define KERNEL_ADDRESS_SPACE_START_ARCH         (unsigned long) 0x0000000000000000
    43 #define KERNEL_ADDRESS_SPACE_END_ARCH           (unsigned long) 0xffffffffffffffff
    44 #define USER_ADDRESS_SPACE_START_ARCH           (unsigned long) 0x0000000000000000
    45 #define USER_ADDRESS_SPACE_END_ARCH             (unsigned long) 0xffffffffffffffff
    46 
    47 #define USTACK_ADDRESS_ARCH     (0xffffffffffffffffULL - (PAGE_SIZE - 1))
     42#define KERNEL_ADDRESS_SPACE_START_ARCH  UINT64_C(0x0000000000000000)
     43#define KERNEL_ADDRESS_SPACE_END_ARCH    UINT64_C(0xffffffffffffffff)
     44#define USER_ADDRESS_SPACE_START_ARCH    UINT64_C(0x0000000000000000)
     45#define USER_ADDRESS_SPACE_END_ARCH      UINT64_C(0xffffffffffffffff)
    4846
    4947#ifdef CONFIG_TSB

  • kernel/arch/sparc64/include/mm/sun4v/as.h

    r18ba2e4f r544a2e4  
    4040#include <arch/mm/tsb.h>
    4141
    42 #define KERNEL_ADDRESS_SPACE_SHADOWED_ARCH      1
     42#define KERNEL_ADDRESS_SPACE_SHADOWED_ARCH  1
    4343
    44 #define KERNEL_ADDRESS_SPACE_START_ARCH         (unsigned long) 0x0000000000000000
    45 #define KERNEL_ADDRESS_SPACE_END_ARCH           (unsigned long) 0xffffffffffffffff
    46 #define USER_ADDRESS_SPACE_START_ARCH           (unsigned long) 0x0000000000000000
    47 #define USER_ADDRESS_SPACE_END_ARCH             (unsigned long) 0xffffffffffffffff
    48 
    49 #define USTACK_ADDRESS_ARCH     (0xffffffffffffffffULL - (PAGE_SIZE - 1))
     44#define KERNEL_ADDRESS_SPACE_START_ARCH  UINT64_C(0x0000000000000000)
     45#define KERNEL_ADDRESS_SPACE_END_ARCH    UINT64_C(0xffffffffffffffff)
     46#define USER_ADDRESS_SPACE_START_ARCH    UINT64_C(0x0000000000000000)
     47#define USER_ADDRESS_SPACE_END_ARCH      UINT64_C(0xffffffffffffffff)
    5048
    5149#ifdef CONFIG_TSB

  • kernel/arch/sparc64/include/sun4u/cpu.h

    r18ba2e4f r544a2e4  
    6060#include <trace.h>
    6161
    62 #ifdef CONFIG_SMP
    63 #include <arch/mm/cache.h>
    64 #endif
    65 
    6662typedef struct {
    6763        uint32_t mid;              /**< Processor ID as read from

  • kernel/arch/sparc64/include/types.h

    r18ba2e4f r544a2e4  
    3737
    3838typedef uint64_t size_t;
     39typedef int64_t ssize_t;
    3940
    4041typedef uint64_t uintptr_t;

  • kernel/arch/sparc64/src/mm/sun4u/as.c

    r18ba2e4f r544a2e4  
    4747#include <bitops.h>
    4848#include <macros.h>
     49#include <memstr.h>
    4950
    5051#endif /* CONFIG_TSB */

  • kernel/arch/sparc64/src/mm/sun4u/tlb.c

    r18ba2e4f r544a2e4  
    207207
    208208        page_table_lock(AS, true);
    209         t = page_mapping_find(AS, page_16k);
     209        t = page_mapping_find(AS, page_16k, true);
    210210        if (t && PTE_EXECUTABLE(t)) {
    211211                /*
    … …  
    275275
    276276        page_table_lock(AS, true);
    277         t = page_mapping_find(AS, page_16k);
     277        t = page_mapping_find(AS, page_16k, true);
    278278        if (t) {
    279279                /*
    … …  
    319319
    320320        page_table_lock(AS, true);
    321         t = page_mapping_find(AS, page_16k);
     321        t = page_mapping_find(AS, page_16k, true);
    322322        if (t && PTE_WRITABLE(t)) {
    323323                /*

  • kernel/arch/sparc64/src/mm/sun4v/as.c

    r18ba2e4f r544a2e4  
    5050#include <bitops.h>
    5151#include <macros.h>
     52#include <memstr.h>
    5253
    5354#endif /* CONFIG_TSB */

  • kernel/arch/sparc64/src/mm/sun4v/tlb.c

    r18ba2e4f r544a2e4  
    219219
    220220        page_table_lock(AS, true);
    221         t = page_mapping_find(AS, va);
     221        t = page_mapping_find(AS, va, true);
    222222
    223223        if (t && PTE_EXECUTABLE(t)) {
    … …  
    275275
    276276        page_table_lock(AS, true);
    277         t = page_mapping_find(AS, va);
     277        t = page_mapping_find(AS, va, true);
    278278        if (t) {
    279279                /*
    … …  
    317317
    318318        page_table_lock(AS, true);
    319         t = page_mapping_find(AS, va);
     319        t = page_mapping_find(AS, va, true);
    320320        if (t && PTE_WRITABLE(t)) {
    321321                /*
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