Changeset 5265eea4 in mainline for boot/arch/arm32/src/asm.S
- Timestamp:
- 2015-10-28T18:17:27Z (9 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 77a194c, ff381a7
- Parents:
- 0328987 (diff), 5783d10 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
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- 1 edited
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boot/arch/arm32/src/asm.S
r0328987 r5265eea4 75 75 bic r4, r4, #(1 << CP15_C1_DC) 76 76 77 # Disable I-cache and Branch epredictors.77 # Disable I-cache and Branch predictors. 78 78 bic r4, r4, #(1 << CP15_C1_IC) 79 #ifdef PROCESSOR_ARCH_armv6 79 80 bic r4, r4, #(1 << CP15_C1_BP) 81 #endif 80 82 81 83 mcr p15, 0, r4, c1, c0, 0 82 84 #endif 83 84 85 85 86 # Wait for the operations to complete86 # Wait for the operations to complete 87 87 #ifdef PROCESSOR_ARCH_armv7_a 88 88 dsb 89 89 #else 90 # cp15 dsb, r4 is ignored (should be zero)90 # cp15 dsb, r4 is ignored (should be zero) 91 91 mov r4, #0 92 92 mcr p15, 0, r4, c7, c10, 4 … … 98 98 nop 99 99 100 # Wait for the operations to complete100 # Wait for the operations to complete 101 101 #ifdef PROCESSOR_ARCH_armv7_a 102 102 isb 103 103 nop 104 #el se104 #elif defined(PROCESSOR_ARCH_armv6) 105 105 # cp15 isb 106 106 mcr p15, 0, r4, c7, c5, 4
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