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  • kernel/arch/abs32le/include/atomic.h

    r7a0359b r50fda24  
    3636#define KERN_abs32le_ATOMIC_H_
    3737
    38 #include <typedefs.h>
     38#include <arch/types.h>
    3939#include <arch/barrier.h>
    4040#include <preemption.h>
    41 #include <verify.h>
    42 #include <trace.h>
    4341
    44 NO_TRACE ATOMIC static inline void atomic_inc(atomic_t *val)
    45     WRITES(&val->count)
    46     REQUIRES_EXTENT_MUTABLE(val)
    47     REQUIRES(val->count < ATOMIC_COUNT_MAX)
    48 {
     42static inline void atomic_inc(atomic_t *val) {
    4943        /* On real hardware the increment has to be done
    5044           as an atomic action. */
    … …  
    5347}
    5448
    55 NO_TRACE ATOMIC static inline void atomic_dec(atomic_t *val)
    56     WRITES(&val->count)
    57     REQUIRES_EXTENT_MUTABLE(val)
    58     REQUIRES(val->count > ATOMIC_COUNT_MIN)
    59 {
     49static inline void atomic_dec(atomic_t *val) {
    6050        /* On real hardware the decrement has to be done
    6151           as an atomic action. */
    6252       
    63         val->count--;
     53        val->count++;
    6454}
    6555
    66 NO_TRACE ATOMIC static inline atomic_count_t atomic_postinc(atomic_t *val)
    67     WRITES(&val->count)
    68     REQUIRES_EXTENT_MUTABLE(val)
    69     REQUIRES(val->count < ATOMIC_COUNT_MAX)
     56static inline long atomic_postinc(atomic_t *val)
    7057{
    7158        /* On real hardware both the storing of the previous
    … …  
    7360           atomic action. */
    7461       
    75         atomic_count_t prev = val->count;
     62        long prev = val->count;
    7663       
    7764        val->count++;
    … …  
    7966}
    8067
    81 NO_TRACE ATOMIC static inline atomic_count_t atomic_postdec(atomic_t *val)
    82     WRITES(&val->count)
    83     REQUIRES_EXTENT_MUTABLE(val)
    84     REQUIRES(val->count > ATOMIC_COUNT_MIN)
     68static inline long atomic_postdec(atomic_t *val)
    8569{
    8670        /* On real hardware both the storing of the previous
    … …  
    8872           atomic action. */
    8973       
    90         atomic_count_t prev = val->count;
     74        long prev = val->count;
    9175       
    9276        val->count--;
    … …  
    9781#define atomic_predec(val)  (atomic_postdec(val) - 1)
    9882
    99 NO_TRACE ATOMIC static inline atomic_count_t test_and_set(atomic_t *val)
    100     WRITES(&val->count)
    101     REQUIRES_EXTENT_MUTABLE(val)
    102 {
    103         /* On real hardware the retrieving of the original
    104            value and storing 1 have to be done as a single
    105            atomic action. */
     83static inline uint32_t test_and_set(atomic_t *val) {
     84        uint32_t v;
    10685       
    107         atomic_count_t prev = val->count;
    108         val->count = 1;
    109         return prev;
     86        asm volatile (
     87                "movl $1, %[v]\n"
     88                "xchgl %[v], %[count]\n"
     89                : [v] "=r" (v), [count] "+m" (val->count)
     90        );
     91       
     92        return v;
    11093}
    11194
    112 NO_TRACE static inline void atomic_lock_arch(atomic_t *val)
    113     WRITES(&val->count)
    114     REQUIRES_EXTENT_MUTABLE(val)
     95/** ia32 specific fast spinlock */
     96static inline void atomic_lock_arch(atomic_t *val)
    11597{
    116         do {
    117                 while (val->count);
    118         } while (test_and_set(val));
     98        uint32_t tmp;
     99       
     100        preemption_disable();
     101        asm volatile (
     102                "0:\n"
     103                "pause\n"        /* Pentium 4's HT love this instruction */
     104                "mov %[count], %[tmp]\n"
     105                "testl %[tmp], %[tmp]\n"
     106                "jnz 0b\n"       /* lightweight looping on locked spinlock */
     107               
     108                "incl %[tmp]\n"  /* now use the atomic operation */
     109                "xchgl %[count], %[tmp]\n"
     110                "testl %[tmp], %[tmp]\n"
     111                "jnz 0b\n"
     112                : [count] "+m" (val->count), [tmp] "=&r" (tmp)
     113        );
     114        /*
     115         * Prevent critical section code from bleeding out this way up.
     116         */
     117        CS_ENTER_BARRIER();
    119118}
    120119
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