Index: uspace/drv/ehci-hcd/pci.c
===================================================================
--- uspace/drv/ehci-hcd/pci.c	(revision d754f5928ea0c9b368a6f672602fb86f4ab4e4fe)
+++ uspace/drv/ehci-hcd/pci.c	(revision 50340bf5c86773ddf0fa81acd13f156e6d0374cb)
@@ -258,5 +258,5 @@
 	ret = pci_read32(device, eecp + USBLEGSUP_OFFSET, &usblegsup);
 	CHECK_RET_RETURN(ret, "Failed to read USBLEGSUP: %s.\n", str_error(ret));
-	usb_log_debug("USBLEGSUP: %" PRIxn ".\n", usblegsup);
+	usb_log_debug("USBLEGSUP: %" PRIx32 ".\n", usblegsup);
 
 	/* Request control from firmware/BIOS, by writing 1 to highest byte.
@@ -301,5 +301,5 @@
 			CHECK_RET_RETURN(ret,
 			    "Failed to get USBLEGCTLSTS: %s.\n", str_error(ret));
-			usb_log_debug("USBLEGCTLSTS: %" PRIxn ".\n",
+			usb_log_debug("USBLEGCTLSTS: %" PRIx32 ".\n",
 			    usblegctlsts);
 			/* Zero SMI enables in legacy control register.
@@ -315,5 +315,5 @@
 			    "Failed to get USBLEGCTLSTS 2: %s.\n",
 			    str_error(ret));
-			usb_log_debug("Zeroed USBLEGCTLSTS: %" PRIxn ".\n",
+			usb_log_debug("Zeroed USBLEGCTLSTS: %" PRIx32 ".\n",
 			    usblegctlsts);
 		}
@@ -324,5 +324,5 @@
 	ret = pci_read32(device, eecp + USBLEGSUP_OFFSET, &usblegsup);
 	CHECK_RET_RETURN(ret, "Failed to read USBLEGSUP: %s.\n", str_error(ret));
-	usb_log_debug("USBLEGSUP: %" PRIxn ".\n", usblegsup);
+	usb_log_debug("USBLEGSUP: %" PRIx32 ".\n", usblegsup);
 
 	/*