Index: kernel/arch/amd64/src/cpu/cpu.c
===================================================================
--- kernel/arch/amd64/src/cpu/cpu.c	(revision 49e6c6b48a1667db53d7a8cfba97659b95c83ea8)
+++ kernel/arch/amd64/src/cpu/cpu.c	(revision 50122036bedeb4c4ffe03dda0b6696bc78c598e4)
@@ -76,15 +76,6 @@
 void cpu_setup_fpu(void)
 {
-	asm volatile (
-		"movq %%cr0, %%rax\n"
-		"btsq $1, %%rax\n"  /* cr0.mp */
-		"btrq $2, %%rax\n"  /* cr0.em */
-		"movq %%rax, %%cr0\n"
-		
-		"movq %%cr4, %%rax\n"
-		"bts $9, %%rax\n"   /* cr4.osfxsr */
-		"movq %%rax, %%cr4\n"
-		::: "%rax"
-	);
+	write_cr0((read_cr0() & ~CR0_EM) | CR0_MP);
+	write_cr4(read_cr4() | CR4_OSFXSR);
 }
 
@@ -97,20 +88,10 @@
 void fpu_disable(void)
 {
-	asm volatile (
-		"mov %%cr0, %%rax\n"
-		"bts $3, %%rax\n"
-		"mov %%rax, %%cr0\n"
-		::: "%rax"
-	);
+	write_cr0(read_cr0() | CR0_TS);
 }
 
 void fpu_enable(void)
 {
-	asm volatile (
-		"mov %%cr0, %%rax\n"
-		"btr $3, %%rax\n"
-		"mov %%rax, %%cr0\n"
-		::: "%rax"
-	);
+	write_cr0(read_cr0() & ~CR0_TS);
 }