Index: kernel/genarch/include/genarch/drivers/grlib_irqmp/grlib_irqmp.h
===================================================================
--- kernel/genarch/include/genarch/drivers/grlib_irqmp/grlib_irqmp.h	(revision a73ebf016708434a4b64269b2fd926ebc892e96c)
+++ kernel/genarch/include/genarch/drivers/grlib_irqmp/grlib_irqmp.h	(revision 4d2dba7fbc2d5f64befb5898859b0ed4ea88adf4)
@@ -39,4 +39,5 @@
 
 #include <typedefs.h>
+#include <arch.h>
 
 #define GRLIB_IRQMP_MASK_OFFSET		0x40
@@ -70,9 +71,9 @@
 } grlib_irqmp_t;
 
-extern void grlib_irqmp_init(grlib_irqmp_t *, grlib_irqmp_regs_t *);
-extern unsigned grlib_irqmp_inum_get(grlib_irqmp_t *);
-extern void grlib_irqmp_clear(grlib_irqc_t *, int);
-extern void grlib_irqmp_irq_mask(grlib_irqc_t *, int);
-extern void grlib_irqmp_irq_unmask(grlib_irqc_t *, int);
+extern void grlib_irqmp_init(grlib_irqmp_t *, bootinfo_t *);
+extern int grlib_irqmp_inum_get(grlib_irqmp_t *);
+extern void grlib_irqmp_clear(grlib_irqmp_t *, int);
+extern void grlib_irqmp_mask(grlib_irqmp_t *, int);
+extern void grlib_irqmp_unmask(grlib_irqmp_t *, int);
 
 #endif
Index: kernel/genarch/include/genarch/drivers/grlib_uart/grlib_uart.h
===================================================================
--- kernel/genarch/include/genarch/drivers/grlib_uart/grlib_uart.h	(revision a73ebf016708434a4b64269b2fd926ebc892e96c)
+++ kernel/genarch/include/genarch/drivers/grlib_uart/grlib_uart.h	(revision 4d2dba7fbc2d5f64befb5898859b0ed4ea88adf4)
@@ -44,13 +44,4 @@
 #include <typedefs.h>
 
-/** GRLIB UART registers */
-typedef struct {
-	uint32_t data;
-	grlib_uart_status_t status;
-	grlib_uart_control_t control;
-	uint32_t scaler;
-	uint32_t debug;
-} grlib_uart_io_t;
-
 typedef struct {
 	unsigned int rcnt: 6;
@@ -88,5 +79,14 @@
 	unsigned int te: 1;
 	unsigned int re: 1;
-};
+} grlib_uart_control_t;
+
+/** GRLIB UART registers */
+typedef struct {
+	uint32_t data;
+	uint32_t status;
+	uint32_t control;
+	uint32_t scaler;
+	uint32_t debug;
+} grlib_uart_io_t;
 
 typedef struct {
Index: kernel/genarch/src/drivers/grlib_irqmp/grlib_irqmp.c
===================================================================
--- kernel/genarch/src/drivers/grlib_irqmp/grlib_irqmp.c	(revision a73ebf016708434a4b64269b2fd926ebc892e96c)
+++ kernel/genarch/src/drivers/grlib_irqmp/grlib_irqmp.c	(revision 4d2dba7fbc2d5f64befb5898859b0ed4ea88adf4)
@@ -38,24 +38,49 @@
 #include <arch/asm.h>
 
-void grlib_irqmp_init(grlib_irqmp_t *irqc, grlib_irqmp_regs_t *regs)
+#include <mm/km.h>
+
+void grlib_irqmp_init(grlib_irqmp_t *irqc, bootinfo_t *bootinfo)
 {
-	irqc->regs = regs;
+	irqc->regs = (void *) km_map(bootinfo->intc_base, PAGE_SIZE,
+	    PAGE_NOT_CACHEABLE);
+
+	/* Mask all interrupts */
+	pio_write_32((void *)&irqc->regs + GRLIB_IRQMP_MASK_OFFSET, 0);
 }
 
-unsigned grlib_irqmp_inum_get(grlib_irqmp_t *irqc)
+int grlib_irqmp_inum_get(grlib_irqmp_t *irqc)
 {
-	return 0;
+	int i;
+	uint32_t pending = pio_read_32(&irqc->regs->pending);
+
+	for (i = 1; i < 16; i++) {
+		if (pending & (1 << i))
+			return i;
+	}
+
+	return -1;
 }
 
-void grlib_irqmp_clear(grlib_irqmp_t *irqc, unsigned inum)
+void grlib_irqmp_clear(grlib_irqmp_t *irqc, int inum)
 {
+	pio_write_32(&irqc->regs->clear, (1 << inum));
 }
 
-void grlib_irqmp_src_enable(grlib_irqmp_t *irqc, unsigned src)
+void grlib_irqmp_mask(grlib_irqmp_t *irqc, int src)
 {
+	uint32_t mask = pio_read_32((void *)&irqc->regs + GRLIB_IRQMP_MASK_OFFSET);
+
+	mask &= ~(1 << src);
+
+	pio_write_32((void *)&irqc->regs + GRLIB_IRQMP_MASK_OFFSET, mask);
 }
 
-void grlib_irqmp_src_disable(grlib_irqmp_t *irqc, unsigned src)
+void grlib_irqmp_unmask(grlib_irqmp_t *irqc, int src)
 {
+	uint32_t mask = pio_read_32((void *)&irqc->regs + GRLIB_IRQMP_MASK_OFFSET);
+
+	mask |= (1 << src);
+
+	pio_write_32((void *)&irqc->regs + GRLIB_IRQMP_MASK_OFFSET, mask);
 }
 
Index: kernel/genarch/src/drivers/grlib_uart/grlib_uart.c
===================================================================
--- kernel/genarch/src/drivers/grlib_uart/grlib_uart.c	(revision a73ebf016708434a4b64269b2fd926ebc892e96c)
+++ kernel/genarch/src/drivers/grlib_uart/grlib_uart.c	(revision 4d2dba7fbc2d5f64befb5898859b0ed4ea88adf4)
@@ -50,4 +50,5 @@
 static void grlib_uart_sendb(outdev_t *dev, uint8_t byte)
 {
+	uint32_t reg;
 	grlib_uart_status_t *status;
 	grlib_uart_t *uart =
@@ -56,5 +57,6 @@
 	/* Wait for space becoming available in Tx FIFO. */
 	do {
-		status = pio_read_32(&uart->io->status);
+		reg = pio_read_32(&uart->io->status);
+		status = (grlib_uart_status_t *)&reg;
 	} while (status->tf != 0);
 
@@ -85,12 +87,15 @@
 static void grlib_uart_irq_handler(irq_t *irq)
 {
+	uint32_t reg;
 	grlib_uart_t *uart = irq->instance;
-	grlib_status_t status;
+	grlib_uart_status_t *status;
 
-	status = (grlib_status_t)pio_read_32(&uart->io->status);
+	reg = pio_read_32(&uart->io->status);
+	status = (grlib_uart_status_t *)&reg;
 
 	while (status->dr != 0) {
 		uint32_t data = pio_read_32(&uart->io->data);
-		status = (grlib_status_t)pio_read_32(&uart->io->status);
+		reg = pio_read_32(&uart->io->status);
+		status = (grlib_uart_status_t *)&reg;
 		indev_push_character(uart->indev, data & 0xff);
 	}
@@ -131,9 +136,10 @@
 
 	/* Enable FIFO, Tx trigger level: empty, Rx trigger level: 1 byte. */
-	grlib_control_t control = 
+	grlib_uart_control_t control = 
 		{ .fa = 1, .rf = 1, .tf = 1, .ri = 1, 
 		  .te = 1, .re = 1};
 
-	pio_write_32(&uart->io->control, control);
+	uint32_t *reg = (uint32_t *)&control;
+	pio_write_32(&uart->io->control, *reg);
 
 	link_initialize(&uart->parea.link);