Index: kernel/arch/amd64/src/pm.c
===================================================================
--- kernel/arch/amd64/src/pm.c	(revision 4cc2dddec0731c6f01a0f290b358ad6fbd7e81f4)
+++ kernel/arch/amd64/src/pm.c	(revision 4bb31f7fb268426f499400dc8b2d9f6c6d3aaf65)
@@ -1,4 +1,4 @@
 /*
- * Copyright (c) 2001-2004 Jakub Jermar
+ * Copyright (c) 2008 Jakub Jermar
  * Copyright (c) 2005-2006 Ondrej Palkovsky
  * All rights reserved.
@@ -55,5 +55,5 @@
 	  .base_0_15   = 0, 
 	  .base_16_23  = 0, 
-	  .access      = AR_PRESENT | AR_CODE | DPL_KERNEL | AR_READABLE , 
+	  .access      = AR_PRESENT | AR_CODE | DPL_KERNEL | AR_READABLE, 
 	  .limit_16_19 = 0xf, 
 	  .available   = 0, 
@@ -112,5 +112,7 @@
 	/* VESA Init descriptor */
 #ifdef CONFIG_FB	
-	{ 0xffff, 0, VESA_INIT_SEGMENT>>12, AR_PRESENT | AR_CODE | DPL_KERNEL, 0xf, 0, 0, 0, 0, 0 }
+	{ 0xffff, 0, VESA_INIT_SEGMENT >> 12, AR_PRESENT | AR_CODE | DPL_KERNEL,
+	  0xf, 0, 0, 0, 0, 0
+	}
 #endif
 };
@@ -118,6 +120,6 @@
 idescriptor_t idt[IDT_ITEMS];
 
-ptr_16_64_t gdtr = {.limit = sizeof(gdt), .base= (uint64_t) gdt };
-ptr_16_64_t idtr = {.limit = sizeof(idt), .base= (uint64_t) idt };
+ptr_16_64_t gdtr = {.limit = sizeof(gdt), .base = (uint64_t) gdt };
+ptr_16_64_t idtr = {.limit = sizeof(idt), .base = (uint64_t) idt };
 
 static tss_t tss;
@@ -174,5 +176,6 @@
 		d->type = AR_INTERRUPT;	/* masking interrupt */
 
-		idt_setoffset(d, ((uintptr_t) interrupt_handlers) + i*interrupt_handler_size);
+		idt_setoffset(d, ((uintptr_t) interrupt_handlers) +
+		    i * interrupt_handler_size);
 	}
 }