Index: kernel/arch/ia64/include/arch/istate_struct.h
===================================================================
--- kernel/arch/ia64/include/arch/istate_struct.h	(revision e3306d0477902705968eca74bbf2f4b766535c78)
+++ kernel/arch/ia64/include/arch/istate_struct.h	(revision 4b54bd956b3a55ffeefc87990668ef0a39c2c4a2)
@@ -72,13 +72,14 @@
 #define ISTATE_OFFSET_CR_IPSR           0x230
 #define ISTATE_OFFSET_CR_IIP            0x238
-#define ISTATE_OFFSET_PR                0x240
-#define ISTATE_OFFSET_SP                0x248
-#define ISTATE_OFFSET_IN0               0x250
-#define ISTATE_OFFSET_IN1               0x258
-#define ISTATE_OFFSET_IN2               0x260
-#define ISTATE_OFFSET_IN3               0x268
-#define ISTATE_OFFSET_IN4               0x270
-#define ISTATE_OFFSET_IN5               0x278
-#define ISTATE_OFFSET_IN6               0x280
+#define ISTATE_OFFSET_CR_IIM            0x240
+#define ISTATE_OFFSET_PR                0x248
+#define ISTATE_OFFSET_SP                0x250
+#define ISTATE_OFFSET_IN0               0x258
+#define ISTATE_OFFSET_IN1               0x260
+#define ISTATE_OFFSET_IN2               0x268
+#define ISTATE_OFFSET_IN3               0x270
+#define ISTATE_OFFSET_IN4               0x278
+#define ISTATE_OFFSET_IN5               0x280
+#define ISTATE_OFFSET_IN6               0x288
 #define ISTATE_SIZE                     0x290
 
@@ -138,4 +139,5 @@
 	psr_t cr_ipsr;
 	uintptr_t cr_iip;
+	uint64_t cr_iim;
 	uint64_t pr;
 	uintptr_t sp;
Index: kernel/arch/ia64/src/interrupt.c
===================================================================
--- kernel/arch/ia64/src/interrupt.c	(revision e3306d0477902705968eca74bbf2f4b766535c78)
+++ kernel/arch/ia64/src/interrupt.c	(revision 4b54bd956b3a55ffeefc87990668ef0a39c2c4a2)
@@ -195,8 +195,18 @@
 }
 
+
+#define BREAK_IMM_SYSCALL	0x40000U
+
 /** Handle syscall. */
 sysarg_t break_instruction(unsigned int n, istate_t *istate)
 {
 	sysarg_t ret;
+
+	if (istate->cr_iim != BREAK_IMM_SYSCALL) {
+		fault_if_from_uspace(istate, "Unknown software interrupt: %x",
+		    (uint32_t) istate->cr_iim);
+		panic_badtrap(istate, n, "Interruption: %#hx (%s).",
+		    (uint16_t) n, vector_to_string(n));
+	}
 
 	/*
Index: kernel/arch/ia64/src/ivt.S
===================================================================
--- kernel/arch/ia64/src/ivt.S	(revision e3306d0477902705968eca74bbf2f4b766535c78)
+++ kernel/arch/ia64/src/ivt.S	(revision 4b54bd956b3a55ffeefc87990668ef0a39c2c4a2)
@@ -186,4 +186,7 @@
 	st8 [r31] = r29, -STACK_ITEM_SIZE ;;	/* save predicate registers */
 
+	mov r29 = cr.iim ;;
+	st8 [r31] = r29, -STACK_ITEM_SIZE ;;	/* save cr.iim */
+
 	st8 [r31] = r24, -STACK_ITEM_SIZE ;;	/* save cr.iip */
 	st8 [r31] = r25, -STACK_ITEM_SIZE ;;	/* save cr.ipsr */
@@ -274,4 +277,5 @@
 	ld8 r25 = [r31], +STACK_ITEM_SIZE ;;	/* load cr.ipsr */
 	ld8 r24 = [r31], +STACK_ITEM_SIZE ;;	/* load cr.iip */
+	ld8 r29 = [r31], +STACK_ITEM_SIZE ;;	/* load cr.iim */
 
 	mov cr.iip = r24;;
@@ -279,4 +283,5 @@
 	mov cr.isr = r27
 	mov cr.ifa = r28
+	mov cr.iim = r29
 
 	/* Set up FPU as in exception. */