Index: uspace/lib/c/arch/ia32/src/fibril.S
===================================================================
--- uspace/lib/c/arch/ia32/src/fibril.S	(revision c1b979a5a2332e971f29013cd230bf1a1c6f35d4)
+++ uspace/lib/c/arch/ia32/src/fibril.S	(revision 4b334fd67169af5de794ce1053c6124e2ea71cd4)
@@ -27,5 +27,5 @@
 #
 
-#include <libarch/context_offset.h>
+#include <libarch/fibril_context.h>
 
 .text
@@ -44,11 +44,16 @@
 	
 	# save registers to the context structure
-	CONTEXT_SAVE_ARCH_CORE %edx %eax
+	movl %esp, CONTEXT_OFFSET_SP(%edx)	# %esp -> ctx->sp
+	movl %eax, CONTEXT_OFFSET_PC(%edx)	# %eip -> ctx->pc
+	movl %ebx, CONTEXT_OFFSET_EBX(%edx)	# %ebx -> ctx->ebx
+	movl %esi, CONTEXT_OFFSET_ESI(%edx)	# %esi -> ctx->esi
+	movl %edi, CONTEXT_OFFSET_EDI(%edx)	# %edi -> ctx->edi
+	movl %ebp, CONTEXT_OFFSET_EBP(%edx)	# %ebp -> ctx->ebp
 	
 	# save TLS
 	movl %gs:0, %eax
-	movl %eax, OFFSET_TLS(%edx)     # tls -> ctx->tls
+	movl %eax, CONTEXT_OFFSET_TLS(%edx)	# tls -> ctx->tls
 	
-	xorl %eax, %eax     # context_save returns 1
+	xorl %eax, %eax		# context_save returns 1
 	incl %eax
 	ret
@@ -63,5 +68,10 @@
 	
 	# restore registers from the context structure
-	CONTEXT_RESTORE_ARCH_CORE %eax %edx
+	movl CONTEXT_OFFSET_SP(%eax),%esp	# ctx->sp -> %esp
+	movl CONTEXT_OFFSET_PC(%eax),%edx	# ctx->pc -> \pc
+	movl CONTEXT_OFFSET_EBX(%eax),%ebx	# ctx->ebx -> %ebx
+	movl CONTEXT_OFFSET_ESI(%eax),%esi	# ctx->esi -> %esi
+	movl CONTEXT_OFFSET_EDI(%eax),%edi	# ctx->edi -> %edi
+	movl CONTEXT_OFFSET_EBP(%eax),%ebp	# ctx->ebp -> %ebp
 	
 	movl %edx, 0(%esp)  # ctx->pc -> saver's return %eip
@@ -69,9 +79,10 @@
 	# set thread local storage
 	pushl %edx
-	movl OFFSET_TLS(%eax), %edx  # Set arg1 to TLS addr
-	movl $1, %eax                # Syscall SYS_TLS_SET
+	movl CONTEXT_OFFSET_TLS(%eax), %edx	# Set arg1 to TLS addr
+	movl $1, %eax				# Syscall SYS_TLS_SET
 	int $0x30
 	popl %edx
 	
-	xorl %eax, %eax     # context_restore returns 0
+	xorl %eax, %eax		# context_restore returns 0
 	ret
+