Changeset 4a537dd in mainline

Timestamp:

2009-10-22T15:12:57Z (15 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

8e000b8d

Parents:

c696ad1a

Message:

Initialize the SYSENTER MSR's only if the kernel detects the CPU supports it.

Location:

kernel/arch/ia32

Files:

• include/cpu.h (modified) (2 diffs)
• src/cpu/cpu.c (modified) (3 diffs)
• src/proc/scheduler.c (modified) (1 diff)

kernel/arch/ia32/include/cpu.h

@@ -50 +50 @@
 #include <arch/pm.h>
 #include <arch/asm.h>
+#include <arch/cpuid.h>
 
 typedef struct {
@@ -56 +57 @@
         unsigned int model;
         unsigned int stepping;
+        cpuid_feature_info fi;
+
         tss_t *tss;
         

kernel/arch/ia32/src/cpu/cpu.c

@@ -92 +92 @@
 void cpu_arch_init(void)
 {
-        cpuid_feature_info fi;
         cpuid_extended_feature_info efi;
         cpu_info_t info;
@@ -104 +103 @@
         cpuid(INTEL_CPUID_STANDARD, &info);
         
-        fi.word = info.cpuid_edx;
+        CPU->arch.fi.word = info.cpuid_edx;
         efi.word = info.cpuid_ecx;
         
-        if (fi.bits.fxsr)
+        if (CPU->arch.fi.bits.fxsr)
                 fpu_fxsr();
         else
                 fpu_fsr();
         
-        if (fi.bits.sse) {
+        if (CPU->arch.fi.bits.sse) {
                 asm volatile (
                         "mov %%cr4, %[help]\n"
@@ -122 +121 @@
         }
         
-        /* Setup fast SYSENTER/SYSEXIT syscalls */
-        syscall_setup_cpu();
+        if (CPU->arch.fi.bits.sep) {
+                /* Setup fast SYSENTER/SYSEXIT syscalls */
+                syscall_setup_cpu();
+        }
 }
 

kernel/arch/ia32/src/proc/scheduler.c

@@ -61 +61 @@
             SP_DELTA];
         
-        /* Set kernel stack for CP3 -> CPL0 switch via SYSENTER */
-        write_msr(IA32_MSR_SYSENTER_ESP, kstk);
+        if (CPU->arch.fi.bits.sep) {
+                /* Set kernel stack for CP3 -> CPL0 switch via SYSENTER */
+                write_msr(IA32_MSR_SYSENTER_ESP, kstk);
+        }
         
         /* Set kernel stack for CPL3 -> CPL0 switch via interrupt */