Changeset 4a46ccc in mainline


Ignore:
Timestamp:
2013-01-01T11:46:23Z (12 years ago)
Author:
Jan Vesely <jano.vesely@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
1a3a632
Parents:
029e3cc
Message:

arm32,boot: Remove nested ifdef

File:
1 edited

Legend:

Unmodified
Added
Removed
  • boot/arch/arm32/src/mm.c

    r029e3cc r4a46ccc  
    152152                 * see arch/arm32/src/cpu/cpu.c for reasoning */
    153153                "ldr r1, =0x00000805\n"
    154 #else
    155 #ifdef MACHINE_gta02
     154#elif defined(MACHINE_gta02)
    156155                /* Mask to enable paging (bit 0),
    157156                   D-cache (bit 2), I-cache (bit 12) */
     
    160159                /* Mask to enable paging and branch prediction */
    161160                "ldr r1, =0x00000801\n"
    162 #endif
    163161#endif
    164162                "orr r0, r0, r1\n"
Note: See TracChangeset for help on using the changeset viewer.