Changeset 4702bde in mainline
- Timestamp:
- 2009-12-02T18:53:26Z (15 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- e15e0e8
- Parents:
- 12bef5b
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/arm32/include/atomic.h
r12bef5b r4702bde 37 37 #define KERN_arm32_ATOMIC_H_ 38 38 39 #include <arch/asm.h> 40 39 41 /** Atomic addition. 40 42 * … … 47 49 static inline long atomic_add(atomic_t *val, int i) 48 50 { 49 int ret; 50 volatile long *mem = &(val->count); 51 52 asm volatile ( 53 "1:\n" 54 "ldr r2, [%[mem]]\n" 55 "add r3, r2, %[i]\n" 56 "str r3, %[ret]\n" 57 "swp r3, r3, [%[mem]]\n" 58 "cmp r3, r2\n" 59 "bne 1b\n" 60 : [ret] "=m" (ret) 61 : [mem] "r" (mem), [i] "r" (i) 62 : "r3", "r2" 63 ); 51 long ret; 52 53 /* 54 * This implementation is for UP pre-ARMv6 systems where we do not have 55 * the LDREX and STREX instructions. 56 */ 57 ipl_t ipl = interrupts_disable(); 58 val->count += i; 59 ret = val->count; 60 interrupts_restore(ipl); 64 61 65 62 return ret;
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