Changeset 4687a26c in mainline for kernel/arch/mips32


Ignore:
Timestamp:
2010-11-02T18:29:01Z (15 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/fix-logger-deadlock, topic/msim-upgrade, topic/simplify-dev-export
Children:
4f35b9ff
Parents:
76e1121f (diff), 28f4adb (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.
Message:

Merge mainline changes.

Location:
kernel/arch/mips32
Files:
1 added
4 edited
1 moved

Legend:

Unmodified
Added
Removed
  • kernel/arch/mips32/include/cp0.h

    r76e1121f r4687a26c  
    3636#define KERN_mips32_CP0_H_
    3737
     38#ifdef KERNEL
    3839#include <typedefs.h>
     40#else
     41#include <sys/types.h>
     42#endif
    3943
    4044#define cp0_status_ie_enabled_bit     (1 << 0)
  • kernel/arch/mips32/include/exception.h

    r76e1121f r4687a26c  
    3737
    3838#include <typedefs.h>
    39 #include <arch/cp0.h>
    40 #include <trace.h>
     39#include <arch/istate.h>
    4140
    4241#define EXC_Int    0
     
    5958#define EXC_VCED   31
    6059
    61 typedef struct istate {
    62         /*
    63          * The first seven registers are arranged so that the istate structure
    64          * can be used both for exception handlers and for the syscall handler.
    65          */
    66         uint32_t a0;    /* arg1 */
    67         uint32_t a1;    /* arg2 */
    68         uint32_t a2;    /* arg3 */
    69         uint32_t a3;    /* arg4 */
    70         uint32_t t0;    /* arg5 */
    71         uint32_t t1;    /* arg6 */
    72         uint32_t v0;    /* arg7 */
    73         uint32_t v1;
    74         uint32_t at;
    75         uint32_t t2;
    76         uint32_t t3;
    77         uint32_t t4;
    78         uint32_t t5;
    79         uint32_t t6;
    80         uint32_t t7;
    81         uint32_t s0;
    82         uint32_t s1;
    83         uint32_t s2;
    84         uint32_t s3;
    85         uint32_t s4;
    86         uint32_t s5;
    87         uint32_t s6;
    88         uint32_t s7;
    89         uint32_t t8;
    90         uint32_t t9;
    91         uint32_t kt0;
    92         uint32_t kt1;   /* We use it as thread-local pointer */
    93         uint32_t gp;
    94         uint32_t sp;
    95         uint32_t s8;
    96         uint32_t ra;
    97        
    98         uint32_t lo;
    99         uint32_t hi;
    100        
    101         uint32_t status;        /* cp0_status */
    102         uint32_t epc;           /* cp0_epc */
    103 
    104         uint32_t alignment;     /* to make sizeof(istate_t) a multiple of 8 */
    105 } istate_t;
    106 
    107 NO_TRACE static inline void istate_set_retaddr(istate_t *istate,
    108     uintptr_t retaddr)
    109 {
    110         istate->epc = retaddr;
    111 }
    112 
    113 /** Return true if exception happened while in userspace */
    114 NO_TRACE static inline int istate_from_uspace(istate_t *istate)
    115 {
    116         return istate->status & cp0_status_um_bit;
    117 }
    118 
    119 NO_TRACE static inline unative_t istate_get_pc(istate_t *istate)
    120 {
    121         return istate->epc;
    122 }
    123 
    124 NO_TRACE static inline unative_t istate_get_fp(istate_t *istate)
    125 {
    126         return istate->sp;
    127 }
    128 
    12960extern void exception(istate_t *istate);
    13061extern void tlb_refill_entry(void);
  • kernel/arch/mips32/include/smp/dorder.h

    r76e1121f r4687a26c  
    11/*
    2  * Copyright (c) 2010 Martin Decky
     2 * Copyright (c) 2007 Martin Decky
    33 * All rights reserved.
    44 *
     
    2727 */
    2828
    29 /** @addtogroup netif_standalone
    30  *  @{
     29/** @addtogroup mips32
     30 * @{
     31 */
     32/** @file
    3133 */
    3234
    33 #ifndef __NETIF_NIL_BUNDLE_H__
    34 #define __NETIF_NIL_BUNDLE_H__
     35#ifndef KERN_mips32_DORDER_H_
     36#define KERN_mips32_DORDER_H_
    3537
    36 #include <ipc/ipc.h>
    37 #include <async.h>
     38#include <typedefs.h>
    3839
    39 extern int netif_nil_module_message(const char *, ipc_callid_t, ipc_call_t *,
    40     ipc_call_t *, int *);
    41 extern int netif_nil_module_start(async_client_conn_t);
     40extern uint32_t dorder_cpuid(void);
     41extern void dorder_ipi_ack(uint32_t);
    4242
    4343#endif
  • kernel/arch/mips32/src/interrupt.c

    r76e1121f r4687a26c  
    3838#include <arch.h>
    3939#include <arch/cp0.h>
     40#include <arch/smp/dorder.h>
    4041#include <time/clock.h>
    4142#include <ipc/sysipc.h>
     
    4849function virtual_timer_fnc = NULL;
    4950static irq_t timer_irq;
     51static irq_t dorder_irq;
    5052
    5153// TODO: This is SMP unsafe!!!
     
    149151}
    150152
     153static irq_ownership_t dorder_claim(irq_t *irq)
     154{
     155        return IRQ_ACCEPT;
     156}
     157
     158static void dorder_irq_handler(irq_t *irq)
     159{
     160        dorder_ipi_ack(1 << dorder_cpuid());
     161}
     162
    151163/* Initialize basic tables for exception dispatching */
    152164void interrupt_init(void)
     
    163175        timer_start();
    164176        cp0_unmask_int(TIMER_IRQ);
     177       
     178        irq_initialize(&dorder_irq);
     179        dorder_irq.devno = device_assign_devno();
     180        dorder_irq.inr = DORDER_IRQ;
     181        dorder_irq.claim = dorder_claim;
     182        dorder_irq.handler = dorder_irq_handler;
     183        irq_register(&dorder_irq);
     184       
     185        cp0_unmask_int(DORDER_IRQ);
    165186}
    166187
  • kernel/arch/mips32/src/smp/dorder.c

    r76e1121f r4687a26c  
    3333 */
    3434
     35#include <typedefs.h>
    3536#include <smp/ipi.h>
     37#include <arch/smp/dorder.h>
     38
     39#define MSIM_DORDER_ADDRESS  0xB0000004
    3640
    3741#ifdef CONFIG_SMP
    3842
    39 #define MSIM_DORDER_ADDRESS  0xB0000004
    40 
    4143void ipi_broadcast_arch(int ipi)
    4244{
    43         *((volatile unsigned int *) MSIM_DORDER_ADDRESS) = 0x7FFFFFFF;
     45        *((volatile uint32_t *) MSIM_DORDER_ADDRESS) = 0x7fffffff;
    4446}
    4547
    4648#endif
    4749
     50uint32_t dorder_cpuid(void)
     51{
     52        return *((volatile uint32_t *) MSIM_DORDER_ADDRESS);
     53}
     54
     55void dorder_ipi_ack(uint32_t mask)
     56{
     57        *((volatile uint32_t *) (MSIM_DORDER_ADDRESS + 4)) = mask;
     58}
     59
    4860/** @}
    4961 */
Note: See TracChangeset for help on using the changeset viewer.