Index: kernel/arch/arm32/src/arm32.c
===================================================================
--- kernel/arch/arm32/src/arm32.c	(revision 4621d2311994bf63dea425ed923239d4ca1babc9)
+++ kernel/arch/arm32/src/arm32.c	(revision 460ea7ed2af9977b884414b68b2f7b94fa472cfd)
@@ -64,5 +64,4 @@
 arch_ops_t *arch_ops = &arm32_ops;
 
-
 /** Performs arm32-specific initialization before main_bsp() is called. */
 void arm32_pre_main(void *entry __attribute__((unused)), bootinfo_t *bootinfo)
@@ -118,10 +117,8 @@
 }
 
-
 /** Performs arm32 specific tasks needed before the new task is run. */
 void before_task_runs_arch(void)
 {
 }
-
 
 /** Performs arm32 specific tasks needed before the new thread is scheduled.
Index: kernel/arch/arm32/src/cpu/cpu.c
===================================================================
--- kernel/arch/arm32/src/cpu/cpu.c	(revision 4621d2311994bf63dea425ed923239d4ca1babc9)
+++ kernel/arch/arm32/src/cpu/cpu.c	(revision 460ea7ed2af9977b884414b68b2f7b94fa472cfd)
@@ -60,5 +60,4 @@
 static unsigned dcache_linesize_log(unsigned level);
 
-
 /** Implementers (vendor) names */
 static const char *implementer(unsigned id)
@@ -99,5 +98,4 @@
 		return arch_data[0];
 }
-
 
 /** Retrieves processor identification from CP15 register 0.
@@ -317,5 +315,4 @@
 }
 
-
 void cpu_dcache_flush(void)
 {
Index: kernel/arch/arm32/src/fpu_context.c
===================================================================
--- kernel/arch/arm32/src/fpu_context.c	(revision 4621d2311994bf63dea425ed923239d4ca1babc9)
+++ kernel/arch/arm32/src/fpu_context.c	(revision 460ea7ed2af9977b884414b68b2f7b94fa472cfd)
@@ -47,5 +47,4 @@
 #define FPSID_VARIANT(r)   (((r) >> 4) 0xf)
 #define FPSID_REVISION(r)   (((r) >> 0) 0xf)
-
 
 enum {
@@ -167,5 +166,4 @@
 }
 
-
 void fpu_init(void)
 {
Index: kernel/arch/arm32/src/mach/beaglebone/beaglebone.c
===================================================================
--- kernel/arch/arm32/src/mach/beaglebone/beaglebone.c	(revision 4621d2311994bf63dea425ed923239d4ca1babc9)
+++ kernel/arch/arm32/src/mach/beaglebone/beaglebone.c	(revision 460ea7ed2af9977b884414b68b2f7b94fa472cfd)
@@ -234,3 +234,2 @@
  * @}
  */
-
Index: kernel/arch/arm32/src/mach/integratorcp/integratorcp.c
===================================================================
--- kernel/arch/arm32/src/mach/integratorcp/integratorcp.c	(revision 4621d2311994bf63dea425ed923239d4ca1babc9)
+++ kernel/arch/arm32/src/mach/integratorcp/integratorcp.c	(revision 460ea7ed2af9977b884414b68b2f7b94fa472cfd)
@@ -54,5 +54,4 @@
 #include <log.h>
 
-
 #define SDRAM_SIZE \
 	sdram[(*(uint32_t *) (ICP_CMCR + ICP_SDRAMCR_OFFSET) & ICP_SDRAM_MASK) >> 2]
@@ -121,5 +120,4 @@
 	*((uint32_t *) icp.hw_map.irqc_mask) = (1 << irq);
 }
-
 
 /** Unmasks interrupt.
Index: kernel/arch/arm32/src/machine_func.c
===================================================================
--- kernel/arch/arm32/src/machine_func.c	(revision 4621d2311994bf63dea425ed923239d4ca1babc9)
+++ kernel/arch/arm32/src/machine_func.c	(revision 460ea7ed2af9977b884414b68b2f7b94fa472cfd)
@@ -72,5 +72,4 @@
 }
 
-
 /** Starts timer. */
 void machine_timer_irq_start(void)
@@ -78,5 +77,4 @@
 	(machine_ops->machine_timer_irq_start)();
 }
-
 
 /** Halts CPU. */
@@ -105,5 +103,4 @@
 	(machine_ops->machine_irq_exception)(exc_no, istate);
 }
-
 
 /*
Index: kernel/arch/arm32/src/mm/page_fault.c
===================================================================
--- kernel/arch/arm32/src/mm/page_fault.c	(revision 4621d2311994bf63dea425ed923239d4ca1babc9)
+++ kernel/arch/arm32/src/mm/page_fault.c	(revision 460ea7ed2af9977b884414b68b2f7b94fa472cfd)
@@ -42,5 +42,4 @@
 #include <interrupt.h>
 #include <print.h>
-
 
 /**
Index: kernel/arch/arm32/src/smc.c
===================================================================
--- kernel/arch/arm32/src/smc.c	(revision 4621d2311994bf63dea425ed923239d4ca1babc9)
+++ kernel/arch/arm32/src/smc.c	(revision 460ea7ed2af9977b884414b68b2f7b94fa472cfd)
@@ -67,3 +67,2 @@
 	isb();
 }
-