Index: doc/arch/amd64
===================================================================
--- doc/arch/amd64	(revision 8ccec3c161d21bb34fa69cec1fd8d025f1a5e72e)
+++ doc/arch/amd64	(revision 45ba9cff91f85735ed40588cd0454ae9c2fa673c)
@@ -23,4 +23,4 @@
 
 EMULATORS AND VIRTUALIZERS
-        o Bochs 2.2.1
+        o Bochs 2.2.5
         o Simics 2.2.19
Index: doc/arch/ia32
===================================================================
--- doc/arch/ia32	(revision 8ccec3c161d21bb34fa69cec1fd8d025f1a5e72e)
+++ doc/arch/ia32	(revision 45ba9cff91f85735ed40588cd0454ae9c2fa673c)
@@ -17,5 +17,5 @@
 
 SMP COMPATIBILITY
-        o Bochs 2.0.2 - Bochs 2.2.1
+        o Bochs 2.0.2 - Bochs 2.2.5
                 o 2x-8x 686 CPU
         o Simics 2.0.28 - Simics 2.2.19
@@ -31,5 +31,5 @@
 
 EMULATORS AND VIRTUALIZERS
-        o Bochs 2.0.2 - Bochs 2.2.1
+        o Bochs 2.0.2 - Bochs 2.2.5
         o VMware Workstation 4, VMware Workstation 5, VMware Workstation 5.5
         o Simics 2.2.19
Index: generic/include/cpu.h
===================================================================
--- generic/include/cpu.h	(revision 8ccec3c161d21bb34fa69cec1fd8d025f1a5e72e)
+++ generic/include/cpu.h	(revision 45ba9cff91f85735ed40588cd0454ae9c2fa673c)
@@ -42,6 +42,11 @@
 #define CPU_STACK_SIZE	STACK_SIZE
 
+/** CPU structure.
+ *
+ * There is one structure like this for every processor.
+ */
 struct cpu {
 	SPINLOCK_DECLARE(lock);
+
 	context_t saved_context;
 
@@ -58,5 +63,9 @@
 	#endif /* CONFIG_SMP */
 
+	/**
+	 * Processor ID assigned by kernel.
+	 */
 	int id;
+	
 	int active;
 	int tlb_active;
@@ -69,4 +78,7 @@
 	thread_t *fpu_owner;
 	
+	/**
+	 * Stack used by scheduler when there is no running thread.
+	 */
 	__u8 *stack;
 };