Index: kernel/arch/xen32/Makefile.inc
===================================================================
--- kernel/arch/xen32/Makefile.inc	(revision c59dd1a2d9e5081afa75cef4614ee394981aa341)
+++ kernel/arch/xen32/Makefile.inc	(revision 42d3be37f381c85c99f60de83e4acaeff812d699)
@@ -86,7 +86,4 @@
 	DEFS += -DCONFIG_HT
 endif
-ifeq ($(CONFIG_SIMICS_FIX),y)
-	DEFS += -DCONFIG_SIMICS_FIX
-endif
 
 ## Compile with support for software integer division.
Index: kernel/arch/xen32/src/mm/frame.c
===================================================================
--- kernel/arch/xen32/src/mm/frame.c	(revision c59dd1a2d9e5081afa75cef4614ee394981aa341)
+++ kernel/arch/xen32/src/mm/frame.c	(revision 42d3be37f381c85c99f60de83e4acaeff812d699)
@@ -53,6 +53,9 @@
 #define L2_PT_SHIFT	0
 
-#define L1_OFFSET_MASK			0x3ff
-#define L2_OFFSET_MASK			0x3ff
+#define L1_PT_ENTRIES	1024
+#define L2_PT_ENTRIES	1024
+
+#define L1_OFFSET_MASK			(L1_PT_ENTRIES - 1)
+#define L2_OFFSET_MASK			(L2_PT_ENTRIES - 1)
 
 #define PFN2PTL1_OFFSET(pfn)	((pfn >> L1_PT_SHIFT) & L1_OFFSET_MASK)
@@ -86,6 +89,7 @@
 		/* Create identity mapping */
 		pfn_t phys;
+		count_t count = 0;
 		for (phys = start; phys < start + size; phys++) {
-			mmu_update_t updates[1];
+			mmu_update_t updates[L2_PT_ENTRIES];
 			pfn_t virt = ADDR2PFN(PA2KA(PFN2ADDR(phys)));
 			
@@ -110,8 +114,9 @@
 					panic("Unable to find page table reference");
 				
-				updates[0].ptr = (uintptr_t) &ptl2_base2[ptl2_offset2];
-				updates[0].val = PFN2ADDR(start_info.mfn_list[start]) | L1_PROT;
-				if (xen_mmu_update(updates, 1, NULL, DOMID_SELF) < 0)
+				updates[count].ptr = (uintptr_t) &ptl2_base2[ptl2_offset2];
+				updates[count].val = PFN2ADDR(start_info.mfn_list[start]) | L1_PROT;
+				if (xen_mmu_update(updates, count + 1, NULL, DOMID_SELF) < 0)
 					panic("Unable to map new page table");
+				count = 0;
 				
 				mmu_ext.cmd = MMUEXT_PIN_L1_TABLE;
@@ -122,8 +127,9 @@
 				unsigned long *ptl0 = (unsigned long *) PFN2ADDR(start_info.mfn_list[ADDR2PFN(KA2PA(start_info.pt_base))]);
 				
-				updates[0].ptr = (uintptr_t) &ptl0[ptl1_offset];
-				updates[0].val = PFN2ADDR(start_info.mfn_list[start]) | L2_PROT;
-				if (xen_mmu_update(updates, 1, NULL, DOMID_SELF) < 0)
+				updates[count].ptr = (uintptr_t) &ptl0[ptl1_offset];
+				updates[count].val = PFN2ADDR(start_info.mfn_list[start]) | L2_PROT;
+				if (xen_mmu_update(updates, count + 1, NULL, DOMID_SELF) < 0)
 					panic("Unable to update PTE for page table");
+				count = 0;
 				
 				ptl2_base = (unsigned long *) PTE2ADDR(start_info.pt_base[ptl1_offset]);
@@ -132,8 +138,13 @@
 			}
 			
-			updates[0].ptr = (uintptr_t) &ptl2_base[ptl2_offset];
-			updates[0].val = PFN2ADDR(start_info.mfn_list[phys]) | L2_PROT;
-			if (xen_mmu_update(updates, 1, NULL, DOMID_SELF) < 0)
-				panic("Unable to update PTE");
+			updates[count].ptr = (uintptr_t) &ptl2_base[ptl2_offset];
+			updates[count].val = PFN2ADDR(start_info.mfn_list[phys]) | L2_PROT;
+			count++;
+			
+			if ((count == L2_PT_ENTRIES) || (phys + 1 == start + size)) {
+				if (xen_mmu_update(updates, count, NULL, DOMID_SELF) < 0)
+					panic("Unable to update PTE");
+				count = 0;
+			}
 		}