Index: kernel/arch/sparc32/include/arch/ambapp.h =================================================================== --- kernel/arch/sparc32/include/arch/ambapp.h (revision f7a33dea6c14aefebb1d11fcaf8d904947793cad) +++ kernel/arch/sparc32/include/arch/ambapp.h (revision 41b735f3b799f5218287fcd1b22dcc821c600aa2) @@ -36,6 +36,5 @@ #define KERN_sparc32_AMBAPP_H_ -typedef struct -{ +typedef struct { /* Primary serial port location */ uintptr_t uart_base; Index: kernel/arch/sparc32/include/arch/arch.h =================================================================== --- kernel/arch/sparc32/include/arch/arch.h (revision f7a33dea6c14aefebb1d11fcaf8d904947793cad) +++ kernel/arch/sparc32/include/arch/arch.h (revision 41b735f3b799f5218287fcd1b22dcc821c600aa2) @@ -42,18 +42,18 @@ #include -#define NWINDOWS 8 +#define NWINDOWS 8 /* ASI assignments: */ -#define ASI_CACHEMISS 0x01 -#define ASI_CACHECTRL 0x02 -#define ASI_MMUCACHE 0x10 -#define ASI_MMUREGS 0x19 -#define ASI_MMUBYPASS 0x1c -#define ASI_MMUFLUSH 0x18 +#define ASI_CACHEMISS 0x01 +#define ASI_CACHECTRL 0x02 +#define ASI_MMUCACHE 0x10 +#define ASI_MMUREGS 0x19 +#define ASI_MMUBYPASS 0x1c +#define ASI_MMUFLUSH 0x18 #define TASKMAP_MAX_RECORDS 32 #define CPUMAP_MAX_RECORDS 32 -#define BOOTINFO_TASK_NAME_BUFLEN 32 +#define BOOTINFO_TASK_NAME_BUFLEN 32 typedef struct { @@ -75,9 +75,9 @@ } bootinfo_t; -extern void arch_pre_main(void *unused, bootinfo_t *bootinfo); -extern void write_to_invalid(uint32_t l0, uint32_t l1, uint32_t l2); -extern void read_from_invalid(uint32_t *l0, uint32_t *l1, uint32_t *l2); -extern void preemptible_save_uspace(uintptr_t sp, istate_t *istate); -extern void preemptible_restore_uspace(uintptr_t sp, istate_t *istate); +extern void arch_pre_main(void *, bootinfo_t *); +extern void write_to_invalid(uint32_t, uint32_t, uint32_t); +extern void read_from_invalid(uint32_t *, uint32_t *, uint32_t *); +extern void preemptible_save_uspace(uintptr_t, istate_t *); +extern void preemptible_restore_uspace(uintptr_t, istate_t *); extern void flush_windows(void); Index: kernel/arch/sparc32/include/arch/asm.h =================================================================== --- kernel/arch/sparc32/include/arch/asm.h (revision f7a33dea6c14aefebb1d11fcaf8d904947793cad) +++ kernel/arch/sparc32/include/arch/asm.h (revision 41b735f3b799f5218287fcd1b22dcc821c600aa2) @@ -43,13 +43,10 @@ NO_TRACE static inline void asm_delay_loop(uint32_t usec) { + // FIXME TODO } NO_TRACE static inline __attribute__((noreturn)) void cpu_halt(void) { - /* On real hardware this should stop processing further - instructions on the CPU (and possibly putting it into - low-power mode) without any possibility of exitting - this function. */ - + // FIXME TODO while (true); } @@ -57,8 +54,5 @@ NO_TRACE static inline void cpu_sleep(void) { - /* On real hardware this should put the CPU into low-power - mode. However, the CPU is free to continue processing - futher instructions any time. The CPU also wakes up - upon an interrupt. */ + // FIXME TODO } @@ -68,12 +62,4 @@ } -/** Word to port - * - * Output word to port - * - * @param port Port to write to - * @param val Value to write - * - */ NO_TRACE static inline void pio_write_16(ioport16_t *port, uint16_t val) { @@ -81,12 +67,4 @@ } -/** Double word to port - * - * Output double word to port - * - * @param port Port to write to - * @param val Value to write - * - */ NO_TRACE static inline void pio_write_32(ioport32_t *port, uint32_t val) { @@ -94,12 +72,4 @@ } -/** Byte from port - * - * Get byte from port - * - * @param port Port to read from - * @return Value read - * - */ NO_TRACE static inline uint8_t pio_read_8(ioport8_t *port) { @@ -107,12 +77,4 @@ } -/** Word from port - * - * Get word from port - * - * @param port Port to read from - * @return Value read - * - */ NO_TRACE static inline uint16_t pio_read_16(ioport16_t *port) { @@ -120,12 +82,4 @@ } -/** Double word from port - * - * Get double word from port - * - * @param port Port to read from - * @return Value read - * - */ NO_TRACE static inline uint32_t pio_read_32(ioport32_t *port) { @@ -133,43 +87,44 @@ } -NO_TRACE static inline uint32_t psr_read() +NO_TRACE static inline uint32_t psr_read(void) { uint32_t v; - + asm volatile ( "mov %%psr, %[v]\n" : [v] "=r" (v) ); - - return v; -} - -NO_TRACE static inline uint32_t wim_read() + + return v; +} + +NO_TRACE static inline uint32_t wim_read(void) { uint32_t v; - + asm volatile ( "mov %%wim, %[v]\n" : [v] "=r" (v) ); - - return v; -} - -NO_TRACE static inline uint32_t asi_u32_read(int asi, uintptr_t va) + + return v; +} + +NO_TRACE static inline uint32_t asi_u32_read(unsigned int asi, uintptr_t va) { uint32_t v; - + asm volatile ( "lda [%[va]] %[asi], %[v]\n" : [v] "=r" (v) : [va] "r" (va), - [asi] "i" ((unsigned int) asi) - ); - - return v; -} - -NO_TRACE static inline void asi_u32_write(int asi, uintptr_t va, uint32_t v) + [asi] "i" (asi) + ); + + return v; +} + +NO_TRACE static inline void asi_u32_write(unsigned int asi, uintptr_t va, + uint32_t v) { asm volatile ( @@ -177,5 +132,5 @@ :: [v] "r" (v), [va] "r" (va), - [asi] "i" ((unsigned int) asi) + [asi] "i" (asi) : "memory" ); @@ -200,12 +155,13 @@ NO_TRACE static inline ipl_t interrupts_enable(void) { + psr_reg_t psr; + psr.value = psr_read(); + ipl_t pil; - - psr_reg_t psr; - psr.value = psr_read(); pil = psr.pil; - psr.pil = 0xf; + + psr.pil = 0x0f; psr_write(psr.value); - + return pil; } @@ -213,12 +169,13 @@ NO_TRACE static inline ipl_t interrupts_disable(void) { + psr_reg_t psr; + psr.value = psr_read(); + ipl_t pil; - - psr_reg_t psr; - psr.value = psr_read(); pil = psr.pil; + psr.pil = 0; psr_write(psr.value); - + return pil; } Index: kernel/arch/sparc32/include/arch/atomic.h =================================================================== --- kernel/arch/sparc32/include/arch/atomic.h (revision f7a33dea6c14aefebb1d11fcaf8d904947793cad) +++ kernel/arch/sparc32/include/arch/atomic.h (revision 41b735f3b799f5218287fcd1b22dcc821c600aa2) @@ -27,5 +27,5 @@ */ -/** @addtogroup abs32le +/** @addtogroup sparc32 * @{ */ @@ -33,6 +33,6 @@ */ -#ifndef KERN_abs32le_ATOMIC_H_ -#define KERN_abs32le_ATOMIC_H_ +#ifndef KERN_sparc32_ATOMIC_H_ +#define KERN_sparc32_ATOMIC_H_ #include @@ -47,7 +47,5 @@ REQUIRES(val->count < ATOMIC_COUNT_MAX) { - /* On real hardware the increment has to be done - as an atomic action. */ - + // FIXME TODO val->count++; } @@ -58,7 +56,5 @@ REQUIRES(val->count > ATOMIC_COUNT_MIN) { - /* On real hardware the decrement has to be done - as an atomic action. */ - + // FIXME TODO val->count--; } @@ -69,7 +65,5 @@ REQUIRES(val->count < ATOMIC_COUNT_MAX) { - /* On real hardware both the storing of the previous - value and the increment have to be done as a single - atomic action. */ + // FIXME TODO atomic_count_t prev = val->count; @@ -84,7 +78,5 @@ REQUIRES(val->count > ATOMIC_COUNT_MIN) { - /* On real hardware both the storing of the previous - value and the decrement have to be done as a single - atomic action. */ + // FIXME TODO atomic_count_t prev = val->count; @@ -101,7 +93,5 @@ REQUIRES_EXTENT_MUTABLE(val) { - /* On real hardware the retrieving of the original - value and storing 1 have to be done as a single - atomic action. */ + // FIXME TODO atomic_count_t prev = val->count; @@ -114,4 +104,6 @@ REQUIRES_EXTENT_MUTABLE(val) { + // FIXME TODO + do { while (val->count); Index: kernel/arch/sparc32/include/arch/barrier.h =================================================================== --- kernel/arch/sparc32/include/arch/barrier.h (revision f7a33dea6c14aefebb1d11fcaf8d904947793cad) +++ kernel/arch/sparc32/include/arch/barrier.h (revision 41b735f3b799f5218287fcd1b22dcc821c600aa2) @@ -27,5 +27,5 @@ */ -/** @addtogroup abs32le +/** @addtogroup sparc32 * @{ */ @@ -33,10 +33,8 @@ */ -#ifndef KERN_abs32le_BARRIER_H_ -#define KERN_abs32le_BARRIER_H_ +#ifndef KERN_sparc32_BARRIER_H_ +#define KERN_sparc32_BARRIER_H_ -/* - * Provisions are made to prevent compiler from reordering instructions itself. - */ +// FIXME TODO #define CS_ENTER_BARRIER() Index: kernel/arch/sparc32/include/arch/context.h =================================================================== --- kernel/arch/sparc32/include/arch/context.h (revision f7a33dea6c14aefebb1d11fcaf8d904947793cad) +++ kernel/arch/sparc32/include/arch/context.h (revision 41b735f3b799f5218287fcd1b22dcc821c600aa2) @@ -56,6 +56,6 @@ */ typedef struct { - uintptr_t sp; /* %o6 */ - uintptr_t pc; /* %o7 */ + uintptr_t sp; /* %o6 */ + uintptr_t pc; /* %o7 */ uint32_t i0; uint32_t i1; @@ -64,5 +64,5 @@ uint32_t i4; uint32_t i5; - uintptr_t fp; /* %i6 */ + uintptr_t fp; /* %i6 */ uintptr_t i7; uint32_t l0; Index: kernel/arch/sparc32/include/arch/context_offset.h =================================================================== --- kernel/arch/sparc32/include/arch/context_offset.h (revision f7a33dea6c14aefebb1d11fcaf8d904947793cad) +++ kernel/arch/sparc32/include/arch/context_offset.h (revision 41b735f3b799f5218287fcd1b22dcc821c600aa2) @@ -31,26 +31,29 @@ #define KERN_sparc32_CONTEXT_OFFSET_H_ -#define OFFSET_SP 0 -#define OFFSET_PC 4 -#define OFFSET_I0 8 -#define OFFSET_I1 12 -#define OFFSET_I2 16 -#define OFFSET_I3 20 -#define OFFSET_I4 24 -#define OFFSET_I5 28 -#define OFFSET_FP 32 -#define OFFSET_I7 36 -#define OFFSET_L0 40 -#define OFFSET_L1 44 -#define OFFSET_L2 48 -#define OFFSET_L3 52 -#define OFFSET_L4 56 -#define OFFSET_L5 60 -#define OFFSET_L6 64 -#define OFFSET_L7 68 +#define OFFSET_SP 0 +#define OFFSET_PC 4 +#define OFFSET_I0 8 +#define OFFSET_I1 12 +#define OFFSET_I2 16 +#define OFFSET_I3 20 +#define OFFSET_I4 24 +#define OFFSET_I5 28 +#define OFFSET_FP 32 +#define OFFSET_I7 36 +#define OFFSET_L0 40 +#define OFFSET_L1 44 +#define OFFSET_L2 48 +#define OFFSET_L3 52 +#define OFFSET_L4 56 +#define OFFSET_L5 60 +#define OFFSET_L6 64 +#define OFFSET_L7 68 #ifndef KERNEL -# define OFFSET_TP 72 + +#define OFFSET_TP 72 + #endif + #ifdef __ASM__ Index: kernel/arch/sparc32/include/arch/cpu.h =================================================================== --- kernel/arch/sparc32/include/arch/cpu.h (revision f7a33dea6c14aefebb1d11fcaf8d904947793cad) +++ kernel/arch/sparc32/include/arch/cpu.h (revision 41b735f3b799f5218287fcd1b22dcc821c600aa2) @@ -27,5 +27,5 @@ */ -/** @addtogroup abs32le +/** @addtogroup sparc32 * @{ */ @@ -33,12 +33,7 @@ */ -#ifndef KERN_abs32le_CPU_H_ -#define KERN_abs32le_CPU_H_ +#ifndef KERN_sparc32_CPU_H_ +#define KERN_sparc32_CPU_H_ -/* - * On real hardware this structure stores - * information specific to the current - * CPU model. - */ typedef struct { } cpu_arch_t; Index: kernel/arch/sparc32/include/arch/cycle.h =================================================================== --- kernel/arch/sparc32/include/arch/cycle.h (revision f7a33dea6c14aefebb1d11fcaf8d904947793cad) +++ kernel/arch/sparc32/include/arch/cycle.h (revision 41b735f3b799f5218287fcd1b22dcc821c600aa2) @@ -27,5 +27,5 @@ */ -/** @addtogroup abs32le +/** @addtogroup sparc32 * @{ */ @@ -33,6 +33,6 @@ */ -#ifndef KERN_abs32le_CYCLE_H_ -#define KERN_abs32le_CYCLE_H_ +#ifndef KERN_sparc32_CYCLE_H_ +#define KERN_sparc32_CYCLE_H_ #include @@ -40,4 +40,5 @@ NO_TRACE static inline uint64_t get_cycle(void) { + // FIXME TODO return 0; } Index: kernel/arch/sparc32/include/arch/exception.h =================================================================== --- kernel/arch/sparc32/include/arch/exception.h (revision f7a33dea6c14aefebb1d11fcaf8d904947793cad) +++ kernel/arch/sparc32/include/arch/exception.h (revision 41b735f3b799f5218287fcd1b22dcc821c600aa2) @@ -38,35 +38,35 @@ #define KERN_sparc32_EXCEPTION_H_ -#define TT_INSTRUCTION_ACCESS_EXCEPTION 0x01 -#define TT_INSTRUCTION_ACCESS_MMU_MISS 0x3c -#define TT_INSTRUCTION_ACCESS_ERROR 0x21 -#define TT_ILLEGAL_INSTRUCTION 0x02 -#define TT_PRIVILEGED_INSTRUCTION 0x03 -#define TT_FP_DISABLED 0x08 -#define TT_DIVISION_BY_ZERO 0x2a -#define TT_DATA_ACCESS_EXCEPTION 0x09 -#define TT_DATA_ACCESS_MMU_MISS 0x2c -#define TT_DATA_ACCESS_ERROR 0x29 -#define TT_MEM_ADDRESS_NOT_ALIGNED 0x07 +#define TT_INSTRUCTION_ACCESS_EXCEPTION 0x01 +#define TT_ILLEGAL_INSTRUCTION 0x02 +#define TT_PRIVILEGED_INSTRUCTION 0x03 +#define TT_MEM_ADDRESS_NOT_ALIGNED 0x07 +#define TT_FP_DISABLED 0x08 +#define TT_DATA_ACCESS_EXCEPTION 0x09 +#define TT_INSTRUCTION_ACCESS_ERROR 0x21 +#define TT_DATA_ACCESS_ERROR 0x29 +#define TT_DIVISION_BY_ZERO 0x2a +#define TT_DATA_ACCESS_MMU_MISS 0x2c +#define TT_INSTRUCTION_ACCESS_MMU_MISS 0x3c #ifndef __ASM__ -/*#include */ +extern void instruction_access_exception(int, istate_t *); +extern void instruction_access_error(int, istate_t *); +extern void illegal_instruction(int, istate_t *); +extern void privileged_instruction(int, istate_t *); +extern void fp_disabled(int, istate_t *); +extern void fp_exception(int, istate_t *); +extern void tag_overflow(int, istate_t *); +extern void division_by_zero(int, istate_t *); +extern void data_access_exception(int, istate_t *); +extern void data_access_error(int, istate_t *); +extern void data_access_mmu_miss(int, istate_t *); +extern void data_store_error(int, istate_t *); +extern void mem_address_not_aligned(int, istate_t *); -extern void instruction_access_exception(int n, istate_t *istate); -extern void instruction_access_error(int n, istate_t *istate); -extern void illegal_instruction(int n, istate_t *istate); -extern void privileged_instruction(int n, istate_t *istate); -extern void fp_disabled(int n, istate_t *istate); -extern void fp_exception(int n, istate_t *istate); -extern void tag_overflow(int n, istate_t *istate); -extern void division_by_zero(int n, istate_t *istate); -extern void data_access_exception(int n, istate_t *istate); -extern void data_access_error(int n, istate_t *istate); -extern void data_access_mmu_miss(int n, istate_t *istate); -extern void data_store_error(int n, istate_t *istate); -extern void mem_address_not_aligned(int n, istate_t *istate); -extern sysarg_t syscall(sysarg_t a1, sysarg_t a2, sysarg_t a3, sysarg_t a4, sysarg_t a5, sysarg_t a6, sysarg_t id); -extern void irq_exception(unsigned int nr, istate_t *istate); +extern sysarg_t syscall(sysarg_t, sysarg_t, sysarg_t, sysarg_t, sysarg_t, + sysarg_t, sysarg_t); +extern void irq_exception(unsigned int, istate_t *); #endif /* !__ASM__ */ Index: kernel/arch/sparc32/include/arch/faddr.h =================================================================== --- kernel/arch/sparc32/include/arch/faddr.h (revision f7a33dea6c14aefebb1d11fcaf8d904947793cad) +++ kernel/arch/sparc32/include/arch/faddr.h (revision 41b735f3b799f5218287fcd1b22dcc821c600aa2) @@ -27,5 +27,5 @@ */ -/** @addtogroup abs32le +/** @addtogroup sparc32 * @{ */ Index: kernel/arch/sparc32/include/arch/fpu_context.h =================================================================== --- kernel/arch/sparc32/include/arch/fpu_context.h (revision f7a33dea6c14aefebb1d11fcaf8d904947793cad) +++ kernel/arch/sparc32/include/arch/fpu_context.h (revision 41b735f3b799f5218287fcd1b22dcc821c600aa2) @@ -27,5 +27,5 @@ */ -/** @addtogroup abs32le +/** @addtogroup sparc32 * @{ */ @@ -33,6 +33,6 @@ */ -#ifndef KERN_abs32le_FPU_CONTEXT_H_ -#define KERN_abs32le_FPU_CONTEXT_H_ +#ifndef KERN_sparc32_FPU_CONTEXT_H_ +#define KERN_sparc32_FPU_CONTEXT_H_ #include @@ -40,8 +40,4 @@ #define FPU_CONTEXT_ALIGN 16 -/* - * On real hardware this stores the FPU registers - * which are part of the CPU context. - */ typedef struct { } fpu_context_t; Index: kernel/arch/sparc32/include/arch/interrupt.h =================================================================== --- kernel/arch/sparc32/include/arch/interrupt.h (revision f7a33dea6c14aefebb1d11fcaf8d904947793cad) +++ kernel/arch/sparc32/include/arch/interrupt.h (revision 41b735f3b799f5218287fcd1b22dcc821c600aa2) @@ -27,5 +27,5 @@ */ -/** @addtogroup abs32leinterrupt +/** @addtogroup sparc32interrupt * @{ */ @@ -33,6 +33,6 @@ */ -#ifndef KERN_abs32le_INTERRUPT_H_ -#define KERN_abs32le_INTERRUPT_H_ +#ifndef KERN_sparc32_INTERRUPT_H_ +#define KERN_sparc32_INTERRUPT_H_ #include Index: kernel/arch/sparc32/include/arch/istate.h =================================================================== --- kernel/arch/sparc32/include/arch/istate.h (revision f7a33dea6c14aefebb1d11fcaf8d904947793cad) +++ kernel/arch/sparc32/include/arch/istate.h (revision 41b735f3b799f5218287fcd1b22dcc821c600aa2) @@ -49,8 +49,4 @@ #endif /* KERNEL */ -/* - * On real hardware this stores the registers which - * need to be preserved during interupts. - */ typedef struct istate { uintptr_t pstate; @@ -63,7 +59,4 @@ REQUIRES_EXTENT_MUTABLE(istate) { - /* On real hardware this checks whether the interrupted - context originated from user space. */ - return !(istate->pc & UINT32_C(0x80000000)); } @@ -73,6 +66,4 @@ WRITES(&istate->ip) { - /* On real hardware this sets the instruction pointer. */ - istate->pc = retaddr; } @@ -81,6 +72,4 @@ REQUIRES_EXTENT_MUTABLE(istate) { - /* On real hardware this returns the instruction pointer. */ - return istate->pc; } @@ -89,7 +78,5 @@ REQUIRES_EXTENT_MUTABLE(istate) { - /* On real hardware this returns the frame pointer. */ - - return 0;//istate->fp; + return 0; } Index: kernel/arch/sparc32/include/arch/machine/leon3/leon3.h =================================================================== --- kernel/arch/sparc32/include/arch/machine/leon3/leon3.h (revision f7a33dea6c14aefebb1d11fcaf8d904947793cad) +++ kernel/arch/sparc32/include/arch/machine/leon3/leon3.h (revision 41b735f3b799f5218287fcd1b22dcc821c600aa2) @@ -27,19 +27,19 @@ */ -/** @addtogroup sparc32leon3 LEON3 - * @brief LEON3 System-on-chip. - * @ingroup arm32 +/** @addtogroup sparc32leon3 + * @brief LEON3 System-on-chip. + * @ingroup sparc32 * @{ */ -#ifndef KERN_sparc32_leon3_H_ -#define KERN_sparc32_leon3_H_ +#ifndef KERN_sparc32_LEON3_H_ +#define KERN_sparc32_LEON3_H_ #include +#define LEON3_SDRAM_START 0x40000000 +#define LEON3_IRQ_COUNT 15 + extern struct sparc_machine_ops leon3_machine_ops; - -#define LEON3_SDRAM_START 0x40000000 -#define LEON3_IRQ_COUNT 15 #endif Index: kernel/arch/sparc32/include/arch/machine_func.h =================================================================== --- kernel/arch/sparc32/include/arch/machine_func.h (revision f7a33dea6c14aefebb1d11fcaf8d904947793cad) +++ kernel/arch/sparc32/include/arch/machine_func.h (revision 41b735f3b799f5218287fcd1b22dcc821c600aa2) @@ -32,9 +32,9 @@ */ /** @file - * @brief Declarations of machine specific functions. + * @brief Declarations of machine specific functions. * - * These functions enable to differentiate more kinds of ARM emulators - * or CPUs. It's the same concept as "arch" functions on the architecture - * level. + * These functions enable to differentiate more kinds of SPARC emulators + * or CPUs. It is the same concept as "arch" functions on the architecture + * level. */ @@ -66,19 +66,17 @@ extern void machine_ops_init(void); -/** Maps HW devices to the kernel address space using #hw_map. */ +/** Map HW devices to the kernel address space using #hw_map. */ extern void machine_init(bootinfo_t *); - -/** Starts timer. */ +/** Start timer. */ extern void machine_timer_irq_start(void); - -/** Halts CPU. */ +/** Halt CPU. */ extern void machine_cpu_halt(void); /** Get extents of available memory. * - * @param start Place to store memory start address. - * @param size Place to store memory size. + * @param start Place to store memory start address. + * @param size Place to store memory size. */ extern void machine_get_memory_extents(uintptr_t *start, size_t *size); @@ -91,23 +89,16 @@ extern void machine_irq_exception(unsigned int exc_no, istate_t *istate); - -/* - * Machine specific frame initialization - */ +/** Machine specific frame initialization */ extern void machine_frame_init(void); -/* - * configure the serial line output device. - */ +/* Configure the serial line output device. */ extern void machine_output_init(void); -/* - * configure the serial line input device. - */ +/** Configure the serial line input device. */ extern void machine_input_init(void); extern size_t machine_get_irq_count(void); -extern const char * machine_get_platform_name(void); +extern const char *machine_get_platform_name(void); #endif Index: kernel/arch/sparc32/include/arch/mm/as.h =================================================================== --- kernel/arch/sparc32/include/arch/mm/as.h (revision f7a33dea6c14aefebb1d11fcaf8d904947793cad) +++ kernel/arch/sparc32/include/arch/mm/as.h (revision 41b735f3b799f5218287fcd1b22dcc821c600aa2) @@ -55,5 +55,5 @@ #define as_invalidate_translation_cache(as, page, cnt) -uintptr_t as_context_table; +extern uintptr_t as_context_table; extern void as_arch_init(void); Index: kernel/arch/sparc32/include/arch/mm/frame.h =================================================================== --- kernel/arch/sparc32/include/arch/mm/frame.h (revision f7a33dea6c14aefebb1d11fcaf8d904947793cad) +++ kernel/arch/sparc32/include/arch/mm/frame.h (revision 41b735f3b799f5218287fcd1b22dcc821c600aa2) @@ -33,6 +33,6 @@ */ -#ifndef KERN_abs32le_FRAME_H_ -#define KERN_abs32le_FRAME_H_ +#ifndef KERN_sparc32_FRAME_H_ +#define KERN_sparc32_FRAME_H_ #define FRAME_WIDTH 12 /* 4K */ @@ -41,9 +41,9 @@ #include -#define PHYSMEM_START_ADDR 0x40000000 +#define PHYSMEM_START_ADDR 0x40000000 -#define BOOT_PT_ADDRESS 0x40008000 -#define BOOT_PT_START_FRAME (BOOT_PT_ADDRESS >> FRAME_WIDTH) -#define BOOT_PT_SIZE_FRAMES 1 +#define BOOT_PT_ADDRESS 0x40008000 +#define BOOT_PT_START_FRAME (BOOT_PT_ADDRESS >> FRAME_WIDTH) +#define BOOT_PT_SIZE_FRAMES 1 extern void frame_low_arch_init(void); Index: kernel/arch/sparc32/include/arch/mm/km.h =================================================================== --- kernel/arch/sparc32/include/arch/mm/km.h (revision f7a33dea6c14aefebb1d11fcaf8d904947793cad) +++ kernel/arch/sparc32/include/arch/mm/km.h (revision 41b735f3b799f5218287fcd1b22dcc821c600aa2) @@ -38,9 +38,9 @@ #include -#define KM_SPARC32_IDENTITY_START UINT32_C(0x80000000) -#define KM_SPARC32_IDENTITY_SIZE UINT32_C(0x70000000) +#define KM_SPARC32_IDENTITY_START UINT32_C(0x80000000) +#define KM_SPARC32_IDENTITY_SIZE UINT32_C(0x70000000) -#define KM_SPARC32_NON_IDENTITY_START UINT32_C(0xf0000000) -#define KM_SPARC32_NON_IDENTITY_SIZE UINT32_C(0xff00000) +#define KM_SPARC32_NON_IDENTITY_START UINT32_C(0xf0000000) +#define KM_SPARC32_NON_IDENTITY_SIZE UINT32_C(0xff00000) extern void km_identity_arch_init(void); Index: kernel/arch/sparc32/include/arch/mm/page.h =================================================================== --- kernel/arch/sparc32/include/arch/mm/page.h (revision f7a33dea6c14aefebb1d11fcaf8d904947793cad) +++ kernel/arch/sparc32/include/arch/mm/page.h (revision 41b735f3b799f5218287fcd1b22dcc821c600aa2) @@ -48,16 +48,16 @@ #define PA2KA(x) (((uintptr_t) (x)) + UINT32_C(0x40000000)) -#define PTE_ET_INVALID 0 -#define PTE_ET_DESCRIPTOR 1 -#define PTE_ET_ENTRY 2 - -#define PTE_ACC_USER_RO_KERNEL_RO 0 -#define PTE_ACC_USER_RW_KERNEL_RW 1 -#define PTE_ACC_USER_RX_KERNEL_RX 2 -#define PTE_ACC_USER_RWX_KERNEL_RWX 3 -#define PTE_ACC_USER_XO_KERNEL_XO 4 -#define PTE_ACC_USER_RO_KERNEL_RW 5 -#define PTE_ACC_USER_NO_KERNEL_RX 6 -#define PTE_ACC_USER_NO_KERNEL_RWX 7 +#define PTE_ET_INVALID 0 +#define PTE_ET_DESCRIPTOR 1 +#define PTE_ET_ENTRY 2 + +#define PTE_ACC_USER_RO_KERNEL_RO 0 +#define PTE_ACC_USER_RW_KERNEL_RW 1 +#define PTE_ACC_USER_RX_KERNEL_RX 2 +#define PTE_ACC_USER_RWX_KERNEL_RWX 3 +#define PTE_ACC_USER_XO_KERNEL_XO 4 +#define PTE_ACC_USER_RO_KERNEL_RW 5 +#define PTE_ACC_USER_NO_KERNEL_RX 6 +#define PTE_ACC_USER_NO_KERNEL_RWX 7 /* Number of entries in each level. */ @@ -143,16 +143,16 @@ /** Page Table Descriptor. */ typedef struct { - unsigned int table_pointer: 30; - unsigned int et: 2; + unsigned int table_pointer : 30; + unsigned int et : 2; } __attribute__((packed)) ptd_t; /** Page Table Entry. */ typedef struct { - unsigned int frame_address: 24; - unsigned int cacheable: 1; - unsigned int modified: 1; - unsigned int referenced: 1; - unsigned int acc: 3; - unsigned int et: 2; + unsigned int frame_address : 24; + unsigned int cacheable : 1; + unsigned int modified : 1; + unsigned int referenced : 1; + unsigned int acc : 3; + unsigned int et : 2; } __attribute__((packed)) pte_t; @@ -163,19 +163,15 @@ NO_TRACE static inline bool pte_is_writeable(pte_t *pt) { - return ( - pt->acc == PTE_ACC_USER_RW_KERNEL_RW || - pt->acc == PTE_ACC_USER_RWX_KERNEL_RWX || - pt->acc == PTE_ACC_USER_RO_KERNEL_RW || - pt->acc == PTE_ACC_USER_NO_KERNEL_RWX - ); + return ((pt->acc == PTE_ACC_USER_RW_KERNEL_RW) || + (pt->acc == PTE_ACC_USER_RWX_KERNEL_RWX) || + (pt->acc == PTE_ACC_USER_RO_KERNEL_RW) || + (pt->acc == PTE_ACC_USER_NO_KERNEL_RWX)); } NO_TRACE static inline bool pte_is_executable(pte_t *pt) { - return ( - pt->acc != PTE_ACC_USER_RO_KERNEL_RO && - pt->acc != PTE_ACC_USER_RW_KERNEL_RW && - pt->acc != PTE_ACC_USER_RO_KERNEL_RW - ); + return ((pt->acc != PTE_ACC_USER_RO_KERNEL_RO) && + (pt->acc != PTE_ACC_USER_RW_KERNEL_RW) && + (pt->acc != PTE_ACC_USER_RO_KERNEL_RW)); } @@ -184,25 +180,20 @@ { pte_t *p = &pt[i]; - - bool notpresent = p->et == 0; - - return ( - (p->cacheable << PAGE_CACHEABLE_SHIFT) | - (notpresent << PAGE_PRESENT_SHIFT) | - ((p->acc != PTE_ACC_USER_NO_KERNEL_RX && p->acc != PTE_ACC_USER_NO_KERNEL_RWX) << PAGE_USER_SHIFT) | - (1 << PAGE_READ_SHIFT) | - (( - p->acc == PTE_ACC_USER_RW_KERNEL_RW || - p->acc == PTE_ACC_USER_RWX_KERNEL_RWX || - p->acc == PTE_ACC_USER_RO_KERNEL_RW || - p->acc == PTE_ACC_USER_NO_KERNEL_RWX - ) << PAGE_WRITE_SHIFT) | - (( - p->acc != PTE_ACC_USER_RO_KERNEL_RO && - p->acc != PTE_ACC_USER_RW_KERNEL_RW && - p->acc != PTE_ACC_USER_RO_KERNEL_RW - ) << PAGE_EXEC_SHIFT) | - (1 << PAGE_GLOBAL_SHIFT) - ); + + bool notpresent = (p->et == 0); + + return ((p->cacheable << PAGE_CACHEABLE_SHIFT) | + (notpresent << PAGE_PRESENT_SHIFT) | + (((p->acc != PTE_ACC_USER_NO_KERNEL_RX) && + (p->acc != PTE_ACC_USER_NO_KERNEL_RWX)) << PAGE_USER_SHIFT) | + (1 << PAGE_READ_SHIFT) | + (((p->acc == PTE_ACC_USER_RW_KERNEL_RW) || + (p->acc == PTE_ACC_USER_RWX_KERNEL_RWX) || + (p->acc == PTE_ACC_USER_RO_KERNEL_RW) || + (p->acc == PTE_ACC_USER_NO_KERNEL_RWX)) << PAGE_WRITE_SHIFT) | + (((p->acc != PTE_ACC_USER_RO_KERNEL_RO) && + (p->acc != PTE_ACC_USER_RW_KERNEL_RW) && + (p->acc != PTE_ACC_USER_RO_KERNEL_RW)) << PAGE_EXEC_SHIFT) | + (1 << PAGE_GLOBAL_SHIFT)); } @@ -213,7 +204,6 @@ pte_t *p = &pt[i]; - p->et = (flags & PAGE_NOT_PRESENT) - ? PTE_ET_INVALID - : PTE_ET_DESCRIPTOR; + p->et = (flags & PAGE_NOT_PRESENT) ? + PTE_ET_INVALID : PTE_ET_DESCRIPTOR; } @@ -223,5 +213,5 @@ { pte_t *p = &pt[i]; - + p->et = PTE_ET_ENTRY; p->acc = PTE_ACC_USER_NO_KERNEL_RWX; @@ -240,8 +230,8 @@ } } - + if (flags & PAGE_NOT_PRESENT) p->et = PTE_ET_INVALID; - + p->cacheable = (flags & PAGE_CACHEABLE) != 0; } @@ -252,5 +242,5 @@ { pte_t *p = &pt[i]; - + p->et = PTE_ET_DESCRIPTOR; } @@ -261,5 +251,5 @@ { pte_t *p = &pt[i]; - + p->et = PTE_ET_ENTRY; } Index: kernel/arch/sparc32/include/arch/mm/page_fault.h =================================================================== --- kernel/arch/sparc32/include/arch/mm/page_fault.h (revision f7a33dea6c14aefebb1d11fcaf8d904947793cad) +++ kernel/arch/sparc32/include/arch/mm/page_fault.h (revision 41b735f3b799f5218287fcd1b22dcc821c600aa2) @@ -50,10 +50,10 @@ typedef struct { unsigned int : 14; - unsigned int ebe: 8; - unsigned int l: 2; - unsigned int at: 3; - unsigned int ft: 3; - unsigned int fav: 1; - unsigned int ow: 1; + unsigned int ebe : 8; + unsigned int l : 2; + unsigned int at : 3; + unsigned int ft : 3; + unsigned int fav : 1; + unsigned int ow : 1; } __attribute__((packed)) mmu_fault_status_t; Index: kernel/arch/sparc32/include/arch/mm/tlb.h =================================================================== --- kernel/arch/sparc32/include/arch/mm/tlb.h (revision f7a33dea6c14aefebb1d11fcaf8d904947793cad) +++ kernel/arch/sparc32/include/arch/mm/tlb.h (revision 41b735f3b799f5218287fcd1b22dcc821c600aa2) @@ -36,9 +36,9 @@ #define KERN_sparc32_TLB_H_ -#define MMU_CONTROL 0x000 -#define MMU_CONTEXT_TABLE 0x100 -#define MMU_CONTEXT 0x200 -#define MMU_FAULT_STATUS 0x300 -#define MMU_FAULT_ADDRESS 0x400 +#define MMU_CONTROL 0x000 +#define MMU_CONTEXT_TABLE 0x100 +#define MMU_CONTEXT 0x200 +#define MMU_FAULT_STATUS 0x300 +#define MMU_FAULT_ADDRESS 0x400 #endif Index: kernel/arch/sparc32/include/arch/proc/task.h =================================================================== --- kernel/arch/sparc32/include/arch/proc/task.h (revision f7a33dea6c14aefebb1d11fcaf8d904947793cad) +++ kernel/arch/sparc32/include/arch/proc/task.h (revision 41b735f3b799f5218287fcd1b22dcc821c600aa2) @@ -27,5 +27,5 @@ */ -/** @addtogroup abs32leproc +/** @addtogroup sparc32proc * @{ */ @@ -33,14 +33,10 @@ */ -#ifndef KERN_abs32le_TASK_H_ -#define KERN_abs32le_TASK_H_ +#ifndef KERN_sparc32_TASK_H_ +#define KERN_sparc32_TASK_H_ #include #include -/* - * On real hardware this structure stores task information - * specific to the architecture. - */ typedef struct { } task_arch_t; Index: kernel/arch/sparc32/include/arch/register.h =================================================================== --- kernel/arch/sparc32/include/arch/register.h (revision f7a33dea6c14aefebb1d11fcaf8d904947793cad) +++ kernel/arch/sparc32/include/arch/register.h (revision 41b735f3b799f5218287fcd1b22dcc821c600aa2) @@ -42,16 +42,16 @@ uint32_t value; struct { - unsigned int impl: 4; - unsigned int ver: 4; - unsigned int icc: 4; + unsigned int impl : 4; + unsigned int ver : 4; + unsigned int icc : 4; unsigned int : 6; - unsigned int ec: 1; - unsigned int ef: 1; - unsigned int pil: 4; - unsigned int s: 1; - unsigned int ps: 1; - unsigned int et: 1; - unsigned int cwp: 5; - } __attribute__ ((packed)); + unsigned int ec : 1; + unsigned int ef : 1; + unsigned int pil : 4; + unsigned int s : 1; + unsigned int ps : 1; + unsigned int et : 1; + unsigned int cwp : 5; + } __attribute__((packed)); } psr_reg_t; Index: kernel/arch/sparc32/include/arch/regwin.h =================================================================== --- kernel/arch/sparc32/include/arch/regwin.h (revision f7a33dea6c14aefebb1d11fcaf8d904947793cad) +++ kernel/arch/sparc32/include/arch/regwin.h (revision 41b735f3b799f5218287fcd1b22dcc821c600aa2) @@ -42,28 +42,26 @@ #include -#define UWB_ALIGNMENT 1024 +/* Window Save Area offsets. */ +#define L0_OFFSET 0 +#define L1_OFFSET 4 +#define L2_OFFSET 8 +#define L3_OFFSET 12 +#define L4_OFFSET 16 +#define L5_OFFSET 20 +#define L6_OFFSET 24 +#define L7_OFFSET 28 +#define I0_OFFSET 32 +#define I1_OFFSET 36 +#define I2_OFFSET 40 +#define I3_OFFSET 44 +#define I4_OFFSET 48 +#define I5_OFFSET 52 +#define I6_OFFSET 56 +#define I7_OFFSET 60 -/* Window Save Area offsets. */ -#define L0_OFFSET 0 -#define L1_OFFSET 4 -#define L2_OFFSET 8 -#define L3_OFFSET 12 -#define L4_OFFSET 16 -#define L5_OFFSET 20 -#define L6_OFFSET 24 -#define L7_OFFSET 28 -#define I0_OFFSET 32 -#define I1_OFFSET 36 -#define I2_OFFSET 40 -#define I3_OFFSET 44 -#define I4_OFFSET 48 -#define I5_OFFSET 52 -#define I6_OFFSET 56 -#define I7_OFFSET 60 - -/* Uspace Window Buffer constants. */ -#define UWB_SIZE ((NWINDOWS - 1) * STACK_WINDOW_SAVE_AREA_SIZE) -#define UWB_ALIGNMENT 1024 -#define UWB_ASIZE ALIGN_UP(UWB_SIZE, UWB_ALIGNMENT) +/* User space Window Buffer constants. */ +#define UWB_SIZE ((NWINDOWS - 1) * STACK_WINDOW_SAVE_AREA_SIZE) +#define UWB_ALIGNMENT 1024 +#define UWB_ASIZE ALIGN_UP(UWB_SIZE, UWB_ALIGNMENT) #endif Index: kernel/arch/sparc32/include/arch/stack.h =================================================================== --- kernel/arch/sparc32/include/arch/stack.h (revision f7a33dea6c14aefebb1d11fcaf8d904947793cad) +++ kernel/arch/sparc32/include/arch/stack.h (revision 41b735f3b799f5218287fcd1b22dcc821c600aa2) @@ -39,31 +39,29 @@ #include -#define MEM_STACK_SIZE STACK_SIZE +#define MEM_STACK_SIZE STACK_SIZE -#define STACK_ITEM_SIZE 4 - -/** According to SPARC Compliance Definition, every stack frame is 16-byte aligned. */ -#define STACK_ALIGNMENT 8 +#define STACK_ITEM_SIZE 4 +#define STACK_ALIGNMENT 8 /** * 16-extended-word save area for %i[0-7] and %l[0-7] registers. */ -#define STACK_WINDOW_SAVE_AREA_SIZE (16 * STACK_ITEM_SIZE) +#define STACK_WINDOW_SAVE_AREA_SIZE (16 * STACK_ITEM_SIZE) /** * Six extended words for first six arguments. */ -#define STACK_ARG_SAVE_AREA_SIZE (6 * STACK_ITEM_SIZE) +#define STACK_ARG_SAVE_AREA_SIZE (6 * STACK_ITEM_SIZE) -/* +/** * Offsets of arguments on stack. */ -#define STACK_ARG0 0 -#define STACK_ARG1 4 -#define STACK_ARG2 8 -#define STACK_ARG3 12 -#define STACK_ARG4 16 -#define STACK_ARG5 20 -#define STACK_ARG6 24 +#define STACK_ARG0 0 +#define STACK_ARG1 4 +#define STACK_ARG2 8 +#define STACK_ARG3 12 +#define STACK_ARG4 16 +#define STACK_ARG5 20 +#define STACK_ARG6 24 #endif Index: kernel/arch/sparc32/include/arch/trap.h =================================================================== --- kernel/arch/sparc32/include/arch/trap.h (revision f7a33dea6c14aefebb1d11fcaf8d904947793cad) +++ kernel/arch/sparc32/include/arch/trap.h (revision 41b735f3b799f5218287fcd1b22dcc821c600aa2) @@ -36,10 +36,12 @@ #define KERN_sparc32_TRAP_H_ -#define TRAP_ENTRY_SIZE 16 -#define TRAP_TABLE_COUNT 256 -#define TRAP_TABLE_SIZE (TRAP_ENTRY_SIZE * TRAP_TABLE_COUNT) +#define TRAP_ENTRY_SIZE 16 +#define TRAP_TABLE_COUNT 256 +#define TRAP_TABLE_SIZE (TRAP_ENTRY_SIZE * TRAP_TABLE_COUNT) #ifndef __ASM__ + extern void *trap_table; + #endif Index: kernel/arch/sparc32/include/arch/types.h =================================================================== --- kernel/arch/sparc32/include/arch/types.h (revision f7a33dea6c14aefebb1d11fcaf8d904947793cad) +++ kernel/arch/sparc32/include/arch/types.h (revision 41b735f3b799f5218287fcd1b22dcc821c600aa2) @@ -33,6 +33,6 @@ */ -#ifndef KERN_sparc32le_TYPES_H_ -#define KERN_sparc32le_TYPES_H_ +#ifndef KERN_sparc32_TYPES_H_ +#define KERN_sparc32_TYPES_H_ #define ATOMIC_COUNT_MIN UINT32_MIN