Index: kernel/arch/ppc32/include/arch/asm.h
===================================================================
--- kernel/arch/ppc32/include/arch/asm.h	(revision 53ad43cce05b0004bca31a7c5d6822fc33686cf1)
+++ kernel/arch/ppc32/include/arch/asm.h	(revision 3f932a7eeaf8b09420c71c95d09792b4ef55221a)
@@ -47,6 +47,6 @@
 
 	asm volatile (
-		"mfmsr %[msr]\n"
-		: [msr] "=r" (msr)
+	    "mfmsr %[msr]\n"
+	    : [msr] "=r" (msr)
 	);
 
@@ -57,7 +57,7 @@
 {
 	asm volatile (
-		"mtmsr %[msr]\n"
-		"isync\n"
-		:: [msr] "r" (msr)
+	    "mtmsr %[msr]\n"
+	    "isync\n"
+	    :: [msr] "r" (msr)
 	);
 }
@@ -66,9 +66,9 @@
 {
 	asm volatile (
-		"mtsrin %[value], %[sr]\n"
-		"sync\n"
-		"isync\n"
-		:: [value] "r" ((flags << 16) + (asid << 4) + sr),
-		   [sr] "r" (sr << 28)
+	    "mtsrin %[value], %[sr]\n"
+	    "sync\n"
+	    "isync\n"
+	    :: [value] "r" ((flags << 16) + (asid << 4) + sr),
+	      [sr] "r" (sr << 28)
 	);
 }
@@ -79,7 +79,7 @@
 
 	asm volatile (
-		"mfsrin %[vsid], %[vaddr]\n"
-		: [vsid] "=r" (vsid)
-		: [vaddr] "r" (vaddr)
+	    "mfsrin %[vsid], %[vaddr]\n"
+	    : [vsid] "=r" (vsid)
+	    : [vaddr] "r" (vaddr)
 	);
 
@@ -92,6 +92,6 @@
 
 	asm volatile (
-		"mfsdr1 %[sdr1]\n"
-		: [sdr1] "=r" (sdr1)
+	    "mfsdr1 %[sdr1]\n"
+	    : [sdr1] "=r" (sdr1)
 	);
 
@@ -175,7 +175,7 @@
 
 	asm volatile (
-		"and %[base], %%sp, %[mask]\n"
-		: [base] "=r" (base)
-		: [mask] "r" (~(STACK_SIZE - 1))
+	    "and %[base], %%sp, %[mask]\n"
+	    : [base] "=r" (base)
+	    : [mask] "r" (~(STACK_SIZE - 1))
 	);
 
Index: kernel/arch/ppc32/include/arch/atomic.h
===================================================================
--- kernel/arch/ppc32/include/arch/atomic.h	(revision 53ad43cce05b0004bca31a7c5d6822fc33686cf1)
+++ kernel/arch/ppc32/include/arch/atomic.h	(revision 3f932a7eeaf8b09420c71c95d09792b4ef55221a)
@@ -43,14 +43,14 @@
 
 	asm volatile (
-		"1:\n"
-		"	lwarx %[tmp], 0, %[count_ptr]\n"
-		"	addic %[tmp], %[tmp], 1\n"
-		"	stwcx. %[tmp], 0, %[count_ptr]\n"
-		"	bne- 1b"
-		: [tmp] "=&r" (tmp),
-		  "=m" (val->count)
-		: [count_ptr] "r" (&val->count),
-		  "m" (val->count)
-		: "cc"
+	    "1:\n"
+	    "	lwarx %[tmp], 0, %[count_ptr]\n"
+	    "	addic %[tmp], %[tmp], 1\n"
+	    "	stwcx. %[tmp], 0, %[count_ptr]\n"
+	    "	bne- 1b"
+	    : [tmp] "=&r" (tmp),
+	      "=m" (val->count)
+	    : [count_ptr] "r" (&val->count),
+	      "m" (val->count)
+	    : "cc"
 	);
 }
@@ -61,14 +61,14 @@
 
 	asm volatile (
-		"1:\n"
-		"	lwarx %[tmp], 0, %[count_ptr]\n"
-		"	addic %[tmp], %[tmp], -1\n"
-		"	stwcx. %[tmp], 0, %[count_ptr]\n"
-		"	bne- 1b"
-		: [tmp] "=&r" (tmp),
-		  "=m" (val->count)
-		: [count_ptr] "r" (&val->count),
-		  "m" (val->count)
-		: "cc"
+	    "1:\n"
+	    "	lwarx %[tmp], 0, %[count_ptr]\n"
+	    "	addic %[tmp], %[tmp], -1\n"
+	    "	stwcx. %[tmp], 0, %[count_ptr]\n"
+	    "	bne- 1b"
+	    : [tmp] "=&r" (tmp),
+	      "=m" (val->count)
+	    : [count_ptr] "r" (&val->count),
+	      "m" (val->count)
+	    : "cc"
 	);
 }
Index: kernel/arch/ppc32/include/arch/barrier.h
===================================================================
--- kernel/arch/ppc32/include/arch/barrier.h	(revision 53ad43cce05b0004bca31a7c5d6822fc33686cf1)
+++ kernel/arch/ppc32/include/arch/barrier.h	(revision 3f932a7eeaf8b09420c71c95d09792b4ef55221a)
@@ -65,10 +65,10 @@
 {
 	asm volatile (
-		"dcbst 0, %[addr]\n"
-		"sync\n"
-		"icbi 0, %[addr]\n"
-		"sync\n"
-		"isync\n"
-		:: [addr] "r" (addr)
+	    "dcbst 0, %[addr]\n"
+	    "sync\n"
+	    "icbi 0, %[addr]\n"
+	    "sync\n"
+	    "isync\n"
+	    :: [addr] "r" (addr)
 	);
 }
@@ -80,6 +80,6 @@
 	for (i = 0; i < len; i += COHERENCE_INVAL_MIN)
 		asm volatile (
-			"dcbst 0, %[addr]\n"
-			:: [addr] "r" (addr + i)
+		    "dcbst 0, %[addr]\n"
+		    :: [addr] "r" (addr + i)
 		);
 
@@ -88,6 +88,6 @@
 	for (i = 0; i < len; i += COHERENCE_INVAL_MIN)
 		asm volatile (
-			"icbi 0, %[addr]\n"
-			:: [addr] "r" (addr + i)
+		    "icbi 0, %[addr]\n"
+		    :: [addr] "r" (addr + i)
 		);
 
Index: kernel/arch/ppc32/include/arch/cpu.h
===================================================================
--- kernel/arch/ppc32/include/arch/cpu.h	(revision 53ad43cce05b0004bca31a7c5d6822fc33686cf1)
+++ kernel/arch/ppc32/include/arch/cpu.h	(revision 3f932a7eeaf8b09420c71c95d09792b4ef55221a)
@@ -42,11 +42,11 @@
 	uint16_t version;
 	uint16_t revision;
-} __attribute__ ((packed)) cpu_arch_t;
+} __attribute__((packed)) cpu_arch_t;
 
 NO_TRACE static inline void cpu_version(cpu_arch_t *info)
 {
 	asm volatile (
-		"mfpvr %[cpu_info]\n"
-		: [cpu_info] "=r" (*info)
+	    "mfpvr %[cpu_info]\n"
+	    : [cpu_info] "=r" (*info)
 	);
 }
Index: kernel/arch/ppc32/include/arch/cycle.h
===================================================================
--- kernel/arch/ppc32/include/arch/cycle.h	(revision 53ad43cce05b0004bca31a7c5d6822fc33686cf1)
+++ kernel/arch/ppc32/include/arch/cycle.h	(revision 3f932a7eeaf8b09420c71c95d09792b4ef55221a)
@@ -46,10 +46,10 @@
 	do {
 		asm volatile (
-			"mftbu %[upper]\n"
-			"mftb %[lower]\n"
-			"mftbu %[tmp]\n"
-			: [upper] "=r" (upper),
-			  [lower] "=r" (lower),
-			  [tmp] "=r" (tmp)
+		    "mftbu %[upper]\n"
+		    "mftb %[lower]\n"
+		    "mftbu %[tmp]\n"
+		    : [upper] "=r" (upper),
+		      [lower] "=r" (lower),
+		      [tmp] "=r" (tmp)
 		);
 	} while (upper != tmp);
Index: kernel/arch/ppc32/include/arch/mm/frame.h
===================================================================
--- kernel/arch/ppc32/include/arch/mm/frame.h	(revision 53ad43cce05b0004bca31a7c5d6822fc33686cf1)
+++ kernel/arch/ppc32/include/arch/mm/frame.h	(revision 3f932a7eeaf8b09420c71c95d09792b4ef55221a)
@@ -51,6 +51,6 @@
 
 	asm volatile (
-		"mfsprg3 %[physmem]\n"
-		: [physmem] "=r" (physmem)
+	    "mfsprg3 %[physmem]\n"
+	    : [physmem] "=r" (physmem)
 	);
 
Index: kernel/arch/ppc32/include/arch/mm/page.h
===================================================================
--- kernel/arch/ppc32/include/arch/mm/page.h	(revision 53ad43cce05b0004bca31a7c5d6822fc33686cf1)
+++ kernel/arch/ppc32/include/arch/mm/page.h	(revision 3f932a7eeaf8b09420c71c95d09792b4ef55221a)
@@ -43,9 +43,9 @@
 
 #ifndef __ASSEMBLER__
-	#define KA2PA(x)  (((uintptr_t) (x)) - 0x80000000)
-	#define PA2KA(x)  (((uintptr_t) (x)) + 0x80000000)
+#define KA2PA(x)  (((uintptr_t) (x)) - 0x80000000)
+#define PA2KA(x)  (((uintptr_t) (x)) + 0x80000000)
 #else
-	#define KA2PA(x)  ((x) - 0x80000000)
-	#define PA2KA(x)  ((x) + 0x80000000)
+#define KA2PA(x)  ((x) - 0x80000000)
+#define PA2KA(x)  ((x) + 0x80000000)
 #endif
 
Index: kernel/arch/ppc32/src/cpu/cpu.c
===================================================================
--- kernel/arch/ppc32/src/cpu/cpu.c	(revision 53ad43cce05b0004bca31a7c5d6822fc33686cf1)
+++ kernel/arch/ppc32/src/cpu/cpu.c	(revision 3f932a7eeaf8b09420c71c95d09792b4ef55221a)
@@ -72,5 +72,5 @@
 	}
 
-	printf("cpu%u: version=%" PRIu16" (%s), revision=%" PRIu16 "\n", cpu->id,
+	printf("cpu%u: version=%" PRIu16 " (%s), revision=%" PRIu16 "\n", cpu->id,
 	    cpu->arch.version, name, cpu->arch.revision);
 }
Index: kernel/arch/ppc32/src/interrupt.c
===================================================================
--- kernel/arch/ppc32/src/interrupt.c	(revision 53ad43cce05b0004bca31a7c5d6822fc33686cf1)
+++ kernel/arch/ppc32/src/interrupt.c	(revision 3f932a7eeaf8b09420c71c95d09792b4ef55221a)
@@ -57,6 +57,6 @@
 {
 	asm volatile (
-		"mtdec %[dec]\n"
-		:: [dec] "r" (decrementer_value)
+	    "mtdec %[dec]\n"
+	    :: [dec] "r" (decrementer_value)
 	);
 }
Index: kernel/arch/ppc32/src/mm/tlb.c
===================================================================
--- kernel/arch/ppc32/src/mm/tlb.c	(revision 53ad43cce05b0004bca31a7c5d6822fc33686cf1)
+++ kernel/arch/ppc32/src/mm/tlb.c	(revision 3f932a7eeaf8b09420c71c95d09792b4ef55221a)
@@ -44,10 +44,10 @@
 
 	asm volatile (
-		"mfspr %[tlbmiss], 980\n"
-		"mfspr %[ptehi], 981\n"
-		"mfspr %[ptelo], 982\n"
-		: [tlbmiss] "=r" (tlbmiss),
-		  [ptehi] "=r" (ptehi),
-		  [ptelo] "=r" (ptelo)
+	    "mfspr %[tlbmiss], 980\n"
+	    "mfspr %[ptehi], 981\n"
+	    "mfspr %[ptelo], 982\n"
+	    : [tlbmiss] "=r" (tlbmiss),
+	      [ptehi] "=r" (ptehi),
+	      [ptelo] "=r" (ptelo)
 	);
 
@@ -64,11 +64,11 @@
 	uint32_t index = 0;
 	asm volatile (
-		"mtspr 981, %[ptehi]\n"
-		"mtspr 982, %[ptelo]\n"
-		"tlbld %[index]\n"
-		"tlbli %[index]\n"
-		: [index] "=r" (index)
-		: [ptehi] "r" (ptehi),
-		  [ptelo] "r" (ptelo)
+	    "mtspr 981, %[ptehi]\n"
+	    "mtspr 982, %[ptelo]\n"
+	    "tlbld %[index]\n"
+	    "tlbli %[index]\n"
+	    : [index] "=r" (index)
+	    : [ptehi] "r" (ptehi),
+	      [ptelo] "r" (ptelo)
 	);
 }
@@ -82,18 +82,18 @@
 {
 	asm volatile (
-		"sync\n"
+	    "sync\n"
 	);
 
 	for (unsigned int i = 0; i < 0x00040000; i += 0x00001000) {
 		asm volatile (
-			"tlbie %[i]\n"
-			:: [i] "r" (i)
+		    "tlbie %[i]\n"
+		    :: [i] "r" (i)
 		);
 	}
 
 	asm volatile (
-		"eieio\n"
-		"tlbsync\n"
-		"sync\n"
+	    "eieio\n"
+	    "tlbsync\n"
+	    "sync\n"
 	);
 }
Index: kernel/arch/ppc32/src/proc/scheduler.c
===================================================================
--- kernel/arch/ppc32/src/proc/scheduler.c	(revision 53ad43cce05b0004bca31a7c5d6822fc33686cf1)
+++ kernel/arch/ppc32/src/proc/scheduler.c	(revision 3f932a7eeaf8b09420c71c95d09792b4ef55221a)
@@ -54,6 +54,6 @@
 
 	asm volatile (
-		"mtsprg0 %[ksp]\n"
-		:: [ksp] "r" (KA2PA(&THREAD->kstack[STACK_SIZE]))
+	    "mtsprg0 %[ksp]\n"
+	    :: [ksp] "r" (KA2PA(&THREAD->kstack[STACK_SIZE]))
 	);
 }