Index: kernel/arch/amd64/include/mm/page.h =================================================================== --- kernel/arch/amd64/include/mm/page.h (revision 3da11f37e6b8b0d64576fbe67ae8bf361a41793d) +++ kernel/arch/amd64/include/mm/page.h (revision 3f35634cf8784398faec3ed02b32b4a4ffe2033a) @@ -177,4 +177,22 @@ #define PFERR_CODE_ID (1 << 4) +/** Page Table Entry. */ +typedef struct { + unsigned present : 1; + unsigned writeable : 1; + unsigned uaccessible : 1; + unsigned page_write_through : 1; + unsigned page_cache_disable : 1; + unsigned accessed : 1; + unsigned dirty : 1; + unsigned unused: 1; + unsigned global : 1; + unsigned soft_valid : 1; /**< Valid content even if present bit is cleared. */ + unsigned avl : 2; + unsigned addr_12_31 : 30; + unsigned addr_32_51 : 21; + unsigned no_execute : 1; +} __attribute__ ((packed)) pte_t; + static inline unsigned int get_pt_flags(pte_t *pt, size_t i) { Index: kernel/arch/amd64/include/types.h =================================================================== --- kernel/arch/amd64/include/types.h (revision 3da11f37e6b8b0d64576fbe67ae8bf361a41793d) +++ kernel/arch/amd64/include/types.h (revision 3f35634cf8784398faec3ed02b32b4a4ffe2033a) @@ -82,22 +82,4 @@ #define PRIxn "llx" -/** Page Table Entry. */ -typedef struct { - unsigned present : 1; - unsigned writeable : 1; - unsigned uaccessible : 1; - unsigned page_write_through : 1; - unsigned page_cache_disable : 1; - unsigned accessed : 1; - unsigned dirty : 1; - unsigned unused: 1; - unsigned global : 1; - unsigned soft_valid : 1; /**< Valid content even if present bit is cleared. */ - unsigned avl : 2; - unsigned addr_12_31 : 30; - unsigned addr_32_51 : 21; - unsigned no_execute : 1; -} __attribute__ ((packed)) pte_t; - #endif Index: kernel/arch/arm32/include/mm/page.h =================================================================== --- kernel/arch/arm32/include/mm/page.h (revision 3da11f37e6b8b0d64576fbe67ae8bf361a41793d) +++ kernel/arch/arm32/include/mm/page.h (revision 3f35634cf8784398faec3ed02b32b4a4ffe2033a) @@ -75,5 +75,5 @@ /* Get PTE address accessors for each level. */ #define GET_PTL1_ADDRESS_ARCH(ptl0, i) \ - ((pte_t *) ((((pte_level0_t *)(ptl0))[(i)]).coarse_table_addr << 10)) + ((pte_t *) ((((pte_t *)(ptl0))[(i)].l0).coarse_table_addr << 10)) #define GET_PTL2_ADDRESS_ARCH(ptl1, i) \ (ptl1) @@ -81,19 +81,19 @@ (ptl2) #define GET_FRAME_ADDRESS_ARCH(ptl3, i) \ - ((uintptr_t) ((((pte_level1_t *)(ptl3))[(i)]).frame_base_addr << 12)) + ((uintptr_t) ((((pte_t *)(ptl3))[(i)].l1).frame_base_addr << 12)) /* Set PTE address accessors for each level. */ #define SET_PTL0_ADDRESS_ARCH(ptl0) \ - (set_ptl0_addr((pte_level0_t *) (ptl0))) + (set_ptl0_addr((pte_t *) (ptl0))) #define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) \ - (((pte_level0_t *) (ptl0))[(i)].coarse_table_addr = (a) >> 10) + (((pte_t *) (ptl0))[(i)].l0.coarse_table_addr = (a) >> 10) #define SET_PTL2_ADDRESS_ARCH(ptl1, i, a) #define SET_PTL3_ADDRESS_ARCH(ptl2, i, a) #define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) \ - (((pte_level1_t *) (ptl3))[(i)].frame_base_addr = (a) >> 12) + (((pte_t *) (ptl3))[(i)].l1.frame_base_addr = (a) >> 12) /* Get PTE flags accessors for each level. */ #define GET_PTL1_FLAGS_ARCH(ptl0, i) \ - get_pt_level0_flags((pte_level0_t *) (ptl0), (size_t) (i)) + get_pt_level0_flags((pte_t *) (ptl0), (size_t) (i)) #define GET_PTL2_FLAGS_ARCH(ptl1, i) \ PAGE_PRESENT @@ -101,13 +101,13 @@ PAGE_PRESENT #define GET_FRAME_FLAGS_ARCH(ptl3, i) \ - get_pt_level1_flags((pte_level1_t *) (ptl3), (size_t) (i)) + get_pt_level1_flags((pte_t *) (ptl3), (size_t) (i)) /* Set PTE flags accessors for each level. */ #define SET_PTL1_FLAGS_ARCH(ptl0, i, x) \ - set_pt_level0_flags((pte_level0_t *) (ptl0), (size_t) (i), (x)) + set_pt_level0_flags((pte_t *) (ptl0), (size_t) (i), (x)) #define SET_PTL2_FLAGS_ARCH(ptl1, i, x) #define SET_PTL3_FLAGS_ARCH(ptl2, i, x) #define SET_FRAME_FLAGS_ARCH(ptl3, i, x) \ - set_pt_level1_flags((pte_level1_t *) (ptl3), (size_t) (i), (x)) + set_pt_level1_flags((pte_t *) (ptl3), (size_t) (i), (x)) /* Macros for querying the last-level PTE entries. */ @@ -115,10 +115,9 @@ (*((uint32_t *) (pte)) != 0) #define PTE_PRESENT_ARCH(pte) \ - (((pte_level0_t *) (pte))->descriptor_type != 0) + (((pte_t *) (pte))->l0.descriptor_type != 0) #define PTE_GET_FRAME_ARCH(pte) \ - (((pte_level1_t *) (pte))->frame_base_addr << FRAME_WIDTH) + (((pte_t *) (pte))->l1.frame_base_addr << FRAME_WIDTH) #define PTE_WRITABLE_ARCH(pte) \ - (((pte_level1_t *) (pte))->access_permission_0 == \ - PTE_AP_USER_RW_KERNEL_RW) + (((pte_t *) (pte))->l1.access_permission_0 == PTE_AP_USER_RW_KERNEL_RW) #define PTE_EXECUTABLE_ARCH(pte) \ 1 @@ -159,4 +158,8 @@ } ATTRIBUTE_PACKED pte_level1_t; +typedef union { + pte_level0_t l0; + pte_level1_t l1; +} pte_t; /* Level 1 page tables access permissions */ @@ -191,5 +194,5 @@ * @param pt Pointer to the page table to set. */ -static inline void set_ptl0_addr(pte_level0_t *pt) +static inline void set_ptl0_addr(pte_t *pt) { asm volatile ( @@ -205,7 +208,7 @@ * @param i Index of the entry to return. */ -static inline int get_pt_level0_flags(pte_level0_t *pt, size_t i) -{ - pte_level0_t *p = &pt[i]; +static inline int get_pt_level0_flags(pte_t *pt, size_t i) +{ + pte_level0_t *p = &pt[i].l0; int np = (p->descriptor_type == PTE_DESCRIPTOR_NOT_PRESENT); @@ -220,7 +223,7 @@ * @param i Index of the entry to return. */ -static inline int get_pt_level1_flags(pte_level1_t *pt, size_t i) -{ - pte_level1_t *p = &pt[i]; +static inline int get_pt_level1_flags(pte_t *pt, size_t i) +{ + pte_level1_t *p = &pt[i].l1; int dt = p->descriptor_type; @@ -245,7 +248,7 @@ * @param flags new flags */ -static inline void set_pt_level0_flags(pte_level0_t *pt, size_t i, int flags) -{ - pte_level0_t *p = &pt[i]; +static inline void set_pt_level0_flags(pte_t *pt, size_t i, int flags) +{ + pte_level0_t *p = &pt[i].l0; if (flags & PAGE_NOT_PRESENT) { @@ -273,7 +276,7 @@ * @param flags New flags. */ -static inline void set_pt_level1_flags(pte_level1_t *pt, size_t i, int flags) -{ - pte_level1_t *p = &pt[i]; +static inline void set_pt_level1_flags(pte_t *pt, size_t i, int flags) +{ + pte_level1_t *p = &pt[i].l1; if (flags & PAGE_NOT_PRESENT) { Index: kernel/arch/arm32/include/types.h =================================================================== --- kernel/arch/arm32/include/types.h (revision 3da11f37e6b8b0d64576fbe67ae8bf361a41793d) +++ kernel/arch/arm32/include/types.h (revision 3f35634cf8784398faec3ed02b32b4a4ffe2033a) @@ -87,13 +87,4 @@ #define PRIxn "x" /**< Format for hexadecimal (u)native_t. */ -/** Page table entry. - * - * We have different structs for level 0 and level 1 page table entries. - * See page.h for definition of pte_level*_t. - */ -typedef struct { - unsigned dummy : 32; -} pte_t; - #endif Index: kernel/arch/ia32/include/mm/page.h =================================================================== --- kernel/arch/ia32/include/mm/page.h (revision 3da11f37e6b8b0d64576fbe67ae8bf361a41793d) +++ kernel/arch/ia32/include/mm/page.h (revision 3f35634cf8784398faec3ed02b32b4a4ffe2033a) @@ -146,4 +146,20 @@ #define PFERR_CODE_RSVD (1 << 3) +/** Page Table Entry. */ +typedef struct { + unsigned present : 1; + unsigned writeable : 1; + unsigned uaccessible : 1; + unsigned page_write_through : 1; + unsigned page_cache_disable : 1; + unsigned accessed : 1; + unsigned dirty : 1; + unsigned pat : 1; + unsigned global : 1; + unsigned soft_valid : 1; /**< Valid content even if the present bit is not set. */ + unsigned avl : 2; + unsigned frame_address : 20; +} __attribute__ ((packed)) pte_t; + static inline unsigned int get_pt_flags(pte_t *pt, size_t i) { Index: kernel/arch/ia32/include/types.h =================================================================== --- kernel/arch/ia32/include/types.h (revision 3da11f37e6b8b0d64576fbe67ae8bf361a41793d) +++ kernel/arch/ia32/include/types.h (revision 3f35634cf8784398faec3ed02b32b4a4ffe2033a) @@ -80,20 +80,4 @@ #define PRIxn "x" /**< Format for hexadecimal (u)native_t. */ -/** Page Table Entry. */ -typedef struct { - unsigned present : 1; - unsigned writeable : 1; - unsigned uaccessible : 1; - unsigned page_write_through : 1; - unsigned page_cache_disable : 1; - unsigned accessed : 1; - unsigned dirty : 1; - unsigned pat : 1; - unsigned global : 1; - unsigned soft_valid : 1; /**< Valid content even if the present bit is not set. */ - unsigned avl : 2; - unsigned frame_address : 20; -} __attribute__ ((packed)) pte_t; - #endif Index: kernel/arch/mips32/include/mm/page.h =================================================================== --- kernel/arch/mips32/include/mm/page.h (revision 3da11f37e6b8b0d64576fbe67ae8bf361a41793d) +++ kernel/arch/mips32/include/mm/page.h (revision 3f35634cf8784398faec3ed02b32b4a4ffe2033a) @@ -141,4 +141,18 @@ #include +/** Page Table Entry. */ +typedef struct { + unsigned g : 1; /**< Global bit. */ + unsigned p : 1; /**< Present bit. */ + unsigned d : 1; /**< Dirty bit. */ + unsigned cacheable : 1; /**< Cacheable bit. */ + unsigned : 1; /**< Unused. */ + unsigned soft_valid : 1; /**< Valid content even if not present. */ + unsigned pfn : 24; /**< Physical frame number. */ + unsigned w : 1; /**< Page writable bit. */ + unsigned a : 1; /**< Accessed bit. */ +} pte_t; + + static inline unsigned int get_pt_flags(pte_t *pt, size_t i) { Index: kernel/arch/mips32/include/types.h =================================================================== --- kernel/arch/mips32/include/types.h (revision 3da11f37e6b8b0d64576fbe67ae8bf361a41793d) +++ kernel/arch/mips32/include/types.h (revision 3f35634cf8784398faec3ed02b32b4a4ffe2033a) @@ -80,17 +80,4 @@ #define PRIxn "x" /**< Format for hexadecimal (u)native_t. */ -/** Page Table Entry. */ -typedef struct { - unsigned g : 1; /**< Global bit. */ - unsigned p : 1; /**< Present bit. */ - unsigned d : 1; /**< Dirty bit. */ - unsigned cacheable : 1; /**< Cacheable bit. */ - unsigned : 1; /**< Unused. */ - unsigned soft_valid : 1; /**< Valid content even if not present. */ - unsigned pfn : 24; /**< Physical frame number. */ - unsigned w : 1; /**< Page writable bit. */ - unsigned a : 1; /**< Accessed bit. */ -} pte_t; - #endif Index: kernel/arch/ppc32/include/mm/page.h =================================================================== --- kernel/arch/ppc32/include/mm/page.h (revision 3da11f37e6b8b0d64576fbe67ae8bf361a41793d) +++ kernel/arch/ppc32/include/mm/page.h (revision 3f35634cf8784398faec3ed02b32b4a4ffe2033a) @@ -131,4 +131,15 @@ #include +/** Page Table Entry. */ +typedef struct { + unsigned present : 1; /**< Present bit. */ + unsigned page_write_through : 1; /**< Write thought caching. */ + unsigned page_cache_disable : 1; /**< No caching. */ + unsigned accessed : 1; /**< Accessed bit. */ + unsigned global : 1; /**< Global bit. */ + unsigned valid : 1; /**< Valid content even if not present. */ + unsigned pfn : 20; /**< Physical frame number. */ +} pte_t; + static inline unsigned int get_pt_flags(pte_t *pt, size_t i) { Index: kernel/arch/ppc32/include/types.h =================================================================== --- kernel/arch/ppc32/include/types.h (revision 3da11f37e6b8b0d64576fbe67ae8bf361a41793d) +++ kernel/arch/ppc32/include/types.h (revision 3f35634cf8784398faec3ed02b32b4a4ffe2033a) @@ -82,15 +82,4 @@ #define PRIxn "x" -/** Page Table Entry. */ -typedef struct { - unsigned present : 1; /**< Present bit. */ - unsigned page_write_through : 1; /**< Write thought caching. */ - unsigned page_cache_disable : 1; /**< No caching. */ - unsigned accessed : 1; /**< Accessed bit. */ - unsigned global : 1; /**< Global bit. */ - unsigned valid : 1; /**< Valid content even if not present. */ - unsigned pfn : 20; /**< Physical frame number. */ -} pte_t; - #endif