Index: uspace/drv/bus/usb/xhci/commands.c
===================================================================
--- uspace/drv/bus/usb/xhci/commands.c	(revision 17d34a8b81bc9c950a6fc924c5234554ce79ce7b)
+++ uspace/drv/bus/usb/xhci/commands.c	(revision 3e6ff9a5d49f640854fbd4c5b5c21e928a71bc1d)
@@ -242,7 +242,5 @@
 	cr_set_state(cr, XHCI_CR_STATE_CLOSED);
 
-	/* Some systems, inc. QEMU, need whole 64-bit qword to be written */
 	XHCI_REG_SET(hc->op_regs, XHCI_OP_CS, 1);
-	XHCI_REG_SET(hc->op_regs, XHCI_OP_CRCR_HI, 0);
 
 	while (XHCI_REG_RD(hc->op_regs, XHCI_OP_CRR))
@@ -283,7 +281,5 @@
 static void abort_command_ring(xhci_hc_t *hc)
 {
-	/* Some systems, inc. QEMU, need whole 64-bit qword to be written */
 	XHCI_REG_SET(hc->op_regs, XHCI_OP_CA, 1);
-	XHCI_REG_SET(hc->op_regs, XHCI_OP_CRCR_HI, 0);
 }
 
Index: uspace/drv/bus/usb/xhci/debug.c
===================================================================
--- uspace/drv/bus/usb/xhci/debug.c	(revision 17d34a8b81bc9c950a6fc924c5234554ce79ce7b)
+++ uspace/drv/bus/usb/xhci/debug.c	(revision 3e6ff9a5d49f640854fbd4c5b5c21e928a71bc1d)
@@ -176,8 +176,6 @@
 	DUMP_REG(hc->op_regs, XHCI_OP_CA);
 	DUMP_REG(hc->op_regs, XHCI_OP_CRR);
-	DUMP_REG(hc->op_regs, XHCI_OP_CRCR_LO);
-	DUMP_REG(hc->op_regs, XHCI_OP_CRCR_HI);
-	DUMP_REG(hc->op_regs, XHCI_OP_DCBAAP_LO);
-	DUMP_REG(hc->op_regs, XHCI_OP_DCBAAP_HI);
+	DUMP_REG(hc->op_regs, XHCI_OP_CRCR);
+	DUMP_REG(hc->op_regs, XHCI_OP_DCBAAP);
 	DUMP_REG(hc->rt_regs, XHCI_RT_MFINDEX);
 
@@ -188,8 +186,6 @@
 	DUMP_REG(&hc->rt_regs->ir[0], XHCI_INTR_IMC);
 	DUMP_REG(&hc->rt_regs->ir[0], XHCI_INTR_ERSTSZ);
-	DUMP_REG(&hc->rt_regs->ir[0], XHCI_INTR_ERSTBA_LO);
-	DUMP_REG(&hc->rt_regs->ir[0], XHCI_INTR_ERSTBA_HI);
-	DUMP_REG(&hc->rt_regs->ir[0], XHCI_INTR_ERDP_LO);
-	DUMP_REG(&hc->rt_regs->ir[0], XHCI_INTR_ERDP_HI);
+	DUMP_REG(&hc->rt_regs->ir[0], XHCI_INTR_ERSTBA);
+	DUMP_REG(&hc->rt_regs->ir[0], XHCI_INTR_ERDP);
 }
 
Index: uspace/drv/bus/usb/xhci/hc.c
===================================================================
--- uspace/drv/bus/usb/xhci/hc.c	(revision 17d34a8b81bc9c950a6fc924c5234554ce79ce7b)
+++ uspace/drv/bus/usb/xhci/hc.c	(revision 3e6ff9a5d49f640854fbd4c5b5c21e928a71bc1d)
@@ -477,12 +477,10 @@
 
 	uint64_t dcbaaptr = hc->dcbaa_dma.phys;
-	XHCI_REG_WR(hc->op_regs, XHCI_OP_DCBAAP_LO, LOWER32(dcbaaptr));
-	XHCI_REG_WR(hc->op_regs, XHCI_OP_DCBAAP_HI, UPPER32(dcbaaptr));
+	XHCI_REG_WR(hc->op_regs, XHCI_OP_DCBAAP, dcbaaptr);
 	XHCI_REG_WR(hc->op_regs, XHCI_OP_MAX_SLOTS_EN, hc->max_slots);
 
 	uintptr_t crcr;
 	xhci_trb_ring_reset_dequeue_state(&hc->cr.trb_ring, &crcr);
-	XHCI_REG_WR(hc->op_regs, XHCI_OP_CRCR_LO, LOWER32(crcr));
-	XHCI_REG_WR(hc->op_regs, XHCI_OP_CRCR_HI, UPPER32(crcr));
+	XHCI_REG_WR(hc->op_regs, XHCI_OP_CRCR, crcr);
 
 	XHCI_REG_SET(hc->op_regs, XHCI_OP_EWE, 1);
@@ -492,10 +490,6 @@
 	xhci_interrupter_regs_t *intr0 = &hc->rt_regs->ir[0];
 	XHCI_REG_WR(intr0, XHCI_INTR_ERSTSZ, hc->event_ring.segment_count);
-	uint64_t erdp = hc->event_ring.dequeue_ptr;
-	XHCI_REG_WR(intr0, XHCI_INTR_ERDP_LO, LOWER32(erdp));
-	XHCI_REG_WR(intr0, XHCI_INTR_ERDP_HI, UPPER32(erdp));
-	uint64_t erstptr = hc->event_ring.erst.phys;
-	XHCI_REG_WR(intr0, XHCI_INTR_ERSTBA_LO, LOWER32(erstptr));
-	XHCI_REG_WR(intr0, XHCI_INTR_ERSTBA_HI, UPPER32(erstptr));
+	XHCI_REG_WR(intr0, XHCI_INTR_ERDP, hc->event_ring.dequeue_ptr);
+	XHCI_REG_WR(intr0, XHCI_INTR_ERSTBA, hc->event_ring.erst.phys);
 
 	if (hc->base.irq_cap > 0) {
@@ -670,7 +664,5 @@
 		}
 
-		uint64_t erdp = hc->event_ring.dequeue_ptr;
-		XHCI_REG_WR(intr, XHCI_INTR_ERDP_LO, LOWER32(erdp));
-		XHCI_REG_WR(intr, XHCI_INTR_ERDP_HI, UPPER32(erdp));
+		XHCI_REG_WR(intr, XHCI_INTR_ERDP, hc->event_ring.dequeue_ptr);
 	}
 
@@ -679,6 +671,5 @@
 	uint64_t erdp = hc->event_ring.dequeue_ptr;
 	erdp |= XHCI_REG_MASK(XHCI_INTR_ERDP_EHB);
-	XHCI_REG_WR(intr, XHCI_INTR_ERDP_LO, LOWER32(erdp));
-	XHCI_REG_WR(intr, XHCI_INTR_ERDP_HI, UPPER32(erdp));
+	XHCI_REG_WR(intr, XHCI_INTR_ERDP, erdp);
 
 	usb_log_debug2("Event ring run finished.");
Index: uspace/drv/bus/usb/xhci/hw_struct/regs.h
===================================================================
--- uspace/drv/bus/usb/xhci/hw_struct/regs.h	(revision 17d34a8b81bc9c950a6fc924c5234554ce79ce7b)
+++ uspace/drv/bus/usb/xhci/hw_struct/regs.h	(revision 3e6ff9a5d49f640854fbd4c5b5c21e928a71bc1d)
@@ -371,11 +371,9 @@
 	 * 64:6 - Command Ring Pointer
 	 */
-	ioport32_t crcr_lo;
-	ioport32_t crcr_hi;
+	ioport64_t crcr;
 
 	PADD32[4];
 
-	ioport32_t dcbaap_lo;
-	ioport32_t dcbaap_hi;
+	ioport64_t dcbaap;
 
 	/*
@@ -416,16 +414,14 @@
 #define XHCI_OP_PAGESIZE      pagesize, 32, FIELD
 #define XHCI_OP_NOTIFICATION    dnctrl, 32, RANGE, 15, 0
-#define XHCI_OP_RCS            crcr_lo, 32,  FLAG, 0
-#define XHCI_OP_CS             crcr_lo, 32,  FLAG, 1
-#define XHCI_OP_CA             crcr_lo, 32,  FLAG, 2
-#define XHCI_OP_CRR            crcr_lo, 32,  FLAG, 3
+#define XHCI_OP_RCS               crcr, 64,  FLAG, 0
+#define XHCI_OP_CS                crcr, 64,  FLAG, 1
+#define XHCI_OP_CA                crcr, 64,  FLAG, 2
+#define XHCI_OP_CRR               crcr, 64,  FLAG, 3
 /*
  * This shall be RANGE, 6, 0, but the value containing CR pointer and RCS flag
  * must be written at once.
  */
-#define XHCI_OP_CRCR_LO        crcr_lo, 32, FIELD
-#define XHCI_OP_CRCR_HI        crcr_hi, 32, FIELD
-#define XHCI_OP_DCBAAP_LO    dcbaap_lo, 32, FIELD
-#define XHCI_OP_DCBAAP_HI    dcbaap_hi, 32, FIELD
+#define XHCI_OP_CRCR              crcr, 64, FIELD
+#define XHCI_OP_DCBAAP          dcbaap, 64, FIELD
 #define XHCI_OP_MAX_SLOTS_EN    config, 32, RANGE, 7, 0
 #define XHCI_OP_U3E             config, 32,  FLAG, 8
@@ -458,6 +454,5 @@
 	PADD32;
 
-	ioport32_t erstba_lo;
-	ioport32_t erstba_hi;
+	ioport64_t erstba;
 
 	/*
@@ -466,6 +461,5 @@
 	 * 63:4 - Event Ring Dequeue Pointer
 	 */
-	ioport32_t erdp_lo;
-	ioport32_t erdp_hi;
+	ioport64_t erdp;
 } xhci_interrupter_regs_t;
 
@@ -475,10 +469,8 @@
 #define XHCI_INTR_IMC             imod, 32, RANGE, 31, 16
 #define XHCI_INTR_ERSTSZ        erstsz, 32, FIELD
-#define XHCI_INTR_ERSTBA_LO  erstba_lo, 32, FIELD
-#define XHCI_INTR_ERSTBA_HI  erstba_hi, 32, FIELD
-#define XHCI_INTR_ERDP_ESI     erdp_lo, 32, RANGE,  2, 0
-#define XHCI_INTR_ERDP_EHB     erdp_lo, 32,  FLAG,  3
-#define XHCI_INTR_ERDP_LO      erdp_lo, 32, FIELD
-#define XHCI_INTR_ERDP_HI      erdp_hi, 32, FIELD
+#define XHCI_INTR_ERSTBA        erstba, 64, FIELD
+#define XHCI_INTR_ERDP_ESI        erdp, 64, RANGE,  2, 0
+#define XHCI_INTR_ERDP_EHB        erdp, 64,  FLAG,  3
+#define XHCI_INTR_ERDP            erdp, 64, FIELD
 
 /**
