Index: kernel/arch/mips32/Makefile.inc
===================================================================
--- kernel/arch/mips32/Makefile.inc	(revision 53c8d12b7aeb262a2ee3fa75123776f8514862d5)
+++ kernel/arch/mips32/Makefile.inc	(revision 3dcc9d88e46814c79f55fc649b2f849dd2d0dc95)
@@ -86,2 +86,5 @@
 endif
 
+ARCH_AUTOGENS_AG = \
+	arch/$(KARCH)/include/arch/istate_struct.ag
+
Index: kernel/arch/mips32/include/arch/istate.h
===================================================================
--- kernel/arch/mips32/include/arch/istate.h	(revision 53c8d12b7aeb262a2ee3fa75123776f8514862d5)
+++ kernel/arch/mips32/include/arch/istate.h	(revision 3dcc9d88e46814c79f55fc649b2f849dd2d0dc95)
@@ -41,56 +41,12 @@
 
 #include <arch/cp0.h>
+#include <arch/istate_struct.h>
 
 #else /* KERNEL */
 
 #include <libarch/cp0.h>
+#include <libarch/istate_struct.h>
 
 #endif /* KERNEL */
-
-typedef struct istate {
-	/*
-	 * The first seven registers are arranged so that the istate structure
-	 * can be used both for exception handlers and for the syscall handler.
-	 */
-	uint32_t a0;	/* arg1 */
-	uint32_t a1;	/* arg2 */
-	uint32_t a2;	/* arg3 */
-	uint32_t a3;	/* arg4 */
-	uint32_t t0;	/* arg5 */
-	uint32_t t1;	/* arg6 */
-	uint32_t v0;	/* arg7 */
-	uint32_t v1;
-	uint32_t at;
-	uint32_t t2;
-	uint32_t t3;
-	uint32_t t4;
-	uint32_t t5;
-	uint32_t t6;
-	uint32_t t7;
-	uint32_t s0;
-	uint32_t s1;
-	uint32_t s2;
-	uint32_t s3;
-	uint32_t s4;
-	uint32_t s5;
-	uint32_t s6;
-	uint32_t s7;
-	uint32_t t8;
-	uint32_t t9;
-	uint32_t kt0;
-	uint32_t kt1;	/* We use it as thread-local pointer */
-	uint32_t gp;
-	uint32_t sp;
-	uint32_t s8;
-	uint32_t ra;
-	
-	uint32_t lo;
-	uint32_t hi;
-	
-	uint32_t status;	/* cp0_status */
-	uint32_t epc;		/* cp0_epc */
-
-	uint32_t alignment;	/* to make sizeof(istate_t) a multiple of 8 */
-} istate_t;
 
 NO_TRACE static inline void istate_set_retaddr(istate_t *istate,
Index: kernel/arch/mips32/include/arch/istate_struct.ag
===================================================================
--- kernel/arch/mips32/include/arch/istate_struct.ag	(revision 3dcc9d88e46814c79f55fc649b2f849dd2d0dc95)
+++ kernel/arch/mips32/include/arch/istate_struct.ag	(revision 3dcc9d88e46814c79f55fc649b2f849dd2d0dc95)
@@ -0,0 +1,207 @@
+# Copyright (c) 2014 Jakub Jermar 
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+
+{
+        name : istate,
+
+        includes : [
+                {
+                        guard : KERNEL,
+                        include : <typedefs.h>
+                },
+                {
+                        negative-guard : KERNEL,
+                        include : <sys/types.h>
+                }
+        ],
+
+        members : [
+                #
+                # The first seven registers are arranged so that the istate structure
+                # can be used both for exception handlers and for the syscall handler.
+                #
+                {
+                        # arg1
+                        name : a0,
+                        type : uint32_t
+                },
+                {
+                        # arg2
+                        name : a1,
+                        type : uint32_t
+                },
+                {
+                        # arg3
+                        name : a2,
+                        type : uint32_t
+                },
+                {
+                        # arg4
+                        name : a3,
+                        type : uint32_t
+                },
+                {
+                        # arg5
+                        name : t0,
+                        type : uint32_t
+                },
+                {
+                        # arg6
+                        name : t1,
+                        type : uint32_t
+                },
+                {
+                        # arg7
+                        name : v0,
+                        type : uint32_t
+                },
+                {
+                        name : v1,
+                        type : uint32_t
+                },
+                {
+                        name : at,
+                        type : uint32_t
+                },
+                {
+                        name : t2,
+                        type : uint32_t
+                },
+                {
+                        name : t3,
+                        type : uint32_t
+                },
+                {
+                        name : t4,
+                        type : uint32_t
+                },
+                {
+                        name : t5,
+                        type : uint32_t
+                },
+                {
+                        name : t6,
+                        type : uint32_t
+                },
+                {
+                        name : t7,
+                        type : uint32_t
+                },
+                {
+                        name : s0,
+                        type : uint32_t
+                },
+                {
+                        name : s1,
+                        type : uint32_t
+                },
+                {
+                        name : s2,
+                        type : uint32_t
+                },
+                {
+                        name : s3,
+                        type : uint32_t
+                },
+                {
+                        name : s4,
+                        type : uint32_t
+                },
+                {
+                        name : s5,
+                        type : uint32_t
+                },
+                {
+                        name : s6,
+                        type : uint32_t
+                },
+                {
+                        name : s7,
+                        type : uint32_t
+                },
+                {
+                        name : t8,
+                        type : uint32_t
+                },
+                {
+                        name : t9,
+                        type : uint32_t
+                },
+                {
+                        name : kt0,
+                        type : uint32_t
+                },
+                {
+                        # We use it as thread-local pointer
+                        name : kt1,
+                        type : uint32_t
+                },
+                {
+                        name : gp,
+                        type : uint32_t
+                },
+                {
+                        name : sp,
+                        type : uint32_t
+                },
+                {
+                        name : s8,
+                        type : uint32_t
+                },
+                {
+                        name : ra,
+                        type : uint32_t
+                },
+
+                {
+                        name : lo,
+                        type : uint32_t
+                },
+                {
+                        name : hi,
+                        type : uint32_t
+                },
+
+                {
+                        # cp0_status
+                        name : status,
+                        type : uint32_t
+                },
+                {
+                        # cp0_epc
+                        name : epc,
+                        type : uint32_t
+                },
+
+                {
+                        # to make sizeof(istate_t) a multiple of 8 */
+                        name : alignment,
+                        type : uint32_t
+                }
+
+        ]
+}
Index: kernel/arch/mips32/src/start.S
===================================================================
--- kernel/arch/mips32/src/start.S	(revision 53c8d12b7aeb262a2ee3fa75123776f8514862d5)
+++ kernel/arch/mips32/src/start.S	(revision 3dcc9d88e46814c79f55fc649b2f849dd2d0dc95)
@@ -32,4 +32,5 @@
 #include <arch/context_offset.h>
 #include <arch/stack.h>
+#include <arch/istate_struct.h>
 
 .text
@@ -51,43 +52,4 @@
 #define REG_SAVE_MASK 0x1f
 
-#define ISTATE_OFFSET_A0	0
-#define ISTATE_OFFSET_A1	4
-#define ISTATE_OFFSET_A2	8
-#define ISTATE_OFFSET_A3	12
-#define ISTATE_OFFSET_T0	16
-#define ISTATE_OFFSET_T1	20
-#define ISTATE_OFFSET_V0	24
-#define ISTATE_OFFSET_V1	28
-#define ISTATE_OFFSET_AT	32
-#define ISTATE_OFFSET_T2	36
-#define ISTATE_OFFSET_T3	40
-#define ISTATE_OFFSET_T4	44
-#define ISTATE_OFFSET_T5	48
-#define ISTATE_OFFSET_T6	52
-#define ISTATE_OFFSET_T7	56
-#define ISTATE_OFFSET_S0	60
-#define ISTATE_OFFSET_S1	64
-#define ISTATE_OFFSET_S2	68
-#define ISTATE_OFFSET_S3	72
-#define ISTATE_OFFSET_S4	76
-#define ISTATE_OFFSET_S5	80
-#define ISTATE_OFFSET_S6	84
-#define ISTATE_OFFSET_S7	88
-#define ISTATE_OFFSET_T8	92
-#define ISTATE_OFFSET_T9	96
-#define ISTATE_OFFSET_KT0	100
-#define ISTATE_OFFSET_KT1	104
-#define ISTATE_OFFSET_GP	108
-#define ISTATE_OFFSET_SP	112
-#define ISTATE_OFFSET_S8	116
-#define ISTATE_OFFSET_RA	120
-#define ISTATE_OFFSET_LO	124
-#define ISTATE_OFFSET_HI	128
-#define ISTATE_OFFSET_STATUS	132
-#define ISTATE_OFFSET_EPC	136
-#define ISTATE_OFFSET_ALIGNMENT	140
-
-#define ISTATE_SOFT_SIZE	144
-
 /*
  * The fake ABI prologue is never executed and may not be part of the
@@ -97,5 +59,5 @@
  */
 .macro FAKE_ABI_PROLOGUE
-	sub $sp, ISTATE_SOFT_SIZE
+	sub $sp, ISTATE_SIZE
 	sw $ra, ISTATE_OFFSET_EPC($sp)
 .endm
@@ -265,5 +227,5 @@
 	KERNEL_STACK_TO_K0
 	
-	sub $k0, ISTATE_SOFT_SIZE
+	sub $k0, ISTATE_SIZE
 	sw $sp, ISTATE_OFFSET_SP($k0)
 	move $sp, $k0
@@ -355,5 +317,5 @@
 tlb_refill_handler:
 	KERNEL_STACK_TO_K0
-	sub $k0, ISTATE_SOFT_SIZE
+	sub $k0, ISTATE_SIZE
 	REGISTERS_STORE_AND_EXC_RESET $k0
 	sw $sp, ISTATE_OFFSET_SP($k0)
@@ -371,5 +333,5 @@
 cache_error_handler:
 	KERNEL_STACK_TO_K0
-	sub $k0, ISTATE_SOFT_SIZE
+	sub $k0, ISTATE_SIZE
 	REGISTERS_STORE_AND_EXC_RESET $k0
 	sw $sp, ISTATE_OFFSET_SP($k0)
