Changeset 3bacee1 in mainline for uspace/drv/bus/usb/uhci
- Timestamp:
- 2018-04-12T16:27:17Z (8 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 3cf22f9
- Parents:
- 76d0981d
- git-author:
- Jiri Svoboda <jiri@…> (2018-04-11 19:25:33)
- git-committer:
- Jiri Svoboda <jiri@…> (2018-04-12 16:27:17)
- Location:
- uspace/drv/bus/usb/uhci
- Files:
-
- 5 edited
-
hc.c (modified) (15 diffs)
-
hw_struct/transfer_descriptor.c (modified) (3 diffs)
-
hw_struct/transfer_descriptor.h (modified) (1 diff)
-
transfer_list.c (modified) (3 diffs)
-
uhci_rh.c (modified) (7 diffs)
Legend:
- Unmodified
- Added
- Removed
-
uspace/drv/bus/usb/uhci/hc.c
r76d0981d r3bacee1 142 142 memcpy(code->cmds, uhci_irq_commands, sizeof(uhci_irq_commands)); 143 143 uhci_regs_t *registers = (uhci_regs_t *) RNGABSPTR(regs); 144 code->cmds[0].addr = (void *)®isters->usbsts;145 code->cmds[3].addr = (void *)®isters->usbsts;144 code->cmds[0].addr = (void *)®isters->usbsts; 145 code->cmds[3].addr = (void *)®isters->usbsts; 146 146 147 147 usb_log_debug("I/O regs at %p (size %zu), IRQ %d.", … … 215 215 if (hw_res->io_ranges.count != 1 || 216 216 hw_res->io_ranges.ranges[0].size < sizeof(uhci_regs_t)) 217 return EINVAL;217 return EINVAL; 218 218 219 219 instance->hw_failures = 0; … … 224 224 if (ret != EOK) { 225 225 usb_log_error("Failed to gain access to registers: %s.", 226 str_error(ret));226 str_error(ret)); 227 227 return ret; 228 228 } … … 285 285 /* Reset hc, all states and counters. Hope that hw is not broken */ 286 286 pio_write_16(®isters->usbcmd, UHCI_CMD_HCRESET); 287 do { async_usleep(10); } 288 while ((pio_read_16(®isters->usbcmd) & UHCI_CMD_HCRESET) != 0); 287 do { 288 async_usleep(10); 289 } while ((pio_read_16(®isters->usbcmd) & UHCI_CMD_HCRESET) != 0); 289 290 290 291 /* Set frame to exactly 1ms */ … … 331 332 static errno_t endpoint_register(endpoint_t *ep) 332 333 { 333 hc_t * const hc = bus_to_hc(endpoint_get_bus(ep));334 hc_t *const hc = bus_to_hc(endpoint_get_bus(ep)); 334 335 335 336 const errno_t err = usb2_bus_endpoint_register(&hc->bus_helper, ep); … … 353 354 static void endpoint_unregister(endpoint_t *ep) 354 355 { 355 hc_t * const hc = bus_to_hc(endpoint_get_bus(ep));356 hc_t *const hc = bus_to_hc(endpoint_get_bus(ep)); 356 357 usb2_bus_endpoint_unregister(&hc->bus_helper, ep); 357 358 … … 390 391 } 391 392 392 uhci_transfer_batch_t * const batch =393 uhci_transfer_batch_get(ep->active_batch);393 uhci_transfer_batch_t *const batch = 394 uhci_transfer_batch_get(ep->active_batch); 394 395 395 396 /* Remove the batch from the schedule to stop it from being finished. */ … … 412 413 static int device_enumerate(device_t *dev) 413 414 { 414 hc_t * const hc = bus_to_hc(dev->bus);415 hc_t *const hc = bus_to_hc(dev->bus); 415 416 return usb2_bus_device_enumerate(&hc->bus_helper, dev); 416 417 } … … 418 419 static void device_gone(device_t *dev) 419 420 { 420 hc_t * const hc = bus_to_hc(dev->bus);421 hc_t *const hc = bus_to_hc(dev->bus); 421 422 usb2_bus_device_gone(&hc->bus_helper, dev); 422 423 } … … 482 483 /* Set all frames to point to the first queue head */ 483 484 const uint32_t queue = LINK_POINTER_QH( 484 addr_to_phys(instance->transfers_interrupt.queue_head));485 addr_to_phys(instance->transfers_interrupt.queue_head)); 485 486 486 487 for (unsigned i = 0; i < UHCI_FRAME_LIST_COUNT; ++i) { … … 524 525 /* Connect lists into one schedule */ 525 526 transfer_list_set_next(&instance->transfers_control_full, 526 &instance->transfers_bulk_full);527 &instance->transfers_bulk_full); 527 528 transfer_list_set_next(&instance->transfers_control_slow, 528 &instance->transfers_control_full);529 &instance->transfers_control_full); 529 530 transfer_list_set_next(&instance->transfers_interrupt, 530 &instance->transfers_control_slow);531 &instance->transfers_control_slow); 531 532 532 533 /*FSBR, This feature is not needed (adds no benefit) and is supposedly … … 539 540 /* Assign pointers to be used during scheduling */ 540 541 instance->transfers[USB_SPEED_FULL][USB_TRANSFER_INTERRUPT] = 541 &instance->transfers_interrupt;542 &instance->transfers_interrupt; 542 543 instance->transfers[USB_SPEED_LOW][USB_TRANSFER_INTERRUPT] = 543 &instance->transfers_interrupt;544 &instance->transfers_interrupt; 544 545 instance->transfers[USB_SPEED_FULL][USB_TRANSFER_CONTROL] = 545 &instance->transfers_control_full;546 &instance->transfers_control_full; 546 547 instance->transfers[USB_SPEED_LOW][USB_TRANSFER_CONTROL] = 547 &instance->transfers_control_slow;548 &instance->transfers_control_slow; 548 549 instance->transfers[USB_SPEED_FULL][USB_TRANSFER_BULK] = 549 &instance->transfers_bulk_full;550 &instance->transfers_bulk_full; 550 551 551 552 return EOK; … … 582 583 return uhci_rh_schedule(&hc->rh, batch); 583 584 584 transfer_list_t * const list =585 transfer_list_t *const list = 585 586 hc->transfers[ep->device->speed][ep->transfer_type]; 586 587 … … 629 630 int frnum = pio_read_16(&instance->registers->frnum) & 0x3ff; 630 631 631 uintptr_t expected_pa = instance->frame_list[frnum] 632 &LINK_POINTER_ADDRESS_MASK;632 uintptr_t expected_pa = instance->frame_list[frnum] & 633 LINK_POINTER_ADDRESS_MASK; 633 634 uintptr_t real_pa = addr_to_phys(QH(interrupt)); 634 635 if (expected_pa != real_pa) { … … 653 654 expected_pa = QH(control_full)->next & LINK_POINTER_ADDRESS_MASK; 654 655 real_pa = addr_to_phys(QH(bulk_full)); 655 if (expected_pa != real_pa ) {656 if (expected_pa != real_pa) { 656 657 usb_log_debug("Bulk QH: %p vs. %p.", 657 658 (void *) expected_pa, (void *) real_pa); -
uspace/drv/bus/usb/uhci/hw_struct/transfer_descriptor.c
r76d0981d r3bacee1 72 72 assert(instance); 73 73 assert(size < 1024); 74 assert((pid == USB_PID_SETUP) || (pid == USB_PID_IN) 75 ||(pid == USB_PID_OUT));74 assert((pid == USB_PID_SETUP) || (pid == USB_PID_IN) || 75 (pid == USB_PID_OUT)); 76 76 77 77 const uint32_t next_pa = addr_to_phys(next); 78 78 assert((next_pa & LINK_POINTER_ADDRESS_MASK) == next_pa); 79 79 80 instance->next = 0 81 | LINK_POINTER_VERTICAL_FLAG82 |(next_pa ? next_pa : LINK_POINTER_TERMINATE_FLAG);80 instance->next = 0 | 81 LINK_POINTER_VERTICAL_FLAG | 82 (next_pa ? next_pa : LINK_POINTER_TERMINATE_FLAG); 83 83 84 instance->status = 0 85 | ((err_count & TD_STATUS_ERROR_COUNT_MASK)86 << TD_STATUS_ERROR_COUNT_POS)87 | (low_speed ? TD_STATUS_LOW_SPEED_FLAG : 0)88 | (iso ? TD_STATUS_ISOCHRONOUS_FLAG : 0)89 |TD_STATUS_ERROR_ACTIVE;84 instance->status = 0 | 85 ((err_count & TD_STATUS_ERROR_COUNT_MASK) << 86 TD_STATUS_ERROR_COUNT_POS) | 87 (low_speed ? TD_STATUS_LOW_SPEED_FLAG : 0) | 88 (iso ? TD_STATUS_ISOCHRONOUS_FLAG : 0) | 89 TD_STATUS_ERROR_ACTIVE; 90 90 91 91 if (pid == USB_PID_IN && !iso) { … … 93 93 } 94 94 95 instance->device = 0 96 | (((size - 1) & TD_DEVICE_MAXLEN_MASK) << TD_DEVICE_MAXLEN_POS)97 | (toggle ? TD_DEVICE_DATA_TOGGLE_ONE_FLAG : 0)98 | ((target.address & TD_DEVICE_ADDRESS_MASK)99 << TD_DEVICE_ADDRESS_POS)100 | ((target.endpoint & TD_DEVICE_ENDPOINT_MASK)101 << TD_DEVICE_ENDPOINT_POS)102 |((pid & TD_DEVICE_PID_MASK) << TD_DEVICE_PID_POS);95 instance->device = 0 | 96 (((size - 1) & TD_DEVICE_MAXLEN_MASK) << TD_DEVICE_MAXLEN_POS) | 97 (toggle ? TD_DEVICE_DATA_TOGGLE_ONE_FLAG : 0) | 98 ((target.address & TD_DEVICE_ADDRESS_MASK) << 99 TD_DEVICE_ADDRESS_POS) | 100 ((target.endpoint & TD_DEVICE_ENDPOINT_MASK) << 101 TD_DEVICE_ENDPOINT_POS) | 102 ((pid & TD_DEVICE_PID_MASK) << TD_DEVICE_PID_POS); 103 103 104 104 instance->buffer_ptr = addr_to_phys(buffer); … … 175 175 (s & TD_STATUS_ERROR_BIT_STUFF) ? " BIT_STUFF," : "", 176 176 (s & TD_STATUS_ERROR_RESERVED) ? " RESERVED," : "", 177 td_act_size(instance) 178 ); 177 td_act_size(instance)); 179 178 } 180 179 /** -
uspace/drv/bus/usb/uhci/hw_struct/transfer_descriptor.h
r76d0981d r3bacee1 129 129 const size_t act_size = td_act_size(instance); 130 130 const size_t max_size = 131 ((instance->device >> TD_DEVICE_MAXLEN_POS) + 1) 132 &TD_DEVICE_MAXLEN_MASK;131 ((instance->device >> TD_DEVICE_MAXLEN_POS) + 1) & 132 TD_DEVICE_MAXLEN_MASK; 133 133 return 134 134 (instance->status | TD_STATUS_SPD_FLAG) && act_size < max_size; -
uspace/drv/bus/usb/uhci/transfer_list.c
r76d0981d r3bacee1 66 66 } 67 67 const uint32_t queue_head_pa = addr_to_phys(instance->queue_head); 68 usb_log_debug2("Transfer list %s setup with QH: %p (%#" PRIx32 " ).",68 usb_log_debug2("Transfer list %s setup with QH: %p (%#" PRIx32 " ).", 69 69 name, instance->queue_head, queue_head_pa); 70 70 … … 203 203 fibril_mutex_lock(&instance->guard); 204 204 while (!list_empty(&instance->batch_list)) { 205 link_t * const current = list_first(&instance->batch_list);205 link_t *const current = list_first(&instance->batch_list); 206 206 uhci_transfer_batch_t *batch = uhci_transfer_batch_from_link(current); 207 207 transfer_list_remove_batch(instance, batch); … … 240 240 qpos = "NOT FIRST"; 241 241 } 242 assert((prev_qh->next & LINK_POINTER_ADDRESS_MASK) 243 ==addr_to_phys(uhci_batch->qh));242 assert((prev_qh->next & LINK_POINTER_ADDRESS_MASK) == 243 addr_to_phys(uhci_batch->qh)); 244 244 prev_qh->next = uhci_batch->qh->next; 245 245 -
uspace/drv/bus/usb/uhci/uhci_rh.c
r76d0981d r3bacee1 107 107 do { 108 108 batch->error = virthub_base_request(&instance->base, batch->target, 109 batch->dir, (void *) batch->setup.buffer,109 batch->dir, (void *) batch->setup.buffer, 110 110 batch->dma_buffer.virt, batch->size, &batch->transferred_size); 111 111 if (batch->error == ENAK) … … 151 151 port_status &= ~STATUS_IN_RESET; 152 152 pio_write_16(port, port_status); 153 while ((port_status = pio_read_16(port)) & STATUS_IN_RESET); 153 while ((port_status = pio_read_16(port)) & STATUS_IN_RESET) 154 ; 154 155 /* PIO delay, should not be longer than 3ms as the device might 155 156 * enter suspend state. */ … … 201 202 202 203 const uint16_t value = pio_read_16(hub->ports[port]); 203 data[0] = ((value & STATUS_LINE_D_MINUS) ? 1 : 0) 204 |((value & STATUS_LINE_D_PLUS) ? 2 : 0);205 RH_DEBUG(hub, port, "Bus state %" PRIx8 "(source %" PRIx16 ")",204 data[0] = ((value & STATUS_LINE_D_MINUS) ? 1 : 0) | 205 ((value & STATUS_LINE_D_PLUS) ? 2 : 0); 206 RH_DEBUG(hub, port, "Bus state %" PRIx8 "(source %" PRIx16 ")", 206 207 data[0], value); 207 208 *act_size = 1; … … 246 247 UHCI2USB(val, STATUS_ENABLED_CHANGED, USB2_HUB_PORT_STATUS_C_ENABLE) | 247 248 // UHCI2USB(val, STATUS_SUSPEND, USB2_HUB_PORT_STATUS_C_SUSPEND) | 248 (hub->reset_changed[port] ? USB_HUB_PORT_STATUS_C_RESET : 0) 249 ); 249 (hub->reset_changed[port] ? USB_HUB_PORT_STATUS_C_RESET : 0)); 250 250 RH_DEBUG(hub, port, "Port status %" PRIx32 " (source %" PRIx16 251 251 "%s)", uint32_usb2host(status), val, … … 413 413 const uint8_t status = 414 414 ((((status_a & STATUS_CHANGE_BITS) != 0) || hub->reset_changed[0]) ? 415 0x2 : 0) |415 0x2 : 0) | 416 416 ((((status_b & STATUS_CHANGE_BITS) != 0) || hub->reset_changed[1]) ? 417 0x4 : 0);417 0x4 : 0); 418 418 if (status) 419 419 RH_DEBUG(hub, -1, "Event mask %" PRIx8 … … 421 421 " (status_b %" PRIx16 "%s)", status, 422 422 status_a, hub->reset_changed[0] ? "-reset" : "", 423 status_b, hub->reset_changed[1] ? "-reset" : "" );423 status_b, hub->reset_changed[1] ? "-reset" : ""); 424 424 ((uint8_t *)buffer)[0] = status; 425 425 *actual_size = 1; … … 496 496 497 497 static usbvirt_device_ops_t ops = { 498 .control = control_transfer_handlers,499 .data_in[HUB_STATUS_CHANGE_PIPE] = req_status_change_handler,498 .control = control_transfer_handlers, 499 .data_in[HUB_STATUS_CHANGE_PIPE] = req_status_change_handler, 500 500 };
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