Changeset 39cea6a in mainline for arch/amd64


Ignore:
Timestamp:
2006-04-13T17:38:03Z (20 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
e185136
Parents:
897ad60
Message:

Cleanup pm.c and pm.h code on ia32 and amd64.
Add before_task_runs() and before_task_runs_arch() for each architecture.
Add ia32 and amd64 code to ensure I/O Permission Bitmap update.

Location:
arch/amd64
Files:
4 edited

Legend:

Unmodified
Added
Removed

  • arch/amd64/include/pm.h

    r897ad60 r39cea6a  
    6767#define DPL_USER        (PL_USER<<5)
    6868
    69 #define IO_MAP_BASE     (104)
     69#define TSS_BASIC_SIZE  104
    7070
    7171#ifndef __ASM__
    … …  
    8383        unsigned base_24_31: 8;
    8484} __attribute__ ((packed));
     85typedef struct descriptor descriptor_t;
    8586
    8687struct tss_descriptor {
    … …  
    8990        unsigned base_16_23: 8;
    9091        unsigned type: 4;
    91         unsigned  : 1;
     92        unsigned : 1;
    9293        unsigned dpl : 2;
    9394        unsigned present : 1;
    … …  
    100101        unsigned  : 32;
    101102} __attribute__ ((packed));
     103typedef struct tss_descriptor tss_descriptor_t;
    102104
    103105struct idescriptor {
    … …  
    113115        unsigned  : 32;
    114116} __attribute__ ((packed));
     117typedef struct idescriptor idescriptor_t;
    115118
    116119struct ptr_16_64 {
    … …  
    118121        __u64 base;
    119122} __attribute__ ((packed));
     123typedef struct ptr_16_64 ptr_16_64_t;
    120124
    121125struct ptr_16_32 {
    … …  
    123127        __u32 base;
    124128} __attribute__ ((packed));
     129typedef struct ptr_16_32 ptr_16_32_t;
    125130
    126131struct tss {
    … …  
    142147        __u8 iomap[0x10000 + 1];        /* 64K + 1 terminating byte */
    143148} __attribute__ ((packed));
     149typedef struct tss tss_t;
    144150
    145 extern struct tss *tss_p;
     151extern tss_t *tss_p;
    146152
    147 extern struct descriptor gdt[];
    148 extern struct idescriptor idt[];
     153extern descriptor_t gdt[];
     154extern idescriptor_t idt[];
    149155
    150 extern struct ptr_16_64 gdtr;
    151 extern struct ptr_16_32 bootstrap_gdtr;
    152 extern struct ptr_16_32 protected_ap_gdtr;
     156extern ptr_16_64_t gdtr;
     157extern ptr_16_32_t bootstrap_gdtr;
     158extern ptr_16_32_t protected_ap_gdtr;
    153159
    154160extern void pm_init(void);
    155161
    156 extern void gdt_tss_setbase(struct descriptor *d, __address base);
    157 extern void gdt_tss_setlimit(struct descriptor *d, __u32 limit);
     162extern void gdt_tss_setbase(descriptor_t *d, __address base);
     163extern void gdt_tss_setlimit(descriptor_t *d, __u32 limit);
    158164
    159165extern void idt_init(void);
    160 extern void idt_setoffset(struct idescriptor *d, __address offset);
     166extern void idt_setoffset(idescriptor_t *d, __address offset);
    161167
    162 extern void tss_initialize(struct tss *t);
     168extern void tss_initialize(tss_t *t);
    163169
    164170#endif /* __ASM__ */

  • arch/amd64/src/cpu/cpu.c

    r897ad60 r39cea6a  
    119119{
    120120        CPU->arch.tss = tss_p;
    121         CPU->fpu_owner=NULL;
     121        CPU->arch.tss->iomap_base = &CPU->arch.tss->iomap[0] - ((__u8 *) CPU->arch.tss);
     122        CPU->fpu_owner = NULL;
    122123}
    123 
    124124
    125125void cpu_identify(void)

  • arch/amd64/src/pm.c

    r897ad60 r39cea6a  
    4747 */
    4848
    49 struct descriptor gdt[GDT_ITEMS] = {
     49descriptor_t gdt[GDT_ITEMS] = {
    5050        /* NULL descriptor */
    5151        { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
    … …  
    111111};
    112112
    113 struct idescriptor idt[IDT_ITEMS];
    114 
    115 struct ptr_16_64 gdtr = {.limit = sizeof(gdt), .base= (__u64) gdt };
    116 struct ptr_16_64 idtr = {.limit = sizeof(idt), .base= (__u64) idt };
    117 
    118 static struct tss tss;
    119 struct tss *tss_p = NULL;
    120 
    121 void gdt_tss_setbase(struct descriptor *d, __address base)
    122 {
    123         struct tss_descriptor *td = (struct tss_descriptor *) d;
     113idescriptor_t idt[IDT_ITEMS];
     114
     115ptr_16_64_t gdtr = {.limit = sizeof(gdt), .base= (__u64) gdt };
     116ptr_16_64_t idtr = {.limit = sizeof(idt), .base= (__u64) idt };
     117
     118static tss_t tss;
     119tss_t *tss_p = NULL;
     120
     121void gdt_tss_setbase(descriptor_t *d, __address base)
     122{
     123        tss_descriptor_t *td = (tss_descriptor_t *) d;
    124124
    125125        td->base_0_15 = base & 0xffff;
    … …  
    129129}
    130130
    131 void gdt_tss_setlimit(struct descriptor *d, __u32 limit)
    132 {
    133         struct tss_descriptor *td = (struct tss_descriptor *) d;
     131void gdt_tss_setlimit(descriptor_t *d, __u32 limit)
     132{
     133        struct tss_descriptor *td = (tss_descriptor_t *) d;
    134134
    135135        td->limit_0_15 = limit & 0xffff;
    … …  
    137137}
    138138
    139 void idt_setoffset(struct idescriptor *d, __address offset)
     139void idt_setoffset(idescriptor_t *d, __address offset)
    140140{
    141141        /*
    … …  
    147147}
    148148
    149 void tss_initialize(struct tss *t)
    150 {
    151         memsetb((__address) t, sizeof(struct tss), 0);
     149void tss_initialize(tss_t *t)
     150{
     151        memsetb((__address) t, sizeof(tss_t), 0);
    152152}
    153153
    … …  
    157157void idt_init(void)
    158158{
    159         struct idescriptor *d;
     159        idescriptor_t *d;
    160160        int i;
    161161
    … …  
    184184void pm_init(void)
    185185{
    186         struct descriptor *gdt_p = (struct descriptor *) gdtr.base;
    187         struct tss_descriptor *tss_desc;
     186        descriptor_t *gdt_p = (struct descriptor *) gdtr.base;
     187        tss_descriptor_t *tss_desc;
    188188
    189189        /*
    … …  
    201201        }
    202202        else {
    203                 tss_p = (struct tss *) malloc(sizeof(struct tss),FRAME_ATOMIC);
     203                tss_p = (struct tss *) malloc(sizeof(tss_t), FRAME_ATOMIC);
    204204                if (!tss_p)
    205205                        panic("could not allocate TSS\n");
    … …  
    208208        tss_initialize(tss_p);
    209209
    210         tss_desc = (struct tss_descriptor *) (&gdt_p[TSS_DES]);
     210        tss_desc = (tss_descriptor_t *) (&gdt_p[TSS_DES]);
    211211        tss_desc->present = 1;
    212212        tss_desc->type = AR_TSS;
    … …  
    214214       
    215215        gdt_tss_setbase(&gdt_p[TSS_DES], (__address) tss_p);
    216         gdt_tss_setlimit(&gdt_p[TSS_DES], sizeof(struct tss) - 1);
     216        gdt_tss_setlimit(&gdt_p[TSS_DES], sizeof(tss_t) - 1);
    217217
    218218        gdtr_load(&gdtr);

  • arch/amd64/src/proc/scheduler.c

    r897ad60 r39cea6a  
    2929#include <proc/scheduler.h>
    3030#include <cpu.h>
     31#include <proc/task.h>
    3132#include <proc/thread.h>
    3233#include <arch.h>
    … …  
    3536#include <arch/debugger.h>
    3637#include <print.h>
     38#include <arch/pm.h>
    3739
     40/** Perform amd64 specific tasks needed before the new task is run. */
     41void before_task_runs_arch(void)
     42{
     43}
     44
     45/** Perform amd64 specific tasks needed before the new thread is scheduled. */
    3846void before_thread_runs_arch(void)
    3947{
     48        size_t iomap_size;
     49        ptr_16_64_t cpugdtr;
     50        descriptor_t *gdt_p;
     51
    4052        CPU->arch.tss->rsp0 = (__address) &THREAD->kstack[THREAD_STACK_SIZE-SP_DELTA];
    4153
    … …  
    4355         * hidden part of gs */
    4456        swapgs();
    45         write_msr(AMD_MSR_GS,
    46                   (__u64)&THREAD->kstack);
     57        write_msr(AMD_MSR_GS, (__u64)&THREAD->kstack);
    4758        swapgs();
    4859
    4960        /* TLS support - set FS to thread local storage */
    5061        write_msr(AMD_MSR_FS, THREAD->arch.tls);
     62
     63        /*
     64         * Switch the I/O Permission Bitmap, if necessary.
     65         *
     66         * First, copy the I/O Permission Bitmap.
     67         * This needs to be changed so that the
     68         * copying is avoided if the same task
     69         * was already running and the iomap did
     70         * not change.
     71         */
     72        spinlock_lock(&TASK->lock);
     73        iomap_size = TASK->arch.iomap_size;
     74        if (iomap_size) {
     75                ASSERT(TASK->arch.iomap);
     76                memcpy(CPU->arch.tss->iomap, TASK->arch.iomap, iomap_size);
     77                CPU->arch.tss->iomap[iomap_size] = 0xff;        /* terminating byte */
     78        }
     79        spinlock_unlock(&TASK->lock);
     80
     81        /* Second, adjust TSS segment limit. */
     82        gdtr_store(&cpugdtr);
     83        gdt_p = (descriptor_t *) cpugdtr.base;
     84        gdt_tss_setlimit(&gdt_p[TSS_DES], TSS_BASIC_SIZE + iomap_size - 1);
     85        gdtr_load(&cpugdtr);
    5186
    5287#ifdef CONFIG_DEBUG_AS_WATCHPOINT
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