Index: kernel/arch/abs32le/include/arch.h =================================================================== --- kernel/arch/abs32le/include/arch.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,41 +1,0 @@ -/* - * Copyright (c) 2010 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup abs32le - * @{ - */ -/** @file - */ - -#ifndef KERN_abs32le_ARCH_H_ -#define KERN_abs32le_ARCH_H_ - -#endif - -/** @} - */ Index: kernel/arch/abs32le/include/arch/arch.h =================================================================== --- kernel/arch/abs32le/include/arch/arch.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/abs32le/include/arch/arch.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,41 @@ +/* + * Copyright (c) 2010 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup abs32le + * @{ + */ +/** @file + */ + +#ifndef KERN_abs32le_ARCH_H_ +#define KERN_abs32le_ARCH_H_ + +#endif + +/** @} + */ Index: kernel/arch/abs32le/include/arch/asm.h =================================================================== --- kernel/arch/abs32le/include/arch/asm.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/abs32le/include/arch/asm.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,201 @@ +/* + * Copyright (c) 2010 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup abs32le + * @{ + */ +/** @file + */ + +#ifndef KERN_abs32le_ASM_H_ +#define KERN_abs32le_ASM_H_ + +#include +#include +#include + +NO_TRACE static inline void asm_delay_loop(uint32_t usec) +{ +} + +NO_TRACE static inline __attribute__((noreturn)) void cpu_halt(void) +{ + /* On real hardware this should stop processing further + instructions on the CPU (and possibly putting it into + low-power mode) without any possibility of exitting + this function. */ + + while (true); +} + +NO_TRACE static inline void cpu_sleep(void) +{ + /* On real hardware this should put the CPU into low-power + mode. However, the CPU is free to continue processing + futher instructions any time. The CPU also wakes up + upon an interrupt. */ +} + +NO_TRACE static inline void pio_write_8(ioport8_t *port, uint8_t val) +{ +} + +/** Word to port + * + * Output word to port + * + * @param port Port to write to + * @param val Value to write + * + */ +NO_TRACE static inline void pio_write_16(ioport16_t *port, uint16_t val) +{ +} + +/** Double word to port + * + * Output double word to port + * + * @param port Port to write to + * @param val Value to write + * + */ +NO_TRACE static inline void pio_write_32(ioport32_t *port, uint32_t val) +{ +} + +/** Byte from port + * + * Get byte from port + * + * @param port Port to read from + * @return Value read + * + */ +NO_TRACE static inline uint8_t pio_read_8(ioport8_t *port) +{ + return 0; +} + +/** Word from port + * + * Get word from port + * + * @param port Port to read from + * @return Value read + * + */ +NO_TRACE static inline uint16_t pio_read_16(ioport16_t *port) +{ + return 0; +} + +/** Double word from port + * + * Get double word from port + * + * @param port Port to read from + * @return Value read + * + */ +NO_TRACE static inline uint32_t pio_read_32(ioport32_t *port) +{ + return 0; +} + +NO_TRACE static inline ipl_t interrupts_enable(void) +{ + /* + * On real hardware this unconditionally enables preemption + * by internal and external interrupts. + * + * The return value stores the previous interrupt level. + */ + + return 0; +} + +NO_TRACE static inline ipl_t interrupts_disable(void) +{ + /* + * On real hardware this disables preemption by the usual + * set of internal and external interrupts. This does not + * apply to special non-maskable interrupts and sychronous + * CPU exceptions. + * + * The return value stores the previous interrupt level. + */ + + return 0; +} + +NO_TRACE static inline void interrupts_restore(ipl_t ipl) +{ + /* + * On real hardware this either enables or disables preemption + * according to the interrupt level value from the argument. + */ +} + +NO_TRACE static inline ipl_t interrupts_read(void) +{ + /* + * On real hardware the return value stores the current interrupt + * level. + */ + + return 0; +} + +NO_TRACE static inline bool interrupts_disabled(void) +{ + /* + * On real hardware the return value is true iff interrupts are + * disabled. + */ + + return false; +} + +NO_TRACE static inline uintptr_t get_stack_base(void) +{ + /* + * On real hardware this returns the address of the bottom + * of the current CPU stack. The the_t structure is stored + * on the bottom of stack and this is used to identify the + * current CPU, current task, current thread and current + * address space. + */ + + return 0; +} + +#endif + +/** @} + */ Index: kernel/arch/abs32le/include/arch/atomic.h =================================================================== --- kernel/arch/abs32le/include/arch/atomic.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/abs32le/include/arch/atomic.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,124 @@ +/* + * Copyright (c) 2010 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup abs32le + * @{ + */ +/** @file + */ + +#ifndef KERN_abs32le_ATOMIC_H_ +#define KERN_abs32le_ATOMIC_H_ + +#include +#include +#include +#include +#include + +NO_TRACE ATOMIC static inline void atomic_inc(atomic_t *val) + WRITES(&val->count) + REQUIRES_EXTENT_MUTABLE(val) + REQUIRES(val->count < ATOMIC_COUNT_MAX) +{ + /* On real hardware the increment has to be done + as an atomic action. */ + + val->count++; +} + +NO_TRACE ATOMIC static inline void atomic_dec(atomic_t *val) + WRITES(&val->count) + REQUIRES_EXTENT_MUTABLE(val) + REQUIRES(val->count > ATOMIC_COUNT_MIN) +{ + /* On real hardware the decrement has to be done + as an atomic action. */ + + val->count--; +} + +NO_TRACE ATOMIC static inline atomic_count_t atomic_postinc(atomic_t *val) + WRITES(&val->count) + REQUIRES_EXTENT_MUTABLE(val) + REQUIRES(val->count < ATOMIC_COUNT_MAX) +{ + /* On real hardware both the storing of the previous + value and the increment have to be done as a single + atomic action. */ + + atomic_count_t prev = val->count; + + val->count++; + return prev; +} + +NO_TRACE ATOMIC static inline atomic_count_t atomic_postdec(atomic_t *val) + WRITES(&val->count) + REQUIRES_EXTENT_MUTABLE(val) + REQUIRES(val->count > ATOMIC_COUNT_MIN) +{ + /* On real hardware both the storing of the previous + value and the decrement have to be done as a single + atomic action. */ + + atomic_count_t prev = val->count; + + val->count--; + return prev; +} + +#define atomic_preinc(val) (atomic_postinc(val) + 1) +#define atomic_predec(val) (atomic_postdec(val) - 1) + +NO_TRACE ATOMIC static inline atomic_count_t test_and_set(atomic_t *val) + WRITES(&val->count) + REQUIRES_EXTENT_MUTABLE(val) +{ + /* On real hardware the retrieving of the original + value and storing 1 have to be done as a single + atomic action. */ + + atomic_count_t prev = val->count; + val->count = 1; + return prev; +} + +NO_TRACE static inline void atomic_lock_arch(atomic_t *val) + WRITES(&val->count) + REQUIRES_EXTENT_MUTABLE(val) +{ + do { + while (val->count); + } while (test_and_set(val)); +} + +#endif + +/** @} + */ Index: kernel/arch/abs32le/include/arch/barrier.h =================================================================== --- kernel/arch/abs32le/include/arch/barrier.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/abs32le/include/arch/barrier.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,55 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup abs32le + * @{ + */ +/** @file + */ + +#ifndef KERN_abs32le_BARRIER_H_ +#define KERN_abs32le_BARRIER_H_ + +/* + * Provisions are made to prevent compiler from reordering instructions itself. + */ + +#define CS_ENTER_BARRIER() +#define CS_LEAVE_BARRIER() + +#define memory_barrier() +#define read_barrier() +#define write_barrier() + +#define smc_coherence(addr) +#define smc_coherence_block(addr, size) + +#endif + +/** @} + */ Index: kernel/arch/abs32le/include/arch/context.h =================================================================== --- kernel/arch/abs32le/include/arch/context.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/abs32le/include/arch/context.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,57 @@ +/* + * Copyright (c) 2010 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup abs32le + * @{ + */ +/** @file + */ + +#ifndef KERN_abs32le_CONTEXT_H_ +#define KERN_abs32le_CONTEXT_H_ + +#define STACK_ITEM_SIZE 4 +#define SP_DELTA 0 + +#define context_set(ctx, pc, stack, size) \ + context_set_generic(ctx, pc, stack, size) + +/* + * On real hardware this stores the registers which + * need to be preserved across function calls. + */ +typedef struct { + uintptr_t sp; + uintptr_t pc; + ipl_t ipl; +} context_t; + +#endif + +/** @} + */ Index: kernel/arch/abs32le/include/arch/context_offset.h =================================================================== --- kernel/arch/abs32le/include/arch/context_offset.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/abs32le/include/arch/context_offset.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,44 @@ +/* + * Copyright (c) 2010 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup abs32le + * @{ + */ +/** @file + */ + +#ifndef KERN_abs32le_CONTEXT_OFFSET_H_ +#define KERN_abs32le_CONTEXT_OFFSET_H_ + +#define OFFSET_PC 0x00 +#define OFFSET_IPL 0x04 + +#endif + +/** @} + */ Index: kernel/arch/abs32le/include/arch/cpu.h =================================================================== --- kernel/arch/abs32le/include/arch/cpu.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/abs32le/include/arch/cpu.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,49 @@ +/* + * Copyright (c) 2010 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup abs32le + * @{ + */ +/** @file + */ + +#ifndef KERN_abs32le_CPU_H_ +#define KERN_abs32le_CPU_H_ + +/* + * On real hardware this structure stores + * information specific to the current + * CPU model. + */ +typedef struct { +} cpu_arch_t; + +#endif + +/** @} + */ Index: kernel/arch/abs32le/include/arch/cycle.h =================================================================== --- kernel/arch/abs32le/include/arch/cycle.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/abs32le/include/arch/cycle.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,48 @@ +/* + * Copyright (c) 2010 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup abs32le + * @{ + */ +/** @file + */ + +#ifndef KERN_abs32le_CYCLE_H_ +#define KERN_abs32le_CYCLE_H_ + +#include + +NO_TRACE static inline uint64_t get_cycle(void) +{ + return 0; +} + +#endif + +/** @} + */ Index: kernel/arch/abs32le/include/arch/elf.h =================================================================== --- kernel/arch/abs32le/include/arch/elf.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/abs32le/include/arch/elf.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2010 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup abs32le + * @{ + */ +/** @file + */ + +#ifndef KERN_abs32le_ELF_H_ +#define KERN_abs32le_ELF_H_ + +#define ELF_MACHINE EM_NO +#define ELF_DATA_ENCODING ELFDATA2LSB +#define ELF_CLASS ELFCLASS32 + +#endif + +/** @} + */ Index: kernel/arch/abs32le/include/arch/faddr.h =================================================================== --- kernel/arch/abs32le/include/arch/faddr.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/abs32le/include/arch/faddr.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2010 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup abs32le + * @{ + */ +/** @file + */ + +#ifndef KERN_abs32le_FADDR_H_ +#define KERN_abs32le_FADDR_H_ + +#include + +#define FADDR(fptr) ((uintptr_t) (fptr)) + +#endif + +/** @} + */ Index: kernel/arch/abs32le/include/arch/fpu_context.h =================================================================== --- kernel/arch/abs32le/include/arch/fpu_context.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/abs32le/include/arch/fpu_context.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,52 @@ +/* + * Copyright (c) 2010 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup abs32le + * @{ + */ +/** @file + */ + +#ifndef KERN_abs32le_FPU_CONTEXT_H_ +#define KERN_abs32le_FPU_CONTEXT_H_ + +#include + +#define FPU_CONTEXT_ALIGN 16 + +/* + * On real hardware this stores the FPU registers + * which are part of the CPU context. + */ +typedef struct { +} fpu_context_t; + +#endif + +/** @} + */ Index: kernel/arch/abs32le/include/arch/interrupt.h =================================================================== --- kernel/arch/abs32le/include/arch/interrupt.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/abs32le/include/arch/interrupt.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,49 @@ +/* + * Copyright (c) 2010 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup abs32leinterrupt + * @{ + */ +/** @file + */ + +#ifndef KERN_abs32le_INTERRUPT_H_ +#define KERN_abs32le_INTERRUPT_H_ + +#include +#include + +#define IVT_ITEMS 0 +#define IVT_FIRST 0 + +#define VECTOR_TLB_SHOOTDOWN_IPI 0 + +#endif + +/** @} + */ Index: kernel/arch/abs32le/include/arch/istate.h =================================================================== --- kernel/arch/abs32le/include/arch/istate.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/abs32le/include/arch/istate.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,98 @@ +/* + * Copyright (c) 2010 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup abs32leinterrupt + * @{ + */ +/** @file + */ + +#ifndef KERN_abs32le_ISTATE_H_ +#define KERN_abs32le_ISTATE_H_ + +#include + +#ifdef KERNEL + +#include + +#else /* KERNEL */ + +#define REQUIRES_EXTENT_MUTABLE(arg) +#define WRITES(arg) + +#endif /* KERNEL */ + +/* + * On real hardware this stores the registers which + * need to be preserved during interupts. + */ +typedef struct istate { + uintptr_t ip; + uintptr_t fp; + uint32_t stack[]; +} istate_t; + +NO_TRACE static inline int istate_from_uspace(istate_t *istate) + REQUIRES_EXTENT_MUTABLE(istate) +{ + /* On real hardware this checks whether the interrupted + context originated from user space. */ + + return !(istate->ip & UINT32_C(0x80000000)); +} + +NO_TRACE static inline void istate_set_retaddr(istate_t *istate, + uintptr_t retaddr) + WRITES(&istate->ip) +{ + /* On real hardware this sets the instruction pointer. */ + + istate->ip = retaddr; +} + +NO_TRACE static inline uintptr_t istate_get_pc(istate_t *istate) + REQUIRES_EXTENT_MUTABLE(istate) +{ + /* On real hardware this returns the instruction pointer. */ + + return istate->ip; +} + +NO_TRACE static inline uintptr_t istate_get_fp(istate_t *istate) + REQUIRES_EXTENT_MUTABLE(istate) +{ + /* On real hardware this returns the frame pointer. */ + + return istate->fp; +} + +#endif + +/** @} + */ Index: kernel/arch/abs32le/include/arch/mm/as.h =================================================================== --- kernel/arch/abs32le/include/arch/mm/as.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/abs32le/include/arch/mm/as.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,62 @@ +/* + * Copyright (c) 2010 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup abs32lemm + * @{ + */ +/** @file + */ + +#ifndef KERN_abs32le_AS_H_ +#define KERN_abs32le_AS_H_ + +#define KERNEL_ADDRESS_SPACE_SHADOWED_ARCH 0 + +#define KERNEL_ADDRESS_SPACE_START_ARCH UINT32_C(0x80000000) +#define KERNEL_ADDRESS_SPACE_END_ARCH UINT32_C(0xffffffff) +#define USER_ADDRESS_SPACE_START_ARCH UINT32_C(0x00000000) +#define USER_ADDRESS_SPACE_END_ARCH UINT32_C(0x7fffffff) + +typedef struct { +} as_arch_t; + +#include + +#define as_constructor_arch(as, flags) (as != as) +#define as_destructor_arch(as) (as != as) +#define as_create_arch(as, flags) (as != as) +#define as_install_arch(as) +#define as_deinstall_arch(as) +#define as_invalidate_translation_cache(as, page, cnt) + +extern void as_arch_init(void); + +#endif + +/** @} + */ Index: kernel/arch/abs32le/include/arch/mm/asid.h =================================================================== --- kernel/arch/abs32le/include/arch/mm/asid.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/abs32le/include/arch/mm/asid.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,48 @@ +/* + * Copyright (c) 2010 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup abc32lemm + * @{ + */ + +#ifndef KERN_abs32le_ASID_H_ +#define KERN_abs32le_ASID_H_ + +#include + +typedef uint32_t asid_t; + +#define ASID_MAX_ARCH 3 + +#define asid_get() (ASID_START + 1) +#define asid_put(asid) + +#endif + +/** @} + */ Index: kernel/arch/abs32le/include/arch/mm/frame.h =================================================================== --- kernel/arch/abs32le/include/arch/mm/frame.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/abs32le/include/arch/mm/frame.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,50 @@ +/* + * Copyright (c) 2010 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup abs32lemm + * @{ + */ +/** @file + */ + +#ifndef KERN_abs32le_FRAME_H_ +#define KERN_abs32le_FRAME_H_ + +#define FRAME_WIDTH 12 /* 4K */ +#define FRAME_SIZE (1 << FRAME_WIDTH) + +#include + +extern void frame_low_arch_init(void); +extern void frame_high_arch_init(void); +extern void physmem_print(void); + +#endif + +/** @} + */ Index: kernel/arch/abs32le/include/arch/mm/km.h =================================================================== --- kernel/arch/abs32le/include/arch/mm/km.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/abs32le/include/arch/mm/km.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,47 @@ +/* + * Copyright (c) 2011 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup abs32lemm + * @{ + */ +/** @file + */ + +#ifndef KERN_abs32le_KM_H_ +#define KERN_abs32le_KM_H_ + +#include + +extern void km_identity_arch_init(void); +extern void km_non_identity_arch_init(void); +extern bool km_is_non_identity_arch(uintptr_t); + +#endif + +/** @} + */ Index: kernel/arch/abs32le/include/arch/mm/page.h =================================================================== --- kernel/arch/abs32le/include/arch/mm/page.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/abs32le/include/arch/mm/page.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,198 @@ +/* + * Copyright (c) 2010 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup abs32lemm + * @{ + */ +/** @file + */ + +#ifndef KERN_abs32le_PAGE_H_ +#define KERN_abs32le_PAGE_H_ + +#include +#include + +#define PAGE_WIDTH FRAME_WIDTH +#define PAGE_SIZE FRAME_SIZE + +#define KA2PA(x) (((uintptr_t) (x)) - UINT32_C(0x80000000)) +#define PA2KA(x) (((uintptr_t) (x)) + UINT32_C(0x80000000)) + +/* + * This is an example of 2-level page tables (PTL1 and PTL2 are left out) + * on top of the generic 4-level page table interface. + */ + +/* Number of entries in each level. */ +#define PTL0_ENTRIES_ARCH 1024 +#define PTL1_ENTRIES_ARCH 0 +#define PTL2_ENTRIES_ARCH 0 +#define PTL3_ENTRIES_ARCH 1024 + +/* Page table sizes for each level. */ +#define PTL0_SIZE_ARCH ONE_FRAME +#define PTL1_SIZE_ARCH 0 +#define PTL2_SIZE_ARCH 0 +#define PTL3_SIZE_ARCH ONE_FRAME + +/* Macros calculating indices for each level. */ +#define PTL0_INDEX_ARCH(vaddr) (((vaddr) >> 22) & 0x3ffU) +#define PTL1_INDEX_ARCH(vaddr) 0 +#define PTL2_INDEX_ARCH(vaddr) 0 +#define PTL3_INDEX_ARCH(vaddr) (((vaddr) >> 12) & 0x3ffU) + +/* Get PTE address accessors for each level. */ +#define GET_PTL1_ADDRESS_ARCH(ptl0, i) \ + ((pte_t *) ((((pte_t *) (ptl0))[(i)].frame_address) << 12)) +#define GET_PTL2_ADDRESS_ARCH(ptl1, i) \ + (ptl1) +#define GET_PTL3_ADDRESS_ARCH(ptl2, i) \ + (ptl2) +#define GET_FRAME_ADDRESS_ARCH(ptl3, i) \ + ((uintptr_t) ((((pte_t *) (ptl3))[(i)].frame_address) << 12)) + +/* Set PTE address accessors for each level. */ +#define SET_PTL0_ADDRESS_ARCH(ptl0) +#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) \ + (((pte_t *) (ptl0))[(i)].frame_address = (a) >> 12) +#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a) +#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a) +#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) \ + (((pte_t *) (ptl3))[(i)].frame_address = (a) >> 12) + +/* Get PTE flags accessors for each level. */ +#define GET_PTL1_FLAGS_ARCH(ptl0, i) \ + get_pt_flags((pte_t *) (ptl0), (size_t) (i)) +#define GET_PTL2_FLAGS_ARCH(ptl1, i) \ + PAGE_PRESENT +#define GET_PTL3_FLAGS_ARCH(ptl2, i) \ + PAGE_PRESENT +#define GET_FRAME_FLAGS_ARCH(ptl3, i) \ + get_pt_flags((pte_t *) (ptl3), (size_t) (i)) + +/* Set PTE flags accessors for each level. */ +#define SET_PTL1_FLAGS_ARCH(ptl0, i, x) \ + set_pt_flags((pte_t *) (ptl0), (size_t) (i), (x)) +#define SET_PTL2_FLAGS_ARCH(ptl1, i, x) +#define SET_PTL3_FLAGS_ARCH(ptl2, i, x) +#define SET_FRAME_FLAGS_ARCH(ptl3, i, x) \ + set_pt_flags((pte_t *) (ptl3), (size_t) (i), (x)) + +/* Set PTE present bit accessors for each level. */ +#define SET_PTL1_PRESENT_ARCH(ptl0, i) \ + set_pt_present((pte_t *) (ptl0), (size_t) (i)) +#define SET_PTL2_PRESENT_ARCH(ptl1, i) +#define SET_PTL3_PRESENT_ARCH(ptl2, i) +#define SET_FRAME_PRESENT_ARCH(ptl3, i) \ + set_pt_present((pte_t *) (ptl3), (size_t) (i)) + +/* Macros for querying the last level entries. */ +#define PTE_VALID_ARCH(p) \ + (*((uint32_t *) (p)) != 0) +#define PTE_PRESENT_ARCH(p) \ + ((p)->present != 0) +#define PTE_GET_FRAME_ARCH(p) \ + ((p)->frame_address << FRAME_WIDTH) +#define PTE_WRITABLE_ARCH(p) \ + ((p)->writeable != 0) +#define PTE_EXECUTABLE_ARCH(p) 1 + +#include +#include +#include + +/** Page Table Entry. */ +typedef struct { + unsigned int present : 1; + unsigned int writeable : 1; + unsigned int uaccessible : 1; + unsigned int page_write_through : 1; + unsigned int page_cache_disable : 1; + unsigned int accessed : 1; + unsigned int dirty : 1; + unsigned int pat : 1; + unsigned int global : 1; + + /** Valid content even if the present bit is not set. */ + unsigned int soft_valid : 1; + unsigned int avl : 2; + unsigned int frame_address : 20; +} __attribute__((packed)) pte_t; + +NO_TRACE static inline unsigned int get_pt_flags(pte_t *pt, size_t i) + REQUIRES_ARRAY_MUTABLE(pt, PTL0_ENTRIES_ARCH) +{ + pte_t *p = &pt[i]; + + return ( + ((unsigned int) (!p->page_cache_disable) << PAGE_CACHEABLE_SHIFT) | + ((unsigned int) (!p->present) << PAGE_PRESENT_SHIFT) | + ((unsigned int) p->uaccessible << PAGE_USER_SHIFT) | + (1 << PAGE_READ_SHIFT) | + ((unsigned int) p->writeable << PAGE_WRITE_SHIFT) | + (1 << PAGE_EXEC_SHIFT) | + ((unsigned int) p->global << PAGE_GLOBAL_SHIFT) + ); +} + +NO_TRACE static inline void set_pt_flags(pte_t *pt, size_t i, int flags) + WRITES(ARRAY_RANGE(pt, PTL0_ENTRIES_ARCH)) + REQUIRES_ARRAY_MUTABLE(pt, PTL0_ENTRIES_ARCH) +{ + pte_t *p = &pt[i]; + + p->page_cache_disable = !(flags & PAGE_CACHEABLE); + p->present = !(flags & PAGE_NOT_PRESENT); + p->uaccessible = (flags & PAGE_USER) != 0; + p->writeable = (flags & PAGE_WRITE) != 0; + p->global = (flags & PAGE_GLOBAL) != 0; + + /* + * Ensure that there is at least one bit set even if the present bit is + * cleared. + */ + p->soft_valid = true; +} + +NO_TRACE static inline void set_pt_present(pte_t *pt, size_t i) + WRITES(ARRAY_RANGE(pt, PTL0_ENTRIES_ARCH)) + REQUIRES_ARRAY_MUTABLE(pt, PTL0_ENTRIES_ARCH) +{ + pte_t *p = &pt[i]; + + p->present = 1; +} + +extern void page_arch_init(void); +extern void page_fault(unsigned int, istate_t *); + +#endif + +/** @} + */ Index: kernel/arch/abs32le/include/arch/mm/tlb.h =================================================================== --- kernel/arch/abs32le/include/arch/mm/tlb.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/abs32le/include/arch/mm/tlb.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,41 @@ +/* + * Copyright (c) 2010 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup abs32lemm + * @{ + */ +/** @file + */ + +#ifndef KERN_abs32le_TLB_H_ +#define KERN_abs32le_TLB_H_ + +#endif + +/** @} + */ Index: kernel/arch/abs32le/include/arch/proc/task.h =================================================================== --- kernel/arch/abs32le/include/arch/proc/task.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/abs32le/include/arch/proc/task.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,51 @@ +/* + * Copyright (c) 2010 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup abs32leproc + * @{ + */ +/** @file + */ + +#ifndef KERN_abs32le_TASK_H_ +#define KERN_abs32le_TASK_H_ + +#include +#include + +/* + * On real hardware this structure stores task information + * specific to the architecture. + */ +typedef struct { +} task_arch_t; + +#endif + +/** @} + */ Index: kernel/arch/abs32le/include/arch/proc/thread.h =================================================================== --- kernel/arch/abs32le/include/arch/proc/thread.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/abs32le/include/arch/proc/thread.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,49 @@ +/* + * Copyright (c) 2010 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup abs32leproc + * @{ + */ +/** @file + */ + +#ifndef KERN_abs32le_THREAD_H_ +#define KERN_abs32le_THREAD_H_ + +#include + +typedef struct { +} thread_arch_t; + +#define thr_constructor_arch(thr) +#define thr_destructor_arch(thr) + +#endif + +/** @} + */ Index: kernel/arch/abs32le/include/arch/types.h =================================================================== --- kernel/arch/abs32le/include/arch/types.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/abs32le/include/arch/types.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,67 @@ +/* + * Copyright (c) 2010 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup abs32le + * @{ + */ +/** @file + */ + +#ifndef KERN_abs32le_TYPES_H_ +#define KERN_abs32le_TYPES_H_ + +#define ATOMIC_COUNT_MIN UINT32_MIN +#define ATOMIC_COUNT_MAX UINT32_MAX + +typedef uint32_t size_t; +typedef int32_t ssize_t; + +typedef uint32_t uintptr_t; +typedef uint32_t pfn_t; + +typedef uint32_t ipl_t; + +typedef uint32_t sysarg_t; +typedef int32_t native_t; +typedef uint32_t atomic_count_t; + +typedef struct { +} fncptr_t; + +#define INTN_C(c) INT32_C(c) +#define UINTN_C(c) UINT32_C(c) + +#define PRIdn PRId32 /**< Format for native_t. */ +#define PRIun PRIu32 /**< Format for sysarg_t. */ +#define PRIxn PRIx32 /**< Format for hexadecimal sysarg_t. */ +#define PRIua PRIu32 /**< Format for atomic_count_t. */ + +#endif + +/** @} + */ Index: kernel/arch/abs32le/include/asm.h =================================================================== --- kernel/arch/abs32le/include/asm.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,201 +1,0 @@ -/* - * Copyright (c) 2010 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup abs32le - * @{ - */ -/** @file - */ - -#ifndef KERN_abs32le_ASM_H_ -#define KERN_abs32le_ASM_H_ - -#include -#include -#include - -NO_TRACE static inline void asm_delay_loop(uint32_t usec) -{ -} - -NO_TRACE static inline __attribute__((noreturn)) void cpu_halt(void) -{ - /* On real hardware this should stop processing further - instructions on the CPU (and possibly putting it into - low-power mode) without any possibility of exitting - this function. */ - - while (true); -} - -NO_TRACE static inline void cpu_sleep(void) -{ - /* On real hardware this should put the CPU into low-power - mode. However, the CPU is free to continue processing - futher instructions any time. The CPU also wakes up - upon an interrupt. */ -} - -NO_TRACE static inline void pio_write_8(ioport8_t *port, uint8_t val) -{ -} - -/** Word to port - * - * Output word to port - * - * @param port Port to write to - * @param val Value to write - * - */ -NO_TRACE static inline void pio_write_16(ioport16_t *port, uint16_t val) -{ -} - -/** Double word to port - * - * Output double word to port - * - * @param port Port to write to - * @param val Value to write - * - */ -NO_TRACE static inline void pio_write_32(ioport32_t *port, uint32_t val) -{ -} - -/** Byte from port - * - * Get byte from port - * - * @param port Port to read from - * @return Value read - * - */ -NO_TRACE static inline uint8_t pio_read_8(ioport8_t *port) -{ - return 0; -} - -/** Word from port - * - * Get word from port - * - * @param port Port to read from - * @return Value read - * - */ -NO_TRACE static inline uint16_t pio_read_16(ioport16_t *port) -{ - return 0; -} - -/** Double word from port - * - * Get double word from port - * - * @param port Port to read from - * @return Value read - * - */ -NO_TRACE static inline uint32_t pio_read_32(ioport32_t *port) -{ - return 0; -} - -NO_TRACE static inline ipl_t interrupts_enable(void) -{ - /* - * On real hardware this unconditionally enables preemption - * by internal and external interrupts. - * - * The return value stores the previous interrupt level. - */ - - return 0; -} - -NO_TRACE static inline ipl_t interrupts_disable(void) -{ - /* - * On real hardware this disables preemption by the usual - * set of internal and external interrupts. This does not - * apply to special non-maskable interrupts and sychronous - * CPU exceptions. - * - * The return value stores the previous interrupt level. - */ - - return 0; -} - -NO_TRACE static inline void interrupts_restore(ipl_t ipl) -{ - /* - * On real hardware this either enables or disables preemption - * according to the interrupt level value from the argument. - */ -} - -NO_TRACE static inline ipl_t interrupts_read(void) -{ - /* - * On real hardware the return value stores the current interrupt - * level. - */ - - return 0; -} - -NO_TRACE static inline bool interrupts_disabled(void) -{ - /* - * On real hardware the return value is true iff interrupts are - * disabled. - */ - - return false; -} - -NO_TRACE static inline uintptr_t get_stack_base(void) -{ - /* - * On real hardware this returns the address of the bottom - * of the current CPU stack. The the_t structure is stored - * on the bottom of stack and this is used to identify the - * current CPU, current task, current thread and current - * address space. - */ - - return 0; -} - -#endif - -/** @} - */ Index: kernel/arch/abs32le/include/atomic.h =================================================================== --- kernel/arch/abs32le/include/atomic.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,124 +1,0 @@ -/* - * Copyright (c) 2010 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup abs32le - * @{ - */ -/** @file - */ - -#ifndef KERN_abs32le_ATOMIC_H_ -#define KERN_abs32le_ATOMIC_H_ - -#include -#include -#include -#include -#include - -NO_TRACE ATOMIC static inline void atomic_inc(atomic_t *val) - WRITES(&val->count) - REQUIRES_EXTENT_MUTABLE(val) - REQUIRES(val->count < ATOMIC_COUNT_MAX) -{ - /* On real hardware the increment has to be done - as an atomic action. */ - - val->count++; -} - -NO_TRACE ATOMIC static inline void atomic_dec(atomic_t *val) - WRITES(&val->count) - REQUIRES_EXTENT_MUTABLE(val) - REQUIRES(val->count > ATOMIC_COUNT_MIN) -{ - /* On real hardware the decrement has to be done - as an atomic action. */ - - val->count--; -} - -NO_TRACE ATOMIC static inline atomic_count_t atomic_postinc(atomic_t *val) - WRITES(&val->count) - REQUIRES_EXTENT_MUTABLE(val) - REQUIRES(val->count < ATOMIC_COUNT_MAX) -{ - /* On real hardware both the storing of the previous - value and the increment have to be done as a single - atomic action. */ - - atomic_count_t prev = val->count; - - val->count++; - return prev; -} - -NO_TRACE ATOMIC static inline atomic_count_t atomic_postdec(atomic_t *val) - WRITES(&val->count) - REQUIRES_EXTENT_MUTABLE(val) - REQUIRES(val->count > ATOMIC_COUNT_MIN) -{ - /* On real hardware both the storing of the previous - value and the decrement have to be done as a single - atomic action. */ - - atomic_count_t prev = val->count; - - val->count--; - return prev; -} - -#define atomic_preinc(val) (atomic_postinc(val) + 1) -#define atomic_predec(val) (atomic_postdec(val) - 1) - -NO_TRACE ATOMIC static inline atomic_count_t test_and_set(atomic_t *val) - WRITES(&val->count) - REQUIRES_EXTENT_MUTABLE(val) -{ - /* On real hardware the retrieving of the original - value and storing 1 have to be done as a single - atomic action. */ - - atomic_count_t prev = val->count; - val->count = 1; - return prev; -} - -NO_TRACE static inline void atomic_lock_arch(atomic_t *val) - WRITES(&val->count) - REQUIRES_EXTENT_MUTABLE(val) -{ - do { - while (val->count); - } while (test_and_set(val)); -} - -#endif - -/** @} - */ Index: kernel/arch/abs32le/include/barrier.h =================================================================== --- kernel/arch/abs32le/include/barrier.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,55 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup abs32le - * @{ - */ -/** @file - */ - -#ifndef KERN_abs32le_BARRIER_H_ -#define KERN_abs32le_BARRIER_H_ - -/* - * Provisions are made to prevent compiler from reordering instructions itself. - */ - -#define CS_ENTER_BARRIER() -#define CS_LEAVE_BARRIER() - -#define memory_barrier() -#define read_barrier() -#define write_barrier() - -#define smc_coherence(addr) -#define smc_coherence_block(addr, size) - -#endif - -/** @} - */ Index: kernel/arch/abs32le/include/context.h =================================================================== --- kernel/arch/abs32le/include/context.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,57 +1,0 @@ -/* - * Copyright (c) 2010 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup abs32le - * @{ - */ -/** @file - */ - -#ifndef KERN_abs32le_CONTEXT_H_ -#define KERN_abs32le_CONTEXT_H_ - -#define STACK_ITEM_SIZE 4 -#define SP_DELTA 0 - -#define context_set(ctx, pc, stack, size) \ - context_set_generic(ctx, pc, stack, size) - -/* - * On real hardware this stores the registers which - * need to be preserved across function calls. - */ -typedef struct { - uintptr_t sp; - uintptr_t pc; - ipl_t ipl; -} context_t; - -#endif - -/** @} - */ Index: kernel/arch/abs32le/include/context_offset.h =================================================================== --- kernel/arch/abs32le/include/context_offset.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,44 +1,0 @@ -/* - * Copyright (c) 2010 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup abs32le - * @{ - */ -/** @file - */ - -#ifndef KERN_abs32le_CONTEXT_OFFSET_H_ -#define KERN_abs32le_CONTEXT_OFFSET_H_ - -#define OFFSET_PC 0x00 -#define OFFSET_IPL 0x04 - -#endif - -/** @} - */ Index: kernel/arch/abs32le/include/cpu.h =================================================================== --- kernel/arch/abs32le/include/cpu.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,49 +1,0 @@ -/* - * Copyright (c) 2010 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup abs32le - * @{ - */ -/** @file - */ - -#ifndef KERN_abs32le_CPU_H_ -#define KERN_abs32le_CPU_H_ - -/* - * On real hardware this structure stores - * information specific to the current - * CPU model. - */ -typedef struct { -} cpu_arch_t; - -#endif - -/** @} - */ Index: kernel/arch/abs32le/include/cycle.h =================================================================== --- kernel/arch/abs32le/include/cycle.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,48 +1,0 @@ -/* - * Copyright (c) 2010 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup abs32le - * @{ - */ -/** @file - */ - -#ifndef KERN_abs32le_CYCLE_H_ -#define KERN_abs32le_CYCLE_H_ - -#include - -NO_TRACE static inline uint64_t get_cycle(void) -{ - return 0; -} - -#endif - -/** @} - */ Index: kernel/arch/abs32le/include/elf.h =================================================================== --- kernel/arch/abs32le/include/elf.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,45 +1,0 @@ -/* - * Copyright (c) 2010 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup abs32le - * @{ - */ -/** @file - */ - -#ifndef KERN_abs32le_ELF_H_ -#define KERN_abs32le_ELF_H_ - -#define ELF_MACHINE EM_NO -#define ELF_DATA_ENCODING ELFDATA2LSB -#define ELF_CLASS ELFCLASS32 - -#endif - -/** @} - */ Index: kernel/arch/abs32le/include/faddr.h =================================================================== --- kernel/arch/abs32le/include/faddr.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,45 +1,0 @@ -/* - * Copyright (c) 2010 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup abs32le - * @{ - */ -/** @file - */ - -#ifndef KERN_abs32le_FADDR_H_ -#define KERN_abs32le_FADDR_H_ - -#include - -#define FADDR(fptr) ((uintptr_t) (fptr)) - -#endif - -/** @} - */ Index: kernel/arch/abs32le/include/fpu_context.h =================================================================== --- kernel/arch/abs32le/include/fpu_context.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,52 +1,0 @@ -/* - * Copyright (c) 2010 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup abs32le - * @{ - */ -/** @file - */ - -#ifndef KERN_abs32le_FPU_CONTEXT_H_ -#define KERN_abs32le_FPU_CONTEXT_H_ - -#include - -#define FPU_CONTEXT_ALIGN 16 - -/* - * On real hardware this stores the FPU registers - * which are part of the CPU context. - */ -typedef struct { -} fpu_context_t; - -#endif - -/** @} - */ Index: kernel/arch/abs32le/include/interrupt.h =================================================================== --- kernel/arch/abs32le/include/interrupt.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,49 +1,0 @@ -/* - * Copyright (c) 2010 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup abs32leinterrupt - * @{ - */ -/** @file - */ - -#ifndef KERN_abs32le_INTERRUPT_H_ -#define KERN_abs32le_INTERRUPT_H_ - -#include -#include - -#define IVT_ITEMS 0 -#define IVT_FIRST 0 - -#define VECTOR_TLB_SHOOTDOWN_IPI 0 - -#endif - -/** @} - */ Index: kernel/arch/abs32le/include/istate.h =================================================================== --- kernel/arch/abs32le/include/istate.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,98 +1,0 @@ -/* - * Copyright (c) 2010 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup abs32leinterrupt - * @{ - */ -/** @file - */ - -#ifndef KERN_abs32le_ISTATE_H_ -#define KERN_abs32le_ISTATE_H_ - -#include - -#ifdef KERNEL - -#include - -#else /* KERNEL */ - -#define REQUIRES_EXTENT_MUTABLE(arg) -#define WRITES(arg) - -#endif /* KERNEL */ - -/* - * On real hardware this stores the registers which - * need to be preserved during interupts. - */ -typedef struct istate { - uintptr_t ip; - uintptr_t fp; - uint32_t stack[]; -} istate_t; - -NO_TRACE static inline int istate_from_uspace(istate_t *istate) - REQUIRES_EXTENT_MUTABLE(istate) -{ - /* On real hardware this checks whether the interrupted - context originated from user space. */ - - return !(istate->ip & UINT32_C(0x80000000)); -} - -NO_TRACE static inline void istate_set_retaddr(istate_t *istate, - uintptr_t retaddr) - WRITES(&istate->ip) -{ - /* On real hardware this sets the instruction pointer. */ - - istate->ip = retaddr; -} - -NO_TRACE static inline uintptr_t istate_get_pc(istate_t *istate) - REQUIRES_EXTENT_MUTABLE(istate) -{ - /* On real hardware this returns the instruction pointer. */ - - return istate->ip; -} - -NO_TRACE static inline uintptr_t istate_get_fp(istate_t *istate) - REQUIRES_EXTENT_MUTABLE(istate) -{ - /* On real hardware this returns the frame pointer. */ - - return istate->fp; -} - -#endif - -/** @} - */ Index: kernel/arch/abs32le/include/mm/as.h =================================================================== --- kernel/arch/abs32le/include/mm/as.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,62 +1,0 @@ -/* - * Copyright (c) 2010 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup abs32lemm - * @{ - */ -/** @file - */ - -#ifndef KERN_abs32le_AS_H_ -#define KERN_abs32le_AS_H_ - -#define KERNEL_ADDRESS_SPACE_SHADOWED_ARCH 0 - -#define KERNEL_ADDRESS_SPACE_START_ARCH UINT32_C(0x80000000) -#define KERNEL_ADDRESS_SPACE_END_ARCH UINT32_C(0xffffffff) -#define USER_ADDRESS_SPACE_START_ARCH UINT32_C(0x00000000) -#define USER_ADDRESS_SPACE_END_ARCH UINT32_C(0x7fffffff) - -typedef struct { -} as_arch_t; - -#include - -#define as_constructor_arch(as, flags) (as != as) -#define as_destructor_arch(as) (as != as) -#define as_create_arch(as, flags) (as != as) -#define as_install_arch(as) -#define as_deinstall_arch(as) -#define as_invalidate_translation_cache(as, page, cnt) - -extern void as_arch_init(void); - -#endif - -/** @} - */ Index: kernel/arch/abs32le/include/mm/asid.h =================================================================== --- kernel/arch/abs32le/include/mm/asid.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,48 +1,0 @@ -/* - * Copyright (c) 2010 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup abc32lemm - * @{ - */ - -#ifndef KERN_abs32le_ASID_H_ -#define KERN_abs32le_ASID_H_ - -#include - -typedef uint32_t asid_t; - -#define ASID_MAX_ARCH 3 - -#define asid_get() (ASID_START + 1) -#define asid_put(asid) - -#endif - -/** @} - */ Index: kernel/arch/abs32le/include/mm/frame.h =================================================================== --- kernel/arch/abs32le/include/mm/frame.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,50 +1,0 @@ -/* - * Copyright (c) 2010 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup abs32lemm - * @{ - */ -/** @file - */ - -#ifndef KERN_abs32le_FRAME_H_ -#define KERN_abs32le_FRAME_H_ - -#define FRAME_WIDTH 12 /* 4K */ -#define FRAME_SIZE (1 << FRAME_WIDTH) - -#include - -extern void frame_low_arch_init(void); -extern void frame_high_arch_init(void); -extern void physmem_print(void); - -#endif - -/** @} - */ Index: kernel/arch/abs32le/include/mm/km.h =================================================================== --- kernel/arch/abs32le/include/mm/km.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,47 +1,0 @@ -/* - * Copyright (c) 2011 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup abs32lemm - * @{ - */ -/** @file - */ - -#ifndef KERN_abs32le_KM_H_ -#define KERN_abs32le_KM_H_ - -#include - -extern void km_identity_arch_init(void); -extern void km_non_identity_arch_init(void); -extern bool km_is_non_identity_arch(uintptr_t); - -#endif - -/** @} - */ Index: kernel/arch/abs32le/include/mm/page.h =================================================================== --- kernel/arch/abs32le/include/mm/page.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,198 +1,0 @@ -/* - * Copyright (c) 2010 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup abs32lemm - * @{ - */ -/** @file - */ - -#ifndef KERN_abs32le_PAGE_H_ -#define KERN_abs32le_PAGE_H_ - -#include -#include - -#define PAGE_WIDTH FRAME_WIDTH -#define PAGE_SIZE FRAME_SIZE - -#define KA2PA(x) (((uintptr_t) (x)) - UINT32_C(0x80000000)) -#define PA2KA(x) (((uintptr_t) (x)) + UINT32_C(0x80000000)) - -/* - * This is an example of 2-level page tables (PTL1 and PTL2 are left out) - * on top of the generic 4-level page table interface. - */ - -/* Number of entries in each level. */ -#define PTL0_ENTRIES_ARCH 1024 -#define PTL1_ENTRIES_ARCH 0 -#define PTL2_ENTRIES_ARCH 0 -#define PTL3_ENTRIES_ARCH 1024 - -/* Page table sizes for each level. */ -#define PTL0_SIZE_ARCH ONE_FRAME -#define PTL1_SIZE_ARCH 0 -#define PTL2_SIZE_ARCH 0 -#define PTL3_SIZE_ARCH ONE_FRAME - -/* Macros calculating indices for each level. */ -#define PTL0_INDEX_ARCH(vaddr) (((vaddr) >> 22) & 0x3ffU) -#define PTL1_INDEX_ARCH(vaddr) 0 -#define PTL2_INDEX_ARCH(vaddr) 0 -#define PTL3_INDEX_ARCH(vaddr) (((vaddr) >> 12) & 0x3ffU) - -/* Get PTE address accessors for each level. */ -#define GET_PTL1_ADDRESS_ARCH(ptl0, i) \ - ((pte_t *) ((((pte_t *) (ptl0))[(i)].frame_address) << 12)) -#define GET_PTL2_ADDRESS_ARCH(ptl1, i) \ - (ptl1) -#define GET_PTL3_ADDRESS_ARCH(ptl2, i) \ - (ptl2) -#define GET_FRAME_ADDRESS_ARCH(ptl3, i) \ - ((uintptr_t) ((((pte_t *) (ptl3))[(i)].frame_address) << 12)) - -/* Set PTE address accessors for each level. */ -#define SET_PTL0_ADDRESS_ARCH(ptl0) -#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) \ - (((pte_t *) (ptl0))[(i)].frame_address = (a) >> 12) -#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a) -#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a) -#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) \ - (((pte_t *) (ptl3))[(i)].frame_address = (a) >> 12) - -/* Get PTE flags accessors for each level. */ -#define GET_PTL1_FLAGS_ARCH(ptl0, i) \ - get_pt_flags((pte_t *) (ptl0), (size_t) (i)) -#define GET_PTL2_FLAGS_ARCH(ptl1, i) \ - PAGE_PRESENT -#define GET_PTL3_FLAGS_ARCH(ptl2, i) \ - PAGE_PRESENT -#define GET_FRAME_FLAGS_ARCH(ptl3, i) \ - get_pt_flags((pte_t *) (ptl3), (size_t) (i)) - -/* Set PTE flags accessors for each level. */ -#define SET_PTL1_FLAGS_ARCH(ptl0, i, x) \ - set_pt_flags((pte_t *) (ptl0), (size_t) (i), (x)) -#define SET_PTL2_FLAGS_ARCH(ptl1, i, x) -#define SET_PTL3_FLAGS_ARCH(ptl2, i, x) -#define SET_FRAME_FLAGS_ARCH(ptl3, i, x) \ - set_pt_flags((pte_t *) (ptl3), (size_t) (i), (x)) - -/* Set PTE present bit accessors for each level. */ -#define SET_PTL1_PRESENT_ARCH(ptl0, i) \ - set_pt_present((pte_t *) (ptl0), (size_t) (i)) -#define SET_PTL2_PRESENT_ARCH(ptl1, i) -#define SET_PTL3_PRESENT_ARCH(ptl2, i) -#define SET_FRAME_PRESENT_ARCH(ptl3, i) \ - set_pt_present((pte_t *) (ptl3), (size_t) (i)) - -/* Macros for querying the last level entries. */ -#define PTE_VALID_ARCH(p) \ - (*((uint32_t *) (p)) != 0) -#define PTE_PRESENT_ARCH(p) \ - ((p)->present != 0) -#define PTE_GET_FRAME_ARCH(p) \ - ((p)->frame_address << FRAME_WIDTH) -#define PTE_WRITABLE_ARCH(p) \ - ((p)->writeable != 0) -#define PTE_EXECUTABLE_ARCH(p) 1 - -#include -#include -#include - -/** Page Table Entry. */ -typedef struct { - unsigned int present : 1; - unsigned int writeable : 1; - unsigned int uaccessible : 1; - unsigned int page_write_through : 1; - unsigned int page_cache_disable : 1; - unsigned int accessed : 1; - unsigned int dirty : 1; - unsigned int pat : 1; - unsigned int global : 1; - - /** Valid content even if the present bit is not set. */ - unsigned int soft_valid : 1; - unsigned int avl : 2; - unsigned int frame_address : 20; -} __attribute__((packed)) pte_t; - -NO_TRACE static inline unsigned int get_pt_flags(pte_t *pt, size_t i) - REQUIRES_ARRAY_MUTABLE(pt, PTL0_ENTRIES_ARCH) -{ - pte_t *p = &pt[i]; - - return ( - ((unsigned int) (!p->page_cache_disable) << PAGE_CACHEABLE_SHIFT) | - ((unsigned int) (!p->present) << PAGE_PRESENT_SHIFT) | - ((unsigned int) p->uaccessible << PAGE_USER_SHIFT) | - (1 << PAGE_READ_SHIFT) | - ((unsigned int) p->writeable << PAGE_WRITE_SHIFT) | - (1 << PAGE_EXEC_SHIFT) | - ((unsigned int) p->global << PAGE_GLOBAL_SHIFT) - ); -} - -NO_TRACE static inline void set_pt_flags(pte_t *pt, size_t i, int flags) - WRITES(ARRAY_RANGE(pt, PTL0_ENTRIES_ARCH)) - REQUIRES_ARRAY_MUTABLE(pt, PTL0_ENTRIES_ARCH) -{ - pte_t *p = &pt[i]; - - p->page_cache_disable = !(flags & PAGE_CACHEABLE); - p->present = !(flags & PAGE_NOT_PRESENT); - p->uaccessible = (flags & PAGE_USER) != 0; - p->writeable = (flags & PAGE_WRITE) != 0; - p->global = (flags & PAGE_GLOBAL) != 0; - - /* - * Ensure that there is at least one bit set even if the present bit is - * cleared. - */ - p->soft_valid = true; -} - -NO_TRACE static inline void set_pt_present(pte_t *pt, size_t i) - WRITES(ARRAY_RANGE(pt, PTL0_ENTRIES_ARCH)) - REQUIRES_ARRAY_MUTABLE(pt, PTL0_ENTRIES_ARCH) -{ - pte_t *p = &pt[i]; - - p->present = 1; -} - -extern void page_arch_init(void); -extern void page_fault(unsigned int, istate_t *); - -#endif - -/** @} - */ Index: kernel/arch/abs32le/include/mm/tlb.h =================================================================== --- kernel/arch/abs32le/include/mm/tlb.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,41 +1,0 @@ -/* - * Copyright (c) 2010 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup abs32lemm - * @{ - */ -/** @file - */ - -#ifndef KERN_abs32le_TLB_H_ -#define KERN_abs32le_TLB_H_ - -#endif - -/** @} - */ Index: kernel/arch/abs32le/include/proc/task.h =================================================================== --- kernel/arch/abs32le/include/proc/task.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,51 +1,0 @@ -/* - * Copyright (c) 2010 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup abs32leproc - * @{ - */ -/** @file - */ - -#ifndef KERN_abs32le_TASK_H_ -#define KERN_abs32le_TASK_H_ - -#include -#include - -/* - * On real hardware this structure stores task information - * specific to the architecture. - */ -typedef struct { -} task_arch_t; - -#endif - -/** @} - */ Index: kernel/arch/abs32le/include/proc/thread.h =================================================================== --- kernel/arch/abs32le/include/proc/thread.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,49 +1,0 @@ -/* - * Copyright (c) 2010 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup abs32leproc - * @{ - */ -/** @file - */ - -#ifndef KERN_abs32le_THREAD_H_ -#define KERN_abs32le_THREAD_H_ - -#include - -typedef struct { -} thread_arch_t; - -#define thr_constructor_arch(thr) -#define thr_destructor_arch(thr) - -#endif - -/** @} - */ Index: kernel/arch/abs32le/include/types.h =================================================================== --- kernel/arch/abs32le/include/types.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,67 +1,0 @@ -/* - * Copyright (c) 2010 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup abs32le - * @{ - */ -/** @file - */ - -#ifndef KERN_abs32le_TYPES_H_ -#define KERN_abs32le_TYPES_H_ - -#define ATOMIC_COUNT_MIN UINT32_MIN -#define ATOMIC_COUNT_MAX UINT32_MAX - -typedef uint32_t size_t; -typedef int32_t ssize_t; - -typedef uint32_t uintptr_t; -typedef uint32_t pfn_t; - -typedef uint32_t ipl_t; - -typedef uint32_t sysarg_t; -typedef int32_t native_t; -typedef uint32_t atomic_count_t; - -typedef struct { -} fncptr_t; - -#define INTN_C(c) INT32_C(c) -#define UINTN_C(c) UINT32_C(c) - -#define PRIdn PRId32 /**< Format for native_t. */ -#define PRIun PRIu32 /**< Format for sysarg_t. */ -#define PRIxn PRIx32 /**< Format for hexadecimal sysarg_t. */ -#define PRIua PRIu32 /**< Format for atomic_count_t. */ - -#endif - -/** @} - */ Index: kernel/arch/amd64/include/arch.h =================================================================== --- kernel/arch/amd64/include/arch.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,45 +1,0 @@ -/* - * Copyright (c) 2005 Ondrej Palkovsky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup amd64 - * @{ - */ -/** @file - */ - -#ifndef KERN_amd64_ARCH_H_ -#define KERN_amd64_ARCH_H_ - -#include - -extern void arch_pre_main(uint32_t, void *); - -#endif - -/** @} - */ Index: kernel/arch/amd64/include/arch/arch.h =================================================================== --- kernel/arch/amd64/include/arch/arch.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/amd64/include/arch/arch.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2005 Ondrej Palkovsky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup amd64 + * @{ + */ +/** @file + */ + +#ifndef KERN_amd64_ARCH_H_ +#define KERN_amd64_ARCH_H_ + +#include + +extern void arch_pre_main(uint32_t, void *); + +#endif + +/** @} + */ Index: kernel/arch/amd64/include/arch/asm.h =================================================================== --- kernel/arch/amd64/include/arch/asm.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/amd64/include/arch/asm.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,525 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup amd64 + * @{ + */ +/** @file + */ + +#ifndef KERN_amd64_ASM_H_ +#define KERN_amd64_ASM_H_ + +#include +#include +#include +#include + +#define IO_SPACE_BOUNDARY ((void *) (64 * 1024)) + +/** Return base address of current stack. + * + * Return the base address of the current stack. + * The stack is assumed to be STACK_SIZE bytes long. + * The stack must start on page boundary. + * + */ +NO_TRACE static inline uintptr_t get_stack_base(void) +{ + uintptr_t v; + + asm volatile ( + "andq %%rsp, %[v]\n" + : [v] "=r" (v) + : "0" (~((uint64_t) STACK_SIZE - 1)) + ); + + return v; +} + +NO_TRACE static inline void cpu_sleep(void) +{ + asm volatile ( + "hlt\n" + ); +} + +NO_TRACE static inline void __attribute__((noreturn)) cpu_halt(void) +{ + while (true) { + asm volatile ( + "hlt\n" + ); + } +} + +/** Byte from port + * + * Get byte from port + * + * @param port Port to read from + * @return Value read + * + */ +NO_TRACE static inline uint8_t pio_read_8(ioport8_t *port) +{ + if (port < (ioport8_t *) IO_SPACE_BOUNDARY) { + uint8_t val; + + asm volatile ( + "inb %w[port], %b[val]\n" + : [val] "=a" (val) + : [port] "d" (port) + ); + + return val; + } else + return (uint8_t) *port; +} + +/** Word from port + * + * Get word from port + * + * @param port Port to read from + * @return Value read + * + */ +NO_TRACE static inline uint16_t pio_read_16(ioport16_t *port) +{ + if (port < (ioport16_t *) IO_SPACE_BOUNDARY) { + uint16_t val; + + asm volatile ( + "inw %w[port], %w[val]\n" + : [val] "=a" (val) + : [port] "d" (port) + ); + + return val; + } else + return (uint16_t) *port; +} + +/** Double word from port + * + * Get double word from port + * + * @param port Port to read from + * @return Value read + * + */ +NO_TRACE static inline uint32_t pio_read_32(ioport32_t *port) +{ + if (port < (ioport32_t *) IO_SPACE_BOUNDARY) { + uint32_t val; + + asm volatile ( + "inl %w[port], %[val]\n" + : [val] "=a" (val) + : [port] "d" (port) + ); + + return val; + } else + return (uint32_t) *port; +} + +/** Byte to port + * + * Output byte to port + * + * @param port Port to write to + * @param val Value to write + * + */ +NO_TRACE static inline void pio_write_8(ioport8_t *port, uint8_t val) +{ + if (port < (ioport8_t *) IO_SPACE_BOUNDARY) { + asm volatile ( + "outb %b[val], %w[port]\n" + :: [val] "a" (val), [port] "d" (port) + ); + } else + *port = val; +} + +/** Word to port + * + * Output word to port + * + * @param port Port to write to + * @param val Value to write + * + */ +NO_TRACE static inline void pio_write_16(ioport16_t *port, uint16_t val) +{ + if (port < (ioport16_t *) IO_SPACE_BOUNDARY) { + asm volatile ( + "outw %w[val], %w[port]\n" + :: [val] "a" (val), [port] "d" (port) + ); + } else + *port = val; +} + +/** Double word to port + * + * Output double word to port + * + * @param port Port to write to + * @param val Value to write + * + */ +NO_TRACE static inline void pio_write_32(ioport32_t *port, uint32_t val) +{ + if (port < (ioport32_t *) IO_SPACE_BOUNDARY) { + asm volatile ( + "outl %[val], %w[port]\n" + :: [val] "a" (val), [port] "d" (port) + ); + } else + *port = val; +} + +/** Swap Hidden part of GS register with visible one */ +NO_TRACE static inline void swapgs(void) +{ + asm volatile ( + "swapgs" + ); +} + +/** Enable interrupts. + * + * Enable interrupts and return previous + * value of EFLAGS. + * + * @return Old interrupt priority level. + * + */ +NO_TRACE static inline ipl_t interrupts_enable(void) { + ipl_t v; + + asm volatile ( + "pushfq\n" + "popq %[v]\n" + "sti\n" + : [v] "=r" (v) + ); + + return v; +} + +/** Disable interrupts. + * + * Disable interrupts and return previous + * value of EFLAGS. + * + * @return Old interrupt priority level. + * + */ +NO_TRACE static inline ipl_t interrupts_disable(void) { + ipl_t v; + + asm volatile ( + "pushfq\n" + "popq %[v]\n" + "cli\n" + : [v] "=r" (v) + ); + + return v; +} + +/** Restore interrupt priority level. + * + * Restore EFLAGS. + * + * @param ipl Saved interrupt priority level. + * + */ +NO_TRACE static inline void interrupts_restore(ipl_t ipl) { + asm volatile ( + "pushq %[ipl]\n" + "popfq\n" + :: [ipl] "r" (ipl) + ); +} + +/** Return interrupt priority level. + * + * Return EFLAFS. + * + * @return Current interrupt priority level. + * + */ +NO_TRACE static inline ipl_t interrupts_read(void) { + ipl_t v; + + asm volatile ( + "pushfq\n" + "popq %[v]\n" + : [v] "=r" (v) + ); + + return v; +} + +/** Check interrupts state. + * + * @return True if interrupts are disabled. + * + */ +NO_TRACE static inline bool interrupts_disabled(void) +{ + ipl_t v; + + asm volatile ( + "pushfq\n" + "popq %[v]\n" + : [v] "=r" (v) + ); + + return ((v & RFLAGS_IF) == 0); +} + +/** Write to MSR */ +NO_TRACE static inline void write_msr(uint32_t msr, uint64_t value) +{ + asm volatile ( + "wrmsr\n" + :: "c" (msr), + "a" ((uint32_t) (value)), + "d" ((uint32_t) (value >> 32)) + ); +} + +NO_TRACE static inline sysarg_t read_msr(uint32_t msr) +{ + uint32_t ax, dx; + + asm volatile ( + "rdmsr\n" + : "=a" (ax), "=d" (dx) + : "c" (msr) + ); + + return ((uint64_t) dx << 32) | ax; +} + +/** Enable local APIC + * + * Enable local APIC in MSR. + * + */ +NO_TRACE static inline void enable_l_apic_in_msr() +{ + asm volatile ( + "movl $0x1b, %%ecx\n" + "rdmsr\n" + "orl $(1 << 11),%%eax\n" + "orl $(0xfee00000),%%eax\n" + "wrmsr\n" + ::: "%eax", "%ecx", "%edx" + ); +} + +/** Invalidate TLB Entry. + * + * @param addr Address on a page whose TLB entry is to be invalidated. + * + */ +NO_TRACE static inline void invlpg(uintptr_t addr) +{ + asm volatile ( + "invlpg %[addr]\n" + :: [addr] "m" (*((sysarg_t *) addr)) + ); +} + +/** Load GDTR register from memory. + * + * @param gdtr_reg Address of memory from where to load GDTR. + * + */ +NO_TRACE static inline void gdtr_load(ptr_16_64_t *gdtr_reg) +{ + asm volatile ( + "lgdtq %[gdtr_reg]\n" + :: [gdtr_reg] "m" (*gdtr_reg) + ); +} + +/** Store GDTR register to memory. + * + * @param gdtr_reg Address of memory to where to load GDTR. + * + */ +NO_TRACE static inline void gdtr_store(ptr_16_64_t *gdtr_reg) +{ + asm volatile ( + "sgdtq %[gdtr_reg]\n" + :: [gdtr_reg] "m" (*gdtr_reg) + ); +} + +/** Load IDTR register from memory. + * + * @param idtr_reg Address of memory from where to load IDTR. + * + */ +NO_TRACE static inline void idtr_load(ptr_16_64_t *idtr_reg) +{ + asm volatile ( + "lidtq %[idtr_reg]\n" + :: [idtr_reg] "m" (*idtr_reg)); +} + +/** Load TR from descriptor table. + * + * @param sel Selector specifying descriptor of TSS segment. + * + */ +NO_TRACE static inline void tr_load(uint16_t sel) +{ + asm volatile ( + "ltr %[sel]" + :: [sel] "r" (sel) + ); +} + +#define GEN_READ_REG(reg) NO_TRACE static inline sysarg_t read_ ##reg (void) \ + { \ + sysarg_t res; \ + asm volatile ( \ + "movq %%" #reg ", %[res]" \ + : [res] "=r" (res) \ + ); \ + return res; \ + } + +#define GEN_WRITE_REG(reg) NO_TRACE static inline void write_ ##reg (sysarg_t regn) \ + { \ + asm volatile ( \ + "movq %[regn], %%" #reg \ + :: [regn] "r" (regn) \ + ); \ + } + +GEN_READ_REG(cr0) +GEN_READ_REG(cr2) +GEN_READ_REG(cr3) +GEN_WRITE_REG(cr3) + +GEN_READ_REG(dr0) +GEN_READ_REG(dr1) +GEN_READ_REG(dr2) +GEN_READ_REG(dr3) +GEN_READ_REG(dr6) +GEN_READ_REG(dr7) + +GEN_WRITE_REG(dr0) +GEN_WRITE_REG(dr1) +GEN_WRITE_REG(dr2) +GEN_WRITE_REG(dr3) +GEN_WRITE_REG(dr6) +GEN_WRITE_REG(dr7) + +extern void asm_delay_loop(uint32_t); +extern void asm_fake_loop(uint32_t); + +extern uintptr_t int_0; +extern uintptr_t int_1; +extern uintptr_t int_2; +extern uintptr_t int_3; +extern uintptr_t int_4; +extern uintptr_t int_5; +extern uintptr_t int_6; +extern uintptr_t int_7; +extern uintptr_t int_8; +extern uintptr_t int_9; +extern uintptr_t int_10; +extern uintptr_t int_11; +extern uintptr_t int_12; +extern uintptr_t int_13; +extern uintptr_t int_14; +extern uintptr_t int_15; +extern uintptr_t int_16; +extern uintptr_t int_17; +extern uintptr_t int_18; +extern uintptr_t int_19; +extern uintptr_t int_20; +extern uintptr_t int_21; +extern uintptr_t int_22; +extern uintptr_t int_23; +extern uintptr_t int_24; +extern uintptr_t int_25; +extern uintptr_t int_26; +extern uintptr_t int_27; +extern uintptr_t int_28; +extern uintptr_t int_29; +extern uintptr_t int_30; +extern uintptr_t int_31; +extern uintptr_t int_32; +extern uintptr_t int_33; +extern uintptr_t int_34; +extern uintptr_t int_35; +extern uintptr_t int_36; +extern uintptr_t int_37; +extern uintptr_t int_38; +extern uintptr_t int_39; +extern uintptr_t int_40; +extern uintptr_t int_41; +extern uintptr_t int_42; +extern uintptr_t int_43; +extern uintptr_t int_44; +extern uintptr_t int_45; +extern uintptr_t int_46; +extern uintptr_t int_47; +extern uintptr_t int_48; +extern uintptr_t int_49; +extern uintptr_t int_50; +extern uintptr_t int_51; +extern uintptr_t int_52; +extern uintptr_t int_53; +extern uintptr_t int_54; +extern uintptr_t int_55; +extern uintptr_t int_56; +extern uintptr_t int_57; +extern uintptr_t int_58; +extern uintptr_t int_59; +extern uintptr_t int_60; +extern uintptr_t int_61; +extern uintptr_t int_62; +extern uintptr_t int_63; + +#endif + +/** @} + */ Index: kernel/arch/amd64/include/arch/atomic.h =================================================================== --- kernel/arch/amd64/include/arch/atomic.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/amd64/include/arch/atomic.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,145 @@ +/* + * Copyright (c) 2001-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup amd64 + * @{ + */ +/** @file + */ + +#ifndef KERN_amd64_ATOMIC_H_ +#define KERN_amd64_ATOMIC_H_ + +#include +#include +#include +#include + +NO_TRACE static inline void atomic_inc(atomic_t *val) +{ +#ifdef CONFIG_SMP + asm volatile ( + "lock incq %[count]\n" + : [count] "+m" (val->count) + ); +#else + asm volatile ( + "incq %[count]\n" + : [count] "+m" (val->count) + ); +#endif /* CONFIG_SMP */ +} + +NO_TRACE static inline void atomic_dec(atomic_t *val) +{ +#ifdef CONFIG_SMP + asm volatile ( + "lock decq %[count]\n" + : [count] "+m" (val->count) + ); +#else + asm volatile ( + "decq %[count]\n" + : [count] "+m" (val->count) + ); +#endif /* CONFIG_SMP */ +} + +NO_TRACE static inline atomic_count_t atomic_postinc(atomic_t *val) +{ + atomic_count_t r = 1; + + asm volatile ( + "lock xaddq %[r], %[count]\n" + : [count] "+m" (val->count), + [r] "+r" (r) + ); + + return r; +} + +NO_TRACE static inline atomic_count_t atomic_postdec(atomic_t *val) +{ + atomic_count_t r = -1; + + asm volatile ( + "lock xaddq %[r], %[count]\n" + : [count] "+m" (val->count), + [r] "+r" (r) + ); + + return r; +} + +#define atomic_preinc(val) (atomic_postinc(val) + 1) +#define atomic_predec(val) (atomic_postdec(val) - 1) + +NO_TRACE static inline atomic_count_t test_and_set(atomic_t *val) +{ + atomic_count_t v = 1; + + asm volatile ( + "xchgq %[v], %[count]\n" + : [v] "+r" (v), + [count] "+m" (val->count) + ); + + return v; +} + +/** amd64 specific fast spinlock */ +NO_TRACE static inline void atomic_lock_arch(atomic_t *val) +{ + atomic_count_t tmp; + + preemption_disable(); + asm volatile ( + "0:\n" + " pause\n" + " mov %[count], %[tmp]\n" + " testq %[tmp], %[tmp]\n" + " jnz 0b\n" /* lightweight looping on locked spinlock */ + + " incq %[tmp]\n" /* now use the atomic operation */ + " xchgq %[count], %[tmp]\n" + " testq %[tmp], %[tmp]\n" + " jnz 0b\n" + : [count] "+m" (val->count), + [tmp] "=&r" (tmp) + ); + + /* + * Prevent critical section code from bleeding out this way up. + */ + CS_ENTER_BARRIER(); +} + +#endif + +/** @} + */ Index: kernel/arch/amd64/include/arch/barrier.h =================================================================== --- kernel/arch/amd64/include/arch/barrier.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/amd64/include/arch/barrier.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,1 @@ +../../../ia32/include/arch/barrier.h Index: kernel/arch/amd64/include/arch/bios =================================================================== --- kernel/arch/amd64/include/arch/bios (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/amd64/include/arch/bios (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,1 @@ +../../../ia32/include/arch/bios Index: kernel/arch/amd64/include/arch/boot/boot.h =================================================================== --- kernel/arch/amd64/include/arch/boot/boot.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/amd64/include/arch/boot/boot.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,56 @@ +/* + * Copyright (c) 2005 Ondrej Palkovsky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup amd64 + * @{ + */ +/** @file + */ + +#ifndef KERN_amd64_BOOT_H_ +#define KERN_amd64_BOOT_H_ + +#define BOOT_OFFSET 0x108000 +#define AP_BOOT_OFFSET 0x008000 +#define BOOT_STACK_SIZE 0x000400 + +#ifndef __ASM__ + +#ifdef CONFIG_SMP + +/* This is only a symbol so the type is dummy. Obtain the value using &. */ +extern int _hardcoded_unmapped_size; + +#endif /* CONFIG_SMP */ + +#endif /* __ASM__ */ + +#endif + +/** @} + */ Index: kernel/arch/amd64/include/arch/boot/memmap.h =================================================================== --- kernel/arch/amd64/include/arch/boot/memmap.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/amd64/include/arch/boot/memmap.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,1 @@ +../../../../ia32/include/arch/boot/memmap.h Index: kernel/arch/amd64/include/arch/context.h =================================================================== --- kernel/arch/amd64/include/arch/context.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/amd64/include/arch/context.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,75 @@ +/* + * Copyright (c) 2005 Ondrej Palkovsky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup amd64 + * @{ + */ +/** @file + */ + +#ifndef KERN_amd64_CONTEXT_H_ +#define KERN_amd64_CONTEXT_H_ + +#include + +/* + * According to ABI the stack MUST be aligned on + * 16-byte boundary. If it is not, the va_arg calling will + * panic sooner or later + */ +#define SP_DELTA 16 + +#define context_set(c, _pc, stack, size) \ + do { \ + (c)->pc = (uintptr_t) (_pc); \ + (c)->sp = ((uintptr_t) (stack)) + (size) - SP_DELTA; \ + (c)->rbp = 0; \ + } while (0) + +/* We include only registers that must be preserved + * during function call + */ +typedef struct { + uintptr_t sp; + uintptr_t pc; + + uint64_t rbx; + uint64_t rbp; + + uint64_t r12; + uint64_t r13; + uint64_t r14; + uint64_t r15; + + ipl_t ipl; +} __attribute__ ((packed)) context_t; + +#endif + +/** @} + */ Index: kernel/arch/amd64/include/arch/context_offset.h =================================================================== --- kernel/arch/amd64/include/arch/context_offset.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/amd64/include/arch/context_offset.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,79 @@ +/* + * Copyright (c) 2005 Ondrej Palkovsky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef KERN_amd64_CONTEXT_OFFSET_H_ +#define KERN_amd64_CONTEXT_OFFSET_H_ + +#define OFFSET_SP 0x00 +#define OFFSET_PC 0x08 +#define OFFSET_RBX 0x10 +#define OFFSET_RBP 0x18 +#define OFFSET_R12 0x20 +#define OFFSET_R13 0x28 +#define OFFSET_R14 0x30 +#define OFFSET_R15 0x38 + +#ifdef KERNEL + #define OFFSET_IPL 0x40 +#else + #define OFFSET_TLS 0x40 +#endif + +#ifdef __ASM__ + +# ctx: address of the structure with saved context +# pc: return address +.macro CONTEXT_SAVE_ARCH_CORE ctx:req pc:req + movq \pc, OFFSET_PC(\ctx) + movq %rsp, OFFSET_SP(\ctx) + + movq %rbx, OFFSET_RBX(\ctx) + movq %rbp, OFFSET_RBP(\ctx) + movq %r12, OFFSET_R12(\ctx) + movq %r13, OFFSET_R13(\ctx) + movq %r14, OFFSET_R14(\ctx) + movq %r15, OFFSET_R15(\ctx) +.endm + +# ctx: address of the structure with saved context +.macro CONTEXT_RESTORE_ARCH_CORE ctx:req pc:req + movq OFFSET_R15(\ctx), %r15 + movq OFFSET_R14(\ctx), %r14 + movq OFFSET_R13(\ctx), %r13 + movq OFFSET_R12(\ctx), %r12 + movq OFFSET_RBP(\ctx), %rbp + movq OFFSET_RBX(\ctx), %rbx + + movq OFFSET_SP(\ctx), %rsp # ctx->sp -> %rsp + + movq OFFSET_PC(\ctx), \pc +.endm + +#endif + +#endif Index: kernel/arch/amd64/include/arch/cpu.h =================================================================== --- kernel/arch/amd64/include/arch/cpu.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/amd64/include/arch/cpu.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,93 @@ +/* + * Copyright (c) 2001-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup amd64 + * @{ + */ +/** @file + */ + +#ifndef KERN_amd64_CPU_H_ +#define KERN_amd64_CPU_H_ + +#define RFLAGS_CF (1 << 0) +#define RFLAGS_PF (1 << 2) +#define RFLAGS_AF (1 << 4) +#define RFLAGS_ZF (1 << 6) +#define RFLAGS_SF (1 << 7) +#define RFLAGS_TF (1 << 8) +#define RFLAGS_IF (1 << 9) +#define RFLAGS_DF (1 << 10) +#define RFLAGS_OF (1 << 11) +#define RFLAGS_NT (1 << 14) +#define RFLAGS_RF (1 << 16) + +#define EFER_MSR_NUM 0xc0000080 +#define AMD_SCE_FLAG 0 +#define AMD_LME_FLAG 8 +#define AMD_LMA_FLAG 10 +#define AMD_FFXSR_FLAG 14 +#define AMD_NXE_FLAG 11 + +/* MSR registers */ +#define AMD_MSR_STAR 0xc0000081 +#define AMD_MSR_LSTAR 0xc0000082 +#define AMD_MSR_SFMASK 0xc0000084 +#define AMD_MSR_FS 0xc0000100 +#define AMD_MSR_GS 0xc0000101 + +#ifndef __ASM__ + +#include + +typedef struct { + int vendor; + int family; + int model; + int stepping; + tss_t *tss; + + size_t iomapver_copy; /** Copy of TASK's I/O Permission bitmap generation count. */ +} cpu_arch_t; + +struct star_msr { +}; + +struct lstar_msr { +}; + +extern void set_efer_flag(int flag); +extern uint64_t read_efer_flag(void); +void cpu_setup_fpu(void); + +#endif /* __ASM__ */ + +#endif + +/** @} + */ Index: kernel/arch/amd64/include/arch/cpuid.h =================================================================== --- kernel/arch/amd64/include/arch/cpuid.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/amd64/include/arch/cpuid.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,67 @@ +/* + * Copyright (c) 2001-2004 Ondrej Palkovsky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup amd64 + * @{ + */ +/** @file + */ + +#ifndef KERN_amd64_CPUID_H_ +#define KERN_amd64_CPUID_H_ + +#define AMD_CPUID_EXTENDED 0x80000001 +#define AMD_EXT_NOEXECUTE 20 +#define AMD_EXT_LONG_MODE 29 + +#define INTEL_CPUID_LEVEL 0x00000000 +#define INTEL_CPUID_STANDARD 0x00000001 +#define INTEL_CPUID_EXTENDED 0x80000000 +#define INTEL_SSE2 26 +#define INTEL_FXSAVE 24 + +#ifndef __ASM__ + +#include + +typedef struct { + uint32_t cpuid_eax; + uint32_t cpuid_ebx; + uint32_t cpuid_ecx; + uint32_t cpuid_edx; +} __attribute__ ((packed)) cpu_info_t; + +extern int has_cpuid(void); + +extern void cpuid(uint32_t cmd, cpu_info_t *info); + +#endif /* !def __ASM__ */ +#endif + +/** @} + */ Index: kernel/arch/amd64/include/arch/cycle.h =================================================================== --- kernel/arch/amd64/include/arch/cycle.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/amd64/include/arch/cycle.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,57 @@ +/* + * Copyright (c) 2006 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup amd64 + * @{ + */ +/** @file + */ + +#ifndef KERN_amd64_CYCLE_H_ +#define KERN_amd64_CYCLE_H_ + +#include + +NO_TRACE static inline uint64_t get_cycle(void) +{ + uint32_t lower; + uint32_t upper; + + asm volatile ( + "rdtsc\n" + : "=a" (lower), + "=d" (upper) + ); + + return ((uint64_t) lower) | (((uint64_t) upper) << 32); +} + +#endif + +/** @} + */ Index: kernel/arch/amd64/include/arch/ddi/ddi.h =================================================================== --- kernel/arch/amd64/include/arch/ddi/ddi.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/amd64/include/arch/ddi/ddi.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,46 @@ +/* + * Copyright (c) 2006 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup amd64ddi + * @{ + */ + +/** + * @file + * @brief amd64 specific DDI declarations and macros. + */ + +#ifndef KERN_amd64_DDI_H_ +#define KERN_amd64_DDI_H_ + +extern void io_perm_bitmap_install(void); + +#endif + +/** @} + */ Index: kernel/arch/amd64/include/arch/drivers =================================================================== --- kernel/arch/amd64/include/arch/drivers (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/amd64/include/arch/drivers (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,1 @@ +../../../ia32/include/arch/drivers Index: kernel/arch/amd64/include/arch/elf.h =================================================================== --- kernel/arch/amd64/include/arch/elf.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/amd64/include/arch/elf.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2006 Sergey Bondari + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup amd64 + * @{ + */ +/** @file + */ + +#ifndef KERN_amd64_ELF_H_ +#define KERN_amd64_ELF_H_ + +#define ELF_MACHINE EM_X86_64 +#define ELF_DATA_ENCODING ELFDATA2LSB +#define ELF_CLASS ELFCLASS64 + +#endif + +/** @} + */ Index: kernel/arch/amd64/include/arch/faddr.h =================================================================== --- kernel/arch/amd64/include/arch/faddr.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/amd64/include/arch/faddr.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2005 Ondrej Palkovsky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup amd64 + * @{ + */ +/** @file + */ + +#ifndef KERN_amd64_FADDR_H_ +#define KERN_amd64_FADDR_H_ + +#include + +#define FADDR(fptr) ((uintptr_t) (fptr)) + +#endif + +/** @} + */ Index: kernel/arch/amd64/include/arch/fpu_context.h =================================================================== --- kernel/arch/amd64/include/arch/fpu_context.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/amd64/include/arch/fpu_context.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,1 @@ +../../../ia32/include/arch/fpu_context.h Index: kernel/arch/amd64/include/arch/interrupt.h =================================================================== --- kernel/arch/amd64/include/arch/interrupt.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/amd64/include/arch/interrupt.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,84 @@ +/* + * Copyright (c) 2001-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup amd64interrupt + * @{ + */ +/** @file + */ + +#ifndef KERN_amd64_INTERRUPT_H_ +#define KERN_amd64_INTERRUPT_H_ + +#include +#include +#include + +#define IVT_ITEMS IDT_ITEMS +#define IVT_FIRST 0 + +#define EXC_COUNT 32 +#define IRQ_COUNT 16 + +#define IVT_EXCBASE 0 +#define IVT_IRQBASE (IVT_EXCBASE + EXC_COUNT) +#define IVT_FREEBASE (IVT_IRQBASE + IRQ_COUNT) + +#define IRQ_CLK 0 +#define IRQ_KBD 1 +#define IRQ_PIC1 2 +#define IRQ_PIC_SPUR 7 +#define IRQ_MOUSE 12 + +/* This one must have four least significant bits set to ones */ +#define VECTOR_APIC_SPUR (IVT_ITEMS - 1) + +#if (((VECTOR_APIC_SPUR + 1) % 16) || VECTOR_APIC_SPUR >= IVT_ITEMS) +#error Wrong definition of VECTOR_APIC_SPUR +#endif + +#define VECTOR_DEBUG 1 +#define VECTOR_CLK (IVT_IRQBASE + IRQ_CLK) +#define VECTOR_PIC_SPUR (IVT_IRQBASE + IRQ_PIC_SPUR) +#define VECTOR_SYSCALL IVT_FREEBASE +#define VECTOR_TLB_SHOOTDOWN_IPI (IVT_FREEBASE + 1) +#define VECTOR_DEBUG_IPI (IVT_FREEBASE + 2) + +extern void (* disable_irqs_function)(uint16_t); +extern void (* enable_irqs_function)(uint16_t); +extern void (* eoi_function)(void); +extern const char *irqs_info; + +extern void interrupt_init(void); +extern void trap_virtual_enable_irqs(uint16_t); +extern void trap_virtual_disable_irqs(uint16_t); + +#endif + +/** @} + */ Index: kernel/arch/amd64/include/arch/istate.h =================================================================== --- kernel/arch/amd64/include/arch/istate.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/amd64/include/arch/istate.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,95 @@ +/* + * Copyright (c) 2001-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup amd64interrupt + * @{ + */ +/** @file + */ + +#ifndef KERN_amd64_ISTATE_H_ +#define KERN_amd64_ISTATE_H_ + +#include + +/** This is passed to interrupt handlers */ +typedef struct istate { + uint64_t rax; + uint64_t rbx; + uint64_t rcx; + uint64_t rdx; + uint64_t rsi; + uint64_t rdi; + uint64_t rbp; + uint64_t r8; + uint64_t r9; + uint64_t r10; + uint64_t r11; + uint64_t r12; + uint64_t r13; + uint64_t r14; + uint64_t r15; + uint64_t alignment; /* align rbp_frame on multiple of 16 */ + uint64_t rbp_frame; /* imitation of frame pointer linkage */ + uint64_t rip_frame; /* imitation of return address linkage */ + uint64_t error_word; /* real or fake error word */ + uint64_t rip; + uint64_t cs; + uint64_t rflags; + uint64_t rsp; /* only if istate_t is from uspace */ + uint64_t ss; /* only if istate_t is from uspace */ +} istate_t; + +#define RPL_USER 3 + +/** Return true if exception happened while in userspace */ +NO_TRACE static inline int istate_from_uspace(istate_t *istate) +{ + return (istate->cs & RPL_USER) == RPL_USER; +} + +NO_TRACE static inline void istate_set_retaddr(istate_t *istate, + uintptr_t retaddr) +{ + istate->rip = retaddr; +} + +NO_TRACE static inline uintptr_t istate_get_pc(istate_t *istate) +{ + return istate->rip; +} + +NO_TRACE static inline uintptr_t istate_get_fp(istate_t *istate) +{ + return istate->rbp; +} + +#endif + +/** @} + */ Index: kernel/arch/amd64/include/arch/mm/as.h =================================================================== --- kernel/arch/amd64/include/arch/mm/as.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/amd64/include/arch/mm/as.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,66 @@ +/* + * Copyright (c) 2005 Ondrej Palkovsky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup amd64mm + * @{ + */ +/** @file + */ + +#ifndef KERN_amd64_AS_H_ +#define KERN_amd64_AS_H_ + +#define ADDRESS_SPACE_HOLE_START UINT64_C(0x0000800000000000) +#define ADDRESS_SPACE_HOLE_END UINT64_C(0xffff7fffffffffff) + +#define KERNEL_ADDRESS_SPACE_SHADOWED_ARCH 0 + +#define KERNEL_ADDRESS_SPACE_START_ARCH UINT64_C(0xffff800000000000) +#define KERNEL_ADDRESS_SPACE_END_ARCH UINT64_C(0xffffffffffffffff) +#define USER_ADDRESS_SPACE_START_ARCH UINT64_C(0x0000000000000000) +#define USER_ADDRESS_SPACE_END_ARCH UINT64_C(0x00007fffffffffff) + +#define as_constructor_arch(as, flags) (as != as) +#define as_destructor_arch(as) (as != as) +#define as_create_arch(as, flags) (as != as) + +#define as_install_arch(as) +#define as_deinstall_arch(as) +#define as_invalidate_translation_cache(as, page, cnt) + +typedef struct { +} as_arch_t; + +#include + +extern void as_arch_init(void); + +#endif + +/** @} + */ Index: kernel/arch/amd64/include/arch/mm/asid.h =================================================================== --- kernel/arch/amd64/include/arch/mm/asid.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/amd64/include/arch/mm/asid.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,1 @@ +../../../../ia32/include/arch/mm/asid.h Index: kernel/arch/amd64/include/arch/mm/frame.h =================================================================== --- kernel/arch/amd64/include/arch/mm/frame.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/amd64/include/arch/mm/frame.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,54 @@ +/* + * Copyright (c) 2005 Ondrej Palkovsky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup amd64mm + * @{ + */ +/** @file + */ + +#ifndef KERN_amd64_FRAME_H_ +#define KERN_amd64_FRAME_H_ + +#define FRAME_WIDTH 12 /* 4K */ +#define FRAME_SIZE (1 << FRAME_WIDTH) + +#ifndef __ASM__ + +#include + +extern void frame_low_arch_init(void); +extern void frame_high_arch_init(void); +extern void physmem_print(void); + +#endif /* __ASM__ */ + +#endif + +/** @} + */ Index: kernel/arch/amd64/include/arch/mm/km.h =================================================================== --- kernel/arch/amd64/include/arch/mm/km.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/amd64/include/arch/mm/km.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,53 @@ +/* + * Copyright (c) 2011 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup amd64mm + * @{ + */ +/** @file + */ + +#ifndef KERN_amd64_KM_H_ +#define KERN_amd64_KM_H_ + +#include + +#define KM_AMD64_IDENTITY_START UINT64_C(0xffff800000000000) +#define KM_AMD64_IDENTITY_SIZE UINT64_C(0x0000400000000000) + +#define KM_AMD64_NON_IDENTITY_START UINT64_C(0xffffc00000000000) +#define KM_AMD64_NON_IDENTITY_SIZE UINT64_C(0x0000400000000000) + +extern void km_identity_arch_init(void); +extern void km_non_identity_arch_init(void); +extern bool km_is_non_identity_arch(uintptr_t); + +#endif + +/** @} + */ Index: kernel/arch/amd64/include/arch/mm/page.h =================================================================== --- kernel/arch/amd64/include/arch/mm/page.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/amd64/include/arch/mm/page.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,242 @@ +/* + * Copyright (c) 2005 Ondrej Palkovsky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup amd64mm + * @{ + */ +/** @file + */ + +#ifndef KERN_amd64_PAGE_H_ +#define KERN_amd64_PAGE_H_ + +#include +#include + +#define PAGE_WIDTH FRAME_WIDTH +#define PAGE_SIZE FRAME_SIZE + +#ifndef __ASM__ + +#define KA2PA(x) (((uintptr_t) (x)) - UINT64_C(0xffff800000000000)) +#define PA2KA(x) (((uintptr_t) (x)) + UINT64_C(0xffff800000000000)) + +#else /* __ASM__ */ + +#define KA2PA(x) ((x) - 0xffff800000000000) +#define PA2KA(x) ((x) + 0xffff800000000000) + +#endif /* __ASM__ */ + +/* Number of entries in each level. */ +#define PTL0_ENTRIES_ARCH 512 +#define PTL1_ENTRIES_ARCH 512 +#define PTL2_ENTRIES_ARCH 512 +#define PTL3_ENTRIES_ARCH 512 + +/* Page table sizes for each level. */ +#define PTL0_SIZE_ARCH ONE_FRAME +#define PTL1_SIZE_ARCH ONE_FRAME +#define PTL2_SIZE_ARCH ONE_FRAME +#define PTL3_SIZE_ARCH ONE_FRAME + +/* Macros calculating indices into page tables in each level. */ +#define PTL0_INDEX_ARCH(vaddr) (((vaddr) >> 39) & 0x1ffU) +#define PTL1_INDEX_ARCH(vaddr) (((vaddr) >> 30) & 0x1ffU) +#define PTL2_INDEX_ARCH(vaddr) (((vaddr) >> 21) & 0x1ffU) +#define PTL3_INDEX_ARCH(vaddr) (((vaddr) >> 12) & 0x1ffU) + +/* Get PTE address accessors for each level. */ +#define GET_PTL1_ADDRESS_ARCH(ptl0, i) \ + ((pte_t *) ((((uint64_t) ((pte_t *) (ptl0))[(i)].addr_12_31) << 12) | \ + (((uint64_t) ((pte_t *) (ptl0))[(i)].addr_32_51) << 32))) +#define GET_PTL2_ADDRESS_ARCH(ptl1, i) \ + ((pte_t *) ((((uint64_t) ((pte_t *) (ptl1))[(i)].addr_12_31) << 12) | \ + (((uint64_t) ((pte_t *) (ptl1))[(i)].addr_32_51) << 32))) +#define GET_PTL3_ADDRESS_ARCH(ptl2, i) \ + ((pte_t *) ((((uint64_t) ((pte_t *) (ptl2))[(i)].addr_12_31) << 12) | \ + (((uint64_t) ((pte_t *) (ptl2))[(i)].addr_32_51) << 32))) +#define GET_FRAME_ADDRESS_ARCH(ptl3, i) \ + ((uintptr_t *) \ + ((((uint64_t) ((pte_t *) (ptl3))[(i)].addr_12_31) << 12) | \ + (((uint64_t) ((pte_t *) (ptl3))[(i)].addr_32_51) << 32))) + +/* Set PTE address accessors for each level. */ +#define SET_PTL0_ADDRESS_ARCH(ptl0) \ + (write_cr3((uintptr_t) (ptl0))) +#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) \ + set_pt_addr((pte_t *) (ptl0), (size_t) (i), a) +#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a) \ + set_pt_addr((pte_t *) (ptl1), (size_t) (i), a) +#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a) \ + set_pt_addr((pte_t *) (ptl2), (size_t) (i), a) +#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) \ + set_pt_addr((pte_t *) (ptl3), (size_t) (i), a) + +/* Get PTE flags accessors for each level. */ +#define GET_PTL1_FLAGS_ARCH(ptl0, i) \ + get_pt_flags((pte_t *) (ptl0), (size_t) (i)) +#define GET_PTL2_FLAGS_ARCH(ptl1, i) \ + get_pt_flags((pte_t *) (ptl1), (size_t) (i)) +#define GET_PTL3_FLAGS_ARCH(ptl2, i) \ + get_pt_flags((pte_t *) (ptl2), (size_t) (i)) +#define GET_FRAME_FLAGS_ARCH(ptl3, i) \ + get_pt_flags((pte_t *) (ptl3), (size_t) (i)) + +/* Set PTE flags accessors for each level. */ +#define SET_PTL1_FLAGS_ARCH(ptl0, i, x) \ + set_pt_flags((pte_t *) (ptl0), (size_t) (i), (x)) +#define SET_PTL2_FLAGS_ARCH(ptl1, i, x) \ + set_pt_flags((pte_t *) (ptl1), (size_t) (i), (x)) +#define SET_PTL3_FLAGS_ARCH(ptl2, i, x) \ + set_pt_flags((pte_t *) (ptl2), (size_t) (i), (x)) +#define SET_FRAME_FLAGS_ARCH(ptl3, i, x) \ + set_pt_flags((pte_t *) (ptl3), (size_t) (i), (x)) + +/* Set PTE present bit accessors for each level. */ +#define SET_PTL1_PRESENT_ARCH(ptl0, i) \ + set_pt_present((pte_t *) (ptl0), (size_t) (i)) +#define SET_PTL2_PRESENT_ARCH(ptl1, i) \ + set_pt_present((pte_t *) (ptl1), (size_t) (i)) +#define SET_PTL3_PRESENT_ARCH(ptl2, i) \ + set_pt_present((pte_t *) (ptl2), (size_t) (i)) +#define SET_FRAME_PRESENT_ARCH(ptl3, i) \ + set_pt_present((pte_t *) (ptl3), (size_t) (i)) + +/* Macros for querying the last-level PTE entries. */ +#define PTE_VALID_ARCH(p) \ + (*((uint64_t *) (p)) != 0) +#define PTE_PRESENT_ARCH(p) \ + ((p)->present != 0) +#define PTE_GET_FRAME_ARCH(p) \ + ((((uintptr_t) (p)->addr_12_31) << 12) | \ + ((uintptr_t) (p)->addr_32_51 << 32)) +#define PTE_WRITABLE_ARCH(p) \ + ((p)->writeable != 0) +#define PTE_EXECUTABLE_ARCH(p) \ + ((p)->no_execute == 0) + +#ifndef __ASM__ + +#include +#include +#include + +/* Page fault error codes. */ + +/** When bit on this position is 0, the page fault was caused by a not-present + * page. + */ +#define PFERR_CODE_P (1 << 0) + +/** When bit on this position is 1, the page fault was caused by a write. */ +#define PFERR_CODE_RW (1 << 1) + +/** When bit on this position is 1, the page fault was caused in user mode. */ +#define PFERR_CODE_US (1 << 2) + +/** When bit on this position is 1, a reserved bit was set in page directory. */ +#define PFERR_CODE_RSVD (1 << 3) + +/** When bit on this position os 1, the page fault was caused during instruction + * fecth. + */ +#define PFERR_CODE_ID (1 << 4) + +/** Page Table Entry. */ +typedef struct { + unsigned int present : 1; + unsigned int writeable : 1; + unsigned int uaccessible : 1; + unsigned int page_write_through : 1; + unsigned int page_cache_disable : 1; + unsigned int accessed : 1; + unsigned int dirty : 1; + unsigned int unused: 1; + unsigned int global : 1; + unsigned int soft_valid : 1; /**< Valid content even if present bit is cleared. */ + unsigned int avl : 2; + unsigned int addr_12_31 : 30; + unsigned int addr_32_51 : 21; + unsigned int no_execute : 1; +} __attribute__ ((packed)) pte_t; + +NO_TRACE static inline unsigned int get_pt_flags(pte_t *pt, size_t i) +{ + pte_t *p = &pt[i]; + + return ((!p->page_cache_disable) << PAGE_CACHEABLE_SHIFT | + (!p->present) << PAGE_PRESENT_SHIFT | + p->uaccessible << PAGE_USER_SHIFT | + 1 << PAGE_READ_SHIFT | + p->writeable << PAGE_WRITE_SHIFT | + (!p->no_execute) << PAGE_EXEC_SHIFT | + p->global << PAGE_GLOBAL_SHIFT); +} + +NO_TRACE static inline void set_pt_addr(pte_t *pt, size_t i, uintptr_t a) +{ + pte_t *p = &pt[i]; + + p->addr_12_31 = (a >> 12) & UINT32_C(0xfffff); + p->addr_32_51 = a >> 32; +} + +NO_TRACE static inline void set_pt_flags(pte_t *pt, size_t i, int flags) +{ + pte_t *p = &pt[i]; + + p->page_cache_disable = !(flags & PAGE_CACHEABLE); + p->present = !(flags & PAGE_NOT_PRESENT); + p->uaccessible = (flags & PAGE_USER) != 0; + p->writeable = (flags & PAGE_WRITE) != 0; + p->no_execute = (flags & PAGE_EXEC) == 0; + p->global = (flags & PAGE_GLOBAL) != 0; + + /* + * Ensure that there is at least one bit set even if the present bit is cleared. + */ + p->soft_valid = 1; +} + +NO_TRACE static inline void set_pt_present(pte_t *pt, size_t i) +{ + pte_t *p = &pt[i]; + + p->present = 1; +} + +extern void page_arch_init(void); +extern void page_fault(unsigned int, istate_t *); + +#endif /* __ASM__ */ + +#endif + +/** @} + */ Index: kernel/arch/amd64/include/arch/mm/ptl.h =================================================================== --- kernel/arch/amd64/include/arch/mm/ptl.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/amd64/include/arch/mm/ptl.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,51 @@ +/* + * Copyright (c) 2005 Ondrej Palkovsky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup amd64mm + * @{ + */ +/** @file + */ + +#ifndef KERN_amd64_PTL_H_ +#define KERN_amd64_PTL_H_ + +#define PTL_NO_EXEC (1 << 63) +#define PTL_ACCESSED (1 << 5) +#define PTL_CACHE_DISABLE (1 << 4) +#define PTL_CACHE_THROUGH (1 << 3) +#define PTL_USER (1 << 2) +#define PTL_WRITABLE (1 << 1) +#define PTL_PRESENT 1 +#define PTL_2MB_PAGE (1 << 7) + + +#endif + +/** @} + */ Index: kernel/arch/amd64/include/arch/mm/tlb.h =================================================================== --- kernel/arch/amd64/include/arch/mm/tlb.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/amd64/include/arch/mm/tlb.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,41 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup amd64mm + * @{ + */ +/** @file + */ + +#ifndef KERN_amd64_TLB_H_ +#define KERN_amd64_TLB_H_ + +#endif + +/** @} + */ Index: kernel/arch/amd64/include/arch/pm.h =================================================================== --- kernel/arch/amd64/include/arch/pm.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/amd64/include/arch/pm.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,186 @@ +/* + * Copyright (c) 2001-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup amd64 + * @{ + */ +/** @file + */ + +#ifndef KERN_amd64_PM_H_ +#define KERN_amd64_PM_H_ + +#ifndef __ASM__ + #include + #include +#endif + +#define IDT_ITEMS 64 +#define GDT_ITEMS 8 + + +#define NULL_DES 0 +/* Warning: Do not reorder the following items, unless you look into syscall.c! */ +#define KTEXT_DES 1 +#define KDATA_DES 2 +#define UDATA_DES 3 +#define UTEXT_DES 4 +#define KTEXT32_DES 5 +/* End of warning */ +#define TSS_DES 6 + +#ifdef CONFIG_FB + +#define VESA_INIT_DES 8 +#define VESA_INIT_SEGMENT 0x8000 + +#undef GDT_ITEMS +#define GDT_ITEMS 9 + +#endif /* CONFIG_FB */ + +#define GDT_SELECTOR(des) ((des) << 3) + +#define PL_KERNEL 0 +#define PL_USER 3 + +#define AR_PRESENT (1 << 7) +#define AR_DATA (2 << 3) +#define AR_CODE (3 << 3) +#define AR_WRITABLE (1 << 1) +#define AR_READABLE (1 << 1) +#define AR_TSS (0x09U) +#define AR_INTERRUPT (0x0eU) +#define AR_TRAP (0x0fU) + +#define DPL_KERNEL (PL_KERNEL << 5) +#define DPL_USER (PL_USER << 5) + +#define TSS_BASIC_SIZE 104 +#define TSS_IOMAP_SIZE (8 * 1024 + 1) /* 8K for bitmap + 1 terminating byte for convenience */ + +#define IO_PORTS (64 * 1024) + +#ifndef __ASM__ + +typedef struct { + unsigned limit_0_15: 16; + unsigned base_0_15: 16; + unsigned base_16_23: 8; + unsigned access: 8; + unsigned limit_16_19: 4; + unsigned available: 1; + unsigned longmode: 1; + unsigned special: 1; + unsigned granularity : 1; + unsigned base_24_31: 8; +} __attribute__ ((packed)) descriptor_t; + +typedef struct { + unsigned limit_0_15: 16; + unsigned base_0_15: 16; + unsigned base_16_23: 8; + unsigned type: 4; + unsigned : 1; + unsigned dpl : 2; + unsigned present : 1; + unsigned limit_16_19: 4; + unsigned available: 1; + unsigned : 2; + unsigned granularity : 1; + unsigned base_24_31: 8; + unsigned base_32_63 : 32; + unsigned : 32; +} __attribute__ ((packed)) tss_descriptor_t; + +typedef struct { + unsigned offset_0_15: 16; + unsigned selector: 16; + unsigned ist:3; + unsigned unused: 5; + unsigned type: 5; + unsigned dpl: 2; + unsigned present : 1; + unsigned offset_16_31: 16; + unsigned offset_32_63: 32; + unsigned : 32; +} __attribute__ ((packed)) idescriptor_t; + +typedef struct { + uint16_t limit; + uint64_t base; +} __attribute__ ((packed)) ptr_16_64_t; + +typedef struct { + uint16_t limit; + uint32_t base; +} __attribute__ ((packed)) ptr_16_32_t; + +typedef struct { + uint32_t reserve1; + uint64_t rsp0; + uint64_t rsp1; + uint64_t rsp2; + uint64_t reserve2; + uint64_t ist1; + uint64_t ist2; + uint64_t ist3; + uint64_t ist4; + uint64_t ist5; + uint64_t ist6; + uint64_t ist7; + uint64_t reserve3; + uint16_t reserve4; + uint16_t iomap_base; + uint8_t iomap[TSS_IOMAP_SIZE]; +} __attribute__ ((packed)) tss_t; + +extern tss_t *tss_p; + +extern descriptor_t gdt[]; +extern idescriptor_t idt[]; + +extern ptr_16_64_t gdtr; +extern ptr_16_32_t protected_ap_gdtr; + +extern void pm_init(void); + +extern void gdt_tss_setbase(descriptor_t *d, uintptr_t base); +extern void gdt_tss_setlimit(descriptor_t *d, uint32_t limit); + +extern void idt_init(void); +extern void idt_setoffset(idescriptor_t *d, uintptr_t offset); + +extern void tss_initialize(tss_t *t); + +#endif /* __ASM__ */ + +#endif + +/** @} + */ Index: kernel/arch/amd64/include/arch/proc/task.h =================================================================== --- kernel/arch/amd64/include/arch/proc/task.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/amd64/include/arch/proc/task.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,51 @@ +/* + * Copyright (c) 2006 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup amd64proc + * @{ + */ +/** @file + */ + +#ifndef KERN_amd64_TASK_H_ +#define KERN_amd64_TASK_H_ + +#include +#include + +typedef struct { + /** I/O Permission bitmap Generation counter. */ + size_t iomapver; + /** I/O Permission bitmap. */ + bitmap_t iomap; +} task_arch_t; + +#endif + +/** @} + */ Index: kernel/arch/amd64/include/arch/proc/thread.h =================================================================== --- kernel/arch/amd64/include/arch/proc/thread.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/amd64/include/arch/proc/thread.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,54 @@ +/* + * Copyright (c) 2005 Ondrej Palkovsky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup amd64proc + * @{ + */ +/** @file + */ + +#ifndef KERN_amd64_THREAD_H_ +#define KERN_amd64_THREAD_H_ + +/* CAUTION: keep these in sync with low level assembly code in syscall_entry */ +#define SYSCALL_USTACK_RSP 0 +#define SYSCALL_KSTACK_RSP 1 + +typedef struct { + sysarg_t tls; + /** User and kernel RSP for syscalls. */ + uint64_t syscall_rsp[2]; +} thread_arch_t; + +#define thr_constructor_arch(t) +#define thr_destructor_arch(t) + +#endif + +/** @} + */ Index: kernel/arch/amd64/include/arch/smp =================================================================== --- kernel/arch/amd64/include/arch/smp (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/amd64/include/arch/smp (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,1 @@ +../../../ia32/include/arch/smp Index: kernel/arch/amd64/include/arch/syscall.h =================================================================== --- kernel/arch/amd64/include/arch/syscall.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/amd64/include/arch/syscall.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,43 @@ +/* + * Copyright (c) 2006 Ondrej Palkovsky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup amd64 + * @{ + */ +/** @file + */ + +#ifndef KERN_amd64_SYSCALL_H_ +#define KERN_amd64_SYSCALL_H_ + +extern void syscall_setup_cpu(void); + +#endif + +/** @} + */ Index: kernel/arch/amd64/include/arch/types.h =================================================================== --- kernel/arch/amd64/include/arch/types.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/amd64/include/arch/types.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,64 @@ +/* + * Copyright (c) 2001-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup amd64 + * @{ + */ +/** @file + */ + +#ifndef KERN_amd64_TYPES_H_ +#define KERN_amd64_TYPES_H_ + +typedef uint64_t size_t; +typedef int64_t ssize_t; + +typedef uint64_t uintptr_t; +typedef uint64_t pfn_t; + +typedef uint64_t ipl_t; + +typedef uint64_t sysarg_t; +typedef int64_t native_t; +typedef uint64_t atomic_count_t; + +typedef struct { +} fncptr_t; + +#define INTN_C(c) INT64_C(c) +#define UINTN_C(c) UINT64_C(c) + +#define PRIdn PRId64 /**< Format for native_t. */ +#define PRIun PRIu64 /**< Format for sysarg_t. */ +#define PRIxn PRIx64 /**< Format for hexadecimal sysarg_t. */ +#define PRIua PRIu64 /**< Format for atomic_count_t. */ + +#endif + +/** @} + */ Index: kernel/arch/amd64/include/asm.h =================================================================== --- kernel/arch/amd64/include/asm.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,525 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup amd64 - * @{ - */ -/** @file - */ - -#ifndef KERN_amd64_ASM_H_ -#define KERN_amd64_ASM_H_ - -#include -#include -#include -#include - -#define IO_SPACE_BOUNDARY ((void *) (64 * 1024)) - -/** Return base address of current stack. - * - * Return the base address of the current stack. - * The stack is assumed to be STACK_SIZE bytes long. - * The stack must start on page boundary. - * - */ -NO_TRACE static inline uintptr_t get_stack_base(void) -{ - uintptr_t v; - - asm volatile ( - "andq %%rsp, %[v]\n" - : [v] "=r" (v) - : "0" (~((uint64_t) STACK_SIZE - 1)) - ); - - return v; -} - -NO_TRACE static inline void cpu_sleep(void) -{ - asm volatile ( - "hlt\n" - ); -} - -NO_TRACE static inline void __attribute__((noreturn)) cpu_halt(void) -{ - while (true) { - asm volatile ( - "hlt\n" - ); - } -} - -/** Byte from port - * - * Get byte from port - * - * @param port Port to read from - * @return Value read - * - */ -NO_TRACE static inline uint8_t pio_read_8(ioport8_t *port) -{ - if (port < (ioport8_t *) IO_SPACE_BOUNDARY) { - uint8_t val; - - asm volatile ( - "inb %w[port], %b[val]\n" - : [val] "=a" (val) - : [port] "d" (port) - ); - - return val; - } else - return (uint8_t) *port; -} - -/** Word from port - * - * Get word from port - * - * @param port Port to read from - * @return Value read - * - */ -NO_TRACE static inline uint16_t pio_read_16(ioport16_t *port) -{ - if (port < (ioport16_t *) IO_SPACE_BOUNDARY) { - uint16_t val; - - asm volatile ( - "inw %w[port], %w[val]\n" - : [val] "=a" (val) - : [port] "d" (port) - ); - - return val; - } else - return (uint16_t) *port; -} - -/** Double word from port - * - * Get double word from port - * - * @param port Port to read from - * @return Value read - * - */ -NO_TRACE static inline uint32_t pio_read_32(ioport32_t *port) -{ - if (port < (ioport32_t *) IO_SPACE_BOUNDARY) { - uint32_t val; - - asm volatile ( - "inl %w[port], %[val]\n" - : [val] "=a" (val) - : [port] "d" (port) - ); - - return val; - } else - return (uint32_t) *port; -} - -/** Byte to port - * - * Output byte to port - * - * @param port Port to write to - * @param val Value to write - * - */ -NO_TRACE static inline void pio_write_8(ioport8_t *port, uint8_t val) -{ - if (port < (ioport8_t *) IO_SPACE_BOUNDARY) { - asm volatile ( - "outb %b[val], %w[port]\n" - :: [val] "a" (val), [port] "d" (port) - ); - } else - *port = val; -} - -/** Word to port - * - * Output word to port - * - * @param port Port to write to - * @param val Value to write - * - */ -NO_TRACE static inline void pio_write_16(ioport16_t *port, uint16_t val) -{ - if (port < (ioport16_t *) IO_SPACE_BOUNDARY) { - asm volatile ( - "outw %w[val], %w[port]\n" - :: [val] "a" (val), [port] "d" (port) - ); - } else - *port = val; -} - -/** Double word to port - * - * Output double word to port - * - * @param port Port to write to - * @param val Value to write - * - */ -NO_TRACE static inline void pio_write_32(ioport32_t *port, uint32_t val) -{ - if (port < (ioport32_t *) IO_SPACE_BOUNDARY) { - asm volatile ( - "outl %[val], %w[port]\n" - :: [val] "a" (val), [port] "d" (port) - ); - } else - *port = val; -} - -/** Swap Hidden part of GS register with visible one */ -NO_TRACE static inline void swapgs(void) -{ - asm volatile ( - "swapgs" - ); -} - -/** Enable interrupts. - * - * Enable interrupts and return previous - * value of EFLAGS. - * - * @return Old interrupt priority level. - * - */ -NO_TRACE static inline ipl_t interrupts_enable(void) { - ipl_t v; - - asm volatile ( - "pushfq\n" - "popq %[v]\n" - "sti\n" - : [v] "=r" (v) - ); - - return v; -} - -/** Disable interrupts. - * - * Disable interrupts and return previous - * value of EFLAGS. - * - * @return Old interrupt priority level. - * - */ -NO_TRACE static inline ipl_t interrupts_disable(void) { - ipl_t v; - - asm volatile ( - "pushfq\n" - "popq %[v]\n" - "cli\n" - : [v] "=r" (v) - ); - - return v; -} - -/** Restore interrupt priority level. - * - * Restore EFLAGS. - * - * @param ipl Saved interrupt priority level. - * - */ -NO_TRACE static inline void interrupts_restore(ipl_t ipl) { - asm volatile ( - "pushq %[ipl]\n" - "popfq\n" - :: [ipl] "r" (ipl) - ); -} - -/** Return interrupt priority level. - * - * Return EFLAFS. - * - * @return Current interrupt priority level. - * - */ -NO_TRACE static inline ipl_t interrupts_read(void) { - ipl_t v; - - asm volatile ( - "pushfq\n" - "popq %[v]\n" - : [v] "=r" (v) - ); - - return v; -} - -/** Check interrupts state. - * - * @return True if interrupts are disabled. - * - */ -NO_TRACE static inline bool interrupts_disabled(void) -{ - ipl_t v; - - asm volatile ( - "pushfq\n" - "popq %[v]\n" - : [v] "=r" (v) - ); - - return ((v & RFLAGS_IF) == 0); -} - -/** Write to MSR */ -NO_TRACE static inline void write_msr(uint32_t msr, uint64_t value) -{ - asm volatile ( - "wrmsr\n" - :: "c" (msr), - "a" ((uint32_t) (value)), - "d" ((uint32_t) (value >> 32)) - ); -} - -NO_TRACE static inline sysarg_t read_msr(uint32_t msr) -{ - uint32_t ax, dx; - - asm volatile ( - "rdmsr\n" - : "=a" (ax), "=d" (dx) - : "c" (msr) - ); - - return ((uint64_t) dx << 32) | ax; -} - -/** Enable local APIC - * - * Enable local APIC in MSR. - * - */ -NO_TRACE static inline void enable_l_apic_in_msr() -{ - asm volatile ( - "movl $0x1b, %%ecx\n" - "rdmsr\n" - "orl $(1 << 11),%%eax\n" - "orl $(0xfee00000),%%eax\n" - "wrmsr\n" - ::: "%eax", "%ecx", "%edx" - ); -} - -/** Invalidate TLB Entry. - * - * @param addr Address on a page whose TLB entry is to be invalidated. - * - */ -NO_TRACE static inline void invlpg(uintptr_t addr) -{ - asm volatile ( - "invlpg %[addr]\n" - :: [addr] "m" (*((sysarg_t *) addr)) - ); -} - -/** Load GDTR register from memory. - * - * @param gdtr_reg Address of memory from where to load GDTR. - * - */ -NO_TRACE static inline void gdtr_load(ptr_16_64_t *gdtr_reg) -{ - asm volatile ( - "lgdtq %[gdtr_reg]\n" - :: [gdtr_reg] "m" (*gdtr_reg) - ); -} - -/** Store GDTR register to memory. - * - * @param gdtr_reg Address of memory to where to load GDTR. - * - */ -NO_TRACE static inline void gdtr_store(ptr_16_64_t *gdtr_reg) -{ - asm volatile ( - "sgdtq %[gdtr_reg]\n" - :: [gdtr_reg] "m" (*gdtr_reg) - ); -} - -/** Load IDTR register from memory. - * - * @param idtr_reg Address of memory from where to load IDTR. - * - */ -NO_TRACE static inline void idtr_load(ptr_16_64_t *idtr_reg) -{ - asm volatile ( - "lidtq %[idtr_reg]\n" - :: [idtr_reg] "m" (*idtr_reg)); -} - -/** Load TR from descriptor table. - * - * @param sel Selector specifying descriptor of TSS segment. - * - */ -NO_TRACE static inline void tr_load(uint16_t sel) -{ - asm volatile ( - "ltr %[sel]" - :: [sel] "r" (sel) - ); -} - -#define GEN_READ_REG(reg) NO_TRACE static inline sysarg_t read_ ##reg (void) \ - { \ - sysarg_t res; \ - asm volatile ( \ - "movq %%" #reg ", %[res]" \ - : [res] "=r" (res) \ - ); \ - return res; \ - } - -#define GEN_WRITE_REG(reg) NO_TRACE static inline void write_ ##reg (sysarg_t regn) \ - { \ - asm volatile ( \ - "movq %[regn], %%" #reg \ - :: [regn] "r" (regn) \ - ); \ - } - -GEN_READ_REG(cr0) -GEN_READ_REG(cr2) -GEN_READ_REG(cr3) -GEN_WRITE_REG(cr3) - -GEN_READ_REG(dr0) -GEN_READ_REG(dr1) -GEN_READ_REG(dr2) -GEN_READ_REG(dr3) -GEN_READ_REG(dr6) -GEN_READ_REG(dr7) - -GEN_WRITE_REG(dr0) -GEN_WRITE_REG(dr1) -GEN_WRITE_REG(dr2) -GEN_WRITE_REG(dr3) -GEN_WRITE_REG(dr6) -GEN_WRITE_REG(dr7) - -extern void asm_delay_loop(uint32_t); -extern void asm_fake_loop(uint32_t); - -extern uintptr_t int_0; -extern uintptr_t int_1; -extern uintptr_t int_2; -extern uintptr_t int_3; -extern uintptr_t int_4; -extern uintptr_t int_5; -extern uintptr_t int_6; -extern uintptr_t int_7; -extern uintptr_t int_8; -extern uintptr_t int_9; -extern uintptr_t int_10; -extern uintptr_t int_11; -extern uintptr_t int_12; -extern uintptr_t int_13; -extern uintptr_t int_14; -extern uintptr_t int_15; -extern uintptr_t int_16; -extern uintptr_t int_17; -extern uintptr_t int_18; -extern uintptr_t int_19; -extern uintptr_t int_20; -extern uintptr_t int_21; -extern uintptr_t int_22; -extern uintptr_t int_23; -extern uintptr_t int_24; -extern uintptr_t int_25; -extern uintptr_t int_26; -extern uintptr_t int_27; -extern uintptr_t int_28; -extern uintptr_t int_29; -extern uintptr_t int_30; -extern uintptr_t int_31; -extern uintptr_t int_32; -extern uintptr_t int_33; -extern uintptr_t int_34; -extern uintptr_t int_35; -extern uintptr_t int_36; -extern uintptr_t int_37; -extern uintptr_t int_38; -extern uintptr_t int_39; -extern uintptr_t int_40; -extern uintptr_t int_41; -extern uintptr_t int_42; -extern uintptr_t int_43; -extern uintptr_t int_44; -extern uintptr_t int_45; -extern uintptr_t int_46; -extern uintptr_t int_47; -extern uintptr_t int_48; -extern uintptr_t int_49; -extern uintptr_t int_50; -extern uintptr_t int_51; -extern uintptr_t int_52; -extern uintptr_t int_53; -extern uintptr_t int_54; -extern uintptr_t int_55; -extern uintptr_t int_56; -extern uintptr_t int_57; -extern uintptr_t int_58; -extern uintptr_t int_59; -extern uintptr_t int_60; -extern uintptr_t int_61; -extern uintptr_t int_62; -extern uintptr_t int_63; - -#endif - -/** @} - */ Index: kernel/arch/amd64/include/atomic.h =================================================================== --- kernel/arch/amd64/include/atomic.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,145 +1,0 @@ -/* - * Copyright (c) 2001-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup amd64 - * @{ - */ -/** @file - */ - -#ifndef KERN_amd64_ATOMIC_H_ -#define KERN_amd64_ATOMIC_H_ - -#include -#include -#include -#include - -NO_TRACE static inline void atomic_inc(atomic_t *val) -{ -#ifdef CONFIG_SMP - asm volatile ( - "lock incq %[count]\n" - : [count] "+m" (val->count) - ); -#else - asm volatile ( - "incq %[count]\n" - : [count] "+m" (val->count) - ); -#endif /* CONFIG_SMP */ -} - -NO_TRACE static inline void atomic_dec(atomic_t *val) -{ -#ifdef CONFIG_SMP - asm volatile ( - "lock decq %[count]\n" - : [count] "+m" (val->count) - ); -#else - asm volatile ( - "decq %[count]\n" - : [count] "+m" (val->count) - ); -#endif /* CONFIG_SMP */ -} - -NO_TRACE static inline atomic_count_t atomic_postinc(atomic_t *val) -{ - atomic_count_t r = 1; - - asm volatile ( - "lock xaddq %[r], %[count]\n" - : [count] "+m" (val->count), - [r] "+r" (r) - ); - - return r; -} - -NO_TRACE static inline atomic_count_t atomic_postdec(atomic_t *val) -{ - atomic_count_t r = -1; - - asm volatile ( - "lock xaddq %[r], %[count]\n" - : [count] "+m" (val->count), - [r] "+r" (r) - ); - - return r; -} - -#define atomic_preinc(val) (atomic_postinc(val) + 1) -#define atomic_predec(val) (atomic_postdec(val) - 1) - -NO_TRACE static inline atomic_count_t test_and_set(atomic_t *val) -{ - atomic_count_t v = 1; - - asm volatile ( - "xchgq %[v], %[count]\n" - : [v] "+r" (v), - [count] "+m" (val->count) - ); - - return v; -} - -/** amd64 specific fast spinlock */ -NO_TRACE static inline void atomic_lock_arch(atomic_t *val) -{ - atomic_count_t tmp; - - preemption_disable(); - asm volatile ( - "0:\n" - " pause\n" - " mov %[count], %[tmp]\n" - " testq %[tmp], %[tmp]\n" - " jnz 0b\n" /* lightweight looping on locked spinlock */ - - " incq %[tmp]\n" /* now use the atomic operation */ - " xchgq %[count], %[tmp]\n" - " testq %[tmp], %[tmp]\n" - " jnz 0b\n" - : [count] "+m" (val->count), - [tmp] "=&r" (tmp) - ); - - /* - * Prevent critical section code from bleeding out this way up. - */ - CS_ENTER_BARRIER(); -} - -#endif - -/** @} - */ Index: kernel/arch/amd64/include/barrier.h =================================================================== --- kernel/arch/amd64/include/barrier.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,1 +1,0 @@ -../../ia32/include/barrier.h Index: kernel/arch/amd64/include/bios =================================================================== --- kernel/arch/amd64/include/bios (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,1 +1,0 @@ -../../ia32/include/bios Index: kernel/arch/amd64/include/boot/boot.h =================================================================== --- kernel/arch/amd64/include/boot/boot.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,56 +1,0 @@ -/* - * Copyright (c) 2005 Ondrej Palkovsky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup amd64 - * @{ - */ -/** @file - */ - -#ifndef KERN_amd64_BOOT_H_ -#define KERN_amd64_BOOT_H_ - -#define BOOT_OFFSET 0x108000 -#define AP_BOOT_OFFSET 0x008000 -#define BOOT_STACK_SIZE 0x000400 - -#ifndef __ASM__ - -#ifdef CONFIG_SMP - -/* This is only a symbol so the type is dummy. Obtain the value using &. */ -extern int _hardcoded_unmapped_size; - -#endif /* CONFIG_SMP */ - -#endif /* __ASM__ */ - -#endif - -/** @} - */ Index: kernel/arch/amd64/include/boot/memmap.h =================================================================== --- kernel/arch/amd64/include/boot/memmap.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,1 +1,0 @@ -../../../ia32/include/boot/memmap.h Index: kernel/arch/amd64/include/context.h =================================================================== --- kernel/arch/amd64/include/context.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,75 +1,0 @@ -/* - * Copyright (c) 2005 Ondrej Palkovsky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup amd64 - * @{ - */ -/** @file - */ - -#ifndef KERN_amd64_CONTEXT_H_ -#define KERN_amd64_CONTEXT_H_ - -#include - -/* - * According to ABI the stack MUST be aligned on - * 16-byte boundary. If it is not, the va_arg calling will - * panic sooner or later - */ -#define SP_DELTA 16 - -#define context_set(c, _pc, stack, size) \ - do { \ - (c)->pc = (uintptr_t) (_pc); \ - (c)->sp = ((uintptr_t) (stack)) + (size) - SP_DELTA; \ - (c)->rbp = 0; \ - } while (0) - -/* We include only registers that must be preserved - * during function call - */ -typedef struct { - uintptr_t sp; - uintptr_t pc; - - uint64_t rbx; - uint64_t rbp; - - uint64_t r12; - uint64_t r13; - uint64_t r14; - uint64_t r15; - - ipl_t ipl; -} __attribute__ ((packed)) context_t; - -#endif - -/** @} - */ Index: kernel/arch/amd64/include/context_offset.h =================================================================== --- kernel/arch/amd64/include/context_offset.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,79 +1,0 @@ -/* - * Copyright (c) 2005 Ondrej Palkovsky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef KERN_amd64_CONTEXT_OFFSET_H_ -#define KERN_amd64_CONTEXT_OFFSET_H_ - -#define OFFSET_SP 0x00 -#define OFFSET_PC 0x08 -#define OFFSET_RBX 0x10 -#define OFFSET_RBP 0x18 -#define OFFSET_R12 0x20 -#define OFFSET_R13 0x28 -#define OFFSET_R14 0x30 -#define OFFSET_R15 0x38 - -#ifdef KERNEL - #define OFFSET_IPL 0x40 -#else - #define OFFSET_TLS 0x40 -#endif - -#ifdef __ASM__ - -# ctx: address of the structure with saved context -# pc: return address -.macro CONTEXT_SAVE_ARCH_CORE ctx:req pc:req - movq \pc, OFFSET_PC(\ctx) - movq %rsp, OFFSET_SP(\ctx) - - movq %rbx, OFFSET_RBX(\ctx) - movq %rbp, OFFSET_RBP(\ctx) - movq %r12, OFFSET_R12(\ctx) - movq %r13, OFFSET_R13(\ctx) - movq %r14, OFFSET_R14(\ctx) - movq %r15, OFFSET_R15(\ctx) -.endm - -# ctx: address of the structure with saved context -.macro CONTEXT_RESTORE_ARCH_CORE ctx:req pc:req - movq OFFSET_R15(\ctx), %r15 - movq OFFSET_R14(\ctx), %r14 - movq OFFSET_R13(\ctx), %r13 - movq OFFSET_R12(\ctx), %r12 - movq OFFSET_RBP(\ctx), %rbp - movq OFFSET_RBX(\ctx), %rbx - - movq OFFSET_SP(\ctx), %rsp # ctx->sp -> %rsp - - movq OFFSET_PC(\ctx), \pc -.endm - -#endif - -#endif Index: kernel/arch/amd64/include/cpu.h =================================================================== --- kernel/arch/amd64/include/cpu.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,93 +1,0 @@ -/* - * Copyright (c) 2001-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup amd64 - * @{ - */ -/** @file - */ - -#ifndef KERN_amd64_CPU_H_ -#define KERN_amd64_CPU_H_ - -#define RFLAGS_CF (1 << 0) -#define RFLAGS_PF (1 << 2) -#define RFLAGS_AF (1 << 4) -#define RFLAGS_ZF (1 << 6) -#define RFLAGS_SF (1 << 7) -#define RFLAGS_TF (1 << 8) -#define RFLAGS_IF (1 << 9) -#define RFLAGS_DF (1 << 10) -#define RFLAGS_OF (1 << 11) -#define RFLAGS_NT (1 << 14) -#define RFLAGS_RF (1 << 16) - -#define EFER_MSR_NUM 0xc0000080 -#define AMD_SCE_FLAG 0 -#define AMD_LME_FLAG 8 -#define AMD_LMA_FLAG 10 -#define AMD_FFXSR_FLAG 14 -#define AMD_NXE_FLAG 11 - -/* MSR registers */ -#define AMD_MSR_STAR 0xc0000081 -#define AMD_MSR_LSTAR 0xc0000082 -#define AMD_MSR_SFMASK 0xc0000084 -#define AMD_MSR_FS 0xc0000100 -#define AMD_MSR_GS 0xc0000101 - -#ifndef __ASM__ - -#include - -typedef struct { - int vendor; - int family; - int model; - int stepping; - tss_t *tss; - - size_t iomapver_copy; /** Copy of TASK's I/O Permission bitmap generation count. */ -} cpu_arch_t; - -struct star_msr { -}; - -struct lstar_msr { -}; - -extern void set_efer_flag(int flag); -extern uint64_t read_efer_flag(void); -void cpu_setup_fpu(void); - -#endif /* __ASM__ */ - -#endif - -/** @} - */ Index: kernel/arch/amd64/include/cpuid.h =================================================================== --- kernel/arch/amd64/include/cpuid.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,67 +1,0 @@ -/* - * Copyright (c) 2001-2004 Ondrej Palkovsky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup amd64 - * @{ - */ -/** @file - */ - -#ifndef KERN_amd64_CPUID_H_ -#define KERN_amd64_CPUID_H_ - -#define AMD_CPUID_EXTENDED 0x80000001 -#define AMD_EXT_NOEXECUTE 20 -#define AMD_EXT_LONG_MODE 29 - -#define INTEL_CPUID_LEVEL 0x00000000 -#define INTEL_CPUID_STANDARD 0x00000001 -#define INTEL_CPUID_EXTENDED 0x80000000 -#define INTEL_SSE2 26 -#define INTEL_FXSAVE 24 - -#ifndef __ASM__ - -#include - -typedef struct { - uint32_t cpuid_eax; - uint32_t cpuid_ebx; - uint32_t cpuid_ecx; - uint32_t cpuid_edx; -} __attribute__ ((packed)) cpu_info_t; - -extern int has_cpuid(void); - -extern void cpuid(uint32_t cmd, cpu_info_t *info); - -#endif /* !def __ASM__ */ -#endif - -/** @} - */ Index: kernel/arch/amd64/include/cycle.h =================================================================== --- kernel/arch/amd64/include/cycle.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,57 +1,0 @@ -/* - * Copyright (c) 2006 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup amd64 - * @{ - */ -/** @file - */ - -#ifndef KERN_amd64_CYCLE_H_ -#define KERN_amd64_CYCLE_H_ - -#include - -NO_TRACE static inline uint64_t get_cycle(void) -{ - uint32_t lower; - uint32_t upper; - - asm volatile ( - "rdtsc\n" - : "=a" (lower), - "=d" (upper) - ); - - return ((uint64_t) lower) | (((uint64_t) upper) << 32); -} - -#endif - -/** @} - */ Index: kernel/arch/amd64/include/ddi/ddi.h =================================================================== --- kernel/arch/amd64/include/ddi/ddi.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,46 +1,0 @@ -/* - * Copyright (c) 2006 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup amd64ddi - * @{ - */ - -/** - * @file - * @brief amd64 specific DDI declarations and macros. - */ - -#ifndef KERN_amd64_DDI_H_ -#define KERN_amd64_DDI_H_ - -extern void io_perm_bitmap_install(void); - -#endif - -/** @} - */ Index: kernel/arch/amd64/include/drivers =================================================================== --- kernel/arch/amd64/include/drivers (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,1 +1,0 @@ -../../ia32/include/drivers Index: kernel/arch/amd64/include/elf.h =================================================================== --- kernel/arch/amd64/include/elf.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,45 +1,0 @@ -/* - * Copyright (c) 2006 Sergey Bondari - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup amd64 - * @{ - */ -/** @file - */ - -#ifndef KERN_amd64_ELF_H_ -#define KERN_amd64_ELF_H_ - -#define ELF_MACHINE EM_X86_64 -#define ELF_DATA_ENCODING ELFDATA2LSB -#define ELF_CLASS ELFCLASS64 - -#endif - -/** @} - */ Index: kernel/arch/amd64/include/faddr.h =================================================================== --- kernel/arch/amd64/include/faddr.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,45 +1,0 @@ -/* - * Copyright (c) 2005 Ondrej Palkovsky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup amd64 - * @{ - */ -/** @file - */ - -#ifndef KERN_amd64_FADDR_H_ -#define KERN_amd64_FADDR_H_ - -#include - -#define FADDR(fptr) ((uintptr_t) (fptr)) - -#endif - -/** @} - */ Index: kernel/arch/amd64/include/fpu_context.h =================================================================== --- kernel/arch/amd64/include/fpu_context.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,1 +1,0 @@ -../../ia32/include/fpu_context.h Index: kernel/arch/amd64/include/interrupt.h =================================================================== --- kernel/arch/amd64/include/interrupt.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,84 +1,0 @@ -/* - * Copyright (c) 2001-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup amd64interrupt - * @{ - */ -/** @file - */ - -#ifndef KERN_amd64_INTERRUPT_H_ -#define KERN_amd64_INTERRUPT_H_ - -#include -#include -#include - -#define IVT_ITEMS IDT_ITEMS -#define IVT_FIRST 0 - -#define EXC_COUNT 32 -#define IRQ_COUNT 16 - -#define IVT_EXCBASE 0 -#define IVT_IRQBASE (IVT_EXCBASE + EXC_COUNT) -#define IVT_FREEBASE (IVT_IRQBASE + IRQ_COUNT) - -#define IRQ_CLK 0 -#define IRQ_KBD 1 -#define IRQ_PIC1 2 -#define IRQ_PIC_SPUR 7 -#define IRQ_MOUSE 12 - -/* This one must have four least significant bits set to ones */ -#define VECTOR_APIC_SPUR (IVT_ITEMS - 1) - -#if (((VECTOR_APIC_SPUR + 1) % 16) || VECTOR_APIC_SPUR >= IVT_ITEMS) -#error Wrong definition of VECTOR_APIC_SPUR -#endif - -#define VECTOR_DEBUG 1 -#define VECTOR_CLK (IVT_IRQBASE + IRQ_CLK) -#define VECTOR_PIC_SPUR (IVT_IRQBASE + IRQ_PIC_SPUR) -#define VECTOR_SYSCALL IVT_FREEBASE -#define VECTOR_TLB_SHOOTDOWN_IPI (IVT_FREEBASE + 1) -#define VECTOR_DEBUG_IPI (IVT_FREEBASE + 2) - -extern void (* disable_irqs_function)(uint16_t); -extern void (* enable_irqs_function)(uint16_t); -extern void (* eoi_function)(void); -extern const char *irqs_info; - -extern void interrupt_init(void); -extern void trap_virtual_enable_irqs(uint16_t); -extern void trap_virtual_disable_irqs(uint16_t); - -#endif - -/** @} - */ Index: kernel/arch/amd64/include/istate.h =================================================================== --- kernel/arch/amd64/include/istate.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,95 +1,0 @@ -/* - * Copyright (c) 2001-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup amd64interrupt - * @{ - */ -/** @file - */ - -#ifndef KERN_amd64_ISTATE_H_ -#define KERN_amd64_ISTATE_H_ - -#include - -/** This is passed to interrupt handlers */ -typedef struct istate { - uint64_t rax; - uint64_t rbx; - uint64_t rcx; - uint64_t rdx; - uint64_t rsi; - uint64_t rdi; - uint64_t rbp; - uint64_t r8; - uint64_t r9; - uint64_t r10; - uint64_t r11; - uint64_t r12; - uint64_t r13; - uint64_t r14; - uint64_t r15; - uint64_t alignment; /* align rbp_frame on multiple of 16 */ - uint64_t rbp_frame; /* imitation of frame pointer linkage */ - uint64_t rip_frame; /* imitation of return address linkage */ - uint64_t error_word; /* real or fake error word */ - uint64_t rip; - uint64_t cs; - uint64_t rflags; - uint64_t rsp; /* only if istate_t is from uspace */ - uint64_t ss; /* only if istate_t is from uspace */ -} istate_t; - -#define RPL_USER 3 - -/** Return true if exception happened while in userspace */ -NO_TRACE static inline int istate_from_uspace(istate_t *istate) -{ - return (istate->cs & RPL_USER) == RPL_USER; -} - -NO_TRACE static inline void istate_set_retaddr(istate_t *istate, - uintptr_t retaddr) -{ - istate->rip = retaddr; -} - -NO_TRACE static inline uintptr_t istate_get_pc(istate_t *istate) -{ - return istate->rip; -} - -NO_TRACE static inline uintptr_t istate_get_fp(istate_t *istate) -{ - return istate->rbp; -} - -#endif - -/** @} - */ Index: kernel/arch/amd64/include/mm/as.h =================================================================== --- kernel/arch/amd64/include/mm/as.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,66 +1,0 @@ -/* - * Copyright (c) 2005 Ondrej Palkovsky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup amd64mm - * @{ - */ -/** @file - */ - -#ifndef KERN_amd64_AS_H_ -#define KERN_amd64_AS_H_ - -#define ADDRESS_SPACE_HOLE_START UINT64_C(0x0000800000000000) -#define ADDRESS_SPACE_HOLE_END UINT64_C(0xffff7fffffffffff) - -#define KERNEL_ADDRESS_SPACE_SHADOWED_ARCH 0 - -#define KERNEL_ADDRESS_SPACE_START_ARCH UINT64_C(0xffff800000000000) -#define KERNEL_ADDRESS_SPACE_END_ARCH UINT64_C(0xffffffffffffffff) -#define USER_ADDRESS_SPACE_START_ARCH UINT64_C(0x0000000000000000) -#define USER_ADDRESS_SPACE_END_ARCH UINT64_C(0x00007fffffffffff) - -#define as_constructor_arch(as, flags) (as != as) -#define as_destructor_arch(as) (as != as) -#define as_create_arch(as, flags) (as != as) - -#define as_install_arch(as) -#define as_deinstall_arch(as) -#define as_invalidate_translation_cache(as, page, cnt) - -typedef struct { -} as_arch_t; - -#include - -extern void as_arch_init(void); - -#endif - -/** @} - */ Index: kernel/arch/amd64/include/mm/asid.h =================================================================== --- kernel/arch/amd64/include/mm/asid.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,1 +1,0 @@ -../../../ia32/include/mm/asid.h Index: kernel/arch/amd64/include/mm/frame.h =================================================================== --- kernel/arch/amd64/include/mm/frame.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,54 +1,0 @@ -/* - * Copyright (c) 2005 Ondrej Palkovsky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup amd64mm - * @{ - */ -/** @file - */ - -#ifndef KERN_amd64_FRAME_H_ -#define KERN_amd64_FRAME_H_ - -#define FRAME_WIDTH 12 /* 4K */ -#define FRAME_SIZE (1 << FRAME_WIDTH) - -#ifndef __ASM__ - -#include - -extern void frame_low_arch_init(void); -extern void frame_high_arch_init(void); -extern void physmem_print(void); - -#endif /* __ASM__ */ - -#endif - -/** @} - */ Index: kernel/arch/amd64/include/mm/km.h =================================================================== --- kernel/arch/amd64/include/mm/km.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,53 +1,0 @@ -/* - * Copyright (c) 2011 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup amd64mm - * @{ - */ -/** @file - */ - -#ifndef KERN_amd64_KM_H_ -#define KERN_amd64_KM_H_ - -#include - -#define KM_AMD64_IDENTITY_START UINT64_C(0xffff800000000000) -#define KM_AMD64_IDENTITY_SIZE UINT64_C(0x0000400000000000) - -#define KM_AMD64_NON_IDENTITY_START UINT64_C(0xffffc00000000000) -#define KM_AMD64_NON_IDENTITY_SIZE UINT64_C(0x0000400000000000) - -extern void km_identity_arch_init(void); -extern void km_non_identity_arch_init(void); -extern bool km_is_non_identity_arch(uintptr_t); - -#endif - -/** @} - */ Index: kernel/arch/amd64/include/mm/page.h =================================================================== --- kernel/arch/amd64/include/mm/page.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,242 +1,0 @@ -/* - * Copyright (c) 2005 Ondrej Palkovsky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup amd64mm - * @{ - */ -/** @file - */ - -#ifndef KERN_amd64_PAGE_H_ -#define KERN_amd64_PAGE_H_ - -#include -#include - -#define PAGE_WIDTH FRAME_WIDTH -#define PAGE_SIZE FRAME_SIZE - -#ifndef __ASM__ - -#define KA2PA(x) (((uintptr_t) (x)) - UINT64_C(0xffff800000000000)) -#define PA2KA(x) (((uintptr_t) (x)) + UINT64_C(0xffff800000000000)) - -#else /* __ASM__ */ - -#define KA2PA(x) ((x) - 0xffff800000000000) -#define PA2KA(x) ((x) + 0xffff800000000000) - -#endif /* __ASM__ */ - -/* Number of entries in each level. */ -#define PTL0_ENTRIES_ARCH 512 -#define PTL1_ENTRIES_ARCH 512 -#define PTL2_ENTRIES_ARCH 512 -#define PTL3_ENTRIES_ARCH 512 - -/* Page table sizes for each level. */ -#define PTL0_SIZE_ARCH ONE_FRAME -#define PTL1_SIZE_ARCH ONE_FRAME -#define PTL2_SIZE_ARCH ONE_FRAME -#define PTL3_SIZE_ARCH ONE_FRAME - -/* Macros calculating indices into page tables in each level. */ -#define PTL0_INDEX_ARCH(vaddr) (((vaddr) >> 39) & 0x1ffU) -#define PTL1_INDEX_ARCH(vaddr) (((vaddr) >> 30) & 0x1ffU) -#define PTL2_INDEX_ARCH(vaddr) (((vaddr) >> 21) & 0x1ffU) -#define PTL3_INDEX_ARCH(vaddr) (((vaddr) >> 12) & 0x1ffU) - -/* Get PTE address accessors for each level. */ -#define GET_PTL1_ADDRESS_ARCH(ptl0, i) \ - ((pte_t *) ((((uint64_t) ((pte_t *) (ptl0))[(i)].addr_12_31) << 12) | \ - (((uint64_t) ((pte_t *) (ptl0))[(i)].addr_32_51) << 32))) -#define GET_PTL2_ADDRESS_ARCH(ptl1, i) \ - ((pte_t *) ((((uint64_t) ((pte_t *) (ptl1))[(i)].addr_12_31) << 12) | \ - (((uint64_t) ((pte_t *) (ptl1))[(i)].addr_32_51) << 32))) -#define GET_PTL3_ADDRESS_ARCH(ptl2, i) \ - ((pte_t *) ((((uint64_t) ((pte_t *) (ptl2))[(i)].addr_12_31) << 12) | \ - (((uint64_t) ((pte_t *) (ptl2))[(i)].addr_32_51) << 32))) -#define GET_FRAME_ADDRESS_ARCH(ptl3, i) \ - ((uintptr_t *) \ - ((((uint64_t) ((pte_t *) (ptl3))[(i)].addr_12_31) << 12) | \ - (((uint64_t) ((pte_t *) (ptl3))[(i)].addr_32_51) << 32))) - -/* Set PTE address accessors for each level. */ -#define SET_PTL0_ADDRESS_ARCH(ptl0) \ - (write_cr3((uintptr_t) (ptl0))) -#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) \ - set_pt_addr((pte_t *) (ptl0), (size_t) (i), a) -#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a) \ - set_pt_addr((pte_t *) (ptl1), (size_t) (i), a) -#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a) \ - set_pt_addr((pte_t *) (ptl2), (size_t) (i), a) -#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) \ - set_pt_addr((pte_t *) (ptl3), (size_t) (i), a) - -/* Get PTE flags accessors for each level. */ -#define GET_PTL1_FLAGS_ARCH(ptl0, i) \ - get_pt_flags((pte_t *) (ptl0), (size_t) (i)) -#define GET_PTL2_FLAGS_ARCH(ptl1, i) \ - get_pt_flags((pte_t *) (ptl1), (size_t) (i)) -#define GET_PTL3_FLAGS_ARCH(ptl2, i) \ - get_pt_flags((pte_t *) (ptl2), (size_t) (i)) -#define GET_FRAME_FLAGS_ARCH(ptl3, i) \ - get_pt_flags((pte_t *) (ptl3), (size_t) (i)) - -/* Set PTE flags accessors for each level. */ -#define SET_PTL1_FLAGS_ARCH(ptl0, i, x) \ - set_pt_flags((pte_t *) (ptl0), (size_t) (i), (x)) -#define SET_PTL2_FLAGS_ARCH(ptl1, i, x) \ - set_pt_flags((pte_t *) (ptl1), (size_t) (i), (x)) -#define SET_PTL3_FLAGS_ARCH(ptl2, i, x) \ - set_pt_flags((pte_t *) (ptl2), (size_t) (i), (x)) -#define SET_FRAME_FLAGS_ARCH(ptl3, i, x) \ - set_pt_flags((pte_t *) (ptl3), (size_t) (i), (x)) - -/* Set PTE present bit accessors for each level. */ -#define SET_PTL1_PRESENT_ARCH(ptl0, i) \ - set_pt_present((pte_t *) (ptl0), (size_t) (i)) -#define SET_PTL2_PRESENT_ARCH(ptl1, i) \ - set_pt_present((pte_t *) (ptl1), (size_t) (i)) -#define SET_PTL3_PRESENT_ARCH(ptl2, i) \ - set_pt_present((pte_t *) (ptl2), (size_t) (i)) -#define SET_FRAME_PRESENT_ARCH(ptl3, i) \ - set_pt_present((pte_t *) (ptl3), (size_t) (i)) - -/* Macros for querying the last-level PTE entries. */ -#define PTE_VALID_ARCH(p) \ - (*((uint64_t *) (p)) != 0) -#define PTE_PRESENT_ARCH(p) \ - ((p)->present != 0) -#define PTE_GET_FRAME_ARCH(p) \ - ((((uintptr_t) (p)->addr_12_31) << 12) | \ - ((uintptr_t) (p)->addr_32_51 << 32)) -#define PTE_WRITABLE_ARCH(p) \ - ((p)->writeable != 0) -#define PTE_EXECUTABLE_ARCH(p) \ - ((p)->no_execute == 0) - -#ifndef __ASM__ - -#include -#include -#include - -/* Page fault error codes. */ - -/** When bit on this position is 0, the page fault was caused by a not-present - * page. - */ -#define PFERR_CODE_P (1 << 0) - -/** When bit on this position is 1, the page fault was caused by a write. */ -#define PFERR_CODE_RW (1 << 1) - -/** When bit on this position is 1, the page fault was caused in user mode. */ -#define PFERR_CODE_US (1 << 2) - -/** When bit on this position is 1, a reserved bit was set in page directory. */ -#define PFERR_CODE_RSVD (1 << 3) - -/** When bit on this position os 1, the page fault was caused during instruction - * fecth. - */ -#define PFERR_CODE_ID (1 << 4) - -/** Page Table Entry. */ -typedef struct { - unsigned int present : 1; - unsigned int writeable : 1; - unsigned int uaccessible : 1; - unsigned int page_write_through : 1; - unsigned int page_cache_disable : 1; - unsigned int accessed : 1; - unsigned int dirty : 1; - unsigned int unused: 1; - unsigned int global : 1; - unsigned int soft_valid : 1; /**< Valid content even if present bit is cleared. */ - unsigned int avl : 2; - unsigned int addr_12_31 : 30; - unsigned int addr_32_51 : 21; - unsigned int no_execute : 1; -} __attribute__ ((packed)) pte_t; - -NO_TRACE static inline unsigned int get_pt_flags(pte_t *pt, size_t i) -{ - pte_t *p = &pt[i]; - - return ((!p->page_cache_disable) << PAGE_CACHEABLE_SHIFT | - (!p->present) << PAGE_PRESENT_SHIFT | - p->uaccessible << PAGE_USER_SHIFT | - 1 << PAGE_READ_SHIFT | - p->writeable << PAGE_WRITE_SHIFT | - (!p->no_execute) << PAGE_EXEC_SHIFT | - p->global << PAGE_GLOBAL_SHIFT); -} - -NO_TRACE static inline void set_pt_addr(pte_t *pt, size_t i, uintptr_t a) -{ - pte_t *p = &pt[i]; - - p->addr_12_31 = (a >> 12) & UINT32_C(0xfffff); - p->addr_32_51 = a >> 32; -} - -NO_TRACE static inline void set_pt_flags(pte_t *pt, size_t i, int flags) -{ - pte_t *p = &pt[i]; - - p->page_cache_disable = !(flags & PAGE_CACHEABLE); - p->present = !(flags & PAGE_NOT_PRESENT); - p->uaccessible = (flags & PAGE_USER) != 0; - p->writeable = (flags & PAGE_WRITE) != 0; - p->no_execute = (flags & PAGE_EXEC) == 0; - p->global = (flags & PAGE_GLOBAL) != 0; - - /* - * Ensure that there is at least one bit set even if the present bit is cleared. - */ - p->soft_valid = 1; -} - -NO_TRACE static inline void set_pt_present(pte_t *pt, size_t i) -{ - pte_t *p = &pt[i]; - - p->present = 1; -} - -extern void page_arch_init(void); -extern void page_fault(unsigned int, istate_t *); - -#endif /* __ASM__ */ - -#endif - -/** @} - */ Index: kernel/arch/amd64/include/mm/ptl.h =================================================================== --- kernel/arch/amd64/include/mm/ptl.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,51 +1,0 @@ -/* - * Copyright (c) 2005 Ondrej Palkovsky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup amd64mm - * @{ - */ -/** @file - */ - -#ifndef KERN_amd64_PTL_H_ -#define KERN_amd64_PTL_H_ - -#define PTL_NO_EXEC (1 << 63) -#define PTL_ACCESSED (1 << 5) -#define PTL_CACHE_DISABLE (1 << 4) -#define PTL_CACHE_THROUGH (1 << 3) -#define PTL_USER (1 << 2) -#define PTL_WRITABLE (1 << 1) -#define PTL_PRESENT 1 -#define PTL_2MB_PAGE (1 << 7) - - -#endif - -/** @} - */ Index: kernel/arch/amd64/include/mm/tlb.h =================================================================== --- kernel/arch/amd64/include/mm/tlb.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,41 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup amd64mm - * @{ - */ -/** @file - */ - -#ifndef KERN_amd64_TLB_H_ -#define KERN_amd64_TLB_H_ - -#endif - -/** @} - */ Index: kernel/arch/amd64/include/pm.h =================================================================== --- kernel/arch/amd64/include/pm.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,186 +1,0 @@ -/* - * Copyright (c) 2001-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup amd64 - * @{ - */ -/** @file - */ - -#ifndef KERN_amd64_PM_H_ -#define KERN_amd64_PM_H_ - -#ifndef __ASM__ - #include - #include -#endif - -#define IDT_ITEMS 64 -#define GDT_ITEMS 8 - - -#define NULL_DES 0 -/* Warning: Do not reorder the following items, unless you look into syscall.c! */ -#define KTEXT_DES 1 -#define KDATA_DES 2 -#define UDATA_DES 3 -#define UTEXT_DES 4 -#define KTEXT32_DES 5 -/* End of warning */ -#define TSS_DES 6 - -#ifdef CONFIG_FB - -#define VESA_INIT_DES 8 -#define VESA_INIT_SEGMENT 0x8000 - -#undef GDT_ITEMS -#define GDT_ITEMS 9 - -#endif /* CONFIG_FB */ - -#define GDT_SELECTOR(des) ((des) << 3) - -#define PL_KERNEL 0 -#define PL_USER 3 - -#define AR_PRESENT (1 << 7) -#define AR_DATA (2 << 3) -#define AR_CODE (3 << 3) -#define AR_WRITABLE (1 << 1) -#define AR_READABLE (1 << 1) -#define AR_TSS (0x09U) -#define AR_INTERRUPT (0x0eU) -#define AR_TRAP (0x0fU) - -#define DPL_KERNEL (PL_KERNEL << 5) -#define DPL_USER (PL_USER << 5) - -#define TSS_BASIC_SIZE 104 -#define TSS_IOMAP_SIZE (8 * 1024 + 1) /* 8K for bitmap + 1 terminating byte for convenience */ - -#define IO_PORTS (64 * 1024) - -#ifndef __ASM__ - -typedef struct { - unsigned limit_0_15: 16; - unsigned base_0_15: 16; - unsigned base_16_23: 8; - unsigned access: 8; - unsigned limit_16_19: 4; - unsigned available: 1; - unsigned longmode: 1; - unsigned special: 1; - unsigned granularity : 1; - unsigned base_24_31: 8; -} __attribute__ ((packed)) descriptor_t; - -typedef struct { - unsigned limit_0_15: 16; - unsigned base_0_15: 16; - unsigned base_16_23: 8; - unsigned type: 4; - unsigned : 1; - unsigned dpl : 2; - unsigned present : 1; - unsigned limit_16_19: 4; - unsigned available: 1; - unsigned : 2; - unsigned granularity : 1; - unsigned base_24_31: 8; - unsigned base_32_63 : 32; - unsigned : 32; -} __attribute__ ((packed)) tss_descriptor_t; - -typedef struct { - unsigned offset_0_15: 16; - unsigned selector: 16; - unsigned ist:3; - unsigned unused: 5; - unsigned type: 5; - unsigned dpl: 2; - unsigned present : 1; - unsigned offset_16_31: 16; - unsigned offset_32_63: 32; - unsigned : 32; -} __attribute__ ((packed)) idescriptor_t; - -typedef struct { - uint16_t limit; - uint64_t base; -} __attribute__ ((packed)) ptr_16_64_t; - -typedef struct { - uint16_t limit; - uint32_t base; -} __attribute__ ((packed)) ptr_16_32_t; - -typedef struct { - uint32_t reserve1; - uint64_t rsp0; - uint64_t rsp1; - uint64_t rsp2; - uint64_t reserve2; - uint64_t ist1; - uint64_t ist2; - uint64_t ist3; - uint64_t ist4; - uint64_t ist5; - uint64_t ist6; - uint64_t ist7; - uint64_t reserve3; - uint16_t reserve4; - uint16_t iomap_base; - uint8_t iomap[TSS_IOMAP_SIZE]; -} __attribute__ ((packed)) tss_t; - -extern tss_t *tss_p; - -extern descriptor_t gdt[]; -extern idescriptor_t idt[]; - -extern ptr_16_64_t gdtr; -extern ptr_16_32_t protected_ap_gdtr; - -extern void pm_init(void); - -extern void gdt_tss_setbase(descriptor_t *d, uintptr_t base); -extern void gdt_tss_setlimit(descriptor_t *d, uint32_t limit); - -extern void idt_init(void); -extern void idt_setoffset(idescriptor_t *d, uintptr_t offset); - -extern void tss_initialize(tss_t *t); - -#endif /* __ASM__ */ - -#endif - -/** @} - */ Index: kernel/arch/amd64/include/proc/task.h =================================================================== --- kernel/arch/amd64/include/proc/task.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,51 +1,0 @@ -/* - * Copyright (c) 2006 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup amd64proc - * @{ - */ -/** @file - */ - -#ifndef KERN_amd64_TASK_H_ -#define KERN_amd64_TASK_H_ - -#include -#include - -typedef struct { - /** I/O Permission bitmap Generation counter. */ - size_t iomapver; - /** I/O Permission bitmap. */ - bitmap_t iomap; -} task_arch_t; - -#endif - -/** @} - */ Index: kernel/arch/amd64/include/proc/thread.h =================================================================== --- kernel/arch/amd64/include/proc/thread.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,54 +1,0 @@ -/* - * Copyright (c) 2005 Ondrej Palkovsky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup amd64proc - * @{ - */ -/** @file - */ - -#ifndef KERN_amd64_THREAD_H_ -#define KERN_amd64_THREAD_H_ - -/* CAUTION: keep these in sync with low level assembly code in syscall_entry */ -#define SYSCALL_USTACK_RSP 0 -#define SYSCALL_KSTACK_RSP 1 - -typedef struct { - sysarg_t tls; - /** User and kernel RSP for syscalls. */ - uint64_t syscall_rsp[2]; -} thread_arch_t; - -#define thr_constructor_arch(t) -#define thr_destructor_arch(t) - -#endif - -/** @} - */ Index: kernel/arch/amd64/include/smp =================================================================== --- kernel/arch/amd64/include/smp (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,1 +1,0 @@ -../../ia32/include/smp Index: kernel/arch/amd64/include/syscall.h =================================================================== --- kernel/arch/amd64/include/syscall.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,43 +1,0 @@ -/* - * Copyright (c) 2006 Ondrej Palkovsky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup amd64 - * @{ - */ -/** @file - */ - -#ifndef KERN_amd64_SYSCALL_H_ -#define KERN_amd64_SYSCALL_H_ - -extern void syscall_setup_cpu(void); - -#endif - -/** @} - */ Index: kernel/arch/amd64/include/types.h =================================================================== --- kernel/arch/amd64/include/types.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,64 +1,0 @@ -/* - * Copyright (c) 2001-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup amd64 - * @{ - */ -/** @file - */ - -#ifndef KERN_amd64_TYPES_H_ -#define KERN_amd64_TYPES_H_ - -typedef uint64_t size_t; -typedef int64_t ssize_t; - -typedef uint64_t uintptr_t; -typedef uint64_t pfn_t; - -typedef uint64_t ipl_t; - -typedef uint64_t sysarg_t; -typedef int64_t native_t; -typedef uint64_t atomic_count_t; - -typedef struct { -} fncptr_t; - -#define INTN_C(c) INT64_C(c) -#define UINTN_C(c) UINT64_C(c) - -#define PRIdn PRId64 /**< Format for native_t. */ -#define PRIun PRIu64 /**< Format for sysarg_t. */ -#define PRIxn PRIx64 /**< Format for hexadecimal sysarg_t. */ -#define PRIua PRIu64 /**< Format for atomic_count_t. */ - -#endif - -/** @} - */ Index: kernel/arch/arm32/include/arch.h =================================================================== --- kernel/arch/arm32/include/arch.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,62 +1,0 @@ -/* - * Copyright (c) 2005 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup arm32 - * @{ - */ -/** @file - * @brief Empty. - */ - -#ifndef KERN_arm32_ARCH_H_ -#define KERN_arm32_ARCH_H_ - -#define TASKMAP_MAX_RECORDS 32 -#define CPUMAP_MAX_RECORDS 32 - -#define BOOTINFO_TASK_NAME_BUFLEN 32 - -#include - -typedef struct { - void *addr; - size_t size; - char name[BOOTINFO_TASK_NAME_BUFLEN]; -} utask_t; - -typedef struct { - size_t cnt; - utask_t tasks[TASKMAP_MAX_RECORDS]; -} bootinfo_t; - -extern void arch_pre_main(void *entry, bootinfo_t *bootinfo); - -#endif - -/** @} - */ Index: kernel/arch/arm32/include/arch/arch.h =================================================================== --- kernel/arch/arm32/include/arch/arch.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/arm32/include/arch/arch.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,62 @@ +/* + * Copyright (c) 2005 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup arm32 + * @{ + */ +/** @file + * @brief Empty. + */ + +#ifndef KERN_arm32_ARCH_H_ +#define KERN_arm32_ARCH_H_ + +#define TASKMAP_MAX_RECORDS 32 +#define CPUMAP_MAX_RECORDS 32 + +#define BOOTINFO_TASK_NAME_BUFLEN 32 + +#include + +typedef struct { + void *addr; + size_t size; + char name[BOOTINFO_TASK_NAME_BUFLEN]; +} utask_t; + +typedef struct { + size_t cnt; + utask_t tasks[TASKMAP_MAX_RECORDS]; +} bootinfo_t; + +extern void arch_pre_main(void *entry, bootinfo_t *bootinfo); + +#endif + +/** @} + */ Index: kernel/arch/arm32/include/arch/asm.h =================================================================== --- kernel/arch/arm32/include/arch/asm.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/arm32/include/arch/asm.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,124 @@ +/* + * Copyright (c) 2007 Michal Kebrt + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup arm32 + * @{ + */ +/** @file + * @brief Declarations of functions implemented in assembly. + */ + +#ifndef KERN_arm32_ASM_H_ +#define KERN_arm32_ASM_H_ + +#include +#include +#include +#include +#include + +/** CPU specific way to sleep cpu. + * + * ARMv7 introduced wait for event and wait for interrupt (wfe/wfi). + * ARM920T has custom coprocessor action to do the same. See ARM920T Technical + * Reference Manual ch 4.9 p. 4-23 (103 in the PDF) + * ARM926EJ-S uses the same coprocessor instruction as ARM920T. See ARM926EJ-S + * chapter 2.3.8 p.2-22 (52 in the PDF) + * + * @note Although mcr p15, 0, R0, c7, c0, 4 is defined in ARM Architecture + * reference manual for armv4/5 CP15 implementation is mandatory only for + * armv6+. + */ +NO_TRACE static inline void cpu_sleep(void) +{ +#ifdef PROCESSOR_ARCH_armv7_a + asm volatile ( "wfe" ); +#elif defined(PROCESSOR_ARCH_armv6) | defined(PROCESSOR_arm926ej_s) | defined(PROCESSOR_arm920t) + asm volatile ( "mcr p15, 0, R0, c7, c0, 4" ); +#endif +} + +NO_TRACE static inline void pio_write_8(ioport8_t *port, uint8_t v) +{ + *port = v; +} + +NO_TRACE static inline void pio_write_16(ioport16_t *port, uint16_t v) +{ + *port = v; +} + +NO_TRACE static inline void pio_write_32(ioport32_t *port, uint32_t v) +{ + *port = v; +} + +NO_TRACE static inline uint8_t pio_read_8(ioport8_t *port) +{ + return *port; +} + +NO_TRACE static inline uint16_t pio_read_16(ioport16_t *port) +{ + return *port; +} + +NO_TRACE static inline uint32_t pio_read_32(ioport32_t *port) +{ + return *port; +} + +/** Return base address of current stack. + * + * Return the base address of the current stack. + * The stack is assumed to be STACK_SIZE bytes long. + * The stack must start on page boundary. + * + */ +NO_TRACE static inline uintptr_t get_stack_base(void) +{ + uintptr_t v; + + asm volatile ( + "and %[v], sp, %[size]\n" + : [v] "=r" (v) + : [size] "r" (~(STACK_SIZE - 1)) + ); + + return v; +} + +extern void cpu_halt(void) __attribute__((noreturn)); +extern void asm_delay_loop(uint32_t t); +extern void userspace_asm(uintptr_t ustack, uintptr_t uspace_uarg, + uintptr_t entry); + +#endif + +/** @} + */ Index: kernel/arch/arm32/include/arch/asm/boot.h =================================================================== --- kernel/arch/arm32/include/arch/asm/boot.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/arm32/include/arch/asm/boot.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2007 Michal Kebrt + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup arm32 + * @{ + */ +/** @file + * @brief Initial kernel start. + */ + +#ifndef KERN_arm32_ASM_BOOT_H_ +#define KERN_arm32_ASM_BOOT_H_ + +/** Size of a temporary stack used for initial kernel start. */ +#define TEMP_STACK_SIZE 0x100 + +#endif + +/** @} + */ Index: kernel/arch/arm32/include/arch/atomic.h =================================================================== --- kernel/arch/arm32/include/arch/atomic.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/arm32/include/arch/atomic.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,131 @@ +/* + * Copyright (c) 2007 Michal Kebrt + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup arm32 + * @{ + */ +/** @file + * @brief Atomic operations. + */ + +#ifndef KERN_arm32_ATOMIC_H_ +#define KERN_arm32_ATOMIC_H_ + +#include +#include + +/** Atomic addition. + * + * @param val Where to add. + * @param i Value to be added. + * + * @return Value after addition. + * + */ +NO_TRACE static inline atomic_count_t atomic_add(atomic_t *val, + atomic_count_t i) +{ + /* + * This implementation is for UP pre-ARMv6 systems where we do not have + * the LDREX and STREX instructions. + */ + ipl_t ipl = interrupts_disable(); + val->count += i; + atomic_count_t ret = val->count; + interrupts_restore(ipl); + + return ret; +} + +/** Atomic increment. + * + * @param val Variable to be incremented. + * + */ +NO_TRACE static inline void atomic_inc(atomic_t *val) +{ + atomic_add(val, 1); +} + +/** Atomic decrement. + * + * @param val Variable to be decremented. + * + */ +NO_TRACE static inline void atomic_dec(atomic_t *val) { + atomic_add(val, -1); +} + +/** Atomic pre-increment. + * + * @param val Variable to be incremented. + * @return Value after incrementation. + * + */ +NO_TRACE static inline atomic_count_t atomic_preinc(atomic_t *val) +{ + return atomic_add(val, 1); +} + +/** Atomic pre-decrement. + * + * @param val Variable to be decremented. + * @return Value after decrementation. + * + */ +NO_TRACE static inline atomic_count_t atomic_predec(atomic_t *val) +{ + return atomic_add(val, -1); +} + +/** Atomic post-increment. + * + * @param val Variable to be incremented. + * @return Value before incrementation. + * + */ +NO_TRACE static inline atomic_count_t atomic_postinc(atomic_t *val) +{ + return atomic_add(val, 1) - 1; +} + +/** Atomic post-decrement. + * + * @param val Variable to be decremented. + * @return Value before decrementation. + * + */ +NO_TRACE static inline atomic_count_t atomic_postdec(atomic_t *val) +{ + return atomic_add(val, -1) + 1; +} + +#endif + +/** @} + */ Index: kernel/arch/arm32/include/arch/barrier.h =================================================================== --- kernel/arch/arm32/include/arch/barrier.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/arm32/include/arch/barrier.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,131 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup arm32 + * @{ + */ +/** @file + * @brief Memory barriers. + */ + +#ifndef KERN_arm32_BARRIER_H_ +#define KERN_arm32_BARRIER_H_ + +#ifdef KERNEL +#include +#else +#include +#endif + +#define CS_ENTER_BARRIER() asm volatile ("" ::: "memory") +#define CS_LEAVE_BARRIER() asm volatile ("" ::: "memory") + +#if defined PROCESSOR_ARCH_armv7_a +/* ARMv7 uses instructions for memory barriers see ARM Architecture reference + * manual for details: + * DMB: ch. A8.8.43 page A8-376 + * DSB: ch. A8.8.44 page A8-378 + * See ch. A3.8.3 page A3-148 for details about memory barrier implementation + * and functionality on armv7 architecture. + */ +#define memory_barrier() asm volatile ("dmb" ::: "memory") +#define read_barrier() asm volatile ("dsb" ::: "memory") +#define write_barrier() asm volatile ("dsb st" ::: "memory") +#define inst_barrier() asm volatile ("isb" ::: "memory") +#elif defined PROCESSOR_ARCH_armv6 | defined KERNEL +/* + * ARMv6 introduced user access of the following commands: + * - Prefetch flush + * - Data synchronization barrier + * - Data memory barrier + * - Clean and prefetch range operations. + * ARM Architecture Reference Manual version I ch. B.3.2.1 p. B3-4 + */ +/* ARMv6- use system control coprocessor (CP15) for memory barrier instructions. + * Although at least mcr p15, 0, r0, c7, c10, 4 is mentioned in earlier archs, + * CP15 implementation is mandatory only for armv6+. + */ +#define memory_barrier() CP15DMB_write(0) +#define read_barrier() CP15DSB_write(0) +#define write_barrier() read_barrier() +#define inst_barrier() CP15ISB_write(0) +#else +/* Older manuals mention syscalls as a way to implement cache coherency and + * barriers. See for example ARM Architecture Reference Manual Version D + * chapter 2.7.4 Prefetching and self-modifying code (p. A2-28) + */ +// TODO implement on per PROCESSOR basis or via syscalls +#define memory_barrier() asm volatile ("" ::: "memory") +#define read_barrier() asm volatile ("" ::: "memory") +#define write_barrier() asm volatile ("" ::: "memory") +#define inst_barrier() asm volatile ("" ::: "memory") +#endif + +/* + * There are multiple ways ICache can be implemented on ARM machines. Namely + * PIPT, VIPT, and ASID and VMID tagged VIVT (see ARM Architecture Reference + * Manual B3.11.2 (p. 1383). However, CortexA8 Manual states: "For maximum + * compatibility across processors, ARM recommends that operating systems target + * the ARMv7 base architecture that uses ASID-tagged VIVT instruction caches, + * and do not assume the presence of the IVIPT extension. Software that relies + * on the IVIPT extension might fail in an unpredictable way on an ARMv7 + * implementation that does not include the IVIPT extension." (7.2.6 p. 245). + * Only PIPT invalidates cache for all VA aliases if one block is invalidated. + * + * @note: Supporting ASID and VMID tagged VIVT may need to add ICache + * maintenance to other places than just smc. + */ + +#if defined PROCESSOR_ARCH_armv7_a | defined PROCESSOR_ARCH_armv6 | defined KERNEL +/* Available on all supported arms, + * invalidates entire ICache so the written value does not matter. */ +//TODO might be PL1 only on armv5- +#define smc_coherence(a) \ +do { \ + DCCMVAU_write((uint32_t)(a)); /* Flush changed memory */\ + write_barrier(); /* Wait for completion */\ + ICIALLU_write(0); /* Flush ICache */\ + inst_barrier(); /* Wait for Inst refetch */\ +} while (0) +/* @note: Cache type register is not available in uspace. We would need + * to export the cache line value, or use syscall for uspace smc_coherence */ +#define smc_coherence_block(a, l) \ +do { \ + for (uintptr_t addr = (uintptr_t)a; addr < (uintptr_t)a + l; addr += 4)\ + smc_coherence(addr); \ +} while (0) +#else +#define smc_coherence(a) +#define smc_coherence_block(a, l) +#endif + + +#endif + +/** @} + */ Index: kernel/arch/arm32/include/arch/cache.h =================================================================== --- kernel/arch/arm32/include/arch/cache.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/arm32/include/arch/cache.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,50 @@ +/* + * Copyright (c) 2013 Jan Vesely + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup arm32 + * @{ + */ +/** @file + * @brief Security Extensions Routines + */ + +#ifndef KERN_arm32_CACHE_H_ +#define KERN_arm32_CACHE_H_ + +unsigned dcache_levels(void); + +void dcache_flush(void); +void dcache_flush_invalidate(void); +void cpu_dcache_flush(void); +void cpu_dcache_flush_invalidate(void); +void icache_invalidate(void); + +#endif +/** @} + */ + Index: kernel/arch/arm32/include/arch/context.h =================================================================== --- kernel/arch/arm32/include/arch/context.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/arm32/include/arch/context.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,82 @@ +/* + * Copyright (c) 2007 Michal Kebrt + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup arm32 + * @{ + */ +/** @file + * @brief Thread context. + */ + +#ifndef KERN_arm32_CONTEXT_H_ +#define KERN_arm32_CONTEXT_H_ + +#include +#include + +/* Put one item onto the stack to support get_stack_base() and align it up. */ +#define SP_DELTA (0 + ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT)) + +#define context_set(c, _pc, stack, size) \ + do { \ + (c)->pc = (uintptr_t) (_pc); \ + (c)->sp = ((uintptr_t) (stack)) + (size) - SP_DELTA; \ + (c)->fp = 0; \ + } while (0) + +#ifndef __ASM__ + +#include + +/** Thread context containing registers that must be preserved across function + * calls. + */ +typedef struct { + uint32_t cpu_mode; + uintptr_t sp; + uintptr_t pc; + + uint32_t r4; + uint32_t r5; + uint32_t r6; + uint32_t r7; + uint32_t r8; + uint32_t r9; + uint32_t r10; + uint32_t fp; /* r11 */ + + ipl_t ipl; +} context_t; + + +#endif /* __ASM__ */ + +#endif + +/** @} + */ Index: kernel/arch/arm32/include/arch/cp15.h =================================================================== --- kernel/arch/arm32/include/arch/cp15.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/arm32/include/arch/cp15.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,525 @@ +/* + * Copyright (c) 2013 Jan Vesely + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup arm32 + * @{ + */ +/** @file + * @brief System Control Coprocessor (CP15) + */ + +#ifndef KERN_arm32_CP15_H_ +#define KERN_arm32_CP15_H_ + + +/** See ARM Architecture reference manual ch. B3.17.1 page B3-1456 + * for the list */ + +#define CONTROL_REG_GEN_READ(name, crn, opc1, crm, opc2) \ +static inline uint32_t name##_read() \ +{ \ + uint32_t val; \ + asm volatile ( "mrc p15, "#opc1", %0, "#crn", "#crm", "#opc2"\n" : "=r" (val) ); \ + return val; \ +} +#define CONTROL_REG_GEN_WRITE(name, crn, opc1, crm, opc2) \ +static inline void name##_write(uint32_t val) \ +{ \ + asm volatile ( "mcr p15, "#opc1", %0, "#crn", "#crm", "#opc2"\n" :: "r" (val) ); \ +} + +/* Identification registers */ +enum { + MIDR_IMPLEMENTER_MASK = 0xff, + MIDR_IMPLEMENTER_SHIFT = 24, + MIDR_VARIANT_MASK = 0xf, + MIDR_VARIANT_SHIFT = 20, + MIDR_ARCHITECTURE_MASK = 0xf, + MIDR_ARCHITECTURE_SHIFT = 16, + MIDR_PART_NUMBER_MASK = 0xfff, + MIDR_PART_NUMBER_SHIFT = 4, + MIDR_REVISION_MASK = 0xf, + MIDR_REVISION_SHIFT = 0, +}; +CONTROL_REG_GEN_READ(MIDR, c0, 0, c0, 0); + +enum { + CTR_FORMAT_MASK = 0xe0000000, + CTR_FORMAT_ARMv7 = 0x80000000, + CTR_FORMAT_ARMv6 = 0x00000000, + /* ARMv7 format */ + CTR_CWG_MASK = 0xf, + CTR_CWG_SHIFT = 24, + CTR_ERG_MASK = 0xf, + CTR_ERG_SHIFT = 20, + CTR_D_MIN_LINE_MASK = 0xf, + CTR_D_MIN_LINE_SHIFT = 16, + CTR_I_MIN_LINE_MASK = 0xf, + CTR_I_MIN_LINE_SHIFT = 0, + CTR_L1I_POLICY_MASK = 0x0000c000, + CTR_L1I_POLICY_AIVIVT = 0x00004000, + CTR_L1I_POLICY_VIPT = 0x00008000, + CTR_L1I_POLICY_PIPT = 0x0000c000, + /* ARMv6 format */ + CTR_CTYPE_MASK = 0x1e000000, + CTR_CTYPE_WT = 0x00000000, + CTR_CTYPE_WB_NL = 0x04000000, + CTR_CTYPE_WB_D = 0x0a000000, + CTR_CTYPE_WB_A = 0x0c000000, /**< ARMv5- only */ + CTR_CTYPE_WB_B = 0x0e000000, /**< ARMv5- only */ + CTR_CTYPE_WB_C = 0x1c000000, + CTR_SEP_FLAG = 1 << 24, + CTR_DCACHE_P_FLAG = 1 << 23, + CTR_DCACHE_SIZE_MASK = 0xf, + CTR_DCACHE_SIZE_SHIFT = 18, + CTR_DCACHE_ASSOC_MASK = 0x7, + CTR_DCACHE_ASSOC_SHIFT = 15, + CTR_DCACHE_M_FLAG = 1 << 14, + CTR_DCACHE_LEN_MASK = 0x3, + CTR_DCACHE_LEN_SHIFT = 0, + CTR_ICACHE_P_FLAG = 1 << 11, + CTR_ICACHE_SIZE_MASK = 0xf, + CTR_ICACHE_SIZE_SHIFT = 6, + CTR_ICACHE_ASSOC_MASK = 0x7, + CTR_ICACHE_ASSOC_SHIFT = 3, + CTR_ICACHE_M_FLAG = 1 << 2, + CTR_ICACHE_LEN_MASK = 0x3, + CTR_ICACHE_LEN_SHIFT = 0, +}; +CONTROL_REG_GEN_READ(CTR, c0, 0, c0, 1); +CONTROL_REG_GEN_READ(TCMR, c0, 0, c0, 2); +CONTROL_REG_GEN_READ(TLBTR, c0, 0, c0, 3); +CONTROL_REG_GEN_READ(MPIDR, c0, 0, c0, 5); +CONTROL_REG_GEN_READ(REVIDR, c0, 0, c0, 6); + +enum { + ID_PFR0_THUMBEE_MASK = 0xf << 12, + ID_PFR0_THUMBEE = 0x1 << 12, + ID_PFR0_JAZELLE_MASK = 0xf << 8, + ID_PFR0_JAZELLE = 0x1 << 8, + ID_PFR0_JAZELLE_CV_CLEAR = 0x2 << 8, + ID_PFR0_THUMB_MASK = 0xf << 4, + ID_PFR0_THUMB = 0x1 << 4, + ID_PFR0_THUMB2 = 0x3 << 4, + ID_PFR0_ARM_MASK = 0xf << 0, + ID_PFR0_ARM = 0x1 << 0, +}; +CONTROL_REG_GEN_READ(ID_PFR0, c0, 0, c1, 0); + +enum { + ID_PFR1_GEN_TIMER_EXT_MASK = 0xf << 16, + ID_PFR1_GEN_TIMER_EXT = 0x1 << 16, + ID_PFR1_VIRT_EXT_MASK = 0xf << 12, + ID_PFR1_VIRT_EXT = 0x1 << 12, + ID_PFR1_M_PROF_MASK = 0xf << 8, + ID_PFR1_M_PROF_MODEL = 0x2 << 8, + ID_PFR1_SEC_EXT_MASK = 0xf << 4, + ID_PFR1_SEC_EXT = 0x1 << 4, + ID_PFR1_SEC_EXT_RFR = 0x2 << 4, + ID_PFR1_ARMV4_MODEL_MASK = 0xf << 0, + ID_PFR1_ARMV4_MODEL = 0x1 << 0, +}; +CONTROL_REG_GEN_READ(ID_PFR1, c0, 0, c1, 1); +CONTROL_REG_GEN_READ(ID_DFR0, c0, 0, c1, 2); +CONTROL_REG_GEN_READ(ID_AFR0, c0, 0, c1, 3); +CONTROL_REG_GEN_READ(ID_MMFR0, c0, 0, c1, 4); +CONTROL_REG_GEN_READ(ID_MMFR1, c0, 0, c1, 5); +CONTROL_REG_GEN_READ(ID_MMFR2, c0, 0, c1, 6); +CONTROL_REG_GEN_READ(ID_MMFR3, c0, 0, c1, 7); + +CONTROL_REG_GEN_READ(ID_ISAR0, c0, 0, c2, 0); +CONTROL_REG_GEN_READ(ID_ISAR1, c0, 0, c2, 1); +CONTROL_REG_GEN_READ(ID_ISAR2, c0, 0, c2, 2); +CONTROL_REG_GEN_READ(ID_ISAR3, c0, 0, c2, 3); +CONTROL_REG_GEN_READ(ID_ISAR4, c0, 0, c2, 4); +CONTROL_REG_GEN_READ(ID_ISAR5, c0, 0, c2, 5); + +enum { + CCSIDR_WT_FLAG = 1 << 31, + CCSIDR_WB_FLAG = 1 << 30, + CCSIDR_RA_FLAG = 1 << 29, + CCSIDR_WA_FLAG = 1 << 28, + CCSIDR_NUMSETS_MASK = 0x7fff, + CCSIDR_NUMSETS_SHIFT = 13, + CCSIDR_ASSOC_MASK = 0x3ff, + CCSIDR_ASSOC_SHIFT = 3, + CCSIDR_LINESIZE_MASK = 0x7, + CCSIDR_LINESIZE_SHIFT = 0, +}; +CONTROL_REG_GEN_READ(CCSIDR, c0, 1, c0, 0); + +enum { + CLIDR_LOUU_MASK = 0x7, + CLIDR_LOUU_SHIFT = 27, + CLIDR_LOC_MASK = 0x7, + CLIDR_LOC_SHIFT = 24, + CLIDR_LOUIS_MASK = 0x7, + CLIDR_LOUIS_SHIFT = 21, + CLIDR_NOCACHE = 0x0, + CLIDR_ICACHE_ONLY = 0x1, + CLIDR_DCACHE_ONLY = 0x2, + CLIDR_SEP_CACHE = 0x3, + CLIDR_UNI_CACHE = 0x4, + CLIDR_CACHE_MASK = 0x7, +#define CLIDR_CACHE(level, val) ((val >> (level - 1) * 3) & CLIDR_CACHE_MASK) +}; +CONTROL_REG_GEN_READ(CLIDR, c0, 1, c0, 1); +CONTROL_REG_GEN_READ(AIDR, c0, 1, c0, 7); /* Implementation defined or MIDR */ + +enum { + CCSELR_LEVEL_MASK = 0x7, + CCSELR_LEVEL_SHIFT = 1, + CCSELR_INSTRUCTION_FLAG = 1 << 0, +}; +CONTROL_REG_GEN_READ(CSSELR, c0, 2, c0, 0); +CONTROL_REG_GEN_WRITE(CSSELR, c0, 2, c0, 0); +CONTROL_REG_GEN_READ(VPIDR, c0, 4, c0, 0); +CONTROL_REG_GEN_WRITE(VPIDR, c0, 4, c0, 0); +CONTROL_REG_GEN_READ(VMPIDR, c0, 4, c0, 5); +CONTROL_REG_GEN_WRITE(VMPIDR, c0, 4, c0, 5); + +/* System control registers */ +/* COntrol register bit values see ch. B4.1.130 of ARM Architecture Reference + * Manual ARMv7-A and ARMv7-R edition, page 1687 */ +enum { + SCTLR_MMU_EN_FLAG = 1 << 0, + SCTLR_ALIGN_CHECK_EN_FLAG = 1 << 1, /* Allow alignemnt check */ + SCTLR_CACHE_EN_FLAG = 1 << 2, + SCTLR_CP15_BARRIER_EN_FLAG = 1 << 5, + SCTLR_B_EN_FLAG = 1 << 7, /* ARMv6-, big endian switch */ + SCTLR_SWAP_EN_FLAG = 1 << 10, + SCTLR_BRANCH_PREDICT_EN_FLAG = 1 << 11, + SCTLR_INST_CACHE_EN_FLAG = 1 << 12, + SCTLR_HIGH_VECTORS_EN_FLAG = 1 << 13, + SCTLR_ROUND_ROBIN_EN_FLAG = 1 << 14, + SCTLR_HW_ACCESS_FLAG_EN_FLAG = 1 << 17, + SCTLR_WRITE_XN_EN_FLAG = 1 << 19, /* Only if virt. supported */ + SCTLR_USPCE_WRITE_XN_EN_FLAG = 1 << 20, /* Only if virt. supported */ + SCTLR_FAST_IRQ_EN_FLAG = 1 << 21, /* Disable impl. specific feat*/ + SCTLR_UNALIGNED_EN_FLAG = 1 << 22, /* Must be 1 on armv7 */ + SCTLR_IRQ_VECTORS_EN_FLAG = 1 << 24, + SCTLR_BIG_ENDIAN_EXC_FLAG = 1 << 25, + SCTLR_NMFI_EN_FLAG = 1 << 27, + SCTLR_TEX_REMAP_EN_FLAG = 1 << 28, + SCTLR_ACCESS_FLAG_EN_FLAG = 1 << 29, + SCTLR_THUMB_EXC_EN_FLAG = 1 << 30, +}; +CONTROL_REG_GEN_READ(SCTLR, c1, 0, c0, 0); +CONTROL_REG_GEN_WRITE(SCTLR, c1, 0, c0, 0); +CONTROL_REG_GEN_READ(ACTLR, c1, 0, c0, 1); +CONTROL_REG_GEN_WRITE(ACTLR, c1, 0, c0, 1); + +enum { + CPACR_ASEDIS_FLAG = 1 << 31, + CPACR_D32DIS_FLAG = 1 << 30, + CPACR_TRCDIS_FLAG = 1 << 28, +#define CPACR_CP_MASK(cp) (0x3 << (cp * 2)) +#define CPACR_CP_NO_ACCESS(cp) (0x0 << (cp * 2)) +#define CPACR_CP_PL1_ACCESS(cp) (0x1 << (cp * 2)) +#define CPACR_CP_FULL_ACCESS(cp) (0x3 << (cp * 2)) +}; +CONTROL_REG_GEN_READ(CPACR, c1, 0, c0, 2); +CONTROL_REG_GEN_WRITE(CPACR, c1, 0, c0, 2); + +/* Implemented as part of Security extensions */ +enum { + SCR_SIF_FLAG = 1 << 9, + SCR_HCE_FLAG = 1 << 8, + SCR_SCD_FLAG = 1 << 7, + SCR_nET_FLAG = 1 << 6, + SCR_AW_FLAG = 1 << 5, + SCR_FW_FLAG = 1 << 4, + SCR_EA_FLAG = 1 << 3, + SCR_FIQ_FLAG = 1 << 2, + SCR_IRQ_FLAG = 1 << 1, + SCR_NS_FLAG = 1 << 0, +}; +CONTROL_REG_GEN_READ(SCR, c1, 0, c1, 0); +CONTROL_REG_GEN_WRITE(SCR, c1, 0, c1, 0); +CONTROL_REG_GEN_READ(SDER, c1, 0, c1, 1); +CONTROL_REG_GEN_WRITE(SDER, c1, 0, c1, 1); + +enum { + NSACR_NSTRCDIS_FLAG = 1 << 20, + NSACR_RFR_FLAG = 1 << 19, + NSACR_NSASEDIS = 1 << 15, + NSACR_NSD32DIS = 1 << 14, +#define NSACR_CP_FLAG(cp) (1 << cp) +}; +CONTROL_REG_GEN_READ(NSACR, c1, 0, c1, 2); +CONTROL_REG_GEN_WRITE(NSACR, c1, 0, c1, 2); + +/* Implemented as part of Virtualization extensions */ +CONTROL_REG_GEN_READ(HSCTLR, c1, 4, c0, 0); +CONTROL_REG_GEN_WRITE(HSCTLR, c1, 4, c0, 0); +CONTROL_REG_GEN_READ(HACTLR, c1, 4, c0, 1); +CONTROL_REG_GEN_WRITE(HACTLR, c1, 4, c0, 1); + +CONTROL_REG_GEN_READ(HCR, c1, 4, c1, 0); +CONTROL_REG_GEN_WRITE(HCR, c1, 4, c1, 0); +CONTROL_REG_GEN_READ(HDCR, c1, 4, c1, 1); +CONTROL_REG_GEN_WRITE(HDCR, c1, 4, c1, 1); +CONTROL_REG_GEN_READ(HCPTR, c1, 4, c1, 2); +CONTROL_REG_GEN_WRITE(HCPTR, c1, 4, c1, 2); +CONTROL_REG_GEN_READ(HSTR, c1, 4, c1, 3); +CONTROL_REG_GEN_WRITE(HSTR, c1, 4, c1, 3); +CONTROL_REG_GEN_READ(HACR, c1, 4, c1, 7); +CONTROL_REG_GEN_WRITE(HACR, c1, 4, c1, 7); + +/* Memory protection and control registers */ +CONTROL_REG_GEN_READ(TTBR0, c2, 0, c0, 0); +CONTROL_REG_GEN_WRITE(TTBR0, c2, 0, c0, 0); +CONTROL_REG_GEN_READ(TTBR1, c2, 0, c0, 1); +CONTROL_REG_GEN_WRITE(TTBR1, c2, 0, c0, 1); +CONTROL_REG_GEN_READ(TTBCR, c2, 0, c0, 2); +CONTROL_REG_GEN_WRITE(TTBCR, c2, 0, c0, 2); + +CONTROL_REG_GEN_READ(HTCR, c2, 4, c0, 2); +CONTROL_REG_GEN_WRITE(HTCR, c2, 4, c0, 2); +CONTROL_REG_GEN_READ(VTCR, c2, 4, c1, 2); +CONTROL_REG_GEN_WRITE(VTCR, c2, 4, c1, 2); + +/* PAE */ +CONTROL_REG_GEN_READ(TTBR0H, c2, 0, c2, 0); +CONTROL_REG_GEN_WRITE(TTBR0H, c2, 0, c2, 0); +CONTROL_REG_GEN_READ(TTBR1H, c2, 0, c2, 1); +CONTROL_REG_GEN_WRITE(TTBR1H, c2, 0, c2, 1); +CONTROL_REG_GEN_READ(HTTBRH, c2, 0, c2, 4); +CONTROL_REG_GEN_WRITE(HTTBRH, c2, 0, c2, 4); +CONTROL_REG_GEN_READ(VTTBRH, c2, 0, c2, 6); +CONTROL_REG_GEN_WRITE(VTTBRH, c2, 0, c2, 6); + +CONTROL_REG_GEN_READ(DACR, c3, 0, c0, 0); +CONTROL_REG_GEN_WRITE(DACR, c3, 0, c0, 0); + +/* Memory system fault registers */ +CONTROL_REG_GEN_READ(DFSR, c5, 0, c0, 0); +CONTROL_REG_GEN_WRITE(DFSR, c5, 0, c0, 0); +CONTROL_REG_GEN_READ(IFSR, c5, 0, c0, 1); +CONTROL_REG_GEN_WRITE(IFSR, c5, 0, c0, 1); + +CONTROL_REG_GEN_READ(ADFSR, c5, 0, c1, 0); +CONTROL_REG_GEN_WRITE(ADFSR, c5, 0, c1, 0); +CONTROL_REG_GEN_READ(AIFSR, c5, 0, c1, 1); +CONTROL_REG_GEN_WRITE(AIFSR, c5, 0, c1, 1); + +CONTROL_REG_GEN_READ(HADFSR, c5, 4, c1, 0); +CONTROL_REG_GEN_WRITE(HADFSR, c5, 4, c1, 0); +CONTROL_REG_GEN_READ(HAIFSR, c5, 4, c1, 1); +CONTROL_REG_GEN_WRITE(HAIFSR, c5, 4, c1, 1); +CONTROL_REG_GEN_READ(HSR, c5, 4, c2, 0); +CONTROL_REG_GEN_WRITE(HSR, c5, 4, c2, 0); + +CONTROL_REG_GEN_READ(DFAR, c6, 0, c0, 0); +CONTROL_REG_GEN_WRITE(DFAR, c6, 0, c0, 0); +CONTROL_REG_GEN_READ(IFAR, c6, 0, c0, 2); +CONTROL_REG_GEN_WRITE(IFAR, c6, 0, c0, 2); + +CONTROL_REG_GEN_READ(HDFAR, c6, 4, c0, 0); +CONTROL_REG_GEN_WRITE(HDFAR, c6, 4, c0, 0); +CONTROL_REG_GEN_READ(HIFAR, c6, 4, c0, 2); +CONTROL_REG_GEN_WRITE(HIFAR, c6, 4, c0, 2); +CONTROL_REG_GEN_READ(HPFAR, c6, 4, c0, 4); +CONTROL_REG_GEN_WRITE(HPFAR, c6, 4, c0, 4); + +/* Cache maintenance, address translation and other */ +CONTROL_REG_GEN_WRITE(WFI, c7, 0, c0, 4); /* armv6 only */ +CONTROL_REG_GEN_WRITE(ICIALLLUIS, c7, 0, c1, 0); +CONTROL_REG_GEN_WRITE(BPIALLIS, c7, 0, c1, 6); +CONTROL_REG_GEN_READ(PAR, c7, 0, c4, 0); +CONTROL_REG_GEN_WRITE(PAR, c7, 0, c4, 0); +CONTROL_REG_GEN_READ(PARH, c7, 0, c7, 0); /* PAE */ +CONTROL_REG_GEN_WRITE(PARH, c7, 0, c7, 0); /* PAE */ +CONTROL_REG_GEN_WRITE(ICIALLU, c7, 0, c5, 0); +CONTROL_REG_GEN_WRITE(ICIMVAU, c7, 0, c5, 1); +CONTROL_REG_GEN_WRITE(CP15ISB, c7, 0, c5, 4); +CONTROL_REG_GEN_WRITE(BPIALL, c7, 0, c5, 6); +CONTROL_REG_GEN_WRITE(BPIMVA, c7, 0, c5, 7); + +CONTROL_REG_GEN_WRITE(DCIMVAC, c7, 0, c6, 1); +CONTROL_REG_GEN_WRITE(DCIMSW, c7, 0, c6, 2); + +CONTROL_REG_GEN_WRITE(ATS1CPR, c7, 0, c8, 0); +CONTROL_REG_GEN_WRITE(ATS1CPW, c7, 0, c8, 1); +CONTROL_REG_GEN_WRITE(ATS1CUR, c7, 0, c8, 2); +CONTROL_REG_GEN_WRITE(ATS1CUW, c7, 0, c8, 3); +CONTROL_REG_GEN_WRITE(ATS1NSOPR, c7, 0, c8, 4); +CONTROL_REG_GEN_WRITE(ATS1NSOPW, c7, 0, c8, 5); +CONTROL_REG_GEN_WRITE(ATS1NSOUR, c7, 0, c8, 6); +CONTROL_REG_GEN_WRITE(ATS1NSOUW, c7, 0, c8, 7); + + +CONTROL_REG_GEN_WRITE(DCCMVAC, c7, 0, c10, 1); +CONTROL_REG_GEN_WRITE(DCCSW, c7, 0, c10, 2); +CONTROL_REG_GEN_WRITE(CP15DSB, c7, 0, c10, 4); +CONTROL_REG_GEN_WRITE(CP15DMB, c7, 0, c10, 5); +CONTROL_REG_GEN_WRITE(DCCMVAU, c7, 0, c11, 1); + +CONTROL_REG_GEN_WRITE(PFI, c7, 0, c11, 1); /* armv6 only */ + +CONTROL_REG_GEN_WRITE(DCCIMVAC, c7, 0, c14, 1); +CONTROL_REG_GEN_WRITE(DCCISW, c7, 0, c14, 2); + +CONTROL_REG_GEN_WRITE(ATS1HR, c7, 4, c8, 0); +CONTROL_REG_GEN_WRITE(ATS1HW, c7, 4, c8, 1); + +/* TLB maintenance */ +CONTROL_REG_GEN_WRITE(TLBIALLIS, c8, 0, c3, 0); /* Inner shareable */ +CONTROL_REG_GEN_WRITE(TLBIMVAIS, c8, 0, c3, 1); /* Inner shareable */ +CONTROL_REG_GEN_WRITE(TLBIASIDIS, c8, 0, c3, 2); /* Inner shareable */ +CONTROL_REG_GEN_WRITE(TLBIMVAAIS, c8, 0, c3, 3); /* Inner shareable */ + +CONTROL_REG_GEN_WRITE(ITLBIALL, c8, 0, c5, 0); +CONTROL_REG_GEN_WRITE(ITLBIMVA, c8, 0, c5, 1); +CONTROL_REG_GEN_WRITE(ITLBIASID, c8, 0, c5, 2); + +CONTROL_REG_GEN_WRITE(DTLBIALL, c8, 0, c6, 0); +CONTROL_REG_GEN_WRITE(DTLBIMVA, c8, 0, c6, 1); +CONTROL_REG_GEN_WRITE(DTLBIASID, c8, 0, c6, 2); + +CONTROL_REG_GEN_WRITE(TLBIALL, c8, 0, c7, 0); +CONTROL_REG_GEN_WRITE(TLBIMVA, c8, 0, c7, 1); +CONTROL_REG_GEN_WRITE(TLBIASID, c8, 0, c7, 2); +CONTROL_REG_GEN_WRITE(TLBIMVAA, c8, 0, c7, 3); + +CONTROL_REG_GEN_WRITE(TLBIALLHIS, c8, 4, c3, 0); /* Inner shareable */ +CONTROL_REG_GEN_WRITE(TLBIMVAHIS, c8, 4, c3, 1); /* Inner shareable */ +CONTROL_REG_GEN_WRITE(TLBIALLNSNHIS, c8, 4, c3, 4); /* Inner shareable */ + +CONTROL_REG_GEN_WRITE(TLBIALLH, c8, 4, c7, 0); +CONTROL_REG_GEN_WRITE(TLBIMVAH, c8, 4, c7, 1); +CONTROL_REG_GEN_WRITE(TLBIALLNSNHS, c8, 4, c7, 4); + +/* c9 are performance monitoring resgisters */ +enum { + PMCR_IMP_MASK = 0xff, + PMCR_IMP_SHIFT = 24, + PMCR_IDCODE_MASK = 0xff, + PMCR_IDCODE_SHIFT = 16, + PMCR_EVENT_NUM_MASK = 0x1f, + PMCR_EVENT_NUM_SHIFT = 11, + PMCR_DP_FLAG = 1 << 5, + PMCR_X_FLAG = 1 << 4, + PMCR_D_FLAG = 1 << 3, + PMCR_C_FLAG = 1 << 2, + PMCR_P_FLAG = 1 << 1, + PMCR_E_FLAG = 1 << 0, +}; +CONTROL_REG_GEN_READ(PMCR, c9, 0, c12, 0); +CONTROL_REG_GEN_WRITE(PMCR, c9, 0, c12, 0); +enum { + PMCNTENSET_CYCLE_COUNTER_EN_FLAG = 1 << 31, +#define PMCNTENSET_COUNTER_EN_FLAG(c) (1 << c) +}; +CONTROL_REG_GEN_READ(PMCNTENSET, c9, 0, c12, 1); +CONTROL_REG_GEN_WRITE(PMCNTENSET, c9, 0, c12, 1); +CONTROL_REG_GEN_READ(PMCCNTR, c9, 0, c13, 0); +CONTROL_REG_GEN_WRITE(PMCCNTR, c9, 0, c13, 0); + + +/*c10 has tons of reserved too */ +CONTROL_REG_GEN_READ(PRRR, c10, 0, c2, 0); /* no PAE */ +CONTROL_REG_GEN_WRITE(PRRR, c10, 0, c2, 0); /* no PAE */ +CONTROL_REG_GEN_READ(MAIR0, c10, 0, c2, 0); /* PAE */ +CONTROL_REG_GEN_WRITE(MAIR0, c10, 0, c2, 0); /* PAE */ +CONTROL_REG_GEN_READ(NMRR, c10, 0, c2, 1); /* no PAE */ +CONTROL_REG_GEN_WRITE(NMRR, c10, 0, c2, 1); /* no PAE */ +CONTROL_REG_GEN_READ(MAIR1, c10, 0, c2, 1); /* PAE */ +CONTROL_REG_GEN_WRITE(MAIR1, c10, 0, c2, 1); /* PAE */ + +CONTROL_REG_GEN_READ(AMAIR0, c10, 0, c3, 0); /* PAE */ +CONTROL_REG_GEN_WRITE(AMAIR0, c10, 0, c3, 0); /* PAE */ +CONTROL_REG_GEN_READ(AMAIR1, c10, 0, c3, 1); /* PAE */ +CONTROL_REG_GEN_WRITE(AMAIR1, c10, 0, c3, 1); /* PAE */ + +CONTROL_REG_GEN_READ(HMAIR0, c10, 4, c2, 0); +CONTROL_REG_GEN_WRITE(HMAIR0, c10, 4, c2, 0); +CONTROL_REG_GEN_READ(HMAIR1, c10, 4, c2, 1); +CONTROL_REG_GEN_WRITE(HMAIR1, c10, 4, c2, 1); + +CONTROL_REG_GEN_READ(HAMAIR0, c10, 4, c3, 0); +CONTROL_REG_GEN_WRITE(HAMAIR0, c10, 4, c3, 0); +CONTROL_REG_GEN_READ(HAMAIR1, c10, 4, c3, 1); +CONTROL_REG_GEN_WRITE(HAMAIR1, c10, 4, c3, 1); + +/* c11 is reserved for TCM and DMA */ + +/* Security extensions */ +CONTROL_REG_GEN_READ(VBAR, c12, 0, c0, 0); +CONTROL_REG_GEN_WRITE(VBAR, c12, 0, c0, 0); +CONTROL_REG_GEN_READ(MVBAR, c12, 0, c0, 1); +CONTROL_REG_GEN_WRITE(MVBAR, c12, 0, c0, 1); + +CONTROL_REG_GEN_READ(ISR, c12, 0, c1, 0); + +CONTROL_REG_GEN_READ(HVBAR, c12, 4, c0, 0); +CONTROL_REG_GEN_WRITE(HVBAR, c12, 4, c0, 0); + +/* Process context and thread id (FCSE) */ +CONTROL_REG_GEN_READ(FCSEIDR, c13, 0, c0, 0); + +CONTROL_REG_GEN_READ(CONTEXTIDR, c13, 0, c0, 1); +CONTROL_REG_GEN_WRITE(CONTEXTIDR, c13, 0, c0, 1); +CONTROL_REG_GEN_READ(TPIDRURW, c13, 0, c0, 2); +CONTROL_REG_GEN_WRITE(TPIDRURW, c13, 0, c0, 2); +CONTROL_REG_GEN_READ(TPIDRURO, c13, 0, c0, 3); +CONTROL_REG_GEN_WRITE(TPIDRURO, c13, 0, c0, 3); +CONTROL_REG_GEN_READ(TPIDRPRW, c13, 0, c0, 4); +CONTROL_REG_GEN_WRITE(TPIDRPRW, c13, 0, c0, 4); + +CONTROL_REG_GEN_READ(HTPIDR, c13, 4, c0, 2); +CONTROL_REG_GEN_WRITE(HTPIDR, c13, 4, c0, 2); + +/* Generic Timer Extensions */ +CONTROL_REG_GEN_READ(CNTFRQ, c14, 0, c0, 0); +CONTROL_REG_GEN_WRITE(CNTFRQ, c14, 0, c0, 0); +CONTROL_REG_GEN_READ(CNTKCTL, c14, 0, c1, 0); +CONTROL_REG_GEN_WRITE(CNTKCTL, c14, 0, c1, 0); + +CONTROL_REG_GEN_READ(CNTP_TVAL, c14, 0, c2, 0); +CONTROL_REG_GEN_WRITE(CNTP_TVAL, c14, 0, c2, 0); +CONTROL_REG_GEN_READ(CNTP_CTL, c14, 0, c2, 1); +CONTROL_REG_GEN_WRITE(CNTP_CTL, c14, 0, c2, 1); + +CONTROL_REG_GEN_READ(CNTV_TVAL, c14, 0, c3, 0); +CONTROL_REG_GEN_WRITE(CNTV_TVAL, c14, 0, c3, 0); +CONTROL_REG_GEN_READ(CNTV_CTL, c14, 0, c3, 1); +CONTROL_REG_GEN_WRITE(CNTV_CTL, c14, 0, c3, 1); + +CONTROL_REG_GEN_READ(CNTHCTL, c14, 4, c1, 0); +CONTROL_REG_GEN_WRITE(CNTHCTL, c14, 4, c1, 0); + +CONTROL_REG_GEN_READ(CNTHP_TVAL, c14, 4, c2, 0); +CONTROL_REG_GEN_WRITE(CNTHP_TVAL, c14, 4, c2, 0); +CONTROL_REG_GEN_READ(CNTHP_CTL, c14, 4, c2, 1); +CONTROL_REG_GEN_WRITE(CNTHP_CTL, c14, 4, c2, 1); + +#endif + +/** @} + */ Index: kernel/arch/arm32/include/arch/cpu.h =================================================================== --- kernel/arch/arm32/include/arch/cpu.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/arm32/include/arch/cpu.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,76 @@ +/* + * Copyright (c) 2007 Michal Kebrt + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup arm32 + * @{ + */ +/** @file + * @brief CPU identification. + */ + +#ifndef KERN_arm32_CPU_H_ +#define KERN_arm32_CPU_H_ + +#include +#include + +enum { + ARM_MAX_CACHE_LEVELS = 7, +}; + +/** Struct representing ARM CPU identification. */ +typedef struct { + /** Implementor (vendor) number. */ + uint32_t imp_num; + + /** Variant number. */ + uint32_t variant_num; + + /** Architecture number. */ + uint32_t arch_num; + + /** Primary part number. */ + uint32_t prim_part_num; + + /** Revision number. */ + uint32_t rev_num; + + struct { + unsigned ways; + unsigned sets; + unsigned line_size; + unsigned way_shift; + unsigned set_shift; + } dcache[ARM_MAX_CACHE_LEVELS]; + unsigned dcache_levels; +} cpu_arch_t; + +#endif + +/** @} + */ Index: kernel/arch/arm32/include/arch/cycle.h =================================================================== --- kernel/arch/arm32/include/arch/cycle.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/arm32/include/arch/cycle.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,67 @@ +/* + * Copyright (c) 2007 Michal Kebrt + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup arm32 + * @{ + */ +/** @file + * @brief Count of CPU cycles. + */ + +#ifndef KERN_arm32_CYCLE_H_ +#define KERN_arm32_CYCLE_H_ + +#include +#include + +/** Return count of CPU cycles. + * + * No such instruction on ARM to get count of cycles. + * + * @return Count of CPU cycles. + * + */ +NO_TRACE static inline uint64_t get_cycle(void) +{ +#ifdef PROCESSOR_ARCH_armv7_a + if ((ID_PFR1_read() & ID_PFR1_GEN_TIMER_EXT_MASK) == + ID_PFR1_GEN_TIMER_EXT) { + uint32_t low = 0, high = 0; + asm volatile( "MRRC p15, 0, %[low], %[high], c14": [low]"=r"(low), [high]"=r"(high)); + return ((uint64_t)high << 32) | low; + } else { + return (uint64_t)PMCCNTR_read() * 64; + } +#endif + return 0; +} + +#endif + +/** @} + */ Index: kernel/arch/arm32/include/arch/elf.h =================================================================== --- kernel/arch/arm32/include/arch/elf.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/arm32/include/arch/elf.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,52 @@ +/* + * Copyright (c) 2006 Sergey Bondari + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup arm32 + * @{ + */ +/** @file + * @brief ARM ELF constants. + */ + +#ifndef KERN_arm32_ELF_H_ +#define KERN_arm32_ELF_H_ + +#define ELF_MACHINE EM_ARM + +#ifdef __BE__ + #define ELF_DATA_ENCODING ELFDATA2MSB +#else + #define ELF_DATA_ENCODING ELFDATA2LSB +#endif + +#define ELF_CLASS ELFCLASS32 + +#endif + +/** @} + */ Index: kernel/arch/arm32/include/arch/exception.h =================================================================== --- kernel/arch/arm32/include/arch/exception.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/arm32/include/arch/exception.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,99 @@ +/* + * Copyright (c) 2007 Michal Kebrt, Petr Stepan + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup arm32 + * @{ + */ +/** @file + * @brief Exception declarations. + */ + +#ifndef KERN_arm32_EXCEPTION_H_ +#define KERN_arm32_EXCEPTION_H_ + +#include +#include + +/** If defined, forces using of high exception vectors. */ +#define HIGH_EXCEPTION_VECTORS + +#ifdef HIGH_EXCEPTION_VECTORS + #define EXC_BASE_ADDRESS 0xffff0000 +#else + #define EXC_BASE_ADDRESS 0x0 +#endif + +/* Exception Vectors */ +#define EXC_RESET_VEC (EXC_BASE_ADDRESS + 0x0) +#define EXC_UNDEF_INSTR_VEC (EXC_BASE_ADDRESS + 0x4) +#define EXC_SWI_VEC (EXC_BASE_ADDRESS + 0x8) +#define EXC_PREFETCH_ABORT_VEC (EXC_BASE_ADDRESS + 0xc) +#define EXC_DATA_ABORT_VEC (EXC_BASE_ADDRESS + 0x10) +#define EXC_IRQ_VEC (EXC_BASE_ADDRESS + 0x18) +#define EXC_FIQ_VEC (EXC_BASE_ADDRESS + 0x1c) + +/* Exception numbers */ +#define EXC_RESET 0 +#define EXC_UNDEF_INSTR 1 +#define EXC_SWI 2 +#define EXC_PREFETCH_ABORT 3 +#define EXC_DATA_ABORT 4 +#define EXC_IRQ 5 +#define EXC_FIQ 6 + +/** Kernel stack pointer. + * + * It is set when thread switches to user mode, + * and then used for exception handling. + * + */ +extern uintptr_t supervisor_sp; + +/** Temporary exception stack pointer. + * + * Temporary stack is used in exceptions handling routines + * before switching to thread's kernel stack. + * + */ +extern uintptr_t exc_stack; + +extern void install_exception_handlers(void); +extern void exception_init(void); +extern void reset_exception_entry(void); +extern void irq_exception_entry(void); +extern void fiq_exception_entry(void); +extern void undef_instr_exception_entry(void); +extern void prefetch_abort_exception_entry(void); +extern void data_abort_exception_entry(void); +extern void swi_exception_entry(void); + +#endif + +/** @} + */ Index: kernel/arch/arm32/include/arch/faddr.h =================================================================== --- kernel/arch/arm32/include/arch/faddr.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/arm32/include/arch/faddr.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,51 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup arm32 + * @{ + */ +/** @file + * @brief Function address conversion. + */ + +#ifndef KERN_arm32_FADDR_H_ +#define KERN_arm32_FADDR_H_ + +#include + +/** Calculate absolute address of function referenced by fptr pointer. + * + * @param fptr Function pointer. + * + */ +#define FADDR(fptr) ((uintptr_t) (fptr)) + +#endif + +/** @} + */ Index: kernel/arch/arm32/include/arch/fpu_context.h =================================================================== --- kernel/arch/arm32/include/arch/fpu_context.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/arm32/include/arch/fpu_context.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,58 @@ +/* + * Copyright (c) 2007 Michal Kebrt + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup arm32 + * @{ + */ +/** @file + * @brief FPU context. + */ + +#ifndef KERN_arm32_FPU_CONTEXT_H_ +#define KERN_arm32_FPU_CONTEXT_H_ + +#include + +#define FPU_CONTEXT_ALIGN 8 + +/* ARM Architecture reference manual, p B-1529. + */ +typedef struct { + uint32_t fpexc; + uint32_t fpscr; + uint32_t s[64]; +} fpu_context_t; + +void fpu_setup(void); + +bool handle_if_fpu_exception(void); + +#endif + +/** @} + */ Index: kernel/arch/arm32/include/arch/interrupt.h =================================================================== --- kernel/arch/arm32/include/arch/interrupt.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/arm32/include/arch/interrupt.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,58 @@ +/* + * Copyright (c) 2007 Michal Kebrt + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup arm32interrupt + * @{ + */ +/** @file + * @brief Declarations of interrupt controlling routines. + */ + +#ifndef KERN_arm32_INTERRUPT_H_ +#define KERN_arm32_INTERRUPT_H_ + +#include +#include + +/** Initial size of exception dispatch table. */ +#define IVT_ITEMS 6 + +/** Index of the first item in exception dispatch table. */ +#define IVT_FIRST 0 + +extern void interrupt_init(void); +extern ipl_t interrupts_disable(void); +extern ipl_t interrupts_enable(void); +extern void interrupts_restore(ipl_t ipl); +extern ipl_t interrupts_read(void); +extern bool interrupts_disabled(void); + +#endif + +/** @} + */ Index: kernel/arch/arm32/include/arch/istate.h =================================================================== --- kernel/arch/arm32/include/arch/istate.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/arm32/include/arch/istate.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,105 @@ +/* + * Copyright (c) 2007 Michal Kebrt, Petr Stepan + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup arm32interrupt + * @{ + */ + +#ifndef KERN_arm32_ISTATE_H_ +#define KERN_arm32_ISTATE_H_ + +#include + +#ifdef KERNEL + +#include + +#else /* KERNEL */ + +#include + +#endif /* KERNEL */ + +/** Struct representing CPU state saved when an exception occurs. */ +typedef struct istate { + uint32_t dummy; + uint32_t spsr; + uint32_t sp; + uint32_t lr; + + uint32_t r0; + uint32_t r1; + uint32_t r2; + uint32_t r3; + uint32_t r4; + uint32_t r5; + uint32_t r6; + uint32_t r7; + uint32_t r8; + uint32_t r9; + uint32_t r10; + uint32_t fp; + uint32_t r12; + + uint32_t pc; +} istate_t; + +/** Set Program Counter member of given istate structure. + * + * @param istate istate structure + * @param retaddr new value of istate's PC member + * + */ +NO_TRACE static inline void istate_set_retaddr(istate_t *istate, + uintptr_t retaddr) +{ + istate->pc = retaddr; +} + +/** Return true if exception happened while in userspace. */ +NO_TRACE static inline int istate_from_uspace(istate_t *istate) +{ + return (istate->spsr & STATUS_REG_MODE_MASK) == USER_MODE; +} + +/** Return Program Counter member of given istate structure. */ +NO_TRACE static inline uintptr_t istate_get_pc(istate_t *istate) +{ + return istate->pc; +} + +NO_TRACE static inline uintptr_t istate_get_fp(istate_t *istate) +{ + return istate->fp; +} + +#endif + +/** @} + */ Index: kernel/arch/arm32/include/arch/mach/beagleboardxm/beagleboardxm.h =================================================================== --- kernel/arch/arm32/include/arch/mach/beagleboardxm/beagleboardxm.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/arm32/include/arch/mach/beagleboardxm/beagleboardxm.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,48 @@ +/* + * Copyright (c) 2012 Jan Vesely + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +/** @addtogroup arm32beagleboardxm beagleboardxm + * @brief BeagleBoard-xM platform. + * @ingroup arm32 + * @{ + */ +/** @file + * @brief BeagleBoard platform driver. + */ + +#ifndef KERN_arm32_beagleboardxm_H_ +#define KERN_arm32_beagleboardxm_H_ + +#include + +extern struct arm_machine_ops bbxm_machine_ops; + +#endif + +/** @} + */ + Index: kernel/arch/arm32/include/arch/mach/beaglebone/beaglebone.h =================================================================== --- kernel/arch/arm32/include/arch/mach/beaglebone/beaglebone.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/arm32/include/arch/mach/beaglebone/beaglebone.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,48 @@ +/* + * Copyright (c) 2012 Matteo Facchinetti + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +/** @addtogroup arm32beaglebone beaglebone + * @brief BeagleBone platform. + * @ingroup arm32 + * @{ + */ +/** @file + * @brief BeagleBone platform driver. + */ + +#ifndef KERN_arm32_beaglebone_H_ +#define KERN_arm32_beaglebone_H_ + +#include + +extern struct arm_machine_ops bbone_machine_ops; + +#endif + +/** @} + */ + Index: kernel/arch/arm32/include/arch/mach/gta02/gta02.h =================================================================== --- kernel/arch/arm32/include/arch/mach/gta02/gta02.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/arm32/include/arch/mach/gta02/gta02.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,51 @@ +/* + * Copyright (c) 2010 Jiri Svoboda + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup arm32gta02 GTA02 + * @brief Openmoko GTA02 platform. + * @ingroup arm32 + * @{ + */ +/** @file + * @brief Openmoko GTA02 platform driver. + */ + +#ifndef KERN_arm32_gta02_H_ +#define KERN_arm32_gta02_H_ + +#include + +extern struct arm_machine_ops gta02_machine_ops; + +/** Size of GTA02 IRQ number range (starting from 0) */ +#define GTA02_IRQ_COUNT 32 + +#endif + +/** @} + */ Index: kernel/arch/arm32/include/arch/mach/integratorcp/integratorcp.h =================================================================== --- kernel/arch/arm32/include/arch/mach/integratorcp/integratorcp.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/arm32/include/arch/mach/integratorcp/integratorcp.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,118 @@ +/* + * Copyright (c) 2009 Vineeth Pillai + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup arm32integratorcp + * @brief Integratorcp machine specific parts. + * @ingroup arm32 + * @{ + */ +/** @file + * @brief Integratorcp peripheries drivers declarations. + */ + +#ifndef KERN_arm32_icp_H_ +#define KERN_arm32_icp_H_ + +#include + +/** Last interrupt number (beginning from 0) whose status is probed + * from interrupt controller + */ +#define ICP_IRQC_MAX_IRQ 8 +#define ICP_KBD_IRQ 3 +#define ICP_TIMER_IRQ 6 + +/** Timer frequency */ +#define ICP_TIMER_FREQ 10000 + +#define ICP_UART 0x16000000 +#define ICP_KBD 0x18000000 +#define ICP_KBD_STAT 0x04 +#define ICP_KBD_DATA 0x08 +#define ICP_KBD_INTR_STAT 0x10 +#define ICP_RTC 0x13000000 +#define ICP_RTC1_LOAD_OFFSET 0x100 +#define ICP_RTC1_READ_OFFSET 0x104 +#define ICP_RTC1_CTL_OFFSET 0x108 +#define ICP_RTC1_INTRCLR_OFFSET 0x10C +#define ICP_RTC1_INTRSTAT_OFFSET 0x114 +#define ICP_RTC1_BGLOAD_OFFSET 0x118 +#define ICP_RTC_CTL_VALUE 0x00E2 +#define ICP_IRQC 0x14000000 +#define ICP_IRQC_MASK_OFFSET 0xC +#define ICP_IRQC_UNMASK_OFFSET 0x8 +#define ICP_FB 0x00800000 +#define ICP_FB_FRAME (ICP_FB >> 12) +#define ICP_FB_NUM_FRAME 512 +#define ICP_VGA 0xC0000000 +#define ICP_CMCR 0x10000000 +#define ICP_SDRAM_MASK 0x1C +#define ICP_SDRAMCR_OFFSET 0x20 + +typedef struct { + uintptr_t uart; + uintptr_t kbd_ctrl; + uintptr_t kbd_stat; + uintptr_t kbd_data; + uintptr_t kbd_intstat; + uintptr_t rtc; + uintptr_t rtc1_load; + uintptr_t rtc1_read; + uintptr_t rtc1_ctl; + uintptr_t rtc1_intrclr; + uintptr_t rtc1_intrstat; + uintptr_t rtc1_bgload; + uintptr_t irqc; + uintptr_t irqc_mask; + uintptr_t irqc_unmask; + uintptr_t vga; + uintptr_t cmcr; + uintptr_t sdramcr; +} icp_hw_map_t; + + +extern void icp_init(void); +extern void icp_output_init(void); +extern void icp_input_init(void); +extern void icp_timer_irq_start(void); +extern void icp_cpu_halt(void); +extern void icp_irq_exception(unsigned int, istate_t *); +extern void icp_get_memory_extents(uintptr_t *, size_t *); +extern void icp_frame_init(void); +extern size_t icp_get_irq_count(void); +extern const char *icp_get_platform_name(void); + +extern struct arm_machine_ops icp_machine_ops; + +/** Size of IntegratorCP IRQ number range (starting from 0) */ +#define ICP_IRQ_COUNT 8 + +#endif + +/** @} + */ Index: kernel/arch/arm32/include/arch/machine_func.h =================================================================== --- kernel/arch/arm32/include/arch/machine_func.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/arm32/include/arch/machine_func.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,115 @@ +/* + * Copyright (c) 2007 Michal Kebrt + * Copyright (c) 2009 Vineeth Pillai + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup arm32 + * @{ + */ +/** @file + * @brief Declarations of machine specific functions. + * + * These functions enable to differentiate more kinds of ARM emulators + * or CPUs. It's the same concept as "arch" functions on the architecture + * level. + */ + +#ifndef KERN_arm32_MACHINE_FUNC_H_ +#define KERN_arm32_MACHINE_FUNC_H_ + +#include +#include +#include + +struct arm_machine_ops { + void (*machine_init)(void); + void (*machine_timer_irq_start)(void); + void (*machine_cpu_halt)(void); + void (*machine_get_memory_extents)(uintptr_t *, size_t *); + void (*machine_irq_exception)(unsigned int, istate_t *); + void (*machine_frame_init)(void); + void (*machine_output_init)(void); + void (*machine_input_init)(void); + size_t (*machine_get_irq_count)(void); + const char *(*machine_get_platform_name)(void); +}; + +/** Pointer to arm_machine_ops structure being used. */ +extern struct arm_machine_ops *machine_ops; + +/** Initialize machine_ops pointer. */ +extern void machine_ops_init(void); + +/** Maps HW devices to the kernel address space using #hw_map. */ +extern void machine_init(void); + + +/** Starts timer. */ +extern void machine_timer_irq_start(void); + + +/** Halts CPU. */ +extern void machine_cpu_halt(void); + +/** Get extents of available memory. + * + * @param start Place to store memory start address. + * @param size Place to store memory size. + */ +extern void machine_get_memory_extents(uintptr_t *start, size_t *size); + +/** Interrupt exception handler. + * + * @param exc_no Interrupt exception number. + * @param istate Saved processor state. + */ +extern void machine_irq_exception(unsigned int exc_no, istate_t *istate); + + +/* + * Machine specific frame initialization + */ +extern void machine_frame_init(void); + +/* + * configure the serial line output device. + */ +extern void machine_output_init(void); + +/* + * configure the serial line input device. + */ +extern void machine_input_init(void); + +extern size_t machine_get_irq_count(void); + +extern const char * machine_get_platform_name(void); + +#endif + +/** @} + */ Index: kernel/arch/arm32/include/arch/mm/as.h =================================================================== --- kernel/arch/arm32/include/arch/mm/as.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/arm32/include/arch/mm/as.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,62 @@ +/* + * Copyright (c) 2007 Pavel Jancik, Michal Kebrt + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup arm32mm + * @{ + */ +/** @file + * @brief Address space manipulating functions declarations. + */ + +#ifndef KERN_arm32_AS_H_ +#define KERN_arm32_AS_H_ + +#define KERNEL_ADDRESS_SPACE_SHADOWED_ARCH 0 + +#define KERNEL_ADDRESS_SPACE_START_ARCH UINT32_C(0x80000000) +#define KERNEL_ADDRESS_SPACE_END_ARCH UINT32_C(0xffffffff) +#define USER_ADDRESS_SPACE_START_ARCH UINT32_C(0x00000000) +#define USER_ADDRESS_SPACE_END_ARCH UINT32_C(0x7fffffff) + +typedef struct { +} as_arch_t; + +#include + +#define as_constructor_arch(as, flags) (as != as) +#define as_destructor_arch(as) (as != as) +#define as_create_arch(as, flags) (as != as) +#define as_deinstall_arch(as) +#define as_invalidate_translation_cache(as, page, cnt) + +extern void as_arch_init(void); + +#endif + +/** @} + */ Index: kernel/arch/arm32/include/arch/mm/asid.h =================================================================== --- kernel/arch/arm32/include/arch/mm/asid.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/arm32/include/arch/mm/asid.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,58 @@ +/* + * Copyright (c) 2007 Pavel Jancik, Michal Kebrt + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup arm32mm + * @{ + */ +/** @file + * @brief ASIDs related declarations. + * + * ARM CPUs doesn't support ASIDs. + */ + +#ifndef KERN_arm32_ASID_H_ +#define KERN_arm32_ASID_H_ + +#include + +#define ASID_MAX_ARCH 3 /* minimal required number */ + +typedef uint8_t asid_t; + +/* + * This works due to fact that this file is never included alone but only + * through "generic/include/mm/asid.h" where ASID_START is defined. + */ +#define asid_get() (ASID_START + 1) + +#define asid_put(asid) + +#endif + +/** @} + */ Index: kernel/arch/arm32/include/arch/mm/frame.h =================================================================== --- kernel/arch/arm32/include/arch/mm/frame.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/arm32/include/arch/mm/frame.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,83 @@ +/* + * Copyright (c) 2007 Pavel Jancik, Michal Kebrt + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup arm32mm + * @{ + */ +/** @file + * @brief Frame related declarations. + */ + +#ifndef KERN_arm32_FRAME_H_ +#define KERN_arm32_FRAME_H_ + +#define FRAME_WIDTH 12 /* 4KB frames */ +#define FRAME_SIZE (1 << FRAME_WIDTH) + +#ifndef __ASM__ + +#include + +#define BOOT_PAGE_TABLE_SIZE 0x4000 + +#ifdef MACHINE_gta02 + +#define PHYSMEM_START_ADDR 0x30008000 +#define BOOT_PAGE_TABLE_ADDRESS 0x30010000 + +#elif defined MACHINE_beagleboardxm + +#define PHYSMEM_START_ADDR 0x80000000 +#define BOOT_PAGE_TABLE_ADDRESS 0x80008000 + +#elif defined MACHINE_beaglebone + +#define PHYSMEM_START_ADDR 0x80000000 +#define BOOT_PAGE_TABLE_ADDRESS 0x80008000 + +#else + +#define PHYSMEM_START_ADDR 0x00000000 +#define BOOT_PAGE_TABLE_ADDRESS 0x00008000 + +#endif + +#define BOOT_PAGE_TABLE_START_FRAME (BOOT_PAGE_TABLE_ADDRESS >> FRAME_WIDTH) +#define BOOT_PAGE_TABLE_SIZE_IN_FRAMES (BOOT_PAGE_TABLE_SIZE >> FRAME_WIDTH) + +extern void frame_low_arch_init(void); +extern void frame_high_arch_init(void); +extern void boot_page_table_free(void); +#define physmem_print() + +#endif /* __ASM__ */ + +#endif + +/** @} + */ Index: kernel/arch/arm32/include/arch/mm/km.h =================================================================== --- kernel/arch/arm32/include/arch/mm/km.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/arm32/include/arch/mm/km.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,57 @@ +/* + * Copyright (c) 2011 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup arm32mm + * @{ + */ +/** @file + */ + +#ifndef KERN_arm32_KM_H_ +#define KERN_arm32_KM_H_ + +#include + +#define KM_ARM32_IDENTITY_START UINT32_C(0x80000000) +#define KM_ARM32_IDENTITY_SIZE UINT32_C(0x70000000) + +#define KM_ARM32_NON_IDENTITY_START UINT32_C(0xf0000000) +/* + * The last virtual megabyte contains the high exception vectors (0xFFFF0000). + * Do not include this range into kernel non-identity. + */ +#define KM_ARM32_NON_IDENTITY_SIZE UINT32_C(0x0ff00000) + +extern void km_identity_arch_init(void); +extern void km_non_identity_arch_init(void); +extern bool km_is_non_identity_arch(uintptr_t); + +#endif + +/** @} + */ Index: kernel/arch/arm32/include/arch/mm/page.h =================================================================== --- kernel/arch/arm32/include/arch/mm/page.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/arm32/include/arch/mm/page.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,142 @@ +/* + * Copyright (c) 2007 Pavel Jancik, Michal Kebrt + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup arm32mm + * @{ + */ +/** @file + * @brief Paging related declarations. + */ + +#ifndef KERN_arm32_PAGE_H_ +#define KERN_arm32_PAGE_H_ + +#include +#include +#include +#include +#include + +#define PAGE_WIDTH FRAME_WIDTH +#define PAGE_SIZE FRAME_SIZE + +#if (defined MACHINE_beagleboardxm) || (defined MACHINE_beaglebone) +#ifndef __ASM__ +# define KA2PA(x) ((uintptr_t) (x)) +# define PA2KA(x) ((uintptr_t) (x)) +#else +# define KA2PA(x) (x) +# define PA2KA(x) (x) +#endif +#else +#ifndef __ASM__ +# define KA2PA(x) (((uintptr_t) (x)) - 0x80000000) +# define PA2KA(x) (((uintptr_t) (x)) + 0x80000000) +#else +# define KA2PA(x) ((x) - 0x80000000) +# define PA2KA(x) ((x) + 0x80000000) +#endif +#endif + +/* Number of entries in each level. */ +#define PTL0_ENTRIES_ARCH (1 << 12) /* 4096 */ +#define PTL1_ENTRIES_ARCH 0 +#define PTL2_ENTRIES_ARCH 0 +/* coarse page tables used (256 * 4 = 1KB per page) */ +#define PTL3_ENTRIES_ARCH (1 << 8) /* 256 */ + +/* Page table sizes for each level. */ +#define PTL0_SIZE_ARCH FOUR_FRAMES +#define PTL1_SIZE_ARCH 0 +#define PTL2_SIZE_ARCH 0 +#define PTL3_SIZE_ARCH ONE_FRAME + +/* Macros calculating indices into page tables for each level. */ +#define PTL0_INDEX_ARCH(vaddr) (((vaddr) >> 20) & 0xfff) +#define PTL1_INDEX_ARCH(vaddr) 0 +#define PTL2_INDEX_ARCH(vaddr) 0 +#define PTL3_INDEX_ARCH(vaddr) (((vaddr) >> 12) & 0x0ff) + +/* Get PTE address accessors for each level. */ +#define GET_PTL1_ADDRESS_ARCH(ptl0, i) \ + ((pte_t *) ((((pte_t *)(ptl0))[(i)].l0).coarse_table_addr << 10)) +#define GET_PTL2_ADDRESS_ARCH(ptl1, i) \ + (ptl1) +#define GET_PTL3_ADDRESS_ARCH(ptl2, i) \ + (ptl2) +#define GET_FRAME_ADDRESS_ARCH(ptl3, i) \ + ((uintptr_t) ((((pte_t *)(ptl3))[(i)].l1).frame_base_addr << 12)) + +/* Set PTE address accessors for each level. */ +#define SET_PTL0_ADDRESS_ARCH(ptl0) \ + (set_ptl0_addr((pte_t *) (ptl0))) +#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) \ + (((pte_t *) (ptl0))[(i)].l0.coarse_table_addr = (a) >> 10) +#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a) +#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a) +#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) \ + (((pte_t *) (ptl3))[(i)].l1.frame_base_addr = (a) >> 12) + +/* Get PTE flags accessors for each level. */ +#define GET_PTL1_FLAGS_ARCH(ptl0, i) \ + get_pt_level0_flags((pte_t *) (ptl0), (size_t) (i)) +#define GET_PTL2_FLAGS_ARCH(ptl1, i) \ + PAGE_PRESENT +#define GET_PTL3_FLAGS_ARCH(ptl2, i) \ + PAGE_PRESENT +#define GET_FRAME_FLAGS_ARCH(ptl3, i) \ + get_pt_level1_flags((pte_t *) (ptl3), (size_t) (i)) + +/* Set PTE flags accessors for each level. */ +#define SET_PTL1_FLAGS_ARCH(ptl0, i, x) \ + set_pt_level0_flags((pte_t *) (ptl0), (size_t) (i), (x)) +#define SET_PTL2_FLAGS_ARCH(ptl1, i, x) +#define SET_PTL3_FLAGS_ARCH(ptl2, i, x) +#define SET_FRAME_FLAGS_ARCH(ptl3, i, x) \ + set_pt_level1_flags((pte_t *) (ptl3), (size_t) (i), (x)) + +/* Set PTE present bit accessors for each level. */ +#define SET_PTL1_PRESENT_ARCH(ptl0, i) \ + set_pt_level0_present((pte_t *) (ptl0), (size_t) (i)) +#define SET_PTL2_PRESENT_ARCH(ptl1, i) +#define SET_PTL3_PRESENT_ARCH(ptl2, i) +#define SET_FRAME_PRESENT_ARCH(ptl3, i) \ + set_pt_level1_present((pte_t *) (ptl3), (size_t) (i)) + +#if defined(PROCESSOR_ARCH_armv6) | defined(PROCESSOR_ARCH_armv7_a) +#include "page_armv6.h" +#elif defined(PROCESSOR_ARCH_armv4) | defined(PROCESSOR_ARCH_armv5) +#include "page_armv4.h" +#else +#error "Unsupported architecture" +#endif + +#endif + +/** @} + */ Index: kernel/arch/arm32/include/arch/mm/page_armv4.h =================================================================== --- kernel/arch/arm32/include/arch/mm/page_armv4.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/arm32/include/arch/mm/page_armv4.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,269 @@ +/* + * Copyright (c) 2007 Pavel Jancik, Michal Kebrt + * Copyright (c) 2012 Jan Vesely + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup arm32mm + * @{ + */ +/** @file + * @brief Paging related declarations. + */ + +#ifndef KERN_arm32_PAGE_armv4_H_ +#define KERN_arm32_PAGE_armv4_H_ + +#ifndef KERN_arm32_PAGE_H_ +#error "Do not include arch specific page.h directly use generic page.h instead" +#endif + +/* Macros for querying the last-level PTE entries. */ +#define PTE_VALID_ARCH(pte) \ + (*((uint32_t *) (pte)) != 0) +#define PTE_PRESENT_ARCH(pte) \ + (((pte_t *) (pte))->l0.descriptor_type != 0) +#define PTE_GET_FRAME_ARCH(pte) \ + (((pte_t *) (pte))->l1.frame_base_addr << FRAME_WIDTH) +#define PTE_WRITABLE_ARCH(pte) \ + (((pte_t *) (pte))->l1.access_permission_0 == PTE_AP_USER_RW_KERNEL_RW) +#define PTE_EXECUTABLE_ARCH(pte) \ + 1 + +#ifndef __ASM__ + +/** Level 0 page table entry. */ +typedef struct { + /* 0b01 for coarse tables, see below for details */ + unsigned descriptor_type : 2; + unsigned impl_specific : 3; + unsigned domain : 4; + unsigned should_be_zero : 1; + + /* Pointer to the coarse 2nd level page table (holding entries for small + * (4KB) or large (64KB) pages. ARM also supports fine 2nd level page + * tables that may hold even tiny pages (1KB) but they are bigger (4KB + * per table in comparison with 1KB per the coarse table) + */ + unsigned coarse_table_addr : 22; +} ATTRIBUTE_PACKED pte_level0_t; + +/** Level 1 page table entry (small (4KB) pages used). */ +typedef struct { + + /* 0b10 for small pages */ + unsigned descriptor_type : 2; + unsigned bufferable : 1; + unsigned cacheable : 1; + + /* access permissions for each of 4 subparts of a page + * (for each 1KB when small pages used */ + unsigned access_permission_0 : 2; + unsigned access_permission_1 : 2; + unsigned access_permission_2 : 2; + unsigned access_permission_3 : 2; + unsigned frame_base_addr : 20; +} ATTRIBUTE_PACKED pte_level1_t; + +typedef union { + pte_level0_t l0; + pte_level1_t l1; +} pte_t; + +/* Level 1 page tables access permissions */ + +/** User mode: no access, privileged mode: no access. */ +#define PTE_AP_USER_NO_KERNEL_NO 0 + +/** User mode: no access, privileged mode: read/write. */ +#define PTE_AP_USER_NO_KERNEL_RW 1 + +/** User mode: read only, privileged mode: read/write. */ +#define PTE_AP_USER_RO_KERNEL_RW 2 + +/** User mode: read/write, privileged mode: read/write. */ +#define PTE_AP_USER_RW_KERNEL_RW 3 + + +/* pte_level0_t and pte_level1_t descriptor_type flags */ + +/** pte_level0_t and pte_level1_t "not present" flag (used in descriptor_type). */ +#define PTE_DESCRIPTOR_NOT_PRESENT 0 + +/** pte_level0_t coarse page table flag (used in descriptor_type). */ +#define PTE_DESCRIPTOR_COARSE_TABLE 1 + +/** pte_level1_t small page table flag (used in descriptor type). */ +#define PTE_DESCRIPTOR_SMALL_PAGE 2 + + +/** Sets the address of level 0 page table. + * + * @param pt Pointer to the page table to set. + * + */ +NO_TRACE static inline void set_ptl0_addr(pte_t *pt) +{ + asm volatile ( + "mcr p15, 0, %[pt], c2, c0, 0\n" + :: [pt] "r" (pt) + ); +} + + +/** Returns level 0 page table entry flags. + * + * @param pt Level 0 page table. + * @param i Index of the entry to return. + * + */ +NO_TRACE static inline int get_pt_level0_flags(pte_t *pt, size_t i) +{ + pte_level0_t *p = &pt[i].l0; + int np = (p->descriptor_type == PTE_DESCRIPTOR_NOT_PRESENT); + + return (np << PAGE_PRESENT_SHIFT) | (1 << PAGE_USER_SHIFT) | + (1 << PAGE_READ_SHIFT) | (1 << PAGE_WRITE_SHIFT) | + (1 << PAGE_EXEC_SHIFT) | (1 << PAGE_CACHEABLE_SHIFT); +} + +/** Returns level 1 page table entry flags. + * + * @param pt Level 1 page table. + * @param i Index of the entry to return. + * + */ +NO_TRACE static inline int get_pt_level1_flags(pte_t *pt, size_t i) +{ + pte_level1_t *p = &pt[i].l1; + + int dt = p->descriptor_type; + int ap = p->access_permission_0; + + return ((dt == PTE_DESCRIPTOR_NOT_PRESENT) << PAGE_PRESENT_SHIFT) | + ((ap == PTE_AP_USER_RO_KERNEL_RW) << PAGE_READ_SHIFT) | + ((ap == PTE_AP_USER_RW_KERNEL_RW) << PAGE_READ_SHIFT) | + ((ap == PTE_AP_USER_RW_KERNEL_RW) << PAGE_WRITE_SHIFT) | + ((ap != PTE_AP_USER_NO_KERNEL_RW) << PAGE_USER_SHIFT) | + ((ap == PTE_AP_USER_NO_KERNEL_RW) << PAGE_READ_SHIFT) | + ((ap == PTE_AP_USER_NO_KERNEL_RW) << PAGE_WRITE_SHIFT) | + (1 << PAGE_EXEC_SHIFT) | + (p->bufferable << PAGE_CACHEABLE); +} + +/** Sets flags of level 0 page table entry. + * + * @param pt level 0 page table + * @param i index of the entry to be changed + * @param flags new flags + * + */ +NO_TRACE static inline void set_pt_level0_flags(pte_t *pt, size_t i, int flags) +{ + pte_level0_t *p = &pt[i].l0; + + if (flags & PAGE_NOT_PRESENT) { + p->descriptor_type = PTE_DESCRIPTOR_NOT_PRESENT; + /* + * Ensures that the entry will be recognized as valid when + * PTE_VALID_ARCH applied. + */ + p->should_be_zero = 1; + } else { + p->descriptor_type = PTE_DESCRIPTOR_COARSE_TABLE; + p->should_be_zero = 0; + } +} + + +/** Sets flags of level 1 page table entry. + * + * We use same access rights for the whole page. When page + * is not preset we store 1 in acess_rigts_3 so that at least + * one bit is 1 (to mark correct page entry, see #PAGE_VALID_ARCH). + * + * @param pt Level 1 page table. + * @param i Index of the entry to be changed. + * @param flags New flags. + * + */ +NO_TRACE static inline void set_pt_level1_flags(pte_t *pt, size_t i, int flags) +{ + pte_level1_t *p = &pt[i].l1; + + if (flags & PAGE_NOT_PRESENT) + p->descriptor_type = PTE_DESCRIPTOR_NOT_PRESENT; + else + p->descriptor_type = PTE_DESCRIPTOR_SMALL_PAGE; + + p->cacheable = p->bufferable = (flags & PAGE_CACHEABLE) != 0; + + /* default access permission */ + p->access_permission_0 = p->access_permission_1 = + p->access_permission_2 = p->access_permission_3 = + PTE_AP_USER_NO_KERNEL_RW; + + if (flags & PAGE_USER) { + if (flags & PAGE_READ) { + p->access_permission_0 = p->access_permission_1 = + p->access_permission_2 = p->access_permission_3 = + PTE_AP_USER_RO_KERNEL_RW; + } + if (flags & PAGE_WRITE) { + p->access_permission_0 = p->access_permission_1 = + p->access_permission_2 = p->access_permission_3 = + PTE_AP_USER_RW_KERNEL_RW; + } + } +} + +NO_TRACE static inline void set_pt_level0_present(pte_t *pt, size_t i) +{ + pte_level0_t *p = &pt[i].l0; + + p->should_be_zero = 0; + write_barrier(); + p->descriptor_type = PTE_DESCRIPTOR_COARSE_TABLE; +} + + +NO_TRACE static inline void set_pt_level1_present(pte_t *pt, size_t i) +{ + pte_level1_t *p = &pt[i].l1; + + p->descriptor_type = PTE_DESCRIPTOR_SMALL_PAGE; +} + + +extern void page_arch_init(void); + + +#endif /* __ASM__ */ + +#endif + +/** @} + */ Index: kernel/arch/arm32/include/arch/mm/page_armv6.h =================================================================== --- kernel/arch/arm32/include/arch/mm/page_armv6.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/arm32/include/arch/mm/page_armv6.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,285 @@ +/* + * Copyright (c) 2012 Jan Vesely + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup arm32mm + * @{ + */ +/** @file + * @brief Paging related declarations. + */ + +#ifndef KERN_arm32_PAGE_armv7_H_ +#define KERN_arm32_PAGE_armv7_H_ + +#ifndef KERN_arm32_PAGE_H_ +#error "Do not include arch specific page.h directly use generic page.h instead" +#endif + +/* Macros for querying the last-level PTE entries. */ +#define PTE_VALID_ARCH(pte) \ + (*((uint32_t *) (pte)) != 0) +#define PTE_PRESENT_ARCH(pte) \ + (((pte_t *) (pte))->l0.descriptor_type != 0) +#define PTE_GET_FRAME_ARCH(pte) \ + (((pte_t *) (pte))->l1.frame_base_addr << FRAME_WIDTH) +#define PTE_WRITABLE_ARCH(pte) \ + (((pte_t *) (pte))->l1.access_permission_1 != PTE_AP1_RO) +#define PTE_EXECUTABLE_ARCH(pte) \ + (((pte_t *) (pte))->l1.descriptor_type != PTE_DESCRIPTOR_SMALL_PAGE_NX) + +#ifndef __ASM__ + +/** Level 0 page table entry. */ +typedef struct { + /* 0b01 for coarse tables, see below for details */ + unsigned descriptor_type : 2; + unsigned pxn : 1; + unsigned ns : 1; + unsigned should_be_zero_0 : 1; + unsigned domain : 4; + unsigned should_be_zero_1 : 1; + + /* Pointer to the coarse 2nd level page table (holding entries for small + * (4KB) or large (64KB) pages. ARM also supports fine 2nd level page + * tables that may hold even tiny pages (1KB) but they are bigger (4KB + * per table in comparison with 1KB per the coarse table) + */ + unsigned coarse_table_addr : 22; +} ATTRIBUTE_PACKED pte_level0_t; + +/** Level 1 page table entry (small (4KB) pages used). */ +typedef struct { + + /* 0b10 for small pages, 0b11 for NX small pages */ + unsigned descriptor_type : 2; + unsigned bufferable : 1; + unsigned cacheable : 1; + unsigned access_permission_0 : 2; + unsigned tex : 3; + unsigned access_permission_1 : 1; + unsigned shareable : 1; + unsigned non_global : 1; + unsigned frame_base_addr : 20; +} ATTRIBUTE_PACKED pte_level1_t; + +typedef union { + pte_level0_t l0; + pte_level1_t l1; +} pte_t; + +/* Level 1 page tables access permissions */ + +/** User mode: no access, privileged mode: no access. */ +#define PTE_AP0_USER_NO_KERNEL_NO 0 + +/** User mode: no access, privileged mode: read/write. */ +#define PTE_AP0_USER_NO_KERNEL_FULL 1 + +/** User mode: read only, privileged mode: read/write. */ +#define PTE_AP0_USER_LIMITED_KERNEL_FULL 2 + +/** User mode: read/write, privileged mode: read/write. */ +#define PTE_AP0_USER_FULL_KERNEL_FULL 3 + +/** Allow writes */ +#define PTE_AP1_RO 1 + + +/* pte_level0_t and pte_level1_t descriptor_type flags */ + +/** pte_level0_t and pte_level1_t "not present" flag (used in descriptor_type). */ +#define PTE_DESCRIPTOR_NOT_PRESENT 0 + +/** pte_level0_t coarse page table flag (used in descriptor_type). */ +#define PTE_DESCRIPTOR_COARSE_TABLE 1 + +/** pte_level1_t small page table flag (used in descriptor type). */ +#define PTE_DESCRIPTOR_SMALL_PAGE 2 + +/** pte_level1_t small page table flag with NX (used in descriptor type). */ +#define PTE_DESCRIPTOR_SMALL_PAGE_NX 3 + +/** Sets the address of level 0 page table. + * + * @param pt Pointer to the page table to set. + * + */ +NO_TRACE static inline void set_ptl0_addr(pte_t *pt) +{ + asm volatile ( + "mcr p15, 0, %[pt], c2, c0, 0\n" + :: [pt] "r" (pt) + ); +} + + +/** Returns level 0 page table entry flags. + * + * @param pt Level 0 page table. + * @param i Index of the entry to return. + * + */ +NO_TRACE static inline int get_pt_level0_flags(pte_t *pt, size_t i) +{ + const pte_level0_t *p = &pt[i].l0; + const unsigned np = (p->descriptor_type == PTE_DESCRIPTOR_NOT_PRESENT); + + return (np << PAGE_PRESENT_SHIFT) | (1 << PAGE_USER_SHIFT) | + (1 << PAGE_READ_SHIFT) | (1 << PAGE_WRITE_SHIFT) | + (1 << PAGE_EXEC_SHIFT) | (1 << PAGE_CACHEABLE_SHIFT); +} + +/** Returns level 1 page table entry flags. + * + * @param pt Level 1 page table. + * @param i Index of the entry to return. + * + */ +NO_TRACE static inline int get_pt_level1_flags(pte_t *pt, size_t i) +{ + const pte_level1_t *p = &pt[i].l1; + + const unsigned dt = p->descriptor_type; + const unsigned ap0 = p->access_permission_0; + const unsigned ap1 = p->access_permission_1; + + return ((dt == PTE_DESCRIPTOR_NOT_PRESENT) << PAGE_PRESENT_SHIFT) | + ((dt != PTE_DESCRIPTOR_SMALL_PAGE_NX) << PAGE_EXEC_SHIFT) | + ((ap0 == PTE_AP0_USER_LIMITED_KERNEL_FULL) << PAGE_READ_SHIFT) | + ((ap0 == PTE_AP0_USER_FULL_KERNEL_FULL) << PAGE_READ_SHIFT) | + ((ap0 == PTE_AP0_USER_NO_KERNEL_FULL) << PAGE_READ_SHIFT) | + ((ap0 != PTE_AP0_USER_NO_KERNEL_FULL) << PAGE_USER_SHIFT) | + (((ap1 != PTE_AP1_RO) && (ap0 == PTE_AP0_USER_FULL_KERNEL_FULL)) << PAGE_WRITE_SHIFT) | + (((ap1 != PTE_AP1_RO) && (ap0 == PTE_AP0_USER_NO_KERNEL_FULL)) << PAGE_WRITE_SHIFT) | + (p->bufferable << PAGE_CACHEABLE); +} + +/** Sets flags of level 0 page table entry. + * + * @param pt level 0 page table + * @param i index of the entry to be changed + * @param flags new flags + * + */ +NO_TRACE static inline void set_pt_level0_flags(pte_t *pt, size_t i, int flags) +{ + pte_level0_t *p = &pt[i].l0; + + if (flags & PAGE_NOT_PRESENT) { + p->descriptor_type = PTE_DESCRIPTOR_NOT_PRESENT; + /* + * Ensures that the entry will be recognized as valid when + * PTE_VALID_ARCH applied. + */ + p->should_be_zero_0 = 1; + p->should_be_zero_1 = 1; + } else { + p->descriptor_type = PTE_DESCRIPTOR_COARSE_TABLE; + p->should_be_zero_0 = 0; + p->should_be_zero_1 = 0; + p->domain = 0; + p->ns = 0; + } +} + + +/** Sets flags of level 1 page table entry. + * + * We use same access rights for the whole page. When page + * is not preset we store 1 in acess_rigts_3 so that at least + * one bit is 1 (to mark correct page entry, see #PAGE_VALID_ARCH). + * + * @param pt Level 1 page table. + * @param i Index of the entry to be changed. + * @param flags New flags. + * + */ +NO_TRACE static inline void set_pt_level1_flags(pte_t *pt, size_t i, int flags) +{ + pte_level1_t *p = &pt[i].l1; + + if (flags & PAGE_NOT_PRESENT) { + p->descriptor_type = PTE_DESCRIPTOR_NOT_PRESENT; + } else { + if (flags & PAGE_EXEC) + p->descriptor_type = PTE_DESCRIPTOR_SMALL_PAGE; + else + p->descriptor_type = PTE_DESCRIPTOR_SMALL_PAGE_NX; + } + + /* tex=0 buf=1 and cache=1 => normal memory + * tex=0 buf=1 and cache=0 => shareable device mmio + */ + p->cacheable = (flags & PAGE_CACHEABLE); + p->bufferable = 1; + p->tex = 0; + + /* Shareable is ignored for devices (non-cacheable), + * turn it on for normal memory. */ + p->shareable = 1; + + p->non_global = !(flags & PAGE_GLOBAL); + + /* default access permission: kernel only*/ + p->access_permission_0 = PTE_AP0_USER_NO_KERNEL_FULL; + + if (flags & PAGE_USER) { + p->access_permission_0 = PTE_AP0_USER_FULL_KERNEL_FULL; + // TODO Fix kernel to use PAGE_WRITE flag properly and + // apply this for kernel pages as well. + if (!(flags & PAGE_WRITE)) + p->access_permission_1 = PTE_AP1_RO; + } +} + +NO_TRACE static inline void set_pt_level0_present(pte_t *pt, size_t i) +{ + pte_level0_t *p = &pt[i].l0; + + p->should_be_zero_0 = 0; + p->should_be_zero_1 = 0; + write_barrier(); + p->descriptor_type = PTE_DESCRIPTOR_COARSE_TABLE; +} + +NO_TRACE static inline void set_pt_level1_present(pte_t *pt, size_t i) +{ + pte_level1_t *p = &pt[i].l1; + + p->descriptor_type = PTE_DESCRIPTOR_SMALL_PAGE; +} + + +extern void page_arch_init(void); + +#endif /* __ASM__ */ + +#endif + +/** @} + */ Index: kernel/arch/arm32/include/arch/mm/page_fault.h =================================================================== --- kernel/arch/arm32/include/arch/mm/page_fault.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/arm32/include/arch/mm/page_fault.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,105 @@ +/* + * Copyright (c) 2007 Pavel Jancik, Michal Kebrt + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup arm32mm + * @{ + */ +/** @file + * @brief Page fault related declarations. + */ + +#ifndef KERN_arm32_PAGE_FAULT_H_ +#define KERN_arm32_PAGE_FAULT_H_ + +#include + + +/** Decribes CP15 "fault status register" (FSR). + * + * "VMSAv6 added a fifth fault status bit (bit[10]) to both the IFSR and DFSR. + * It is IMPLEMENTATION DEFINED how this bit is encoded in earlier versions of + * the architecture. A write flag (bit[11] of the DFSR) has also been + * introduced." + * ARM Architecture Reference Manual version i ch. B4.6 (PDF p. 719) + * + * See ARM Architecture Reference Manual ch. B4.9.6 (pdf p.743). for FSR info + */ +typedef union { + struct { + unsigned status : 4; + unsigned domain : 4; + unsigned zero : 1; + unsigned lpae : 1; /**< Needs LPAE support implemented */ + unsigned fs : 1; /**< armv6+ mandated, earlier IPLM. DEFINED */ + unsigned wr : 1; /**< armv6+ only */ + unsigned ext : 1 ; /**< external abort */ + unsigned cm : 1; /**< Cache maintenance, needs LPAE support */ + unsigned should_be_zero : 18; + } data; + struct { + unsigned status : 4; + unsigned sbz0 : 6; + unsigned fs : 1; + unsigned should_be_zero : 21; + } inst; + uint32_t raw; +} fault_status_t; + + +/** Simplified description of instruction code. + * + * @note Used for recognizing memory access instructions. + * @see ARM architecture reference (chapter 3.1) + */ +typedef struct { + unsigned dummy1 : 4; + unsigned bit4 : 1; + unsigned bits567 : 3; + unsigned dummy : 12; + unsigned access : 1; + unsigned opcode : 4; + unsigned type : 3; + unsigned condition : 4; +} ATTRIBUTE_PACKED instruction_t; + + +/** Help union used for casting pc register (uint_32_t) value into + * #instruction_t pointer. + */ +typedef union { + instruction_t *instr; + uint32_t pc; +} instruction_union_t; + +extern void prefetch_abort(unsigned int, istate_t *); +extern void data_abort(unsigned int, istate_t *); + +#endif + +/** @} + */ Index: kernel/arch/arm32/include/arch/mm/tlb.h =================================================================== --- kernel/arch/arm32/include/arch/mm/tlb.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/arm32/include/arch/mm/tlb.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,42 @@ +/* + * Copyright (c) 2007 Pavel Jancik + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup arm32mm + * @{ + */ +/** @file + * @brief TLB related declarations. + */ + +#ifndef KERN_arm32_TLB_H_ +#define KERN_arm32_TLB_H_ + +#endif + +/** @} + */ Index: kernel/arch/arm32/include/arch/proc/task.h =================================================================== --- kernel/arch/arm32/include/arch/proc/task.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/arm32/include/arch/proc/task.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,48 @@ +/* + * Copyright (c) 2006 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup arm32proc + * @{ + */ +/** @file + * @brief Task related declarations. + */ + +#ifndef KERN_arm32_TASK_H_ +#define KERN_arm32_TASK_H_ + +typedef struct { +} task_arch_t; + +#define task_create_arch(t) +#define task_destroy_arch(t) + +#endif + +/** @} + */ Index: kernel/arch/arm32/include/arch/proc/thread.h =================================================================== --- kernel/arch/arm32/include/arch/proc/thread.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/arm32/include/arch/proc/thread.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,49 @@ +/* + * Copyright (c) 2003-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup arm32proc + * @{ + */ +/** @file + * @brief Thread related declarations. + */ + +#ifndef KERN_arm32_THREAD_H_ +#define KERN_arm32_THREAD_H_ + +typedef struct { +} thread_arch_t; + +#define thr_constructor_arch(t) +#define thr_destructor_arch(t) +#define thread_create_arch(t) + +#endif + +/** @} + */ Index: kernel/arch/arm32/include/arch/ras.h =================================================================== --- kernel/arch/arm32/include/arch/ras.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/arm32/include/arch/ras.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,53 @@ +/* + * Copyright (c) 2009 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup arm32 + * @{ + */ +/** @file + * @brief Declarations related to Restartable Atomic Sequences. + */ + +#ifndef KERN_arm32_RAS_H_ +#define KERN_arm32_RAS_H_ + +#include +#include + +#define RAS_START 0 +#define RAS_END 1 + +extern uintptr_t *ras_page; + +extern void ras_init(void); +extern void ras_check(unsigned int, istate_t *); + +#endif + +/** @} + */ Index: kernel/arch/arm32/include/arch/regutils.h =================================================================== --- kernel/arch/arm32/include/arch/regutils.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/arm32/include/arch/regutils.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,91 @@ +/* + * Copyright (c) 2007 Petr Stepan + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup arm32 + * @{ + */ +/** + * @file + * @brief Utilities for convenient manipulation with ARM registers. + */ + +#ifndef KERN_arm32_REGUTILS_H_ +#define KERN_arm32_REGUTILS_H_ + +#define STATUS_REG_IRQ_DISABLED_BIT (1 << 7) +#define STATUS_REG_MODE_MASK 0x1f + +/* ARM Processor Operation Modes */ +enum { + USER_MODE = 0x10, + FIQ_MODE = 0x11, + IRQ_MODE = 0x12, + SUPERVISOR_MODE = 0x13, + MONITOR_MODE = 0x16, + ABORT_MODE = 0x17, + HYPERVISOR_MODE = 0x1a, + UNDEFINED_MODE = 0x1b, + SYSTEM_MODE = 0x1f, + MODE_MASK = 0x1f, +}; +/* [CS]PRS manipulation macros */ +#define GEN_STATUS_READ(nm, reg) \ + static inline uint32_t nm## _status_reg_read(void) \ + { \ + uint32_t retval; \ + \ + asm volatile ( \ + "mrs %[retval], " #reg \ + : [retval] "=r" (retval) \ + ); \ + \ + return retval; \ + } + +#define GEN_STATUS_WRITE(nm, reg, fieldname, field) \ + static inline void nm## _status_reg_ ##fieldname## _write(uint32_t value) \ + { \ + asm volatile ( \ + "msr " #reg "_" #field ", %[value]" \ + :: [value] "r" (value) \ + ); \ + } + +/** Return the value of CPSR (Current Program Status Register). */ +GEN_STATUS_READ(current, cpsr); + +/** Set control bits of CPSR. */ +GEN_STATUS_WRITE(current, cpsr, control, c); + +/** Return the value of SPSR (Saved Program Status Register). */ +GEN_STATUS_READ(saved, spsr); + +#endif + +/** @} + */ Index: kernel/arch/arm32/include/arch/security_ext.h =================================================================== --- kernel/arch/arm32/include/arch/security_ext.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/arm32/include/arch/security_ext.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,85 @@ +/* + * Copyright (c) 2013 Jan Vesely + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup arm32 + * @{ + */ +/** @file + * @brief Security Extensions Routines + */ + +#ifndef KERN_arm32_SECURITY_EXT_H_ +#define KERN_arm32_SECURITY_EXT_H_ + +#include +#include + +/** Test whether the current cpu supports security extensions. + * return true if security extensions are supported, false otherwise. + * @note The Processor Feature Register 1 that provides this information + * is available only on armv7+. This function returns false on all\ + * older archs. + */ +static inline bool sec_ext_is_implemented() +{ +#ifdef PROCESSOR_ARCH_armv7_a + const uint32_t idpfr = ID_PFR1_read() & ID_PFR1_SEC_EXT_MASK; + return idpfr == ID_PFR1_SEC_EXT || idpfr == ID_PFR1_SEC_EXT_RFR; +#endif + return false; +} + +/** Test whether we are running in monitor mode. + * return true, if the current mode is Monitor mode, false otherwise. + * @note this is safe to call even on machines that do not implement monitor + * mode. + */ +static inline bool sec_ext_is_monitor_mode() +{ + return (current_status_reg_read() & MODE_MASK) == MONITOR_MODE; +} + +/** Test whether we are running in a secure state. + * return true if the current state is secure, false otherwise. + * + * @note: This functions will cause undef isntruction trap if we + * are not running in the secure state. + * + * @note: u-boot enables non-secure access to cp 10/11, as well as some other + * features and switches to non-secure state during boot. + * Look for 'secureworld_exit' in arch/arm/cpu/armv7/omap3/board.c. + */ +static inline bool sec_ext_is_secure() +{ + return sec_ext_is_implemented() + && (sec_ext_is_monitor_mode() || !(SCR_read() & SCR_NS_FLAG)); +} + +#endif +/** @} + */ Index: kernel/arch/arm32/include/arch/stack.h =================================================================== --- kernel/arch/arm32/include/arch/stack.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/arm32/include/arch/stack.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,49 @@ +/* + * Copyright (c) 2007 Michal Kebrt + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup arm32 + * @{ + */ +/** @file + * @brief Stack constants. + */ + +#ifndef KERN_arm32_STACK_H_ +#define KERN_arm32_STACK_H_ + +#define STACK_ITEM_SIZE 4 + +/** See ABI for + * details + */ +#define STACK_ALIGNMENT 8 + +#endif + +/** @} + */ Index: kernel/arch/arm32/include/arch/types.h =================================================================== --- kernel/arch/arm32/include/arch/types.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/arm32/include/arch/types.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,71 @@ +/* + * Copyright (c) 2007 Pavel Jancik, Michal Kebrt + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup arm32 + * @{ + */ +/** @file + * @brief Type definitions. + */ + +#ifndef KERN_arm32_TYPES_H_ +#define KERN_arm32_TYPES_H_ + +#ifndef DOXYGEN + #define ATTRIBUTE_PACKED __attribute__((packed)) +#else + #define ATTRIBUTE_PACKED +#endif + +typedef uint32_t size_t; +typedef int32_t ssize_t; + +typedef uint32_t uintptr_t; +typedef uint32_t pfn_t; + +typedef uint32_t ipl_t; + +typedef uint32_t sysarg_t; +typedef int32_t native_t; +typedef uint32_t atomic_count_t; + +typedef struct { +} fncptr_t; + +#define INTN_C(c) INT32_C(c) +#define UINTN_C(c) UINT32_C(c) + +#define PRIdn PRId32 /**< Format for native_t. */ +#define PRIun PRIu32 /**< Format for sysarg_t. */ +#define PRIxn PRIx32 /**< Format for hexadecimal sysarg_t. */ +#define PRIua PRIu32 /**< Format for atomic_count_t. */ + +#endif + +/** @} + */ Index: kernel/arch/arm32/include/asm.h =================================================================== --- kernel/arch/arm32/include/asm.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,124 +1,0 @@ -/* - * Copyright (c) 2007 Michal Kebrt - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup arm32 - * @{ - */ -/** @file - * @brief Declarations of functions implemented in assembly. - */ - -#ifndef KERN_arm32_ASM_H_ -#define KERN_arm32_ASM_H_ - -#include -#include -#include -#include -#include - -/** CPU specific way to sleep cpu. - * - * ARMv7 introduced wait for event and wait for interrupt (wfe/wfi). - * ARM920T has custom coprocessor action to do the same. See ARM920T Technical - * Reference Manual ch 4.9 p. 4-23 (103 in the PDF) - * ARM926EJ-S uses the same coprocessor instruction as ARM920T. See ARM926EJ-S - * chapter 2.3.8 p.2-22 (52 in the PDF) - * - * @note Although mcr p15, 0, R0, c7, c0, 4 is defined in ARM Architecture - * reference manual for armv4/5 CP15 implementation is mandatory only for - * armv6+. - */ -NO_TRACE static inline void cpu_sleep(void) -{ -#ifdef PROCESSOR_ARCH_armv7_a - asm volatile ( "wfe" ); -#elif defined(PROCESSOR_ARCH_armv6) | defined(PROCESSOR_arm926ej_s) | defined(PROCESSOR_arm920t) - asm volatile ( "mcr p15, 0, R0, c7, c0, 4" ); -#endif -} - -NO_TRACE static inline void pio_write_8(ioport8_t *port, uint8_t v) -{ - *port = v; -} - -NO_TRACE static inline void pio_write_16(ioport16_t *port, uint16_t v) -{ - *port = v; -} - -NO_TRACE static inline void pio_write_32(ioport32_t *port, uint32_t v) -{ - *port = v; -} - -NO_TRACE static inline uint8_t pio_read_8(ioport8_t *port) -{ - return *port; -} - -NO_TRACE static inline uint16_t pio_read_16(ioport16_t *port) -{ - return *port; -} - -NO_TRACE static inline uint32_t pio_read_32(ioport32_t *port) -{ - return *port; -} - -/** Return base address of current stack. - * - * Return the base address of the current stack. - * The stack is assumed to be STACK_SIZE bytes long. - * The stack must start on page boundary. - * - */ -NO_TRACE static inline uintptr_t get_stack_base(void) -{ - uintptr_t v; - - asm volatile ( - "and %[v], sp, %[size]\n" - : [v] "=r" (v) - : [size] "r" (~(STACK_SIZE - 1)) - ); - - return v; -} - -extern void cpu_halt(void) __attribute__((noreturn)); -extern void asm_delay_loop(uint32_t t); -extern void userspace_asm(uintptr_t ustack, uintptr_t uspace_uarg, - uintptr_t entry); - -#endif - -/** @} - */ Index: kernel/arch/arm32/include/asm/boot.h =================================================================== --- kernel/arch/arm32/include/asm/boot.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,45 +1,0 @@ -/* - * Copyright (c) 2007 Michal Kebrt - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup arm32 - * @{ - */ -/** @file - * @brief Initial kernel start. - */ - -#ifndef KERN_arm32_ASM_BOOT_H_ -#define KERN_arm32_ASM_BOOT_H_ - -/** Size of a temporary stack used for initial kernel start. */ -#define TEMP_STACK_SIZE 0x100 - -#endif - -/** @} - */ Index: kernel/arch/arm32/include/atomic.h =================================================================== --- kernel/arch/arm32/include/atomic.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,131 +1,0 @@ -/* - * Copyright (c) 2007 Michal Kebrt - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup arm32 - * @{ - */ -/** @file - * @brief Atomic operations. - */ - -#ifndef KERN_arm32_ATOMIC_H_ -#define KERN_arm32_ATOMIC_H_ - -#include -#include - -/** Atomic addition. - * - * @param val Where to add. - * @param i Value to be added. - * - * @return Value after addition. - * - */ -NO_TRACE static inline atomic_count_t atomic_add(atomic_t *val, - atomic_count_t i) -{ - /* - * This implementation is for UP pre-ARMv6 systems where we do not have - * the LDREX and STREX instructions. - */ - ipl_t ipl = interrupts_disable(); - val->count += i; - atomic_count_t ret = val->count; - interrupts_restore(ipl); - - return ret; -} - -/** Atomic increment. - * - * @param val Variable to be incremented. - * - */ -NO_TRACE static inline void atomic_inc(atomic_t *val) -{ - atomic_add(val, 1); -} - -/** Atomic decrement. - * - * @param val Variable to be decremented. - * - */ -NO_TRACE static inline void atomic_dec(atomic_t *val) { - atomic_add(val, -1); -} - -/** Atomic pre-increment. - * - * @param val Variable to be incremented. - * @return Value after incrementation. - * - */ -NO_TRACE static inline atomic_count_t atomic_preinc(atomic_t *val) -{ - return atomic_add(val, 1); -} - -/** Atomic pre-decrement. - * - * @param val Variable to be decremented. - * @return Value after decrementation. - * - */ -NO_TRACE static inline atomic_count_t atomic_predec(atomic_t *val) -{ - return atomic_add(val, -1); -} - -/** Atomic post-increment. - * - * @param val Variable to be incremented. - * @return Value before incrementation. - * - */ -NO_TRACE static inline atomic_count_t atomic_postinc(atomic_t *val) -{ - return atomic_add(val, 1) - 1; -} - -/** Atomic post-decrement. - * - * @param val Variable to be decremented. - * @return Value before decrementation. - * - */ -NO_TRACE static inline atomic_count_t atomic_postdec(atomic_t *val) -{ - return atomic_add(val, -1) + 1; -} - -#endif - -/** @} - */ Index: kernel/arch/arm32/include/barrier.h =================================================================== --- kernel/arch/arm32/include/barrier.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,131 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup arm32 - * @{ - */ -/** @file - * @brief Memory barriers. - */ - -#ifndef KERN_arm32_BARRIER_H_ -#define KERN_arm32_BARRIER_H_ - -#ifdef KERNEL -#include -#else -#include -#endif - -#define CS_ENTER_BARRIER() asm volatile ("" ::: "memory") -#define CS_LEAVE_BARRIER() asm volatile ("" ::: "memory") - -#if defined PROCESSOR_ARCH_armv7_a -/* ARMv7 uses instructions for memory barriers see ARM Architecture reference - * manual for details: - * DMB: ch. A8.8.43 page A8-376 - * DSB: ch. A8.8.44 page A8-378 - * See ch. A3.8.3 page A3-148 for details about memory barrier implementation - * and functionality on armv7 architecture. - */ -#define memory_barrier() asm volatile ("dmb" ::: "memory") -#define read_barrier() asm volatile ("dsb" ::: "memory") -#define write_barrier() asm volatile ("dsb st" ::: "memory") -#define inst_barrier() asm volatile ("isb" ::: "memory") -#elif defined PROCESSOR_ARCH_armv6 | defined KERNEL -/* - * ARMv6 introduced user access of the following commands: - * - Prefetch flush - * - Data synchronization barrier - * - Data memory barrier - * - Clean and prefetch range operations. - * ARM Architecture Reference Manual version I ch. B.3.2.1 p. B3-4 - */ -/* ARMv6- use system control coprocessor (CP15) for memory barrier instructions. - * Although at least mcr p15, 0, r0, c7, c10, 4 is mentioned in earlier archs, - * CP15 implementation is mandatory only for armv6+. - */ -#define memory_barrier() CP15DMB_write(0) -#define read_barrier() CP15DSB_write(0) -#define write_barrier() read_barrier() -#define inst_barrier() CP15ISB_write(0) -#else -/* Older manuals mention syscalls as a way to implement cache coherency and - * barriers. See for example ARM Architecture Reference Manual Version D - * chapter 2.7.4 Prefetching and self-modifying code (p. A2-28) - */ -// TODO implement on per PROCESSOR basis or via syscalls -#define memory_barrier() asm volatile ("" ::: "memory") -#define read_barrier() asm volatile ("" ::: "memory") -#define write_barrier() asm volatile ("" ::: "memory") -#define inst_barrier() asm volatile ("" ::: "memory") -#endif - -/* - * There are multiple ways ICache can be implemented on ARM machines. Namely - * PIPT, VIPT, and ASID and VMID tagged VIVT (see ARM Architecture Reference - * Manual B3.11.2 (p. 1383). However, CortexA8 Manual states: "For maximum - * compatibility across processors, ARM recommends that operating systems target - * the ARMv7 base architecture that uses ASID-tagged VIVT instruction caches, - * and do not assume the presence of the IVIPT extension. Software that relies - * on the IVIPT extension might fail in an unpredictable way on an ARMv7 - * implementation that does not include the IVIPT extension." (7.2.6 p. 245). - * Only PIPT invalidates cache for all VA aliases if one block is invalidated. - * - * @note: Supporting ASID and VMID tagged VIVT may need to add ICache - * maintenance to other places than just smc. - */ - -#if defined PROCESSOR_ARCH_armv7_a | defined PROCESSOR_ARCH_armv6 | defined KERNEL -/* Available on all supported arms, - * invalidates entire ICache so the written value does not matter. */ -//TODO might be PL1 only on armv5- -#define smc_coherence(a) \ -do { \ - DCCMVAU_write((uint32_t)(a)); /* Flush changed memory */\ - write_barrier(); /* Wait for completion */\ - ICIALLU_write(0); /* Flush ICache */\ - inst_barrier(); /* Wait for Inst refetch */\ -} while (0) -/* @note: Cache type register is not available in uspace. We would need - * to export the cache line value, or use syscall for uspace smc_coherence */ -#define smc_coherence_block(a, l) \ -do { \ - for (uintptr_t addr = (uintptr_t)a; addr < (uintptr_t)a + l; addr += 4)\ - smc_coherence(addr); \ -} while (0) -#else -#define smc_coherence(a) -#define smc_coherence_block(a, l) -#endif - - -#endif - -/** @} - */ Index: kernel/arch/arm32/include/cache.h =================================================================== --- kernel/arch/arm32/include/cache.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,50 +1,0 @@ -/* - * Copyright (c) 2013 Jan Vesely - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup arm32 - * @{ - */ -/** @file - * @brief Security Extensions Routines - */ - -#ifndef KERN_arm32_CACHE_H_ -#define KERN_arm32_CACHE_H_ - -unsigned dcache_levels(void); - -void dcache_flush(void); -void dcache_flush_invalidate(void); -void cpu_dcache_flush(void); -void cpu_dcache_flush_invalidate(void); -void icache_invalidate(void); - -#endif -/** @} - */ - Index: kernel/arch/arm32/include/context.h =================================================================== --- kernel/arch/arm32/include/context.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,82 +1,0 @@ -/* - * Copyright (c) 2007 Michal Kebrt - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup arm32 - * @{ - */ -/** @file - * @brief Thread context. - */ - -#ifndef KERN_arm32_CONTEXT_H_ -#define KERN_arm32_CONTEXT_H_ - -#include -#include - -/* Put one item onto the stack to support get_stack_base() and align it up. */ -#define SP_DELTA (0 + ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT)) - -#define context_set(c, _pc, stack, size) \ - do { \ - (c)->pc = (uintptr_t) (_pc); \ - (c)->sp = ((uintptr_t) (stack)) + (size) - SP_DELTA; \ - (c)->fp = 0; \ - } while (0) - -#ifndef __ASM__ - -#include - -/** Thread context containing registers that must be preserved across function - * calls. - */ -typedef struct { - uint32_t cpu_mode; - uintptr_t sp; - uintptr_t pc; - - uint32_t r4; - uint32_t r5; - uint32_t r6; - uint32_t r7; - uint32_t r8; - uint32_t r9; - uint32_t r10; - uint32_t fp; /* r11 */ - - ipl_t ipl; -} context_t; - - -#endif /* __ASM__ */ - -#endif - -/** @} - */ Index: kernel/arch/arm32/include/cp15.h =================================================================== --- kernel/arch/arm32/include/cp15.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,525 +1,0 @@ -/* - * Copyright (c) 2013 Jan Vesely - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup arm32 - * @{ - */ -/** @file - * @brief System Control Coprocessor (CP15) - */ - -#ifndef KERN_arm32_CP15_H_ -#define KERN_arm32_CP15_H_ - - -/** See ARM Architecture reference manual ch. B3.17.1 page B3-1456 - * for the list */ - -#define CONTROL_REG_GEN_READ(name, crn, opc1, crm, opc2) \ -static inline uint32_t name##_read() \ -{ \ - uint32_t val; \ - asm volatile ( "mrc p15, "#opc1", %0, "#crn", "#crm", "#opc2"\n" : "=r" (val) ); \ - return val; \ -} -#define CONTROL_REG_GEN_WRITE(name, crn, opc1, crm, opc2) \ -static inline void name##_write(uint32_t val) \ -{ \ - asm volatile ( "mcr p15, "#opc1", %0, "#crn", "#crm", "#opc2"\n" :: "r" (val) ); \ -} - -/* Identification registers */ -enum { - MIDR_IMPLEMENTER_MASK = 0xff, - MIDR_IMPLEMENTER_SHIFT = 24, - MIDR_VARIANT_MASK = 0xf, - MIDR_VARIANT_SHIFT = 20, - MIDR_ARCHITECTURE_MASK = 0xf, - MIDR_ARCHITECTURE_SHIFT = 16, - MIDR_PART_NUMBER_MASK = 0xfff, - MIDR_PART_NUMBER_SHIFT = 4, - MIDR_REVISION_MASK = 0xf, - MIDR_REVISION_SHIFT = 0, -}; -CONTROL_REG_GEN_READ(MIDR, c0, 0, c0, 0); - -enum { - CTR_FORMAT_MASK = 0xe0000000, - CTR_FORMAT_ARMv7 = 0x80000000, - CTR_FORMAT_ARMv6 = 0x00000000, - /* ARMv7 format */ - CTR_CWG_MASK = 0xf, - CTR_CWG_SHIFT = 24, - CTR_ERG_MASK = 0xf, - CTR_ERG_SHIFT = 20, - CTR_D_MIN_LINE_MASK = 0xf, - CTR_D_MIN_LINE_SHIFT = 16, - CTR_I_MIN_LINE_MASK = 0xf, - CTR_I_MIN_LINE_SHIFT = 0, - CTR_L1I_POLICY_MASK = 0x0000c000, - CTR_L1I_POLICY_AIVIVT = 0x00004000, - CTR_L1I_POLICY_VIPT = 0x00008000, - CTR_L1I_POLICY_PIPT = 0x0000c000, - /* ARMv6 format */ - CTR_CTYPE_MASK = 0x1e000000, - CTR_CTYPE_WT = 0x00000000, - CTR_CTYPE_WB_NL = 0x04000000, - CTR_CTYPE_WB_D = 0x0a000000, - CTR_CTYPE_WB_A = 0x0c000000, /**< ARMv5- only */ - CTR_CTYPE_WB_B = 0x0e000000, /**< ARMv5- only */ - CTR_CTYPE_WB_C = 0x1c000000, - CTR_SEP_FLAG = 1 << 24, - CTR_DCACHE_P_FLAG = 1 << 23, - CTR_DCACHE_SIZE_MASK = 0xf, - CTR_DCACHE_SIZE_SHIFT = 18, - CTR_DCACHE_ASSOC_MASK = 0x7, - CTR_DCACHE_ASSOC_SHIFT = 15, - CTR_DCACHE_M_FLAG = 1 << 14, - CTR_DCACHE_LEN_MASK = 0x3, - CTR_DCACHE_LEN_SHIFT = 0, - CTR_ICACHE_P_FLAG = 1 << 11, - CTR_ICACHE_SIZE_MASK = 0xf, - CTR_ICACHE_SIZE_SHIFT = 6, - CTR_ICACHE_ASSOC_MASK = 0x7, - CTR_ICACHE_ASSOC_SHIFT = 3, - CTR_ICACHE_M_FLAG = 1 << 2, - CTR_ICACHE_LEN_MASK = 0x3, - CTR_ICACHE_LEN_SHIFT = 0, -}; -CONTROL_REG_GEN_READ(CTR, c0, 0, c0, 1); -CONTROL_REG_GEN_READ(TCMR, c0, 0, c0, 2); -CONTROL_REG_GEN_READ(TLBTR, c0, 0, c0, 3); -CONTROL_REG_GEN_READ(MPIDR, c0, 0, c0, 5); -CONTROL_REG_GEN_READ(REVIDR, c0, 0, c0, 6); - -enum { - ID_PFR0_THUMBEE_MASK = 0xf << 12, - ID_PFR0_THUMBEE = 0x1 << 12, - ID_PFR0_JAZELLE_MASK = 0xf << 8, - ID_PFR0_JAZELLE = 0x1 << 8, - ID_PFR0_JAZELLE_CV_CLEAR = 0x2 << 8, - ID_PFR0_THUMB_MASK = 0xf << 4, - ID_PFR0_THUMB = 0x1 << 4, - ID_PFR0_THUMB2 = 0x3 << 4, - ID_PFR0_ARM_MASK = 0xf << 0, - ID_PFR0_ARM = 0x1 << 0, -}; -CONTROL_REG_GEN_READ(ID_PFR0, c0, 0, c1, 0); - -enum { - ID_PFR1_GEN_TIMER_EXT_MASK = 0xf << 16, - ID_PFR1_GEN_TIMER_EXT = 0x1 << 16, - ID_PFR1_VIRT_EXT_MASK = 0xf << 12, - ID_PFR1_VIRT_EXT = 0x1 << 12, - ID_PFR1_M_PROF_MASK = 0xf << 8, - ID_PFR1_M_PROF_MODEL = 0x2 << 8, - ID_PFR1_SEC_EXT_MASK = 0xf << 4, - ID_PFR1_SEC_EXT = 0x1 << 4, - ID_PFR1_SEC_EXT_RFR = 0x2 << 4, - ID_PFR1_ARMV4_MODEL_MASK = 0xf << 0, - ID_PFR1_ARMV4_MODEL = 0x1 << 0, -}; -CONTROL_REG_GEN_READ(ID_PFR1, c0, 0, c1, 1); -CONTROL_REG_GEN_READ(ID_DFR0, c0, 0, c1, 2); -CONTROL_REG_GEN_READ(ID_AFR0, c0, 0, c1, 3); -CONTROL_REG_GEN_READ(ID_MMFR0, c0, 0, c1, 4); -CONTROL_REG_GEN_READ(ID_MMFR1, c0, 0, c1, 5); -CONTROL_REG_GEN_READ(ID_MMFR2, c0, 0, c1, 6); -CONTROL_REG_GEN_READ(ID_MMFR3, c0, 0, c1, 7); - -CONTROL_REG_GEN_READ(ID_ISAR0, c0, 0, c2, 0); -CONTROL_REG_GEN_READ(ID_ISAR1, c0, 0, c2, 1); -CONTROL_REG_GEN_READ(ID_ISAR2, c0, 0, c2, 2); -CONTROL_REG_GEN_READ(ID_ISAR3, c0, 0, c2, 3); -CONTROL_REG_GEN_READ(ID_ISAR4, c0, 0, c2, 4); -CONTROL_REG_GEN_READ(ID_ISAR5, c0, 0, c2, 5); - -enum { - CCSIDR_WT_FLAG = 1 << 31, - CCSIDR_WB_FLAG = 1 << 30, - CCSIDR_RA_FLAG = 1 << 29, - CCSIDR_WA_FLAG = 1 << 28, - CCSIDR_NUMSETS_MASK = 0x7fff, - CCSIDR_NUMSETS_SHIFT = 13, - CCSIDR_ASSOC_MASK = 0x3ff, - CCSIDR_ASSOC_SHIFT = 3, - CCSIDR_LINESIZE_MASK = 0x7, - CCSIDR_LINESIZE_SHIFT = 0, -}; -CONTROL_REG_GEN_READ(CCSIDR, c0, 1, c0, 0); - -enum { - CLIDR_LOUU_MASK = 0x7, - CLIDR_LOUU_SHIFT = 27, - CLIDR_LOC_MASK = 0x7, - CLIDR_LOC_SHIFT = 24, - CLIDR_LOUIS_MASK = 0x7, - CLIDR_LOUIS_SHIFT = 21, - CLIDR_NOCACHE = 0x0, - CLIDR_ICACHE_ONLY = 0x1, - CLIDR_DCACHE_ONLY = 0x2, - CLIDR_SEP_CACHE = 0x3, - CLIDR_UNI_CACHE = 0x4, - CLIDR_CACHE_MASK = 0x7, -#define CLIDR_CACHE(level, val) ((val >> (level - 1) * 3) & CLIDR_CACHE_MASK) -}; -CONTROL_REG_GEN_READ(CLIDR, c0, 1, c0, 1); -CONTROL_REG_GEN_READ(AIDR, c0, 1, c0, 7); /* Implementation defined or MIDR */ - -enum { - CCSELR_LEVEL_MASK = 0x7, - CCSELR_LEVEL_SHIFT = 1, - CCSELR_INSTRUCTION_FLAG = 1 << 0, -}; -CONTROL_REG_GEN_READ(CSSELR, c0, 2, c0, 0); -CONTROL_REG_GEN_WRITE(CSSELR, c0, 2, c0, 0); -CONTROL_REG_GEN_READ(VPIDR, c0, 4, c0, 0); -CONTROL_REG_GEN_WRITE(VPIDR, c0, 4, c0, 0); -CONTROL_REG_GEN_READ(VMPIDR, c0, 4, c0, 5); -CONTROL_REG_GEN_WRITE(VMPIDR, c0, 4, c0, 5); - -/* System control registers */ -/* COntrol register bit values see ch. B4.1.130 of ARM Architecture Reference - * Manual ARMv7-A and ARMv7-R edition, page 1687 */ -enum { - SCTLR_MMU_EN_FLAG = 1 << 0, - SCTLR_ALIGN_CHECK_EN_FLAG = 1 << 1, /* Allow alignemnt check */ - SCTLR_CACHE_EN_FLAG = 1 << 2, - SCTLR_CP15_BARRIER_EN_FLAG = 1 << 5, - SCTLR_B_EN_FLAG = 1 << 7, /* ARMv6-, big endian switch */ - SCTLR_SWAP_EN_FLAG = 1 << 10, - SCTLR_BRANCH_PREDICT_EN_FLAG = 1 << 11, - SCTLR_INST_CACHE_EN_FLAG = 1 << 12, - SCTLR_HIGH_VECTORS_EN_FLAG = 1 << 13, - SCTLR_ROUND_ROBIN_EN_FLAG = 1 << 14, - SCTLR_HW_ACCESS_FLAG_EN_FLAG = 1 << 17, - SCTLR_WRITE_XN_EN_FLAG = 1 << 19, /* Only if virt. supported */ - SCTLR_USPCE_WRITE_XN_EN_FLAG = 1 << 20, /* Only if virt. supported */ - SCTLR_FAST_IRQ_EN_FLAG = 1 << 21, /* Disable impl. specific feat*/ - SCTLR_UNALIGNED_EN_FLAG = 1 << 22, /* Must be 1 on armv7 */ - SCTLR_IRQ_VECTORS_EN_FLAG = 1 << 24, - SCTLR_BIG_ENDIAN_EXC_FLAG = 1 << 25, - SCTLR_NMFI_EN_FLAG = 1 << 27, - SCTLR_TEX_REMAP_EN_FLAG = 1 << 28, - SCTLR_ACCESS_FLAG_EN_FLAG = 1 << 29, - SCTLR_THUMB_EXC_EN_FLAG = 1 << 30, -}; -CONTROL_REG_GEN_READ(SCTLR, c1, 0, c0, 0); -CONTROL_REG_GEN_WRITE(SCTLR, c1, 0, c0, 0); -CONTROL_REG_GEN_READ(ACTLR, c1, 0, c0, 1); -CONTROL_REG_GEN_WRITE(ACTLR, c1, 0, c0, 1); - -enum { - CPACR_ASEDIS_FLAG = 1 << 31, - CPACR_D32DIS_FLAG = 1 << 30, - CPACR_TRCDIS_FLAG = 1 << 28, -#define CPACR_CP_MASK(cp) (0x3 << (cp * 2)) -#define CPACR_CP_NO_ACCESS(cp) (0x0 << (cp * 2)) -#define CPACR_CP_PL1_ACCESS(cp) (0x1 << (cp * 2)) -#define CPACR_CP_FULL_ACCESS(cp) (0x3 << (cp * 2)) -}; -CONTROL_REG_GEN_READ(CPACR, c1, 0, c0, 2); -CONTROL_REG_GEN_WRITE(CPACR, c1, 0, c0, 2); - -/* Implemented as part of Security extensions */ -enum { - SCR_SIF_FLAG = 1 << 9, - SCR_HCE_FLAG = 1 << 8, - SCR_SCD_FLAG = 1 << 7, - SCR_nET_FLAG = 1 << 6, - SCR_AW_FLAG = 1 << 5, - SCR_FW_FLAG = 1 << 4, - SCR_EA_FLAG = 1 << 3, - SCR_FIQ_FLAG = 1 << 2, - SCR_IRQ_FLAG = 1 << 1, - SCR_NS_FLAG = 1 << 0, -}; -CONTROL_REG_GEN_READ(SCR, c1, 0, c1, 0); -CONTROL_REG_GEN_WRITE(SCR, c1, 0, c1, 0); -CONTROL_REG_GEN_READ(SDER, c1, 0, c1, 1); -CONTROL_REG_GEN_WRITE(SDER, c1, 0, c1, 1); - -enum { - NSACR_NSTRCDIS_FLAG = 1 << 20, - NSACR_RFR_FLAG = 1 << 19, - NSACR_NSASEDIS = 1 << 15, - NSACR_NSD32DIS = 1 << 14, -#define NSACR_CP_FLAG(cp) (1 << cp) -}; -CONTROL_REG_GEN_READ(NSACR, c1, 0, c1, 2); -CONTROL_REG_GEN_WRITE(NSACR, c1, 0, c1, 2); - -/* Implemented as part of Virtualization extensions */ -CONTROL_REG_GEN_READ(HSCTLR, c1, 4, c0, 0); -CONTROL_REG_GEN_WRITE(HSCTLR, c1, 4, c0, 0); -CONTROL_REG_GEN_READ(HACTLR, c1, 4, c0, 1); -CONTROL_REG_GEN_WRITE(HACTLR, c1, 4, c0, 1); - -CONTROL_REG_GEN_READ(HCR, c1, 4, c1, 0); -CONTROL_REG_GEN_WRITE(HCR, c1, 4, c1, 0); -CONTROL_REG_GEN_READ(HDCR, c1, 4, c1, 1); -CONTROL_REG_GEN_WRITE(HDCR, c1, 4, c1, 1); -CONTROL_REG_GEN_READ(HCPTR, c1, 4, c1, 2); -CONTROL_REG_GEN_WRITE(HCPTR, c1, 4, c1, 2); -CONTROL_REG_GEN_READ(HSTR, c1, 4, c1, 3); -CONTROL_REG_GEN_WRITE(HSTR, c1, 4, c1, 3); -CONTROL_REG_GEN_READ(HACR, c1, 4, c1, 7); -CONTROL_REG_GEN_WRITE(HACR, c1, 4, c1, 7); - -/* Memory protection and control registers */ -CONTROL_REG_GEN_READ(TTBR0, c2, 0, c0, 0); -CONTROL_REG_GEN_WRITE(TTBR0, c2, 0, c0, 0); -CONTROL_REG_GEN_READ(TTBR1, c2, 0, c0, 1); -CONTROL_REG_GEN_WRITE(TTBR1, c2, 0, c0, 1); -CONTROL_REG_GEN_READ(TTBCR, c2, 0, c0, 2); -CONTROL_REG_GEN_WRITE(TTBCR, c2, 0, c0, 2); - -CONTROL_REG_GEN_READ(HTCR, c2, 4, c0, 2); -CONTROL_REG_GEN_WRITE(HTCR, c2, 4, c0, 2); -CONTROL_REG_GEN_READ(VTCR, c2, 4, c1, 2); -CONTROL_REG_GEN_WRITE(VTCR, c2, 4, c1, 2); - -/* PAE */ -CONTROL_REG_GEN_READ(TTBR0H, c2, 0, c2, 0); -CONTROL_REG_GEN_WRITE(TTBR0H, c2, 0, c2, 0); -CONTROL_REG_GEN_READ(TTBR1H, c2, 0, c2, 1); -CONTROL_REG_GEN_WRITE(TTBR1H, c2, 0, c2, 1); -CONTROL_REG_GEN_READ(HTTBRH, c2, 0, c2, 4); -CONTROL_REG_GEN_WRITE(HTTBRH, c2, 0, c2, 4); -CONTROL_REG_GEN_READ(VTTBRH, c2, 0, c2, 6); -CONTROL_REG_GEN_WRITE(VTTBRH, c2, 0, c2, 6); - -CONTROL_REG_GEN_READ(DACR, c3, 0, c0, 0); -CONTROL_REG_GEN_WRITE(DACR, c3, 0, c0, 0); - -/* Memory system fault registers */ -CONTROL_REG_GEN_READ(DFSR, c5, 0, c0, 0); -CONTROL_REG_GEN_WRITE(DFSR, c5, 0, c0, 0); -CONTROL_REG_GEN_READ(IFSR, c5, 0, c0, 1); -CONTROL_REG_GEN_WRITE(IFSR, c5, 0, c0, 1); - -CONTROL_REG_GEN_READ(ADFSR, c5, 0, c1, 0); -CONTROL_REG_GEN_WRITE(ADFSR, c5, 0, c1, 0); -CONTROL_REG_GEN_READ(AIFSR, c5, 0, c1, 1); -CONTROL_REG_GEN_WRITE(AIFSR, c5, 0, c1, 1); - -CONTROL_REG_GEN_READ(HADFSR, c5, 4, c1, 0); -CONTROL_REG_GEN_WRITE(HADFSR, c5, 4, c1, 0); -CONTROL_REG_GEN_READ(HAIFSR, c5, 4, c1, 1); -CONTROL_REG_GEN_WRITE(HAIFSR, c5, 4, c1, 1); -CONTROL_REG_GEN_READ(HSR, c5, 4, c2, 0); -CONTROL_REG_GEN_WRITE(HSR, c5, 4, c2, 0); - -CONTROL_REG_GEN_READ(DFAR, c6, 0, c0, 0); -CONTROL_REG_GEN_WRITE(DFAR, c6, 0, c0, 0); -CONTROL_REG_GEN_READ(IFAR, c6, 0, c0, 2); -CONTROL_REG_GEN_WRITE(IFAR, c6, 0, c0, 2); - -CONTROL_REG_GEN_READ(HDFAR, c6, 4, c0, 0); -CONTROL_REG_GEN_WRITE(HDFAR, c6, 4, c0, 0); -CONTROL_REG_GEN_READ(HIFAR, c6, 4, c0, 2); -CONTROL_REG_GEN_WRITE(HIFAR, c6, 4, c0, 2); -CONTROL_REG_GEN_READ(HPFAR, c6, 4, c0, 4); -CONTROL_REG_GEN_WRITE(HPFAR, c6, 4, c0, 4); - -/* Cache maintenance, address translation and other */ -CONTROL_REG_GEN_WRITE(WFI, c7, 0, c0, 4); /* armv6 only */ -CONTROL_REG_GEN_WRITE(ICIALLLUIS, c7, 0, c1, 0); -CONTROL_REG_GEN_WRITE(BPIALLIS, c7, 0, c1, 6); -CONTROL_REG_GEN_READ(PAR, c7, 0, c4, 0); -CONTROL_REG_GEN_WRITE(PAR, c7, 0, c4, 0); -CONTROL_REG_GEN_READ(PARH, c7, 0, c7, 0); /* PAE */ -CONTROL_REG_GEN_WRITE(PARH, c7, 0, c7, 0); /* PAE */ -CONTROL_REG_GEN_WRITE(ICIALLU, c7, 0, c5, 0); -CONTROL_REG_GEN_WRITE(ICIMVAU, c7, 0, c5, 1); -CONTROL_REG_GEN_WRITE(CP15ISB, c7, 0, c5, 4); -CONTROL_REG_GEN_WRITE(BPIALL, c7, 0, c5, 6); -CONTROL_REG_GEN_WRITE(BPIMVA, c7, 0, c5, 7); - -CONTROL_REG_GEN_WRITE(DCIMVAC, c7, 0, c6, 1); -CONTROL_REG_GEN_WRITE(DCIMSW, c7, 0, c6, 2); - -CONTROL_REG_GEN_WRITE(ATS1CPR, c7, 0, c8, 0); -CONTROL_REG_GEN_WRITE(ATS1CPW, c7, 0, c8, 1); -CONTROL_REG_GEN_WRITE(ATS1CUR, c7, 0, c8, 2); -CONTROL_REG_GEN_WRITE(ATS1CUW, c7, 0, c8, 3); -CONTROL_REG_GEN_WRITE(ATS1NSOPR, c7, 0, c8, 4); -CONTROL_REG_GEN_WRITE(ATS1NSOPW, c7, 0, c8, 5); -CONTROL_REG_GEN_WRITE(ATS1NSOUR, c7, 0, c8, 6); -CONTROL_REG_GEN_WRITE(ATS1NSOUW, c7, 0, c8, 7); - - -CONTROL_REG_GEN_WRITE(DCCMVAC, c7, 0, c10, 1); -CONTROL_REG_GEN_WRITE(DCCSW, c7, 0, c10, 2); -CONTROL_REG_GEN_WRITE(CP15DSB, c7, 0, c10, 4); -CONTROL_REG_GEN_WRITE(CP15DMB, c7, 0, c10, 5); -CONTROL_REG_GEN_WRITE(DCCMVAU, c7, 0, c11, 1); - -CONTROL_REG_GEN_WRITE(PFI, c7, 0, c11, 1); /* armv6 only */ - -CONTROL_REG_GEN_WRITE(DCCIMVAC, c7, 0, c14, 1); -CONTROL_REG_GEN_WRITE(DCCISW, c7, 0, c14, 2); - -CONTROL_REG_GEN_WRITE(ATS1HR, c7, 4, c8, 0); -CONTROL_REG_GEN_WRITE(ATS1HW, c7, 4, c8, 1); - -/* TLB maintenance */ -CONTROL_REG_GEN_WRITE(TLBIALLIS, c8, 0, c3, 0); /* Inner shareable */ -CONTROL_REG_GEN_WRITE(TLBIMVAIS, c8, 0, c3, 1); /* Inner shareable */ -CONTROL_REG_GEN_WRITE(TLBIASIDIS, c8, 0, c3, 2); /* Inner shareable */ -CONTROL_REG_GEN_WRITE(TLBIMVAAIS, c8, 0, c3, 3); /* Inner shareable */ - -CONTROL_REG_GEN_WRITE(ITLBIALL, c8, 0, c5, 0); -CONTROL_REG_GEN_WRITE(ITLBIMVA, c8, 0, c5, 1); -CONTROL_REG_GEN_WRITE(ITLBIASID, c8, 0, c5, 2); - -CONTROL_REG_GEN_WRITE(DTLBIALL, c8, 0, c6, 0); -CONTROL_REG_GEN_WRITE(DTLBIMVA, c8, 0, c6, 1); -CONTROL_REG_GEN_WRITE(DTLBIASID, c8, 0, c6, 2); - -CONTROL_REG_GEN_WRITE(TLBIALL, c8, 0, c7, 0); -CONTROL_REG_GEN_WRITE(TLBIMVA, c8, 0, c7, 1); -CONTROL_REG_GEN_WRITE(TLBIASID, c8, 0, c7, 2); -CONTROL_REG_GEN_WRITE(TLBIMVAA, c8, 0, c7, 3); - -CONTROL_REG_GEN_WRITE(TLBIALLHIS, c8, 4, c3, 0); /* Inner shareable */ -CONTROL_REG_GEN_WRITE(TLBIMVAHIS, c8, 4, c3, 1); /* Inner shareable */ -CONTROL_REG_GEN_WRITE(TLBIALLNSNHIS, c8, 4, c3, 4); /* Inner shareable */ - -CONTROL_REG_GEN_WRITE(TLBIALLH, c8, 4, c7, 0); -CONTROL_REG_GEN_WRITE(TLBIMVAH, c8, 4, c7, 1); -CONTROL_REG_GEN_WRITE(TLBIALLNSNHS, c8, 4, c7, 4); - -/* c9 are performance monitoring resgisters */ -enum { - PMCR_IMP_MASK = 0xff, - PMCR_IMP_SHIFT = 24, - PMCR_IDCODE_MASK = 0xff, - PMCR_IDCODE_SHIFT = 16, - PMCR_EVENT_NUM_MASK = 0x1f, - PMCR_EVENT_NUM_SHIFT = 11, - PMCR_DP_FLAG = 1 << 5, - PMCR_X_FLAG = 1 << 4, - PMCR_D_FLAG = 1 << 3, - PMCR_C_FLAG = 1 << 2, - PMCR_P_FLAG = 1 << 1, - PMCR_E_FLAG = 1 << 0, -}; -CONTROL_REG_GEN_READ(PMCR, c9, 0, c12, 0); -CONTROL_REG_GEN_WRITE(PMCR, c9, 0, c12, 0); -enum { - PMCNTENSET_CYCLE_COUNTER_EN_FLAG = 1 << 31, -#define PMCNTENSET_COUNTER_EN_FLAG(c) (1 << c) -}; -CONTROL_REG_GEN_READ(PMCNTENSET, c9, 0, c12, 1); -CONTROL_REG_GEN_WRITE(PMCNTENSET, c9, 0, c12, 1); -CONTROL_REG_GEN_READ(PMCCNTR, c9, 0, c13, 0); -CONTROL_REG_GEN_WRITE(PMCCNTR, c9, 0, c13, 0); - - -/*c10 has tons of reserved too */ -CONTROL_REG_GEN_READ(PRRR, c10, 0, c2, 0); /* no PAE */ -CONTROL_REG_GEN_WRITE(PRRR, c10, 0, c2, 0); /* no PAE */ -CONTROL_REG_GEN_READ(MAIR0, c10, 0, c2, 0); /* PAE */ -CONTROL_REG_GEN_WRITE(MAIR0, c10, 0, c2, 0); /* PAE */ -CONTROL_REG_GEN_READ(NMRR, c10, 0, c2, 1); /* no PAE */ -CONTROL_REG_GEN_WRITE(NMRR, c10, 0, c2, 1); /* no PAE */ -CONTROL_REG_GEN_READ(MAIR1, c10, 0, c2, 1); /* PAE */ -CONTROL_REG_GEN_WRITE(MAIR1, c10, 0, c2, 1); /* PAE */ - -CONTROL_REG_GEN_READ(AMAIR0, c10, 0, c3, 0); /* PAE */ -CONTROL_REG_GEN_WRITE(AMAIR0, c10, 0, c3, 0); /* PAE */ -CONTROL_REG_GEN_READ(AMAIR1, c10, 0, c3, 1); /* PAE */ -CONTROL_REG_GEN_WRITE(AMAIR1, c10, 0, c3, 1); /* PAE */ - -CONTROL_REG_GEN_READ(HMAIR0, c10, 4, c2, 0); -CONTROL_REG_GEN_WRITE(HMAIR0, c10, 4, c2, 0); -CONTROL_REG_GEN_READ(HMAIR1, c10, 4, c2, 1); -CONTROL_REG_GEN_WRITE(HMAIR1, c10, 4, c2, 1); - -CONTROL_REG_GEN_READ(HAMAIR0, c10, 4, c3, 0); -CONTROL_REG_GEN_WRITE(HAMAIR0, c10, 4, c3, 0); -CONTROL_REG_GEN_READ(HAMAIR1, c10, 4, c3, 1); -CONTROL_REG_GEN_WRITE(HAMAIR1, c10, 4, c3, 1); - -/* c11 is reserved for TCM and DMA */ - -/* Security extensions */ -CONTROL_REG_GEN_READ(VBAR, c12, 0, c0, 0); -CONTROL_REG_GEN_WRITE(VBAR, c12, 0, c0, 0); -CONTROL_REG_GEN_READ(MVBAR, c12, 0, c0, 1); -CONTROL_REG_GEN_WRITE(MVBAR, c12, 0, c0, 1); - -CONTROL_REG_GEN_READ(ISR, c12, 0, c1, 0); - -CONTROL_REG_GEN_READ(HVBAR, c12, 4, c0, 0); -CONTROL_REG_GEN_WRITE(HVBAR, c12, 4, c0, 0); - -/* Process context and thread id (FCSE) */ -CONTROL_REG_GEN_READ(FCSEIDR, c13, 0, c0, 0); - -CONTROL_REG_GEN_READ(CONTEXTIDR, c13, 0, c0, 1); -CONTROL_REG_GEN_WRITE(CONTEXTIDR, c13, 0, c0, 1); -CONTROL_REG_GEN_READ(TPIDRURW, c13, 0, c0, 2); -CONTROL_REG_GEN_WRITE(TPIDRURW, c13, 0, c0, 2); -CONTROL_REG_GEN_READ(TPIDRURO, c13, 0, c0, 3); -CONTROL_REG_GEN_WRITE(TPIDRURO, c13, 0, c0, 3); -CONTROL_REG_GEN_READ(TPIDRPRW, c13, 0, c0, 4); -CONTROL_REG_GEN_WRITE(TPIDRPRW, c13, 0, c0, 4); - -CONTROL_REG_GEN_READ(HTPIDR, c13, 4, c0, 2); -CONTROL_REG_GEN_WRITE(HTPIDR, c13, 4, c0, 2); - -/* Generic Timer Extensions */ -CONTROL_REG_GEN_READ(CNTFRQ, c14, 0, c0, 0); -CONTROL_REG_GEN_WRITE(CNTFRQ, c14, 0, c0, 0); -CONTROL_REG_GEN_READ(CNTKCTL, c14, 0, c1, 0); -CONTROL_REG_GEN_WRITE(CNTKCTL, c14, 0, c1, 0); - -CONTROL_REG_GEN_READ(CNTP_TVAL, c14, 0, c2, 0); -CONTROL_REG_GEN_WRITE(CNTP_TVAL, c14, 0, c2, 0); -CONTROL_REG_GEN_READ(CNTP_CTL, c14, 0, c2, 1); -CONTROL_REG_GEN_WRITE(CNTP_CTL, c14, 0, c2, 1); - -CONTROL_REG_GEN_READ(CNTV_TVAL, c14, 0, c3, 0); -CONTROL_REG_GEN_WRITE(CNTV_TVAL, c14, 0, c3, 0); -CONTROL_REG_GEN_READ(CNTV_CTL, c14, 0, c3, 1); -CONTROL_REG_GEN_WRITE(CNTV_CTL, c14, 0, c3, 1); - -CONTROL_REG_GEN_READ(CNTHCTL, c14, 4, c1, 0); -CONTROL_REG_GEN_WRITE(CNTHCTL, c14, 4, c1, 0); - -CONTROL_REG_GEN_READ(CNTHP_TVAL, c14, 4, c2, 0); -CONTROL_REG_GEN_WRITE(CNTHP_TVAL, c14, 4, c2, 0); -CONTROL_REG_GEN_READ(CNTHP_CTL, c14, 4, c2, 1); -CONTROL_REG_GEN_WRITE(CNTHP_CTL, c14, 4, c2, 1); - -#endif - -/** @} - */ Index: kernel/arch/arm32/include/cpu.h =================================================================== --- kernel/arch/arm32/include/cpu.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,76 +1,0 @@ -/* - * Copyright (c) 2007 Michal Kebrt - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup arm32 - * @{ - */ -/** @file - * @brief CPU identification. - */ - -#ifndef KERN_arm32_CPU_H_ -#define KERN_arm32_CPU_H_ - -#include -#include - -enum { - ARM_MAX_CACHE_LEVELS = 7, -}; - -/** Struct representing ARM CPU identification. */ -typedef struct { - /** Implementor (vendor) number. */ - uint32_t imp_num; - - /** Variant number. */ - uint32_t variant_num; - - /** Architecture number. */ - uint32_t arch_num; - - /** Primary part number. */ - uint32_t prim_part_num; - - /** Revision number. */ - uint32_t rev_num; - - struct { - unsigned ways; - unsigned sets; - unsigned line_size; - unsigned way_shift; - unsigned set_shift; - } dcache[ARM_MAX_CACHE_LEVELS]; - unsigned dcache_levels; -} cpu_arch_t; - -#endif - -/** @} - */ Index: kernel/arch/arm32/include/cycle.h =================================================================== --- kernel/arch/arm32/include/cycle.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,67 +1,0 @@ -/* - * Copyright (c) 2007 Michal Kebrt - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup arm32 - * @{ - */ -/** @file - * @brief Count of CPU cycles. - */ - -#ifndef KERN_arm32_CYCLE_H_ -#define KERN_arm32_CYCLE_H_ - -#include -#include - -/** Return count of CPU cycles. - * - * No such instruction on ARM to get count of cycles. - * - * @return Count of CPU cycles. - * - */ -NO_TRACE static inline uint64_t get_cycle(void) -{ -#ifdef PROCESSOR_ARCH_armv7_a - if ((ID_PFR1_read() & ID_PFR1_GEN_TIMER_EXT_MASK) == - ID_PFR1_GEN_TIMER_EXT) { - uint32_t low = 0, high = 0; - asm volatile( "MRRC p15, 0, %[low], %[high], c14": [low]"=r"(low), [high]"=r"(high)); - return ((uint64_t)high << 32) | low; - } else { - return (uint64_t)PMCCNTR_read() * 64; - } -#endif - return 0; -} - -#endif - -/** @} - */ Index: kernel/arch/arm32/include/elf.h =================================================================== --- kernel/arch/arm32/include/elf.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,52 +1,0 @@ -/* - * Copyright (c) 2006 Sergey Bondari - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup arm32 - * @{ - */ -/** @file - * @brief ARM ELF constants. - */ - -#ifndef KERN_arm32_ELF_H_ -#define KERN_arm32_ELF_H_ - -#define ELF_MACHINE EM_ARM - -#ifdef __BE__ - #define ELF_DATA_ENCODING ELFDATA2MSB -#else - #define ELF_DATA_ENCODING ELFDATA2LSB -#endif - -#define ELF_CLASS ELFCLASS32 - -#endif - -/** @} - */ Index: kernel/arch/arm32/include/exception.h =================================================================== --- kernel/arch/arm32/include/exception.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,99 +1,0 @@ -/* - * Copyright (c) 2007 Michal Kebrt, Petr Stepan - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup arm32 - * @{ - */ -/** @file - * @brief Exception declarations. - */ - -#ifndef KERN_arm32_EXCEPTION_H_ -#define KERN_arm32_EXCEPTION_H_ - -#include -#include - -/** If defined, forces using of high exception vectors. */ -#define HIGH_EXCEPTION_VECTORS - -#ifdef HIGH_EXCEPTION_VECTORS - #define EXC_BASE_ADDRESS 0xffff0000 -#else - #define EXC_BASE_ADDRESS 0x0 -#endif - -/* Exception Vectors */ -#define EXC_RESET_VEC (EXC_BASE_ADDRESS + 0x0) -#define EXC_UNDEF_INSTR_VEC (EXC_BASE_ADDRESS + 0x4) -#define EXC_SWI_VEC (EXC_BASE_ADDRESS + 0x8) -#define EXC_PREFETCH_ABORT_VEC (EXC_BASE_ADDRESS + 0xc) -#define EXC_DATA_ABORT_VEC (EXC_BASE_ADDRESS + 0x10) -#define EXC_IRQ_VEC (EXC_BASE_ADDRESS + 0x18) -#define EXC_FIQ_VEC (EXC_BASE_ADDRESS + 0x1c) - -/* Exception numbers */ -#define EXC_RESET 0 -#define EXC_UNDEF_INSTR 1 -#define EXC_SWI 2 -#define EXC_PREFETCH_ABORT 3 -#define EXC_DATA_ABORT 4 -#define EXC_IRQ 5 -#define EXC_FIQ 6 - -/** Kernel stack pointer. - * - * It is set when thread switches to user mode, - * and then used for exception handling. - * - */ -extern uintptr_t supervisor_sp; - -/** Temporary exception stack pointer. - * - * Temporary stack is used in exceptions handling routines - * before switching to thread's kernel stack. - * - */ -extern uintptr_t exc_stack; - -extern void install_exception_handlers(void); -extern void exception_init(void); -extern void reset_exception_entry(void); -extern void irq_exception_entry(void); -extern void fiq_exception_entry(void); -extern void undef_instr_exception_entry(void); -extern void prefetch_abort_exception_entry(void); -extern void data_abort_exception_entry(void); -extern void swi_exception_entry(void); - -#endif - -/** @} - */ Index: kernel/arch/arm32/include/faddr.h =================================================================== --- kernel/arch/arm32/include/faddr.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,51 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup arm32 - * @{ - */ -/** @file - * @brief Function address conversion. - */ - -#ifndef KERN_arm32_FADDR_H_ -#define KERN_arm32_FADDR_H_ - -#include - -/** Calculate absolute address of function referenced by fptr pointer. - * - * @param fptr Function pointer. - * - */ -#define FADDR(fptr) ((uintptr_t) (fptr)) - -#endif - -/** @} - */ Index: kernel/arch/arm32/include/fpu_context.h =================================================================== --- kernel/arch/arm32/include/fpu_context.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,58 +1,0 @@ -/* - * Copyright (c) 2007 Michal Kebrt - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup arm32 - * @{ - */ -/** @file - * @brief FPU context. - */ - -#ifndef KERN_arm32_FPU_CONTEXT_H_ -#define KERN_arm32_FPU_CONTEXT_H_ - -#include - -#define FPU_CONTEXT_ALIGN 8 - -/* ARM Architecture reference manual, p B-1529. - */ -typedef struct { - uint32_t fpexc; - uint32_t fpscr; - uint32_t s[64]; -} fpu_context_t; - -void fpu_setup(void); - -bool handle_if_fpu_exception(void); - -#endif - -/** @} - */ Index: kernel/arch/arm32/include/interrupt.h =================================================================== --- kernel/arch/arm32/include/interrupt.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,58 +1,0 @@ -/* - * Copyright (c) 2007 Michal Kebrt - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup arm32interrupt - * @{ - */ -/** @file - * @brief Declarations of interrupt controlling routines. - */ - -#ifndef KERN_arm32_INTERRUPT_H_ -#define KERN_arm32_INTERRUPT_H_ - -#include -#include - -/** Initial size of exception dispatch table. */ -#define IVT_ITEMS 6 - -/** Index of the first item in exception dispatch table. */ -#define IVT_FIRST 0 - -extern void interrupt_init(void); -extern ipl_t interrupts_disable(void); -extern ipl_t interrupts_enable(void); -extern void interrupts_restore(ipl_t ipl); -extern ipl_t interrupts_read(void); -extern bool interrupts_disabled(void); - -#endif - -/** @} - */ Index: kernel/arch/arm32/include/istate.h =================================================================== --- kernel/arch/arm32/include/istate.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,105 +1,0 @@ -/* - * Copyright (c) 2007 Michal Kebrt, Petr Stepan - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup arm32interrupt - * @{ - */ - -#ifndef KERN_arm32_ISTATE_H_ -#define KERN_arm32_ISTATE_H_ - -#include - -#ifdef KERNEL - -#include - -#else /* KERNEL */ - -#include - -#endif /* KERNEL */ - -/** Struct representing CPU state saved when an exception occurs. */ -typedef struct istate { - uint32_t dummy; - uint32_t spsr; - uint32_t sp; - uint32_t lr; - - uint32_t r0; - uint32_t r1; - uint32_t r2; - uint32_t r3; - uint32_t r4; - uint32_t r5; - uint32_t r6; - uint32_t r7; - uint32_t r8; - uint32_t r9; - uint32_t r10; - uint32_t fp; - uint32_t r12; - - uint32_t pc; -} istate_t; - -/** Set Program Counter member of given istate structure. - * - * @param istate istate structure - * @param retaddr new value of istate's PC member - * - */ -NO_TRACE static inline void istate_set_retaddr(istate_t *istate, - uintptr_t retaddr) -{ - istate->pc = retaddr; -} - -/** Return true if exception happened while in userspace. */ -NO_TRACE static inline int istate_from_uspace(istate_t *istate) -{ - return (istate->spsr & STATUS_REG_MODE_MASK) == USER_MODE; -} - -/** Return Program Counter member of given istate structure. */ -NO_TRACE static inline uintptr_t istate_get_pc(istate_t *istate) -{ - return istate->pc; -} - -NO_TRACE static inline uintptr_t istate_get_fp(istate_t *istate) -{ - return istate->fp; -} - -#endif - -/** @} - */ Index: kernel/arch/arm32/include/mach/beagleboardxm/beagleboardxm.h =================================================================== --- kernel/arch/arm32/include/mach/beagleboardxm/beagleboardxm.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,48 +1,0 @@ -/* - * Copyright (c) 2012 Jan Vesely - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/** @addtogroup arm32beagleboardxm beagleboardxm - * @brief BeagleBoard-xM platform. - * @ingroup arm32 - * @{ - */ -/** @file - * @brief BeagleBoard platform driver. - */ - -#ifndef KERN_arm32_beagleboardxm_H_ -#define KERN_arm32_beagleboardxm_H_ - -#include - -extern struct arm_machine_ops bbxm_machine_ops; - -#endif - -/** @} - */ - Index: kernel/arch/arm32/include/mach/beaglebone/beaglebone.h =================================================================== --- kernel/arch/arm32/include/mach/beaglebone/beaglebone.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,48 +1,0 @@ -/* - * Copyright (c) 2012 Matteo Facchinetti - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/** @addtogroup arm32beaglebone beaglebone - * @brief BeagleBone platform. - * @ingroup arm32 - * @{ - */ -/** @file - * @brief BeagleBone platform driver. - */ - -#ifndef KERN_arm32_beaglebone_H_ -#define KERN_arm32_beaglebone_H_ - -#include - -extern struct arm_machine_ops bbone_machine_ops; - -#endif - -/** @} - */ - Index: kernel/arch/arm32/include/mach/gta02/gta02.h =================================================================== --- kernel/arch/arm32/include/mach/gta02/gta02.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,51 +1,0 @@ -/* - * Copyright (c) 2010 Jiri Svoboda - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup arm32gta02 GTA02 - * @brief Openmoko GTA02 platform. - * @ingroup arm32 - * @{ - */ -/** @file - * @brief Openmoko GTA02 platform driver. - */ - -#ifndef KERN_arm32_gta02_H_ -#define KERN_arm32_gta02_H_ - -#include - -extern struct arm_machine_ops gta02_machine_ops; - -/** Size of GTA02 IRQ number range (starting from 0) */ -#define GTA02_IRQ_COUNT 32 - -#endif - -/** @} - */ Index: kernel/arch/arm32/include/mach/integratorcp/integratorcp.h =================================================================== --- kernel/arch/arm32/include/mach/integratorcp/integratorcp.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,118 +1,0 @@ -/* - * Copyright (c) 2009 Vineeth Pillai - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup arm32integratorcp - * @brief Integratorcp machine specific parts. - * @ingroup arm32 - * @{ - */ -/** @file - * @brief Integratorcp peripheries drivers declarations. - */ - -#ifndef KERN_arm32_icp_H_ -#define KERN_arm32_icp_H_ - -#include - -/** Last interrupt number (beginning from 0) whose status is probed - * from interrupt controller - */ -#define ICP_IRQC_MAX_IRQ 8 -#define ICP_KBD_IRQ 3 -#define ICP_TIMER_IRQ 6 - -/** Timer frequency */ -#define ICP_TIMER_FREQ 10000 - -#define ICP_UART 0x16000000 -#define ICP_KBD 0x18000000 -#define ICP_KBD_STAT 0x04 -#define ICP_KBD_DATA 0x08 -#define ICP_KBD_INTR_STAT 0x10 -#define ICP_RTC 0x13000000 -#define ICP_RTC1_LOAD_OFFSET 0x100 -#define ICP_RTC1_READ_OFFSET 0x104 -#define ICP_RTC1_CTL_OFFSET 0x108 -#define ICP_RTC1_INTRCLR_OFFSET 0x10C -#define ICP_RTC1_INTRSTAT_OFFSET 0x114 -#define ICP_RTC1_BGLOAD_OFFSET 0x118 -#define ICP_RTC_CTL_VALUE 0x00E2 -#define ICP_IRQC 0x14000000 -#define ICP_IRQC_MASK_OFFSET 0xC -#define ICP_IRQC_UNMASK_OFFSET 0x8 -#define ICP_FB 0x00800000 -#define ICP_FB_FRAME (ICP_FB >> 12) -#define ICP_FB_NUM_FRAME 512 -#define ICP_VGA 0xC0000000 -#define ICP_CMCR 0x10000000 -#define ICP_SDRAM_MASK 0x1C -#define ICP_SDRAMCR_OFFSET 0x20 - -typedef struct { - uintptr_t uart; - uintptr_t kbd_ctrl; - uintptr_t kbd_stat; - uintptr_t kbd_data; - uintptr_t kbd_intstat; - uintptr_t rtc; - uintptr_t rtc1_load; - uintptr_t rtc1_read; - uintptr_t rtc1_ctl; - uintptr_t rtc1_intrclr; - uintptr_t rtc1_intrstat; - uintptr_t rtc1_bgload; - uintptr_t irqc; - uintptr_t irqc_mask; - uintptr_t irqc_unmask; - uintptr_t vga; - uintptr_t cmcr; - uintptr_t sdramcr; -} icp_hw_map_t; - - -extern void icp_init(void); -extern void icp_output_init(void); -extern void icp_input_init(void); -extern void icp_timer_irq_start(void); -extern void icp_cpu_halt(void); -extern void icp_irq_exception(unsigned int, istate_t *); -extern void icp_get_memory_extents(uintptr_t *, size_t *); -extern void icp_frame_init(void); -extern size_t icp_get_irq_count(void); -extern const char *icp_get_platform_name(void); - -extern struct arm_machine_ops icp_machine_ops; - -/** Size of IntegratorCP IRQ number range (starting from 0) */ -#define ICP_IRQ_COUNT 8 - -#endif - -/** @} - */ Index: kernel/arch/arm32/include/machine_func.h =================================================================== --- kernel/arch/arm32/include/machine_func.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,115 +1,0 @@ -/* - * Copyright (c) 2007 Michal Kebrt - * Copyright (c) 2009 Vineeth Pillai - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup arm32 - * @{ - */ -/** @file - * @brief Declarations of machine specific functions. - * - * These functions enable to differentiate more kinds of ARM emulators - * or CPUs. It's the same concept as "arch" functions on the architecture - * level. - */ - -#ifndef KERN_arm32_MACHINE_FUNC_H_ -#define KERN_arm32_MACHINE_FUNC_H_ - -#include -#include -#include - -struct arm_machine_ops { - void (*machine_init)(void); - void (*machine_timer_irq_start)(void); - void (*machine_cpu_halt)(void); - void (*machine_get_memory_extents)(uintptr_t *, size_t *); - void (*machine_irq_exception)(unsigned int, istate_t *); - void (*machine_frame_init)(void); - void (*machine_output_init)(void); - void (*machine_input_init)(void); - size_t (*machine_get_irq_count)(void); - const char *(*machine_get_platform_name)(void); -}; - -/** Pointer to arm_machine_ops structure being used. */ -extern struct arm_machine_ops *machine_ops; - -/** Initialize machine_ops pointer. */ -extern void machine_ops_init(void); - -/** Maps HW devices to the kernel address space using #hw_map. */ -extern void machine_init(void); - - -/** Starts timer. */ -extern void machine_timer_irq_start(void); - - -/** Halts CPU. */ -extern void machine_cpu_halt(void); - -/** Get extents of available memory. - * - * @param start Place to store memory start address. - * @param size Place to store memory size. - */ -extern void machine_get_memory_extents(uintptr_t *start, size_t *size); - -/** Interrupt exception handler. - * - * @param exc_no Interrupt exception number. - * @param istate Saved processor state. - */ -extern void machine_irq_exception(unsigned int exc_no, istate_t *istate); - - -/* - * Machine specific frame initialization - */ -extern void machine_frame_init(void); - -/* - * configure the serial line output device. - */ -extern void machine_output_init(void); - -/* - * configure the serial line input device. - */ -extern void machine_input_init(void); - -extern size_t machine_get_irq_count(void); - -extern const char * machine_get_platform_name(void); - -#endif - -/** @} - */ Index: kernel/arch/arm32/include/mm/as.h =================================================================== --- kernel/arch/arm32/include/mm/as.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,62 +1,0 @@ -/* - * Copyright (c) 2007 Pavel Jancik, Michal Kebrt - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup arm32mm - * @{ - */ -/** @file - * @brief Address space manipulating functions declarations. - */ - -#ifndef KERN_arm32_AS_H_ -#define KERN_arm32_AS_H_ - -#define KERNEL_ADDRESS_SPACE_SHADOWED_ARCH 0 - -#define KERNEL_ADDRESS_SPACE_START_ARCH UINT32_C(0x80000000) -#define KERNEL_ADDRESS_SPACE_END_ARCH UINT32_C(0xffffffff) -#define USER_ADDRESS_SPACE_START_ARCH UINT32_C(0x00000000) -#define USER_ADDRESS_SPACE_END_ARCH UINT32_C(0x7fffffff) - -typedef struct { -} as_arch_t; - -#include - -#define as_constructor_arch(as, flags) (as != as) -#define as_destructor_arch(as) (as != as) -#define as_create_arch(as, flags) (as != as) -#define as_deinstall_arch(as) -#define as_invalidate_translation_cache(as, page, cnt) - -extern void as_arch_init(void); - -#endif - -/** @} - */ Index: kernel/arch/arm32/include/mm/asid.h =================================================================== --- kernel/arch/arm32/include/mm/asid.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,58 +1,0 @@ -/* - * Copyright (c) 2007 Pavel Jancik, Michal Kebrt - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup arm32mm - * @{ - */ -/** @file - * @brief ASIDs related declarations. - * - * ARM CPUs doesn't support ASIDs. - */ - -#ifndef KERN_arm32_ASID_H_ -#define KERN_arm32_ASID_H_ - -#include - -#define ASID_MAX_ARCH 3 /* minimal required number */ - -typedef uint8_t asid_t; - -/* - * This works due to fact that this file is never included alone but only - * through "generic/include/mm/asid.h" where ASID_START is defined. - */ -#define asid_get() (ASID_START + 1) - -#define asid_put(asid) - -#endif - -/** @} - */ Index: kernel/arch/arm32/include/mm/frame.h =================================================================== --- kernel/arch/arm32/include/mm/frame.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,83 +1,0 @@ -/* - * Copyright (c) 2007 Pavel Jancik, Michal Kebrt - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup arm32mm - * @{ - */ -/** @file - * @brief Frame related declarations. - */ - -#ifndef KERN_arm32_FRAME_H_ -#define KERN_arm32_FRAME_H_ - -#define FRAME_WIDTH 12 /* 4KB frames */ -#define FRAME_SIZE (1 << FRAME_WIDTH) - -#ifndef __ASM__ - -#include - -#define BOOT_PAGE_TABLE_SIZE 0x4000 - -#ifdef MACHINE_gta02 - -#define PHYSMEM_START_ADDR 0x30008000 -#define BOOT_PAGE_TABLE_ADDRESS 0x30010000 - -#elif defined MACHINE_beagleboardxm - -#define PHYSMEM_START_ADDR 0x80000000 -#define BOOT_PAGE_TABLE_ADDRESS 0x80008000 - -#elif defined MACHINE_beaglebone - -#define PHYSMEM_START_ADDR 0x80000000 -#define BOOT_PAGE_TABLE_ADDRESS 0x80008000 - -#else - -#define PHYSMEM_START_ADDR 0x00000000 -#define BOOT_PAGE_TABLE_ADDRESS 0x00008000 - -#endif - -#define BOOT_PAGE_TABLE_START_FRAME (BOOT_PAGE_TABLE_ADDRESS >> FRAME_WIDTH) -#define BOOT_PAGE_TABLE_SIZE_IN_FRAMES (BOOT_PAGE_TABLE_SIZE >> FRAME_WIDTH) - -extern void frame_low_arch_init(void); -extern void frame_high_arch_init(void); -extern void boot_page_table_free(void); -#define physmem_print() - -#endif /* __ASM__ */ - -#endif - -/** @} - */ Index: kernel/arch/arm32/include/mm/km.h =================================================================== --- kernel/arch/arm32/include/mm/km.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,57 +1,0 @@ -/* - * Copyright (c) 2011 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup arm32mm - * @{ - */ -/** @file - */ - -#ifndef KERN_arm32_KM_H_ -#define KERN_arm32_KM_H_ - -#include - -#define KM_ARM32_IDENTITY_START UINT32_C(0x80000000) -#define KM_ARM32_IDENTITY_SIZE UINT32_C(0x70000000) - -#define KM_ARM32_NON_IDENTITY_START UINT32_C(0xf0000000) -/* - * The last virtual megabyte contains the high exception vectors (0xFFFF0000). - * Do not include this range into kernel non-identity. - */ -#define KM_ARM32_NON_IDENTITY_SIZE UINT32_C(0x0ff00000) - -extern void km_identity_arch_init(void); -extern void km_non_identity_arch_init(void); -extern bool km_is_non_identity_arch(uintptr_t); - -#endif - -/** @} - */ Index: kernel/arch/arm32/include/mm/page.h =================================================================== --- kernel/arch/arm32/include/mm/page.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,142 +1,0 @@ -/* - * Copyright (c) 2007 Pavel Jancik, Michal Kebrt - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup arm32mm - * @{ - */ -/** @file - * @brief Paging related declarations. - */ - -#ifndef KERN_arm32_PAGE_H_ -#define KERN_arm32_PAGE_H_ - -#include -#include -#include -#include -#include - -#define PAGE_WIDTH FRAME_WIDTH -#define PAGE_SIZE FRAME_SIZE - -#if (defined MACHINE_beagleboardxm) || (defined MACHINE_beaglebone) -#ifndef __ASM__ -# define KA2PA(x) ((uintptr_t) (x)) -# define PA2KA(x) ((uintptr_t) (x)) -#else -# define KA2PA(x) (x) -# define PA2KA(x) (x) -#endif -#else -#ifndef __ASM__ -# define KA2PA(x) (((uintptr_t) (x)) - 0x80000000) -# define PA2KA(x) (((uintptr_t) (x)) + 0x80000000) -#else -# define KA2PA(x) ((x) - 0x80000000) -# define PA2KA(x) ((x) + 0x80000000) -#endif -#endif - -/* Number of entries in each level. */ -#define PTL0_ENTRIES_ARCH (1 << 12) /* 4096 */ -#define PTL1_ENTRIES_ARCH 0 -#define PTL2_ENTRIES_ARCH 0 -/* coarse page tables used (256 * 4 = 1KB per page) */ -#define PTL3_ENTRIES_ARCH (1 << 8) /* 256 */ - -/* Page table sizes for each level. */ -#define PTL0_SIZE_ARCH FOUR_FRAMES -#define PTL1_SIZE_ARCH 0 -#define PTL2_SIZE_ARCH 0 -#define PTL3_SIZE_ARCH ONE_FRAME - -/* Macros calculating indices into page tables for each level. */ -#define PTL0_INDEX_ARCH(vaddr) (((vaddr) >> 20) & 0xfff) -#define PTL1_INDEX_ARCH(vaddr) 0 -#define PTL2_INDEX_ARCH(vaddr) 0 -#define PTL3_INDEX_ARCH(vaddr) (((vaddr) >> 12) & 0x0ff) - -/* Get PTE address accessors for each level. */ -#define GET_PTL1_ADDRESS_ARCH(ptl0, i) \ - ((pte_t *) ((((pte_t *)(ptl0))[(i)].l0).coarse_table_addr << 10)) -#define GET_PTL2_ADDRESS_ARCH(ptl1, i) \ - (ptl1) -#define GET_PTL3_ADDRESS_ARCH(ptl2, i) \ - (ptl2) -#define GET_FRAME_ADDRESS_ARCH(ptl3, i) \ - ((uintptr_t) ((((pte_t *)(ptl3))[(i)].l1).frame_base_addr << 12)) - -/* Set PTE address accessors for each level. */ -#define SET_PTL0_ADDRESS_ARCH(ptl0) \ - (set_ptl0_addr((pte_t *) (ptl0))) -#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) \ - (((pte_t *) (ptl0))[(i)].l0.coarse_table_addr = (a) >> 10) -#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a) -#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a) -#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) \ - (((pte_t *) (ptl3))[(i)].l1.frame_base_addr = (a) >> 12) - -/* Get PTE flags accessors for each level. */ -#define GET_PTL1_FLAGS_ARCH(ptl0, i) \ - get_pt_level0_flags((pte_t *) (ptl0), (size_t) (i)) -#define GET_PTL2_FLAGS_ARCH(ptl1, i) \ - PAGE_PRESENT -#define GET_PTL3_FLAGS_ARCH(ptl2, i) \ - PAGE_PRESENT -#define GET_FRAME_FLAGS_ARCH(ptl3, i) \ - get_pt_level1_flags((pte_t *) (ptl3), (size_t) (i)) - -/* Set PTE flags accessors for each level. */ -#define SET_PTL1_FLAGS_ARCH(ptl0, i, x) \ - set_pt_level0_flags((pte_t *) (ptl0), (size_t) (i), (x)) -#define SET_PTL2_FLAGS_ARCH(ptl1, i, x) -#define SET_PTL3_FLAGS_ARCH(ptl2, i, x) -#define SET_FRAME_FLAGS_ARCH(ptl3, i, x) \ - set_pt_level1_flags((pte_t *) (ptl3), (size_t) (i), (x)) - -/* Set PTE present bit accessors for each level. */ -#define SET_PTL1_PRESENT_ARCH(ptl0, i) \ - set_pt_level0_present((pte_t *) (ptl0), (size_t) (i)) -#define SET_PTL2_PRESENT_ARCH(ptl1, i) -#define SET_PTL3_PRESENT_ARCH(ptl2, i) -#define SET_FRAME_PRESENT_ARCH(ptl3, i) \ - set_pt_level1_present((pte_t *) (ptl3), (size_t) (i)) - -#if defined(PROCESSOR_ARCH_armv6) | defined(PROCESSOR_ARCH_armv7_a) -#include "page_armv6.h" -#elif defined(PROCESSOR_ARCH_armv4) | defined(PROCESSOR_ARCH_armv5) -#include "page_armv4.h" -#else -#error "Unsupported architecture" -#endif - -#endif - -/** @} - */ Index: kernel/arch/arm32/include/mm/page_armv4.h =================================================================== --- kernel/arch/arm32/include/mm/page_armv4.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,269 +1,0 @@ -/* - * Copyright (c) 2007 Pavel Jancik, Michal Kebrt - * Copyright (c) 2012 Jan Vesely - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup arm32mm - * @{ - */ -/** @file - * @brief Paging related declarations. - */ - -#ifndef KERN_arm32_PAGE_armv4_H_ -#define KERN_arm32_PAGE_armv4_H_ - -#ifndef KERN_arm32_PAGE_H_ -#error "Do not include arch specific page.h directly use generic page.h instead" -#endif - -/* Macros for querying the last-level PTE entries. */ -#define PTE_VALID_ARCH(pte) \ - (*((uint32_t *) (pte)) != 0) -#define PTE_PRESENT_ARCH(pte) \ - (((pte_t *) (pte))->l0.descriptor_type != 0) -#define PTE_GET_FRAME_ARCH(pte) \ - (((pte_t *) (pte))->l1.frame_base_addr << FRAME_WIDTH) -#define PTE_WRITABLE_ARCH(pte) \ - (((pte_t *) (pte))->l1.access_permission_0 == PTE_AP_USER_RW_KERNEL_RW) -#define PTE_EXECUTABLE_ARCH(pte) \ - 1 - -#ifndef __ASM__ - -/** Level 0 page table entry. */ -typedef struct { - /* 0b01 for coarse tables, see below for details */ - unsigned descriptor_type : 2; - unsigned impl_specific : 3; - unsigned domain : 4; - unsigned should_be_zero : 1; - - /* Pointer to the coarse 2nd level page table (holding entries for small - * (4KB) or large (64KB) pages. ARM also supports fine 2nd level page - * tables that may hold even tiny pages (1KB) but they are bigger (4KB - * per table in comparison with 1KB per the coarse table) - */ - unsigned coarse_table_addr : 22; -} ATTRIBUTE_PACKED pte_level0_t; - -/** Level 1 page table entry (small (4KB) pages used). */ -typedef struct { - - /* 0b10 for small pages */ - unsigned descriptor_type : 2; - unsigned bufferable : 1; - unsigned cacheable : 1; - - /* access permissions for each of 4 subparts of a page - * (for each 1KB when small pages used */ - unsigned access_permission_0 : 2; - unsigned access_permission_1 : 2; - unsigned access_permission_2 : 2; - unsigned access_permission_3 : 2; - unsigned frame_base_addr : 20; -} ATTRIBUTE_PACKED pte_level1_t; - -typedef union { - pte_level0_t l0; - pte_level1_t l1; -} pte_t; - -/* Level 1 page tables access permissions */ - -/** User mode: no access, privileged mode: no access. */ -#define PTE_AP_USER_NO_KERNEL_NO 0 - -/** User mode: no access, privileged mode: read/write. */ -#define PTE_AP_USER_NO_KERNEL_RW 1 - -/** User mode: read only, privileged mode: read/write. */ -#define PTE_AP_USER_RO_KERNEL_RW 2 - -/** User mode: read/write, privileged mode: read/write. */ -#define PTE_AP_USER_RW_KERNEL_RW 3 - - -/* pte_level0_t and pte_level1_t descriptor_type flags */ - -/** pte_level0_t and pte_level1_t "not present" flag (used in descriptor_type). */ -#define PTE_DESCRIPTOR_NOT_PRESENT 0 - -/** pte_level0_t coarse page table flag (used in descriptor_type). */ -#define PTE_DESCRIPTOR_COARSE_TABLE 1 - -/** pte_level1_t small page table flag (used in descriptor type). */ -#define PTE_DESCRIPTOR_SMALL_PAGE 2 - - -/** Sets the address of level 0 page table. - * - * @param pt Pointer to the page table to set. - * - */ -NO_TRACE static inline void set_ptl0_addr(pte_t *pt) -{ - asm volatile ( - "mcr p15, 0, %[pt], c2, c0, 0\n" - :: [pt] "r" (pt) - ); -} - - -/** Returns level 0 page table entry flags. - * - * @param pt Level 0 page table. - * @param i Index of the entry to return. - * - */ -NO_TRACE static inline int get_pt_level0_flags(pte_t *pt, size_t i) -{ - pte_level0_t *p = &pt[i].l0; - int np = (p->descriptor_type == PTE_DESCRIPTOR_NOT_PRESENT); - - return (np << PAGE_PRESENT_SHIFT) | (1 << PAGE_USER_SHIFT) | - (1 << PAGE_READ_SHIFT) | (1 << PAGE_WRITE_SHIFT) | - (1 << PAGE_EXEC_SHIFT) | (1 << PAGE_CACHEABLE_SHIFT); -} - -/** Returns level 1 page table entry flags. - * - * @param pt Level 1 page table. - * @param i Index of the entry to return. - * - */ -NO_TRACE static inline int get_pt_level1_flags(pte_t *pt, size_t i) -{ - pte_level1_t *p = &pt[i].l1; - - int dt = p->descriptor_type; - int ap = p->access_permission_0; - - return ((dt == PTE_DESCRIPTOR_NOT_PRESENT) << PAGE_PRESENT_SHIFT) | - ((ap == PTE_AP_USER_RO_KERNEL_RW) << PAGE_READ_SHIFT) | - ((ap == PTE_AP_USER_RW_KERNEL_RW) << PAGE_READ_SHIFT) | - ((ap == PTE_AP_USER_RW_KERNEL_RW) << PAGE_WRITE_SHIFT) | - ((ap != PTE_AP_USER_NO_KERNEL_RW) << PAGE_USER_SHIFT) | - ((ap == PTE_AP_USER_NO_KERNEL_RW) << PAGE_READ_SHIFT) | - ((ap == PTE_AP_USER_NO_KERNEL_RW) << PAGE_WRITE_SHIFT) | - (1 << PAGE_EXEC_SHIFT) | - (p->bufferable << PAGE_CACHEABLE); -} - -/** Sets flags of level 0 page table entry. - * - * @param pt level 0 page table - * @param i index of the entry to be changed - * @param flags new flags - * - */ -NO_TRACE static inline void set_pt_level0_flags(pte_t *pt, size_t i, int flags) -{ - pte_level0_t *p = &pt[i].l0; - - if (flags & PAGE_NOT_PRESENT) { - p->descriptor_type = PTE_DESCRIPTOR_NOT_PRESENT; - /* - * Ensures that the entry will be recognized as valid when - * PTE_VALID_ARCH applied. - */ - p->should_be_zero = 1; - } else { - p->descriptor_type = PTE_DESCRIPTOR_COARSE_TABLE; - p->should_be_zero = 0; - } -} - - -/** Sets flags of level 1 page table entry. - * - * We use same access rights for the whole page. When page - * is not preset we store 1 in acess_rigts_3 so that at least - * one bit is 1 (to mark correct page entry, see #PAGE_VALID_ARCH). - * - * @param pt Level 1 page table. - * @param i Index of the entry to be changed. - * @param flags New flags. - * - */ -NO_TRACE static inline void set_pt_level1_flags(pte_t *pt, size_t i, int flags) -{ - pte_level1_t *p = &pt[i].l1; - - if (flags & PAGE_NOT_PRESENT) - p->descriptor_type = PTE_DESCRIPTOR_NOT_PRESENT; - else - p->descriptor_type = PTE_DESCRIPTOR_SMALL_PAGE; - - p->cacheable = p->bufferable = (flags & PAGE_CACHEABLE) != 0; - - /* default access permission */ - p->access_permission_0 = p->access_permission_1 = - p->access_permission_2 = p->access_permission_3 = - PTE_AP_USER_NO_KERNEL_RW; - - if (flags & PAGE_USER) { - if (flags & PAGE_READ) { - p->access_permission_0 = p->access_permission_1 = - p->access_permission_2 = p->access_permission_3 = - PTE_AP_USER_RO_KERNEL_RW; - } - if (flags & PAGE_WRITE) { - p->access_permission_0 = p->access_permission_1 = - p->access_permission_2 = p->access_permission_3 = - PTE_AP_USER_RW_KERNEL_RW; - } - } -} - -NO_TRACE static inline void set_pt_level0_present(pte_t *pt, size_t i) -{ - pte_level0_t *p = &pt[i].l0; - - p->should_be_zero = 0; - write_barrier(); - p->descriptor_type = PTE_DESCRIPTOR_COARSE_TABLE; -} - - -NO_TRACE static inline void set_pt_level1_present(pte_t *pt, size_t i) -{ - pte_level1_t *p = &pt[i].l1; - - p->descriptor_type = PTE_DESCRIPTOR_SMALL_PAGE; -} - - -extern void page_arch_init(void); - - -#endif /* __ASM__ */ - -#endif - -/** @} - */ Index: kernel/arch/arm32/include/mm/page_armv6.h =================================================================== --- kernel/arch/arm32/include/mm/page_armv6.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,285 +1,0 @@ -/* - * Copyright (c) 2012 Jan Vesely - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup arm32mm - * @{ - */ -/** @file - * @brief Paging related declarations. - */ - -#ifndef KERN_arm32_PAGE_armv7_H_ -#define KERN_arm32_PAGE_armv7_H_ - -#ifndef KERN_arm32_PAGE_H_ -#error "Do not include arch specific page.h directly use generic page.h instead" -#endif - -/* Macros for querying the last-level PTE entries. */ -#define PTE_VALID_ARCH(pte) \ - (*((uint32_t *) (pte)) != 0) -#define PTE_PRESENT_ARCH(pte) \ - (((pte_t *) (pte))->l0.descriptor_type != 0) -#define PTE_GET_FRAME_ARCH(pte) \ - (((pte_t *) (pte))->l1.frame_base_addr << FRAME_WIDTH) -#define PTE_WRITABLE_ARCH(pte) \ - (((pte_t *) (pte))->l1.access_permission_1 != PTE_AP1_RO) -#define PTE_EXECUTABLE_ARCH(pte) \ - (((pte_t *) (pte))->l1.descriptor_type != PTE_DESCRIPTOR_SMALL_PAGE_NX) - -#ifndef __ASM__ - -/** Level 0 page table entry. */ -typedef struct { - /* 0b01 for coarse tables, see below for details */ - unsigned descriptor_type : 2; - unsigned pxn : 1; - unsigned ns : 1; - unsigned should_be_zero_0 : 1; - unsigned domain : 4; - unsigned should_be_zero_1 : 1; - - /* Pointer to the coarse 2nd level page table (holding entries for small - * (4KB) or large (64KB) pages. ARM also supports fine 2nd level page - * tables that may hold even tiny pages (1KB) but they are bigger (4KB - * per table in comparison with 1KB per the coarse table) - */ - unsigned coarse_table_addr : 22; -} ATTRIBUTE_PACKED pte_level0_t; - -/** Level 1 page table entry (small (4KB) pages used). */ -typedef struct { - - /* 0b10 for small pages, 0b11 for NX small pages */ - unsigned descriptor_type : 2; - unsigned bufferable : 1; - unsigned cacheable : 1; - unsigned access_permission_0 : 2; - unsigned tex : 3; - unsigned access_permission_1 : 1; - unsigned shareable : 1; - unsigned non_global : 1; - unsigned frame_base_addr : 20; -} ATTRIBUTE_PACKED pte_level1_t; - -typedef union { - pte_level0_t l0; - pte_level1_t l1; -} pte_t; - -/* Level 1 page tables access permissions */ - -/** User mode: no access, privileged mode: no access. */ -#define PTE_AP0_USER_NO_KERNEL_NO 0 - -/** User mode: no access, privileged mode: read/write. */ -#define PTE_AP0_USER_NO_KERNEL_FULL 1 - -/** User mode: read only, privileged mode: read/write. */ -#define PTE_AP0_USER_LIMITED_KERNEL_FULL 2 - -/** User mode: read/write, privileged mode: read/write. */ -#define PTE_AP0_USER_FULL_KERNEL_FULL 3 - -/** Allow writes */ -#define PTE_AP1_RO 1 - - -/* pte_level0_t and pte_level1_t descriptor_type flags */ - -/** pte_level0_t and pte_level1_t "not present" flag (used in descriptor_type). */ -#define PTE_DESCRIPTOR_NOT_PRESENT 0 - -/** pte_level0_t coarse page table flag (used in descriptor_type). */ -#define PTE_DESCRIPTOR_COARSE_TABLE 1 - -/** pte_level1_t small page table flag (used in descriptor type). */ -#define PTE_DESCRIPTOR_SMALL_PAGE 2 - -/** pte_level1_t small page table flag with NX (used in descriptor type). */ -#define PTE_DESCRIPTOR_SMALL_PAGE_NX 3 - -/** Sets the address of level 0 page table. - * - * @param pt Pointer to the page table to set. - * - */ -NO_TRACE static inline void set_ptl0_addr(pte_t *pt) -{ - asm volatile ( - "mcr p15, 0, %[pt], c2, c0, 0\n" - :: [pt] "r" (pt) - ); -} - - -/** Returns level 0 page table entry flags. - * - * @param pt Level 0 page table. - * @param i Index of the entry to return. - * - */ -NO_TRACE static inline int get_pt_level0_flags(pte_t *pt, size_t i) -{ - const pte_level0_t *p = &pt[i].l0; - const unsigned np = (p->descriptor_type == PTE_DESCRIPTOR_NOT_PRESENT); - - return (np << PAGE_PRESENT_SHIFT) | (1 << PAGE_USER_SHIFT) | - (1 << PAGE_READ_SHIFT) | (1 << PAGE_WRITE_SHIFT) | - (1 << PAGE_EXEC_SHIFT) | (1 << PAGE_CACHEABLE_SHIFT); -} - -/** Returns level 1 page table entry flags. - * - * @param pt Level 1 page table. - * @param i Index of the entry to return. - * - */ -NO_TRACE static inline int get_pt_level1_flags(pte_t *pt, size_t i) -{ - const pte_level1_t *p = &pt[i].l1; - - const unsigned dt = p->descriptor_type; - const unsigned ap0 = p->access_permission_0; - const unsigned ap1 = p->access_permission_1; - - return ((dt == PTE_DESCRIPTOR_NOT_PRESENT) << PAGE_PRESENT_SHIFT) | - ((dt != PTE_DESCRIPTOR_SMALL_PAGE_NX) << PAGE_EXEC_SHIFT) | - ((ap0 == PTE_AP0_USER_LIMITED_KERNEL_FULL) << PAGE_READ_SHIFT) | - ((ap0 == PTE_AP0_USER_FULL_KERNEL_FULL) << PAGE_READ_SHIFT) | - ((ap0 == PTE_AP0_USER_NO_KERNEL_FULL) << PAGE_READ_SHIFT) | - ((ap0 != PTE_AP0_USER_NO_KERNEL_FULL) << PAGE_USER_SHIFT) | - (((ap1 != PTE_AP1_RO) && (ap0 == PTE_AP0_USER_FULL_KERNEL_FULL)) << PAGE_WRITE_SHIFT) | - (((ap1 != PTE_AP1_RO) && (ap0 == PTE_AP0_USER_NO_KERNEL_FULL)) << PAGE_WRITE_SHIFT) | - (p->bufferable << PAGE_CACHEABLE); -} - -/** Sets flags of level 0 page table entry. - * - * @param pt level 0 page table - * @param i index of the entry to be changed - * @param flags new flags - * - */ -NO_TRACE static inline void set_pt_level0_flags(pte_t *pt, size_t i, int flags) -{ - pte_level0_t *p = &pt[i].l0; - - if (flags & PAGE_NOT_PRESENT) { - p->descriptor_type = PTE_DESCRIPTOR_NOT_PRESENT; - /* - * Ensures that the entry will be recognized as valid when - * PTE_VALID_ARCH applied. - */ - p->should_be_zero_0 = 1; - p->should_be_zero_1 = 1; - } else { - p->descriptor_type = PTE_DESCRIPTOR_COARSE_TABLE; - p->should_be_zero_0 = 0; - p->should_be_zero_1 = 0; - p->domain = 0; - p->ns = 0; - } -} - - -/** Sets flags of level 1 page table entry. - * - * We use same access rights for the whole page. When page - * is not preset we store 1 in acess_rigts_3 so that at least - * one bit is 1 (to mark correct page entry, see #PAGE_VALID_ARCH). - * - * @param pt Level 1 page table. - * @param i Index of the entry to be changed. - * @param flags New flags. - * - */ -NO_TRACE static inline void set_pt_level1_flags(pte_t *pt, size_t i, int flags) -{ - pte_level1_t *p = &pt[i].l1; - - if (flags & PAGE_NOT_PRESENT) { - p->descriptor_type = PTE_DESCRIPTOR_NOT_PRESENT; - } else { - if (flags & PAGE_EXEC) - p->descriptor_type = PTE_DESCRIPTOR_SMALL_PAGE; - else - p->descriptor_type = PTE_DESCRIPTOR_SMALL_PAGE_NX; - } - - /* tex=0 buf=1 and cache=1 => normal memory - * tex=0 buf=1 and cache=0 => shareable device mmio - */ - p->cacheable = (flags & PAGE_CACHEABLE); - p->bufferable = 1; - p->tex = 0; - - /* Shareable is ignored for devices (non-cacheable), - * turn it on for normal memory. */ - p->shareable = 1; - - p->non_global = !(flags & PAGE_GLOBAL); - - /* default access permission: kernel only*/ - p->access_permission_0 = PTE_AP0_USER_NO_KERNEL_FULL; - - if (flags & PAGE_USER) { - p->access_permission_0 = PTE_AP0_USER_FULL_KERNEL_FULL; - // TODO Fix kernel to use PAGE_WRITE flag properly and - // apply this for kernel pages as well. - if (!(flags & PAGE_WRITE)) - p->access_permission_1 = PTE_AP1_RO; - } -} - -NO_TRACE static inline void set_pt_level0_present(pte_t *pt, size_t i) -{ - pte_level0_t *p = &pt[i].l0; - - p->should_be_zero_0 = 0; - p->should_be_zero_1 = 0; - write_barrier(); - p->descriptor_type = PTE_DESCRIPTOR_COARSE_TABLE; -} - -NO_TRACE static inline void set_pt_level1_present(pte_t *pt, size_t i) -{ - pte_level1_t *p = &pt[i].l1; - - p->descriptor_type = PTE_DESCRIPTOR_SMALL_PAGE; -} - - -extern void page_arch_init(void); - -#endif /* __ASM__ */ - -#endif - -/** @} - */ Index: kernel/arch/arm32/include/mm/page_fault.h =================================================================== --- kernel/arch/arm32/include/mm/page_fault.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,105 +1,0 @@ -/* - * Copyright (c) 2007 Pavel Jancik, Michal Kebrt - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup arm32mm - * @{ - */ -/** @file - * @brief Page fault related declarations. - */ - -#ifndef KERN_arm32_PAGE_FAULT_H_ -#define KERN_arm32_PAGE_FAULT_H_ - -#include - - -/** Decribes CP15 "fault status register" (FSR). - * - * "VMSAv6 added a fifth fault status bit (bit[10]) to both the IFSR and DFSR. - * It is IMPLEMENTATION DEFINED how this bit is encoded in earlier versions of - * the architecture. A write flag (bit[11] of the DFSR) has also been - * introduced." - * ARM Architecture Reference Manual version i ch. B4.6 (PDF p. 719) - * - * See ARM Architecture Reference Manual ch. B4.9.6 (pdf p.743). for FSR info - */ -typedef union { - struct { - unsigned status : 4; - unsigned domain : 4; - unsigned zero : 1; - unsigned lpae : 1; /**< Needs LPAE support implemented */ - unsigned fs : 1; /**< armv6+ mandated, earlier IPLM. DEFINED */ - unsigned wr : 1; /**< armv6+ only */ - unsigned ext : 1 ; /**< external abort */ - unsigned cm : 1; /**< Cache maintenance, needs LPAE support */ - unsigned should_be_zero : 18; - } data; - struct { - unsigned status : 4; - unsigned sbz0 : 6; - unsigned fs : 1; - unsigned should_be_zero : 21; - } inst; - uint32_t raw; -} fault_status_t; - - -/** Simplified description of instruction code. - * - * @note Used for recognizing memory access instructions. - * @see ARM architecture reference (chapter 3.1) - */ -typedef struct { - unsigned dummy1 : 4; - unsigned bit4 : 1; - unsigned bits567 : 3; - unsigned dummy : 12; - unsigned access : 1; - unsigned opcode : 4; - unsigned type : 3; - unsigned condition : 4; -} ATTRIBUTE_PACKED instruction_t; - - -/** Help union used for casting pc register (uint_32_t) value into - * #instruction_t pointer. - */ -typedef union { - instruction_t *instr; - uint32_t pc; -} instruction_union_t; - -extern void prefetch_abort(unsigned int, istate_t *); -extern void data_abort(unsigned int, istate_t *); - -#endif - -/** @} - */ Index: kernel/arch/arm32/include/mm/tlb.h =================================================================== --- kernel/arch/arm32/include/mm/tlb.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,42 +1,0 @@ -/* - * Copyright (c) 2007 Pavel Jancik - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup arm32mm - * @{ - */ -/** @file - * @brief TLB related declarations. - */ - -#ifndef KERN_arm32_TLB_H_ -#define KERN_arm32_TLB_H_ - -#endif - -/** @} - */ Index: kernel/arch/arm32/include/proc/task.h =================================================================== --- kernel/arch/arm32/include/proc/task.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,48 +1,0 @@ -/* - * Copyright (c) 2006 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup arm32proc - * @{ - */ -/** @file - * @brief Task related declarations. - */ - -#ifndef KERN_arm32_TASK_H_ -#define KERN_arm32_TASK_H_ - -typedef struct { -} task_arch_t; - -#define task_create_arch(t) -#define task_destroy_arch(t) - -#endif - -/** @} - */ Index: kernel/arch/arm32/include/proc/thread.h =================================================================== --- kernel/arch/arm32/include/proc/thread.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,49 +1,0 @@ -/* - * Copyright (c) 2003-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup arm32proc - * @{ - */ -/** @file - * @brief Thread related declarations. - */ - -#ifndef KERN_arm32_THREAD_H_ -#define KERN_arm32_THREAD_H_ - -typedef struct { -} thread_arch_t; - -#define thr_constructor_arch(t) -#define thr_destructor_arch(t) -#define thread_create_arch(t) - -#endif - -/** @} - */ Index: kernel/arch/arm32/include/ras.h =================================================================== --- kernel/arch/arm32/include/ras.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,53 +1,0 @@ -/* - * Copyright (c) 2009 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup arm32 - * @{ - */ -/** @file - * @brief Declarations related to Restartable Atomic Sequences. - */ - -#ifndef KERN_arm32_RAS_H_ -#define KERN_arm32_RAS_H_ - -#include -#include - -#define RAS_START 0 -#define RAS_END 1 - -extern uintptr_t *ras_page; - -extern void ras_init(void); -extern void ras_check(unsigned int, istate_t *); - -#endif - -/** @} - */ Index: kernel/arch/arm32/include/regutils.h =================================================================== --- kernel/arch/arm32/include/regutils.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,91 +1,0 @@ -/* - * Copyright (c) 2007 Petr Stepan - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup arm32 - * @{ - */ -/** - * @file - * @brief Utilities for convenient manipulation with ARM registers. - */ - -#ifndef KERN_arm32_REGUTILS_H_ -#define KERN_arm32_REGUTILS_H_ - -#define STATUS_REG_IRQ_DISABLED_BIT (1 << 7) -#define STATUS_REG_MODE_MASK 0x1f - -/* ARM Processor Operation Modes */ -enum { - USER_MODE = 0x10, - FIQ_MODE = 0x11, - IRQ_MODE = 0x12, - SUPERVISOR_MODE = 0x13, - MONITOR_MODE = 0x16, - ABORT_MODE = 0x17, - HYPERVISOR_MODE = 0x1a, - UNDEFINED_MODE = 0x1b, - SYSTEM_MODE = 0x1f, - MODE_MASK = 0x1f, -}; -/* [CS]PRS manipulation macros */ -#define GEN_STATUS_READ(nm, reg) \ - static inline uint32_t nm## _status_reg_read(void) \ - { \ - uint32_t retval; \ - \ - asm volatile ( \ - "mrs %[retval], " #reg \ - : [retval] "=r" (retval) \ - ); \ - \ - return retval; \ - } - -#define GEN_STATUS_WRITE(nm, reg, fieldname, field) \ - static inline void nm## _status_reg_ ##fieldname## _write(uint32_t value) \ - { \ - asm volatile ( \ - "msr " #reg "_" #field ", %[value]" \ - :: [value] "r" (value) \ - ); \ - } - -/** Return the value of CPSR (Current Program Status Register). */ -GEN_STATUS_READ(current, cpsr); - -/** Set control bits of CPSR. */ -GEN_STATUS_WRITE(current, cpsr, control, c); - -/** Return the value of SPSR (Saved Program Status Register). */ -GEN_STATUS_READ(saved, spsr); - -#endif - -/** @} - */ Index: kernel/arch/arm32/include/security_ext.h =================================================================== --- kernel/arch/arm32/include/security_ext.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,85 +1,0 @@ -/* - * Copyright (c) 2013 Jan Vesely - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup arm32 - * @{ - */ -/** @file - * @brief Security Extensions Routines - */ - -#ifndef KERN_arm32_SECURITY_EXT_H_ -#define KERN_arm32_SECURITY_EXT_H_ - -#include -#include - -/** Test whether the current cpu supports security extensions. - * return true if security extensions are supported, false otherwise. - * @note The Processor Feature Register 1 that provides this information - * is available only on armv7+. This function returns false on all\ - * older archs. - */ -static inline bool sec_ext_is_implemented() -{ -#ifdef PROCESSOR_ARCH_armv7_a - const uint32_t idpfr = ID_PFR1_read() & ID_PFR1_SEC_EXT_MASK; - return idpfr == ID_PFR1_SEC_EXT || idpfr == ID_PFR1_SEC_EXT_RFR; -#endif - return false; -} - -/** Test whether we are running in monitor mode. - * return true, if the current mode is Monitor mode, false otherwise. - * @note this is safe to call even on machines that do not implement monitor - * mode. - */ -static inline bool sec_ext_is_monitor_mode() -{ - return (current_status_reg_read() & MODE_MASK) == MONITOR_MODE; -} - -/** Test whether we are running in a secure state. - * return true if the current state is secure, false otherwise. - * - * @note: This functions will cause undef isntruction trap if we - * are not running in the secure state. - * - * @note: u-boot enables non-secure access to cp 10/11, as well as some other - * features and switches to non-secure state during boot. - * Look for 'secureworld_exit' in arch/arm/cpu/armv7/omap3/board.c. - */ -static inline bool sec_ext_is_secure() -{ - return sec_ext_is_implemented() - && (sec_ext_is_monitor_mode() || !(SCR_read() & SCR_NS_FLAG)); -} - -#endif -/** @} - */ Index: kernel/arch/arm32/include/stack.h =================================================================== --- kernel/arch/arm32/include/stack.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,49 +1,0 @@ -/* - * Copyright (c) 2007 Michal Kebrt - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup arm32 - * @{ - */ -/** @file - * @brief Stack constants. - */ - -#ifndef KERN_arm32_STACK_H_ -#define KERN_arm32_STACK_H_ - -#define STACK_ITEM_SIZE 4 - -/** See ABI for - * details - */ -#define STACK_ALIGNMENT 8 - -#endif - -/** @} - */ Index: kernel/arch/arm32/include/types.h =================================================================== --- kernel/arch/arm32/include/types.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,71 +1,0 @@ -/* - * Copyright (c) 2007 Pavel Jancik, Michal Kebrt - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup arm32 - * @{ - */ -/** @file - * @brief Type definitions. - */ - -#ifndef KERN_arm32_TYPES_H_ -#define KERN_arm32_TYPES_H_ - -#ifndef DOXYGEN - #define ATTRIBUTE_PACKED __attribute__((packed)) -#else - #define ATTRIBUTE_PACKED -#endif - -typedef uint32_t size_t; -typedef int32_t ssize_t; - -typedef uint32_t uintptr_t; -typedef uint32_t pfn_t; - -typedef uint32_t ipl_t; - -typedef uint32_t sysarg_t; -typedef int32_t native_t; -typedef uint32_t atomic_count_t; - -typedef struct { -} fncptr_t; - -#define INTN_C(c) INT32_C(c) -#define UINTN_C(c) UINT32_C(c) - -#define PRIdn PRId32 /**< Format for native_t. */ -#define PRIun PRIu32 /**< Format for sysarg_t. */ -#define PRIxn PRIx32 /**< Format for hexadecimal sysarg_t. */ -#define PRIua PRIu32 /**< Format for atomic_count_t. */ - -#endif - -/** @} - */ Index: kernel/arch/ia32/include/arch.h =================================================================== --- kernel/arch/ia32/include/arch.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,45 +1,0 @@ -/* - * Copyright (c) 2009 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia32 - * @{ - */ -/** @file - */ - -#ifndef KERN_ia32_ARCH_H_ -#define KERN_ia32_ARCH_H_ - -#include - -extern void arch_pre_main(uint32_t, void *); - -#endif - -/** @} - */ Index: kernel/arch/ia32/include/arch/arch.h =================================================================== --- kernel/arch/ia32/include/arch/arch.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ia32/include/arch/arch.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2009 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia32 + * @{ + */ +/** @file + */ + +#ifndef KERN_ia32_ARCH_H_ +#define KERN_ia32_ARCH_H_ + +#include + +extern void arch_pre_main(uint32_t, void *); + +#endif + +/** @} + */ Index: kernel/arch/ia32/include/arch/asm.h =================================================================== --- kernel/arch/ia32/include/arch/asm.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ia32/include/arch/asm.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,521 @@ +/* + * Copyright (c) 2001-2004 Jakub Jermar + * Copyright (c) 2005 Sergey Bondari + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia32 + * @{ + */ +/** @file + */ + +#ifndef KERN_ia32_ASM_H_ +#define KERN_ia32_ASM_H_ + +#include +#include +#include +#include +#include + +/** Halt CPU + * + * Halt the current CPU. + * + */ +NO_TRACE static inline __attribute__((noreturn)) void cpu_halt(void) +{ + while (true) { + asm volatile ( + "hlt\n" + ); + } +} + +NO_TRACE static inline void cpu_sleep(void) +{ + asm volatile ( + "hlt\n" + ); +} + +#define GEN_READ_REG(reg) NO_TRACE static inline sysarg_t read_ ##reg (void) \ + { \ + sysarg_t res; \ + asm volatile ( \ + "movl %%" #reg ", %[res]" \ + : [res] "=r" (res) \ + ); \ + return res; \ + } + +#define GEN_WRITE_REG(reg) NO_TRACE static inline void write_ ##reg (sysarg_t regn) \ + { \ + asm volatile ( \ + "movl %[regn], %%" #reg \ + :: [regn] "r" (regn) \ + ); \ + } + +GEN_READ_REG(cr0) +GEN_READ_REG(cr2) +GEN_READ_REG(cr3) +GEN_WRITE_REG(cr3) + +GEN_READ_REG(dr0) +GEN_READ_REG(dr1) +GEN_READ_REG(dr2) +GEN_READ_REG(dr3) +GEN_READ_REG(dr6) +GEN_READ_REG(dr7) + +GEN_WRITE_REG(dr0) +GEN_WRITE_REG(dr1) +GEN_WRITE_REG(dr2) +GEN_WRITE_REG(dr3) +GEN_WRITE_REG(dr6) +GEN_WRITE_REG(dr7) + +#define IO_SPACE_BOUNDARY ((void *) (64 * 1024)) + +/** Byte to port + * + * Output byte to port + * + * @param port Port to write to + * @param val Value to write + * + */ +NO_TRACE static inline void pio_write_8(ioport8_t *port, uint8_t val) +{ + if (port < (ioport8_t *) IO_SPACE_BOUNDARY) { + asm volatile ( + "outb %b[val], %w[port]\n" + :: [val] "a" (val), [port] "d" (port) + ); + } else + *port = val; +} + +/** Word to port + * + * Output word to port + * + * @param port Port to write to + * @param val Value to write + * + */ +NO_TRACE static inline void pio_write_16(ioport16_t *port, uint16_t val) +{ + if (port < (ioport16_t *) IO_SPACE_BOUNDARY) { + asm volatile ( + "outw %w[val], %w[port]\n" + :: [val] "a" (val), [port] "d" (port) + ); + } else + *port = val; +} + +/** Double word to port + * + * Output double word to port + * + * @param port Port to write to + * @param val Value to write + * + */ +NO_TRACE static inline void pio_write_32(ioport32_t *port, uint32_t val) +{ + if (port < (ioport32_t *) IO_SPACE_BOUNDARY) { + asm volatile ( + "outl %[val], %w[port]\n" + :: [val] "a" (val), [port] "d" (port) + ); + } else + *port = val; +} + +/** Byte from port + * + * Get byte from port + * + * @param port Port to read from + * @return Value read + * + */ +NO_TRACE static inline uint8_t pio_read_8(ioport8_t *port) +{ + if (((void *)port) < IO_SPACE_BOUNDARY) { + uint8_t val; + + asm volatile ( + "inb %w[port], %b[val]\n" + : [val] "=a" (val) + : [port] "d" (port) + ); + + return val; + } else + return (uint8_t) *port; +} + +/** Word from port + * + * Get word from port + * + * @param port Port to read from + * @return Value read + * + */ +NO_TRACE static inline uint16_t pio_read_16(ioport16_t *port) +{ + if (((void *)port) < IO_SPACE_BOUNDARY) { + uint16_t val; + + asm volatile ( + "inw %w[port], %w[val]\n" + : [val] "=a" (val) + : [port] "d" (port) + ); + + return val; + } else + return (uint16_t) *port; +} + +/** Double word from port + * + * Get double word from port + * + * @param port Port to read from + * @return Value read + * + */ +NO_TRACE static inline uint32_t pio_read_32(ioport32_t *port) +{ + if (((void *)port) < IO_SPACE_BOUNDARY) { + uint32_t val; + + asm volatile ( + "inl %w[port], %[val]\n" + : [val] "=a" (val) + : [port] "d" (port) + ); + + return val; + } else + return (uint32_t) *port; +} + +/** Enable interrupts. + * + * Enable interrupts and return previous + * value of EFLAGS. + * + * @return Old interrupt priority level. + * + */ +NO_TRACE static inline ipl_t interrupts_enable(void) +{ + ipl_t v; + + asm volatile ( + "pushf\n" + "popl %[v]\n" + "sti\n" + : [v] "=r" (v) + ); + + return v; +} + +/** Disable interrupts. + * + * Disable interrupts and return previous + * value of EFLAGS. + * + * @return Old interrupt priority level. + * + */ +NO_TRACE static inline ipl_t interrupts_disable(void) +{ + ipl_t v; + + asm volatile ( + "pushf\n" + "popl %[v]\n" + "cli\n" + : [v] "=r" (v) + ); + + return v; +} + +/** Restore interrupt priority level. + * + * Restore EFLAGS. + * + * @param ipl Saved interrupt priority level. + * + */ +NO_TRACE static inline void interrupts_restore(ipl_t ipl) +{ + asm volatile ( + "pushl %[ipl]\n" + "popf\n" + :: [ipl] "r" (ipl) + ); +} + +/** Return interrupt priority level. + * + * @return EFLAFS. + * + */ +NO_TRACE static inline ipl_t interrupts_read(void) +{ + ipl_t v; + + asm volatile ( + "pushf\n" + "popl %[v]\n" + : [v] "=r" (v) + ); + + return v; +} + +/** Check interrupts state. + * + * @return True if interrupts are disabled. + * + */ +NO_TRACE static inline bool interrupts_disabled(void) +{ + ipl_t v; + + asm volatile ( + "pushf\n" + "popl %[v]\n" + : [v] "=r" (v) + ); + + return ((v & EFLAGS_IF) == 0); +} + +#ifndef PROCESSOR_i486 + +/** Write to MSR */ +NO_TRACE static inline void write_msr(uint32_t msr, uint64_t value) +{ + asm volatile ( + "wrmsr" + :: "c" (msr), + "a" ((uint32_t) (value)), + "d" ((uint32_t) (value >> 32)) + ); +} + +NO_TRACE static inline uint64_t read_msr(uint32_t msr) +{ + uint32_t ax, dx; + + asm volatile ( + "rdmsr" + : "=a" (ax), + "=d" (dx) + : "c" (msr) + ); + + return ((uint64_t) dx << 32) | ax; +} + +#endif /* PROCESSOR_i486 */ + + +/** Return base address of current stack + * + * Return the base address of the current stack. + * The stack is assumed to be STACK_SIZE bytes long. + * The stack must start on page boundary. + * + */ +NO_TRACE static inline uintptr_t get_stack_base(void) +{ + uintptr_t v; + + asm volatile ( + "andl %%esp, %[v]\n" + : [v] "=r" (v) + : "0" (~(STACK_SIZE - 1)) + ); + + return v; +} + +/** Invalidate TLB Entry. + * + * @param addr Address on a page whose TLB entry is to be invalidated. + * + */ +NO_TRACE static inline void invlpg(uintptr_t addr) +{ + asm volatile ( + "invlpg %[addr]\n" + :: [addr] "m" (*(sysarg_t *) addr) + ); +} + +/** Load GDTR register from memory. + * + * @param gdtr_reg Address of memory from where to load GDTR. + * + */ +NO_TRACE static inline void gdtr_load(ptr_16_32_t *gdtr_reg) +{ + asm volatile ( + "lgdtl %[gdtr_reg]\n" + :: [gdtr_reg] "m" (*gdtr_reg) + ); +} + +/** Store GDTR register to memory. + * + * @param gdtr_reg Address of memory to where to load GDTR. + * + */ +NO_TRACE static inline void gdtr_store(ptr_16_32_t *gdtr_reg) +{ + asm volatile ( + "sgdtl %[gdtr_reg]\n" + : [gdtr_reg] "=m" (*gdtr_reg) + ); +} + +/** Load IDTR register from memory. + * + * @param idtr_reg Address of memory from where to load IDTR. + * + */ +NO_TRACE static inline void idtr_load(ptr_16_32_t *idtr_reg) +{ + asm volatile ( + "lidtl %[idtr_reg]\n" + :: [idtr_reg] "m" (*idtr_reg) + ); +} + +/** Load TR from descriptor table. + * + * @param sel Selector specifying descriptor of TSS segment. + * + */ +NO_TRACE static inline void tr_load(uint16_t sel) +{ + asm volatile ( + "ltr %[sel]" + :: [sel] "r" (sel) + ); +} + +extern void paging_on(void); +extern void enable_l_apic_in_msr(void); + +extern void asm_delay_loop(uint32_t); +extern void asm_fake_loop(uint32_t); + +extern uintptr_t int_syscall; + +extern uintptr_t int_0; +extern uintptr_t int_1; +extern uintptr_t int_2; +extern uintptr_t int_3; +extern uintptr_t int_4; +extern uintptr_t int_5; +extern uintptr_t int_6; +extern uintptr_t int_7; +extern uintptr_t int_8; +extern uintptr_t int_9; +extern uintptr_t int_10; +extern uintptr_t int_11; +extern uintptr_t int_12; +extern uintptr_t int_13; +extern uintptr_t int_14; +extern uintptr_t int_15; +extern uintptr_t int_16; +extern uintptr_t int_17; +extern uintptr_t int_18; +extern uintptr_t int_19; +extern uintptr_t int_20; +extern uintptr_t int_21; +extern uintptr_t int_22; +extern uintptr_t int_23; +extern uintptr_t int_24; +extern uintptr_t int_25; +extern uintptr_t int_26; +extern uintptr_t int_27; +extern uintptr_t int_28; +extern uintptr_t int_29; +extern uintptr_t int_30; +extern uintptr_t int_31; +extern uintptr_t int_32; +extern uintptr_t int_33; +extern uintptr_t int_34; +extern uintptr_t int_35; +extern uintptr_t int_36; +extern uintptr_t int_37; +extern uintptr_t int_38; +extern uintptr_t int_39; +extern uintptr_t int_40; +extern uintptr_t int_41; +extern uintptr_t int_42; +extern uintptr_t int_43; +extern uintptr_t int_44; +extern uintptr_t int_45; +extern uintptr_t int_46; +extern uintptr_t int_47; +extern uintptr_t int_48; +extern uintptr_t int_49; +extern uintptr_t int_50; +extern uintptr_t int_51; +extern uintptr_t int_52; +extern uintptr_t int_53; +extern uintptr_t int_54; +extern uintptr_t int_55; +extern uintptr_t int_56; +extern uintptr_t int_57; +extern uintptr_t int_58; +extern uintptr_t int_59; +extern uintptr_t int_60; +extern uintptr_t int_61; +extern uintptr_t int_62; +extern uintptr_t int_63; + +#endif + +/** @} + */ Index: kernel/arch/ia32/include/arch/atomic.h =================================================================== --- kernel/arch/ia32/include/arch/atomic.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ia32/include/arch/atomic.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,147 @@ +/* + * Copyright (c) 2001-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia32 + * @{ + */ +/** @file + */ + +#ifndef KERN_ia32_ATOMIC_H_ +#define KERN_ia32_ATOMIC_H_ + +#include +#include +#include +#include + +NO_TRACE static inline void atomic_inc(atomic_t *val) +{ +#ifdef CONFIG_SMP + asm volatile ( + "lock incl %[count]\n" + : [count] "+m" (val->count) + ); +#else + asm volatile ( + "incl %[count]\n" + : [count] "+m" (val->count) + ); +#endif /* CONFIG_SMP */ +} + +NO_TRACE static inline void atomic_dec(atomic_t *val) +{ +#ifdef CONFIG_SMP + asm volatile ( + "lock decl %[count]\n" + : [count] "+m" (val->count) + ); +#else + asm volatile ( + "decl %[count]\n" + : [count] "+m" (val->count) + ); +#endif /* CONFIG_SMP */ +} + +NO_TRACE static inline atomic_count_t atomic_postinc(atomic_t *val) +{ + atomic_count_t r = 1; + + asm volatile ( + "lock xaddl %[r], %[count]\n" + : [count] "+m" (val->count), + [r] "+r" (r) + ); + + return r; +} + +NO_TRACE static inline atomic_count_t atomic_postdec(atomic_t *val) +{ + atomic_count_t r = -1; + + asm volatile ( + "lock xaddl %[r], %[count]\n" + : [count] "+m" (val->count), + [r] "+r" (r) + ); + + return r; +} + +#define atomic_preinc(val) (atomic_postinc(val) + 1) +#define atomic_predec(val) (atomic_postdec(val) - 1) + +NO_TRACE static inline atomic_count_t test_and_set(atomic_t *val) +{ + atomic_count_t v = 1; + + asm volatile ( + "xchgl %[v], %[count]\n" + : [v] "+r" (v), + [count] "+m" (val->count) + ); + + return v; +} + +/** ia32 specific fast spinlock */ +NO_TRACE static inline void atomic_lock_arch(atomic_t *val) +{ + atomic_count_t tmp; + + preemption_disable(); + asm volatile ( + "0:\n" +#ifndef PROCESSOR_i486 + "pause\n" /* Pentium 4's HT love this instruction */ +#endif + "mov %[count], %[tmp]\n" + "testl %[tmp], %[tmp]\n" + "jnz 0b\n" /* lightweight looping on locked spinlock */ + + "incl %[tmp]\n" /* now use the atomic operation */ + "xchgl %[count], %[tmp]\n" + "testl %[tmp], %[tmp]\n" + "jnz 0b\n" + : [count] "+m" (val->count), + [tmp] "=&r" (tmp) + ); + + /* + * Prevent critical section code from bleeding out this way up. + */ + CS_ENTER_BARRIER(); +} + +#endif + +/** @} + */ Index: kernel/arch/ia32/include/arch/barrier.h =================================================================== --- kernel/arch/ia32/include/arch/barrier.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ia32/include/arch/barrier.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,112 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia32 + * @{ + */ +/** @file + */ + +#ifndef KERN_ia32_BARRIER_H_ +#define KERN_ia32_BARRIER_H_ + +#include + +/* + * NOTE: + * No barriers for critical section (i.e. spinlock) on IA-32 are needed: + * - spinlock_lock() and spinlock_trylock() use serializing XCHG instruction + * - writes cannot pass reads on IA-32 => spinlock_unlock() needs no barriers + */ + +/* + * Provisions are made to prevent compiler from reordering instructions itself. + */ + +#define CS_ENTER_BARRIER() asm volatile ("" ::: "memory") +#define CS_LEAVE_BARRIER() asm volatile ("" ::: "memory") + +NO_TRACE static inline void cpuid_serialization(void) +{ +#ifndef __IN_SHARED_LIBC__ + asm volatile ( + "xorl %%eax, %%eax\n" + "cpuid\n" + ::: "eax", "ebx", "ecx", "edx", "memory" + ); +#else + /* Must not clobber PIC register ebx */ + asm volatile ( + "movl %%ebx, %%esi\n" + "xorl %%eax, %%eax\n" + "cpuid\n" + "movl %%esi, %%ebx\n" + ::: "eax", "ecx", "edx", "esi", "memory" + ); +#endif +} + +#if defined(CONFIG_FENCES_P4) + #define memory_barrier() asm volatile ("mfence\n" ::: "memory") + #define read_barrier() asm volatile ("lfence\n" ::: "memory") + #ifdef CONFIG_WEAK_MEMORY + #define write_barrier() asm volatile ("sfence\n" ::: "memory") + #else + #define write_barrier() asm volatile ("" ::: "memory"); + #endif +#elif defined(CONFIG_FENCES_P3) + #define memory_barrier() cpuid_serialization() + #define read_barrier() cpuid_serialization() + #ifdef CONFIG_WEAK_MEMORY + #define write_barrier() asm volatile ("sfence\n" ::: "memory") + #else + #define write_barrier() asm volatile ("" ::: "memory"); + #endif +#else + #define memory_barrier() cpuid_serialization() + #define read_barrier() cpuid_serialization() + #ifdef CONFIG_WEAK_MEMORY + #define write_barrier() cpuid_serialization() + #else + #define write_barrier() asm volatile ("" ::: "memory"); + #endif +#endif + +/* + * On ia32, the hardware takes care about instruction and data cache coherence, + * even on SMP systems. We issue a write barrier to be sure that writes + * queueing in the store buffer drain to the memory (even though it would be + * sufficient for them to drain to the D-cache). + */ +#define smc_coherence(a) write_barrier() +#define smc_coherence_block(a, l) write_barrier() + +#endif + +/** @} + */ Index: kernel/arch/ia32/include/arch/bios/bios.h =================================================================== --- kernel/arch/ia32/include/arch/bios/bios.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ia32/include/arch/bios/bios.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,47 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia32 + * @{ + */ +/** @file + */ + +#ifndef KERN_ia32_BIOS_H_ +#define KERN_ia32_BIOS_H_ + +#include + +extern uintptr_t ebda; + +extern void bios_init(void); + +#endif /* KERN_ia32_BIOS_H_ */ + +/** @} + */ Index: kernel/arch/ia32/include/arch/boot/boot.h =================================================================== --- kernel/arch/ia32/include/arch/boot/boot.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ia32/include/arch/boot/boot.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,56 @@ +/* + * Copyright (c) 2005 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia32 + * @{ + */ +/** @file + */ + +#ifndef KERN_ia32_BOOT_H_ +#define KERN_ia32_BOOT_H_ + +#define BOOT_OFFSET 0x108000 +#define AP_BOOT_OFFSET 0x8000 +#define BOOT_STACK_SIZE 0x0400 + +#ifndef __ASM__ + +#ifdef CONFIG_SMP + +/* This is only a symbol so the type is dummy. Obtain the value using &. */ +extern int _hardcoded_unmapped_size; + +#endif /* CONFIG_SMP */ + +#endif /* __ASM__ */ + +#endif + +/** @} + */ Index: kernel/arch/ia32/include/arch/boot/memmap.h =================================================================== --- kernel/arch/ia32/include/arch/boot/memmap.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ia32/include/arch/boot/memmap.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,79 @@ +/* + * Copyright (c) 2005 Josef Cejka + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia32 + * @{ + */ +/** @file + */ + +#ifndef KERN_ia32_MEMMAP_H_ +#define KERN_ia32_MEMMAP_H_ + +/* E820h memory range types */ + +/* Free memory */ +#define MEMMAP_MEMORY_AVAILABLE 1 + +/* Not available for OS */ +#define MEMMAP_MEMORY_RESERVED 2 + +/* OS may use it after reading ACPI table */ +#define MEMMAP_MEMORY_ACPI 3 + +/* Unusable, required to be saved and restored across an NVS sleep */ +#define MEMMAP_MEMORY_NVS 4 + +/* Corrupted memory */ +#define MEMMAP_MEMORY_UNUSABLE 5 + +/* Size of one entry */ +#define MEMMAP_E820_RECORD_SIZE 20 + +/* Maximum entries */ +#define MEMMAP_E820_MAX_RECORDS 32 + +#ifndef __ASM__ + +#include + +typedef struct { + uint64_t base_address; + uint64_t size; + uint32_t type; +} __attribute__ ((packed)) e820memmap_t; + +extern e820memmap_t e820table[MEMMAP_E820_MAX_RECORDS]; +extern uint8_t e820counter; + +#endif + +#endif + +/** @} + */ Index: kernel/arch/ia32/include/arch/context.h =================================================================== --- kernel/arch/ia32/include/arch/context.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ia32/include/arch/context.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,74 @@ +/* + * Copyright (c) 2001-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia32 + * @{ + */ +/** @file + */ + +#ifndef KERN_ia32_CONTEXT_H_ +#define KERN_ia32_CONTEXT_H_ + +#include + +#define STACK_ITEM_SIZE 4 + +/* + * Both context_save() and context_restore() eat two doublewords from the stack. + * First for pop of the saved register, second during ret instruction. + * + * One item is put onto stack to support get_stack_base(). + */ +#define SP_DELTA (8 + STACK_ITEM_SIZE) + +#define context_set(c, _pc, stack, size) \ + do { \ + (c)->pc = (uintptr_t) (_pc); \ + (c)->sp = ((uintptr_t) (stack)) + (size) - SP_DELTA; \ + (c)->ebp = 0; \ + } while (0) + +/* + * Only save registers that must be preserved across + * function calls. + */ +typedef struct { + uintptr_t sp; + uintptr_t pc; + uint32_t ebx; + uint32_t esi; + uint32_t edi; + uint32_t ebp; + ipl_t ipl; +} __attribute__ ((packed)) context_t; + +#endif + +/** @} + */ Index: kernel/arch/ia32/include/arch/context_offset.h =================================================================== --- kernel/arch/ia32/include/arch/context_offset.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ia32/include/arch/context_offset.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,81 @@ +/* + * Copyright (c) 2008 Josef Cejka + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia32 + * @{ + */ +/** @file + */ + +#ifndef KERN_ia32_CONTEXT_OFFSET_H_ +#define KERN_ia32_CONTEXT_OFFSET_H_ + +#define OFFSET_SP 0x00 +#define OFFSET_PC 0x04 +#define OFFSET_EBX 0x08 +#define OFFSET_ESI 0x0C +#define OFFSET_EDI 0x10 +#define OFFSET_EBP 0x14 + +#ifdef KERNEL + #define OFFSET_IPL 0x18 +#else + #define OFFSET_TLS 0x18 +#endif + +#ifdef __ASM__ + +# ctx: address of the structure with saved context +# pc: return address + +.macro CONTEXT_SAVE_ARCH_CORE ctx:req pc:req + movl %esp,OFFSET_SP(\ctx) # %esp -> ctx->sp + movl \pc,OFFSET_PC(\ctx) # %eip -> ctx->pc + movl %ebx,OFFSET_EBX(\ctx) # %ebx -> ctx->ebx + movl %esi,OFFSET_ESI(\ctx) # %esi -> ctx->esi + movl %edi,OFFSET_EDI(\ctx) # %edi -> ctx->edi + movl %ebp,OFFSET_EBP(\ctx) # %ebp -> ctx->ebp +.endm + +# ctx: address of the structure with saved context + +.macro CONTEXT_RESTORE_ARCH_CORE ctx:req pc:req + movl OFFSET_SP(\ctx),%esp # ctx->sp -> %esp + movl OFFSET_PC(\ctx),\pc # ctx->pc -> \pc + movl OFFSET_EBX(\ctx),%ebx # ctx->ebx -> %ebx + movl OFFSET_ESI(\ctx),%esi # ctx->esi -> %esi + movl OFFSET_EDI(\ctx),%edi # ctx->edi -> %edi + movl OFFSET_EBP(\ctx),%ebp # ctx->ebp -> %ebp +.endm + +#endif /* __ASM__ */ + +#endif + +/** @} + */ Index: kernel/arch/ia32/include/arch/cpu.h =================================================================== --- kernel/arch/ia32/include/arch/cpu.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ia32/include/arch/cpu.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,73 @@ +/* + * Copyright (c) 2001-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia32 + * @{ + */ +/** @file + */ + +#ifndef KERN_ia32_CPU_H_ +#define KERN_ia32_CPU_H_ + +#define EFLAGS_IF (1 << 9) +#define EFLAGS_DF (1 << 10) +#define EFLAGS_NT (1 << 14) +#define EFLAGS_RF (1 << 16) + +#define CR4_OSFXSR_MASK (1<<9) + +/* Support for SYSENTER and SYSEXIT */ +#define IA32_MSR_SYSENTER_CS 0x174U +#define IA32_MSR_SYSENTER_ESP 0x175U +#define IA32_MSR_SYSENTER_EIP 0x176U + +#ifndef __ASM__ + +#include +#include +#include + +typedef struct { + unsigned int vendor; + unsigned int family; + unsigned int model; + unsigned int stepping; + cpuid_feature_info fi; + + tss_t *tss; + + size_t iomapver_copy; /** Copy of TASK's I/O Permission bitmap generation count. */ +} cpu_arch_t; + +#endif + +#endif + +/** @} + */ Index: kernel/arch/ia32/include/arch/cpuid.h =================================================================== --- kernel/arch/ia32/include/arch/cpuid.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ia32/include/arch/cpuid.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,120 @@ +/* + * Copyright (c) 2001-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia32 + * @{ + */ +/** @file + */ + +#ifndef KERN_ia32_CPUID_H_ +#define KERN_ia32_CPUID_H_ + +#define INTEL_CPUID_LEVEL 0x00000000 +#define INTEL_CPUID_STANDARD 0x00000001 +#define INTEL_PSE 3 +#define INTEL_SEP 11 + +#ifndef __ASM__ + +#include + +typedef struct { + uint32_t cpuid_eax; + uint32_t cpuid_ebx; + uint32_t cpuid_ecx; + uint32_t cpuid_edx; +} __attribute__ ((packed)) cpu_info_t; + +struct __cpuid_extended_feature_info { + unsigned sse3 : 1; + unsigned : 31; +} __attribute__ ((packed)); + +typedef union cpuid_extended_feature_info { + struct __cpuid_extended_feature_info bits; + uint32_t word; +} cpuid_extended_feature_info; + +struct __cpuid_feature_info { + unsigned : 11; + unsigned sep : 1; + unsigned : 11; + unsigned mmx : 1; + unsigned fxsr : 1; + unsigned sse : 1; + unsigned sse2 : 1; + unsigned : 5; +} __attribute__ ((packed)); + +typedef union cpuid_feature_info { + struct __cpuid_feature_info bits; + uint32_t word; +} cpuid_feature_info; + + +static inline uint32_t has_cpuid(void) +{ + uint32_t val, ret; + + asm volatile ( + "pushf\n" /* read flags */ + "popl %[ret]\n" + "movl %[ret], %[val]\n" + + "btcl $21, %[val]\n" /* swap the ID bit */ + + "pushl %[val]\n" /* propagate the change into flags */ + "popf\n" + "pushf\n" + "popl %[val]\n" + + "andl $(1 << 21), %[ret]\n" /* interrested only in ID bit */ + "andl $(1 << 21), %[val]\n" + "xorl %[val], %[ret]\n" + : [ret] "=r" (ret), [val] "=r" (val) + ); + + return ret; +} + +static inline void cpuid(uint32_t cmd, cpu_info_t *info) +{ + asm volatile ( + "cpuid\n" + : "=a" (info->cpuid_eax), "=b" (info->cpuid_ebx), + "=c" (info->cpuid_ecx), "=d" (info->cpuid_edx) + : "a" (cmd) + ); +} + +#endif /* !def __ASM__ */ +#endif + +/** @} + */ Index: kernel/arch/ia32/include/arch/cycle.h =================================================================== --- kernel/arch/ia32/include/arch/cycle.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ia32/include/arch/cycle.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,59 @@ +/* + * Copyright (c) 2001-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia32 + * @{ + */ +/** @file + */ + +#ifndef KERN_ia32_CYCLE_H_ +#define KERN_ia32_CYCLE_H_ + +#include + +NO_TRACE static inline uint64_t get_cycle(void) +{ +#ifdef PROCESSOR_i486 + return 0; +#else + uint64_t v; + + asm volatile( + "rdtsc\n" + : "=A" (v) + ); + + return v; +#endif +} + +#endif + +/** @} + */ Index: kernel/arch/ia32/include/arch/ddi/ddi.h =================================================================== --- kernel/arch/ia32/include/arch/ddi/ddi.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ia32/include/arch/ddi/ddi.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2006 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia32ddi + * @{ + */ +/** + * @file + * @brief ia32 specific DDI declarations and macros. + */ + +#ifndef KERN_ia32_DDI_H_ +#define KERN_ia32_DDI_H_ + +extern void io_perm_bitmap_install(void); + +#endif + +/** @} + */ Index: kernel/arch/ia32/include/arch/drivers/i8254.h =================================================================== --- kernel/arch/ia32/include/arch/drivers/i8254.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ia32/include/arch/drivers/i8254.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2001-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia32 + * @{ + */ +/** @file + */ + +#ifndef KERN_ia32_I8254_H_ +#define KERN_ia32_I8254_H_ + +extern void i8254_init(void); +extern void i8254_calibrate_delay_loop(void); +extern void i8254_normal_operation(void); + +#endif + +/** @} + */ Index: kernel/arch/ia32/include/arch/drivers/i8259.h =================================================================== --- kernel/arch/ia32/include/arch/drivers/i8259.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ia32/include/arch/drivers/i8259.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,57 @@ +/* + * Copyright (c) 2001-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia32 + * @{ + */ +/** @file + */ + +#ifndef KERN_ia32_I8259_H_ +#define KERN_ia32_I8259_H_ + +#include +#include + +#define PIC_PIC0PORT1 ((ioport8_t *) 0x20U) +#define PIC_PIC0PORT2 ((ioport8_t *) 0x21U) +#define PIC_PIC1PORT1 ((ioport8_t *) 0xa0U) +#define PIC_PIC1PORT2 ((ioport8_t *) 0xa1U) + +#define PIC_NEEDICW4 (1 << 0) +#define PIC_ICW1 (1 << 4) + +extern void i8259_init(void); +extern void pic_enable_irqs(uint16_t); +extern void pic_disable_irqs(uint16_t); +extern void pic_eoi(void); + +#endif + +/** @} + */ Index: kernel/arch/ia32/include/arch/elf.h =================================================================== --- kernel/arch/ia32/include/arch/elf.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ia32/include/arch/elf.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2006 Sergey Bondari + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia32 + * @{ + */ +/** @file + */ + +#ifndef KERN_ia32_ELF_H_ +#define KERN_ia32_ELF_H_ + +#define ELF_MACHINE EM_386 +#define ELF_DATA_ENCODING ELFDATA2LSB +#define ELF_CLASS ELFCLASS32 + +#endif + +/** @} + */ Index: kernel/arch/ia32/include/arch/faddr.h =================================================================== --- kernel/arch/ia32/include/arch/faddr.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ia32/include/arch/faddr.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia32 + * @{ + */ +/** @file + */ + +#ifndef KERN_ia32_FADDR_H_ +#define KERN_ia32_FADDR_H_ + +#include + +#define FADDR(fptr) ((uintptr_t) (fptr)) + +#endif + +/** @} + */ Index: kernel/arch/ia32/include/arch/fpu_context.h =================================================================== --- kernel/arch/ia32/include/arch/fpu_context.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ia32/include/arch/fpu_context.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,52 @@ +/* + * Copyright (c) 2005 Jakub Vana + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia32 + * @{ + */ +/** @file + */ + +#ifndef KERN_ia32_FPU_CONTEXT_H_ +#define KERN_ia32_FPU_CONTEXT_H_ + +#include + +#define FPU_CONTEXT_ALIGN 16 + +typedef struct { + uint8_t fpu[512]; /* FXSAVE & FXRSTOR storage area */ +} fpu_context_t; + +extern void fpu_fxsr(void); +extern void fpu_fsr(void); + +#endif + +/** @} + */ Index: kernel/arch/ia32/include/arch/interrupt.h =================================================================== --- kernel/arch/ia32/include/arch/interrupt.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ia32/include/arch/interrupt.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,84 @@ +/* + * Copyright (c) 2001-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia32interrupt + * @{ + */ +/** @file + */ + +#ifndef KERN_ia32_INTERRUPT_H_ +#define KERN_ia32_INTERRUPT_H_ + +#include +#include +#include + +#define IVT_ITEMS IDT_ITEMS +#define IVT_FIRST 0 + +#define EXC_COUNT 32 +#define IRQ_COUNT 16 + +#define IVT_EXCBASE 0 +#define IVT_IRQBASE (IVT_EXCBASE + EXC_COUNT) +#define IVT_FREEBASE (IVT_IRQBASE + IRQ_COUNT) + +#define IRQ_CLK 0 +#define IRQ_KBD 1 +#define IRQ_PIC1 2 +#define IRQ_PIC_SPUR 7 +#define IRQ_MOUSE 12 + +/* This one must have four least significant bits set to ones */ +#define VECTOR_APIC_SPUR (IVT_ITEMS - 1) + +#if (((VECTOR_APIC_SPUR + 1) % 16) || VECTOR_APIC_SPUR >= IVT_ITEMS) +#error Wrong definition of VECTOR_APIC_SPUR +#endif + +#define VECTOR_DEBUG 1 +#define VECTOR_CLK (IVT_IRQBASE + IRQ_CLK) +#define VECTOR_PIC_SPUR (IVT_IRQBASE + IRQ_PIC_SPUR) +#define VECTOR_SYSCALL IVT_FREEBASE +#define VECTOR_TLB_SHOOTDOWN_IPI (IVT_FREEBASE + 1) +#define VECTOR_DEBUG_IPI (IVT_FREEBASE + 2) + +extern void (* disable_irqs_function)(uint16_t); +extern void (* enable_irqs_function)(uint16_t); +extern void (* eoi_function)(void); +extern const char *irqs_info; + +extern void interrupt_init(void); +extern void trap_virtual_enable_irqs(uint16_t); +extern void trap_virtual_disable_irqs(uint16_t); + +#endif + +/** @} + */ Index: kernel/arch/ia32/include/arch/istate.h =================================================================== --- kernel/arch/ia32/include/arch/istate.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ia32/include/arch/istate.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,97 @@ +/* + * Copyright (c) 2001-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia32interrupt + * @{ + */ +/** @file + */ + +#ifndef KERN_ia32_ISTATE_H_ +#define KERN_ia32_ISTATE_H_ + +#include + +typedef struct istate { + /* + * The strange order of the GPRs is given by the requirement to use the + * istate structure for both regular interrupts and exceptions as well + * as for syscall handlers which use this order as an optimization. + */ + uint32_t edx; + uint32_t ecx; + uint32_t ebx; + uint32_t esi; + uint32_t edi; + uint32_t ebp; + uint32_t eax; + + uint32_t ebp_frame; /* imitation of frame pointer linkage */ + uint32_t eip_frame; /* imitation of return address linkage */ + + uint32_t gs; + uint32_t fs; + uint32_t es; + uint32_t ds; + + uint32_t error_word; /* real or fake error word */ + uint32_t eip; + uint32_t cs; + uint32_t eflags; + uint32_t esp; /* only if istate_t is from uspace */ + uint32_t ss; /* only if istate_t is from uspace */ +} istate_t; + +#define RPL_USER 3 + +/** Return true if exception happened while in userspace */ +NO_TRACE static inline int istate_from_uspace(istate_t *istate) +{ + return (istate->cs & RPL_USER) == RPL_USER; +} + +NO_TRACE static inline void istate_set_retaddr(istate_t *istate, + uintptr_t retaddr) +{ + istate->eip = retaddr; +} + +NO_TRACE static inline uintptr_t istate_get_pc(istate_t *istate) +{ + return istate->eip; +} + +NO_TRACE static inline uintptr_t istate_get_fp(istate_t *istate) +{ + return istate->ebp; +} + +#endif + +/** @} + */ Index: kernel/arch/ia32/include/arch/mm/as.h =================================================================== --- kernel/arch/ia32/include/arch/mm/as.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ia32/include/arch/mm/as.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,62 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia32mm + * @{ + */ +/** @file + */ + +#ifndef KERN_ia32_AS_H_ +#define KERN_ia32_AS_H_ + +#define KERNEL_ADDRESS_SPACE_SHADOWED_ARCH 0 + +#define KERNEL_ADDRESS_SPACE_START_ARCH UINT32_C(0x80000000) +#define KERNEL_ADDRESS_SPACE_END_ARCH UINT32_C(0xffffffff) +#define USER_ADDRESS_SPACE_START_ARCH UINT32_C(0x00000000) +#define USER_ADDRESS_SPACE_END_ARCH UINT32_C(0x7fffffff) + +typedef struct { +} as_arch_t; + +#include + +#define as_constructor_arch(as, flags) (as != as) +#define as_destructor_arch(as) (as != as) +#define as_create_arch(as, flags) (as != as) +#define as_install_arch(as) +#define as_deinstall_arch(as) +#define as_invalidate_translation_cache(as, page, cnt) + +extern void as_arch_init(void); + +#endif + +/** @} + */ Index: kernel/arch/ia32/include/arch/mm/asid.h =================================================================== --- kernel/arch/ia32/include/arch/mm/asid.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ia32/include/arch/mm/asid.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,57 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia32mm + * @{ + */ +/** @file + * @ingroup ia32mm, amd64mm + */ + +/* + * ia32 has no hardware support for address space identifiers. + * This file is provided to do nop-implementation of mm/asid.h + * interface. + */ + +#ifndef KERN_ia32_ASID_H_ +#define KERN_ia32_ASID_H_ + +#include + +typedef int32_t asid_t; + +#define ASID_MAX_ARCH 3 + +#define asid_get() (ASID_START + 1) +#define asid_put(asid) + +#endif + +/** @} + */ Index: kernel/arch/ia32/include/arch/mm/frame.h =================================================================== --- kernel/arch/ia32/include/arch/mm/frame.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ia32/include/arch/mm/frame.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,54 @@ +/* + * Copyright (c) 2001-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia32mm + * @{ + */ +/** @file + */ + +#ifndef KERN_ia32_FRAME_H_ +#define KERN_ia32_FRAME_H_ + +#define FRAME_WIDTH 12 /* 4K */ +#define FRAME_SIZE (1 << FRAME_WIDTH) + +#ifndef __ASM__ + +#include + +extern void frame_low_arch_init(void); +extern void frame_high_arch_init(void); +extern void physmem_print(void); + +#endif /* __ASM__ */ + +#endif + +/** @} + */ Index: kernel/arch/ia32/include/arch/mm/km.h =================================================================== --- kernel/arch/ia32/include/arch/mm/km.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ia32/include/arch/mm/km.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,53 @@ +/* + * Copyright (c) 2011 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia32mm + * @{ + */ +/** @file + */ + +#ifndef KERN_ia32_KM_H_ +#define KERN_ia32_KM_H_ + +#include + +#define KM_IA32_IDENTITY_START UINT32_C(0x80000000) +#define KM_IA32_IDENTITY_SIZE UINT32_C(0x40000000) + +#define KM_IA32_NON_IDENTITY_START UINT32_C(0xc0000000) +#define KM_IA32_NON_IDENTITY_SIZE UINT32_C(0x40000000) + +extern void km_identity_arch_init(void); +extern void km_non_identity_arch_init(void); +extern bool km_is_non_identity_arch(uintptr_t); + +#endif + +/** @} + */ Index: kernel/arch/ia32/include/arch/mm/page.h =================================================================== --- kernel/arch/ia32/include/arch/mm/page.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ia32/include/arch/mm/page.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,219 @@ +/* + * Copyright (c) 2001-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia32mm + * @{ + */ +/** @file + */ + +#ifndef KERN_ia32_PAGE_H_ +#define KERN_ia32_PAGE_H_ + +#include +#include + +#define PAGE_WIDTH FRAME_WIDTH +#define PAGE_SIZE FRAME_SIZE + +#ifndef __ASM__ + +#define KA2PA(x) (((uintptr_t) (x)) - UINT32_C(0x80000000)) +#define PA2KA(x) (((uintptr_t) (x)) + UINT32_C(0x80000000)) + +#else /* __ASM__ */ + +#define KA2PA(x) ((x) - 0x80000000) +#define PA2KA(x) ((x) + 0x80000000) + +#endif /* __ASM__ */ + +/* + * Implementation of generic 4-level page table interface. + * IA-32 has 2-level page tables, so PTL1 and PTL2 are left out. + */ + +/* Number of entries in each level. */ +#define PTL0_ENTRIES_ARCH 1024 +#define PTL1_ENTRIES_ARCH 0 +#define PTL2_ENTRIES_ARCH 0 +#define PTL3_ENTRIES_ARCH 1024 + +/* Page table sizes for each level. */ +#define PTL0_SIZE_ARCH ONE_FRAME +#define PTL1_SIZE_ARCH 0 +#define PTL2_SIZE_ARCH 0 +#define PTL3_SIZE_ARCH ONE_FRAME + +/* Macros calculating indices for each level. */ +#define PTL0_INDEX_ARCH(vaddr) (((vaddr) >> 22) & 0x3ffU) +#define PTL1_INDEX_ARCH(vaddr) 0 +#define PTL2_INDEX_ARCH(vaddr) 0 +#define PTL3_INDEX_ARCH(vaddr) (((vaddr) >> 12) & 0x3ffU) + +/* Get PTE address accessors for each level. */ +#define GET_PTL1_ADDRESS_ARCH(ptl0, i) \ + ((pte_t *) ((((pte_t *) (ptl0))[(i)].frame_address) << 12)) +#define GET_PTL2_ADDRESS_ARCH(ptl1, i) \ + (ptl1) +#define GET_PTL3_ADDRESS_ARCH(ptl2, i) \ + (ptl2) +#define GET_FRAME_ADDRESS_ARCH(ptl3, i) \ + ((uintptr_t) ((((pte_t *) (ptl3))[(i)].frame_address) << 12)) + +/* Set PTE address accessors for each level. */ +#define SET_PTL0_ADDRESS_ARCH(ptl0) \ + (write_cr3((uintptr_t) (ptl0))) +#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) \ + (((pte_t *) (ptl0))[(i)].frame_address = (a) >> 12) +#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a) +#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a) +#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) \ + (((pte_t *) (ptl3))[(i)].frame_address = (a) >> 12) + +/* Get PTE flags accessors for each level. */ +#define GET_PTL1_FLAGS_ARCH(ptl0, i) \ + get_pt_flags((pte_t *) (ptl0), (size_t) (i)) +#define GET_PTL2_FLAGS_ARCH(ptl1, i) \ + PAGE_PRESENT +#define GET_PTL3_FLAGS_ARCH(ptl2, i) \ + PAGE_PRESENT +#define GET_FRAME_FLAGS_ARCH(ptl3, i) \ + get_pt_flags((pte_t *) (ptl3), (size_t) (i)) + +/* Set PTE flags accessors for each level. */ +#define SET_PTL1_FLAGS_ARCH(ptl0, i, x) \ + set_pt_flags((pte_t *) (ptl0), (size_t) (i), (x)) +#define SET_PTL2_FLAGS_ARCH(ptl1, i, x) +#define SET_PTL3_FLAGS_ARCH(ptl2, i, x) +#define SET_FRAME_FLAGS_ARCH(ptl3, i, x) \ + set_pt_flags((pte_t *) (ptl3), (size_t) (i), (x)) + +/* Set PTE present bit accessors for each level. */ +#define SET_PTL1_PRESENT_ARCH(ptl0, i) \ + set_pt_present((pte_t *) (ptl0), (size_t) (i)) +#define SET_PTL2_PRESENT_ARCH(ptl1, i) +#define SET_PTL3_PRESENT_ARCH(ptl2, i) +#define SET_FRAME_PRESENT_ARCH(ptl3, i) \ + set_pt_present((pte_t *) (ptl3), (size_t) (i)) + +/* Macros for querying the last level entries. */ +#define PTE_VALID_ARCH(p) \ + (*((uint32_t *) (p)) != 0) +#define PTE_PRESENT_ARCH(p) \ + ((p)->present != 0) +#define PTE_GET_FRAME_ARCH(p) \ + ((p)->frame_address << FRAME_WIDTH) +#define PTE_WRITABLE_ARCH(p) \ + ((p)->writeable != 0) +#define PTE_EXECUTABLE_ARCH(p) 1 + +#ifndef __ASM__ + +#include +#include +#include + +/* Page fault error codes. */ + +/** When bit on this position is 0, the page fault was caused by a not-present + * page. + */ +#define PFERR_CODE_P (1 << 0) + +/** When bit on this position is 1, the page fault was caused by a write. */ +#define PFERR_CODE_RW (1 << 1) + +/** When bit on this position is 1, the page fault was caused in user mode. */ +#define PFERR_CODE_US (1 << 2) + +/** When bit on this position is 1, a reserved bit was set in page directory. */ +#define PFERR_CODE_RSVD (1 << 3) + +/** Page Table Entry. */ +typedef struct { + unsigned present : 1; + unsigned writeable : 1; + unsigned uaccessible : 1; + unsigned page_write_through : 1; + unsigned page_cache_disable : 1; + unsigned accessed : 1; + unsigned dirty : 1; + unsigned pat : 1; + unsigned global : 1; + unsigned soft_valid : 1; /**< Valid content even if the present bit is not set. */ + unsigned avl : 2; + unsigned frame_address : 20; +} __attribute__ ((packed)) pte_t; + +NO_TRACE static inline unsigned int get_pt_flags(pte_t *pt, size_t i) +{ + pte_t *p = &pt[i]; + + return ((!p->page_cache_disable) << PAGE_CACHEABLE_SHIFT | + (!p->present) << PAGE_PRESENT_SHIFT | + p->uaccessible << PAGE_USER_SHIFT | + 1 << PAGE_READ_SHIFT | + p->writeable << PAGE_WRITE_SHIFT | + 1 << PAGE_EXEC_SHIFT | + p->global << PAGE_GLOBAL_SHIFT); +} + +NO_TRACE static inline void set_pt_flags(pte_t *pt, size_t i, int flags) +{ + pte_t *p = &pt[i]; + + p->page_cache_disable = !(flags & PAGE_CACHEABLE); + p->present = !(flags & PAGE_NOT_PRESENT); + p->uaccessible = (flags & PAGE_USER) != 0; + p->writeable = (flags & PAGE_WRITE) != 0; + p->global = (flags & PAGE_GLOBAL) != 0; + + /* + * Ensure that there is at least one bit set even if the present bit is + * cleared. + */ + p->soft_valid = true; +} + +NO_TRACE static inline void set_pt_present(pte_t *pt, size_t i) +{ + pte_t *p = &pt[i]; + + p->present = 1; +} + +extern void page_arch_init(void); +extern void page_fault(unsigned int, istate_t *); + +#endif /* __ASM__ */ + +#endif + +/** @} + */ Index: kernel/arch/ia32/include/arch/mm/tlb.h =================================================================== --- kernel/arch/ia32/include/arch/mm/tlb.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ia32/include/arch/mm/tlb.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,41 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia32mm + * @{ + */ +/** @file + */ + +#ifndef KERN_ia32_TLB_H_ +#define KERN_ia32_TLB_H_ + +#endif + +/** @} + */ Index: kernel/arch/ia32/include/arch/pm.h =================================================================== --- kernel/arch/ia32/include/arch/pm.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ia32/include/arch/pm.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,176 @@ +/* + * Copyright (c) 2001-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia32 + * @{ + */ +/** @file + */ + +#ifndef KERN_ia32_PM_H_ +#define KERN_ia32_PM_H_ + +#define IDT_ITEMS 64 +#define GDT_ITEMS 7 + +#define NULL_DES 0 +#define KTEXT_DES 1 +#define KDATA_DES 2 +#define UTEXT_DES 3 +#define UDATA_DES 4 +#define TSS_DES 5 +#define TLS_DES 6 /* Pointer to Thread-Local-Storage data */ + +#ifdef CONFIG_FB + +#define VESA_INIT_SEGMENT 0x8000 +#define VESA_INIT_DES 7 +#define KTEXT32_DES KTEXT_DES + +#undef GDT_ITEMS +#define GDT_ITEMS 8 + +#endif /* CONFIG_FB */ + +#define GDT_SELECTOR(des) ((des) << 3) + +#define PL_KERNEL 0 +#define PL_USER 3 + +#define AR_PRESENT (1 << 7) +#define AR_DATA (2 << 3) +#define AR_CODE (3 << 3) +#define AR_WRITABLE (1 << 1) +#define AR_INTERRUPT (0xe) +#define AR_TRAP (0xf) +#define AR_TSS (0x9) + +#define DPL_KERNEL (PL_KERNEL << 5) +#define DPL_USER (PL_USER << 5) + +#define TSS_BASIC_SIZE 104 +#define TSS_IOMAP_SIZE (8 * 1024 + 1) /* 8K for bitmap + 1 terminating byte for convenience */ + +#define IO_PORTS (64 * 1024) + +#ifndef __ASM__ + +#include +#include + +typedef struct { + uint16_t limit; + uint32_t base; +} __attribute__ ((packed)) ptr_16_32_t; + +typedef struct { + unsigned limit_0_15: 16; + unsigned base_0_15: 16; + unsigned base_16_23: 8; + unsigned access: 8; + unsigned limit_16_19: 4; + unsigned available: 1; + unsigned unused: 1; + unsigned special: 1; + unsigned granularity : 1; + unsigned base_24_31: 8; +} __attribute__ ((packed)) descriptor_t; + +typedef struct { + unsigned offset_0_15: 16; + unsigned selector: 16; + unsigned unused: 8; + unsigned access: 8; + unsigned offset_16_31: 16; +} __attribute__ ((packed)) idescriptor_t; + +typedef struct { + uint16_t link; + unsigned : 16; + uint32_t esp0; + uint16_t ss0; + unsigned : 16; + uint32_t esp1; + uint16_t ss1; + unsigned : 16; + uint32_t esp2; + uint16_t ss2; + unsigned : 16; + uint32_t cr3; + uint32_t eip; + uint32_t eflags; + uint32_t eax; + uint32_t ecx; + uint32_t edx; + uint32_t ebx; + uint32_t esp; + uint32_t ebp; + uint32_t esi; + uint32_t edi; + uint16_t es; + unsigned : 16; + uint16_t cs; + unsigned : 16; + uint16_t ss; + unsigned : 16; + uint16_t ds; + unsigned : 16; + uint16_t fs; + unsigned : 16; + uint16_t gs; + unsigned : 16; + uint16_t ldtr; + unsigned : 16; + unsigned : 16; + uint16_t iomap_base; + uint8_t iomap[TSS_IOMAP_SIZE]; +} __attribute__ ((packed)) tss_t; + +extern ptr_16_32_t gdtr; +extern ptr_16_32_t protected_ap_gdtr; +extern tss_t *tss_p; + +extern descriptor_t gdt[]; + +extern void pm_init(void); + +extern void gdt_setbase(descriptor_t *d, uintptr_t base); +extern void gdt_setlimit(descriptor_t *d, uint32_t limit); + +extern void idt_init(void); +extern void idt_setoffset(idescriptor_t *d, uintptr_t offset); + +extern void tss_initialize(tss_t *t); +extern void set_tls_desc(uintptr_t tls); + +#endif /* __ASM__ */ + +#endif + +/** @} + */ Index: kernel/arch/ia32/include/arch/proc/task.h =================================================================== --- kernel/arch/ia32/include/arch/proc/task.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ia32/include/arch/proc/task.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,51 @@ +/* + * Copyright (c) 2006 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia32proc + * @{ + */ +/** @file + */ + +#ifndef KERN_ia32_TASK_H_ +#define KERN_ia32_TASK_H_ + +#include +#include + +typedef struct { + /** I/O Permission bitmap Generation counter. */ + size_t iomapver; + /** I/O Permission bitmap. */ + bitmap_t iomap; +} task_arch_t; + +#endif + +/** @} + */ Index: kernel/arch/ia32/include/arch/proc/thread.h =================================================================== --- kernel/arch/ia32/include/arch/proc/thread.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ia32/include/arch/proc/thread.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,50 @@ +/* + * Copyright (c) 2001-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia32proc + * @{ + */ +/** @file + */ + +#ifndef KERN_ia32_THREAD_H_ +#define KERN_ia32_THREAD_H_ + +#include + +typedef struct { + sysarg_t tls; +} thread_arch_t; + +#define thr_constructor_arch(thr) +#define thr_destructor_arch(thr) + +#endif + +/** @} + */ Index: kernel/arch/ia32/include/arch/smp/ap.h =================================================================== --- kernel/arch/ia32/include/arch/smp/ap.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ia32/include/arch/smp/ap.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,43 @@ +/* + * Copyright (c) 2001-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia32 + * @{ + */ +/** @file + */ + +#ifndef KERN_ia32_AP_H_ +#define KERN_ia32_AP_H_ + +extern void ap_boot(void); + +#endif + +/** @} + */ Index: kernel/arch/ia32/include/arch/smp/apic.h =================================================================== --- kernel/arch/ia32/include/arch/smp/apic.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ia32/include/arch/smp/apic.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,368 @@ +/* + * Copyright (c) 2001-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia32 + * @{ + */ +/** @file + */ + +#ifndef KERN_ia32_APIC_H_ +#define KERN_ia32_APIC_H_ + +#include +#include + +#define FIXED (0 << 0) +#define LOPRI (1 << 0) + +#define APIC_ID_COUNT 16 + +/* local APIC macros */ +#define IPI_INIT 0 +#define IPI_STARTUP 0 + +/** Delivery modes. */ +#define DELMOD_FIXED 0x0U +#define DELMOD_LOWPRI 0x1U +#define DELMOD_SMI 0x2U +/* 0x3 reserved */ +#define DELMOD_NMI 0x4U +#define DELMOD_INIT 0x5U +#define DELMOD_STARTUP 0x6U +#define DELMOD_EXTINT 0x7U + +/** Destination modes. */ +#define DESTMOD_PHYS 0x0U +#define DESTMOD_LOGIC 0x1U + +/** Trigger Modes. */ +#define TRIGMOD_EDGE 0x0U +#define TRIGMOD_LEVEL 0x1U + +/** Levels. */ +#define LEVEL_DEASSERT 0x0U +#define LEVEL_ASSERT 0x1U + +/** Destination Shorthands. */ +#define SHORTHAND_NONE 0x0U +#define SHORTHAND_SELF 0x1U +#define SHORTHAND_ALL_INCL 0x2U +#define SHORTHAND_ALL_EXCL 0x3U + +/** Interrupt Input Pin Polarities. */ +#define POLARITY_HIGH 0x0U +#define POLARITY_LOW 0x1U + +/** Divide Values. (Bit 2 is always 0) */ +#define DIVIDE_2 0x0U +#define DIVIDE_4 0x1U +#define DIVIDE_8 0x2U +#define DIVIDE_16 0x3U +#define DIVIDE_32 0x8U +#define DIVIDE_64 0x9U +#define DIVIDE_128 0xaU +#define DIVIDE_1 0xbU + +/** Timer Modes. */ +#define TIMER_ONESHOT 0x0U +#define TIMER_PERIODIC 0x1U + +/** Delivery status. */ +#define DELIVS_IDLE 0x0U +#define DELIVS_PENDING 0x1U + +/** Destination masks. */ +#define DEST_ALL 0xffU + +/** Dest format models. */ +#define MODEL_FLAT 0xfU +#define MODEL_CLUSTER 0x0U + +/** Interrupt Command Register. */ +#define ICRlo (0x300U / sizeof(uint32_t)) +#define ICRhi (0x310U / sizeof(uint32_t)) + +typedef struct { + union { + uint32_t lo; + struct { + uint8_t vector; /**< Interrupt Vector. */ + unsigned int delmod : 3; /**< Delivery Mode. */ + unsigned int destmod : 1; /**< Destination Mode. */ + unsigned int delivs : 1; /**< Delivery status (RO). */ + unsigned int : 1; /**< Reserved. */ + unsigned int level : 1; /**< Level. */ + unsigned int trigger_mode : 1; /**< Trigger Mode. */ + unsigned int : 2; /**< Reserved. */ + unsigned int shorthand : 2; /**< Destination Shorthand. */ + unsigned int : 12; /**< Reserved. */ + } __attribute__ ((packed)); + }; + union { + uint32_t hi; + struct { + unsigned int : 24; /**< Reserved. */ + uint8_t dest; /**< Destination field. */ + } __attribute__ ((packed)); + }; +} __attribute__ ((packed)) icr_t; + +/* End Of Interrupt. */ +#define EOI (0x0b0U / sizeof(uint32_t)) + +/** Error Status Register. */ +#define ESR (0x280U / sizeof(uint32_t)) + +typedef union { + uint32_t value; + uint8_t err_bitmap; + struct { + unsigned int send_checksum_error : 1; + unsigned int receive_checksum_error : 1; + unsigned int send_accept_error : 1; + unsigned int receive_accept_error : 1; + unsigned int : 1; + unsigned int send_illegal_vector : 1; + unsigned int received_illegal_vector : 1; + unsigned int illegal_register_address : 1; + unsigned int : 24; + } __attribute__ ((packed)); +} esr_t; + +/* Task Priority Register */ +#define TPR (0x080U / sizeof(uint32_t)) + +typedef union { + uint32_t value; + struct { + unsigned int pri_sc : 4; /**< Task Priority Sub-Class. */ + unsigned int pri : 4; /**< Task Priority. */ + } __attribute__ ((packed)); +} tpr_t; + +/** Spurious-Interrupt Vector Register. */ +#define SVR (0x0f0U / sizeof(uint32_t)) + +typedef union { + uint32_t value; + struct { + uint8_t vector; /**< Spurious Vector. */ + unsigned int lapic_enabled : 1; /**< APIC Software Enable/Disable. */ + unsigned int focus_checking : 1; /**< Focus Processor Checking. */ + unsigned int : 22; /**< Reserved. */ + } __attribute__ ((packed)); +} svr_t; + +/** Time Divide Configuration Register. */ +#define TDCR (0x3e0U / sizeof(uint32_t)) + +typedef union { + uint32_t value; + struct { + unsigned int div_value : 4; /**< Divide Value, bit 2 is always 0. */ + unsigned int : 28; /**< Reserved. */ + } __attribute__ ((packed)); +} tdcr_t; + +/* Initial Count Register for Timer */ +#define ICRT (0x380U / sizeof(uint32_t)) + +/* Current Count Register for Timer */ +#define CCRT (0x390U / sizeof(uint32_t)) + +/** LVT Timer register. */ +#define LVT_Tm (0x320U / sizeof(uint32_t)) + +typedef union { + uint32_t value; + struct { + uint8_t vector; /**< Local Timer Interrupt vector. */ + unsigned int : 4; /**< Reserved. */ + unsigned int delivs : 1; /**< Delivery status (RO). */ + unsigned int : 3; /**< Reserved. */ + unsigned int masked : 1; /**< Interrupt Mask. */ + unsigned int mode : 1; /**< Timer Mode. */ + unsigned int : 14; /**< Reserved. */ + } __attribute__ ((packed)); +} lvt_tm_t; + +/** LVT LINT registers. */ +#define LVT_LINT0 (0x350U / sizeof(uint32_t)) +#define LVT_LINT1 (0x360U / sizeof(uint32_t)) + +typedef union { + uint32_t value; + struct { + uint8_t vector; /**< LINT Interrupt vector. */ + unsigned int delmod : 3; /**< Delivery Mode. */ + unsigned int : 1; /**< Reserved. */ + unsigned int delivs : 1; /**< Delivery status (RO). */ + unsigned int intpol : 1; /**< Interrupt Input Pin Polarity. */ + unsigned int irr : 1; /**< Remote IRR (RO). */ + unsigned int trigger_mode : 1; /**< Trigger Mode. */ + unsigned int masked : 1; /**< Interrupt Mask. */ + unsigned int : 15; /**< Reserved. */ + } __attribute__ ((packed)); +} lvt_lint_t; + +/** LVT Error register. */ +#define LVT_Err (0x370U / sizeof(uint32_t)) + +typedef union { + uint32_t value; + struct { + uint8_t vector; /**< Local Timer Interrupt vector. */ + unsigned int : 4; /**< Reserved. */ + unsigned int delivs : 1; /**< Delivery status (RO). */ + unsigned int : 3; /**< Reserved. */ + unsigned int masked : 1; /**< Interrupt Mask. */ + unsigned int : 15; /**< Reserved. */ + } __attribute__ ((packed)); +} lvt_error_t; + +/** Local APIC ID Register. */ +#define L_APIC_ID (0x020U / sizeof(uint32_t)) + +typedef union { + uint32_t value; + struct { + unsigned int : 24; /**< Reserved. */ + uint8_t apic_id; /**< Local APIC ID. */ + } __attribute__ ((packed)); +} l_apic_id_t; + +/** Local APIC Version Register */ +#define LAVR (0x030U / sizeof(uint32_t)) +#define LAVR_Mask 0xffU + +#define is_local_apic(x) (((x) & LAVR_Mask & 0xf0U) == 0x1U) +#define is_82489DX_apic(x) ((((x) & LAVR_Mask & 0xf0U) == 0x0U)) +#define is_local_xapic(x) (((x) & LAVR_Mask) == 0x14U) + +/** Logical Destination Register. */ +#define LDR (0x0d0U / sizeof(uint32_t)) + +typedef union { + uint32_t value; + struct { + unsigned int : 24; /**< Reserved. */ + uint8_t id; /**< Logical APIC ID. */ + } __attribute__ ((packed)); +} ldr_t; + +/** Destination Format Register. */ +#define DFR (0x0e0U / sizeof(uint32_t)) + +typedef union { + uint32_t value; + struct { + unsigned int : 28; /**< Reserved, all ones. */ + unsigned int model : 4; /**< Model. */ + } __attribute__ ((packed)); +} dfr_t; + +/* IO APIC */ +#define IOREGSEL (0x00U / sizeof(uint32_t)) +#define IOWIN (0x10U / sizeof(uint32_t)) + +#define IOAPICID 0x00U +#define IOAPICVER 0x01U +#define IOAPICARB 0x02U +#define IOREDTBL 0x10U + +/** I/O Register Select Register. */ +typedef union { + uint32_t value; + struct { + uint8_t reg_addr; /**< APIC Register Address. */ + unsigned int : 24; /**< Reserved. */ + } __attribute__ ((packed)); +} io_regsel_t; + +/** I/O Redirection Register. */ +typedef struct io_redirection_reg { + union { + uint32_t lo; + struct { + uint8_t intvec; /**< Interrupt Vector. */ + unsigned int delmod : 3; /**< Delivery Mode. */ + unsigned int destmod : 1; /**< Destination mode. */ + unsigned int delivs : 1; /**< Delivery status (RO). */ + unsigned int intpol : 1; /**< Interrupt Input Pin Polarity. */ + unsigned int irr : 1; /**< Remote IRR (RO). */ + unsigned int trigger_mode : 1; /**< Trigger Mode. */ + unsigned int masked : 1; /**< Interrupt Mask. */ + unsigned int : 15; /**< Reserved. */ + } __attribute__ ((packed)); + }; + union { + uint32_t hi; + struct { + unsigned int : 24; /**< Reserved. */ + uint8_t dest : 8; /**< Destination Field. */ + } __attribute__ ((packed)); + }; + +} __attribute__ ((packed)) io_redirection_reg_t; + + +/** IO APIC Identification Register. */ +typedef union { + uint32_t value; + struct { + unsigned int : 24; /**< Reserved. */ + unsigned int apic_id : 4; /**< IO APIC ID. */ + unsigned int : 4; /**< Reserved. */ + } __attribute__ ((packed)); +} io_apic_id_t; + +extern volatile uint32_t *l_apic; +extern volatile uint32_t *io_apic; + +extern uint32_t apic_id_mask; +extern uint8_t bsp_l_apic; + +extern void apic_init(void); + +extern void l_apic_init(void); +extern void l_apic_eoi(void); +extern int l_apic_broadcast_custom_ipi(uint8_t); +extern int l_apic_send_init_ipi(uint8_t); +extern void l_apic_debug(void); + +extern uint32_t io_apic_read(uint8_t); +extern void io_apic_write(uint8_t, uint32_t); +extern void io_apic_change_ioredtbl(uint8_t pin, uint8_t dest, uint8_t v, unsigned int); +extern void io_apic_disable_irqs(uint16_t); +extern void io_apic_enable_irqs(uint16_t); + +#endif + +/** @} + */ Index: kernel/arch/ia32/include/arch/smp/mps.h =================================================================== --- kernel/arch/ia32/include/arch/smp/mps.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ia32/include/arch/smp/mps.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,129 @@ +/* + * Copyright (c) 2001-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia32 + * @{ + */ +/** @file + */ + +#ifndef KERN_ia32_MPS_H_ +#define KERN_ia32_MPS_H_ + +#include +#include +#include +#include + +#define CT_EXT_ENTRY_TYPE 0 +#define CT_EXT_ENTRY_LEN 1 + +struct mps_fs { + uint32_t signature; + uint32_t configuration_table; + uint8_t length; + uint8_t revision; + uint8_t checksum; + uint8_t config_type; + uint8_t mpfib2; + uint8_t mpfib3; + uint8_t mpfib4; + uint8_t mpfib5; +} __attribute__ ((packed)); + +struct mps_ct { + uint32_t signature; + uint16_t base_table_length; + uint8_t revision; + uint8_t checksum; + uint8_t oem_id[8]; + uint8_t product_id[12]; + uint32_t oem_table; + uint16_t oem_table_size; + uint16_t entry_count; + uint32_t l_apic; + uint16_t ext_table_length; + uint8_t ext_table_checksum; + uint8_t reserved; + uint8_t base_table[0]; +} __attribute__ ((packed)); + +struct __processor_entry { + uint8_t type; + uint8_t l_apic_id; + uint8_t l_apic_version; + uint8_t cpu_flags; + uint8_t cpu_signature[4]; + uint32_t feature_flags; + uint32_t reserved[2]; +} __attribute__ ((packed)); + +struct __bus_entry { + uint8_t type; + uint8_t bus_id; + uint8_t bus_type[6]; +} __attribute__ ((packed)); + +struct __io_apic_entry { + uint8_t type; + uint8_t io_apic_id; + uint8_t io_apic_version; + uint8_t io_apic_flags; + uint32_t io_apic; +} __attribute__ ((packed)); + +struct __io_intr_entry { + uint8_t type; + uint8_t intr_type; + uint8_t poel; + uint8_t reserved; + uint8_t src_bus_id; + uint8_t src_bus_irq; + uint8_t dst_io_apic_id; + uint8_t dst_io_apic_pin; +} __attribute__ ((packed)); + +struct __l_intr_entry { + uint8_t type; + uint8_t intr_type; + uint8_t poel; + uint8_t reserved; + uint8_t src_bus_id; + uint8_t src_bus_irq; + uint8_t dst_l_apic_id; + uint8_t dst_l_apic_pin; +} __attribute__ ((packed)); + +extern struct smp_config_operations mps_config_operations; + +extern void mps_init(void); + +#endif + +/** @} + */ Index: kernel/arch/ia32/include/arch/smp/smp.h =================================================================== --- kernel/arch/ia32/include/arch/smp/smp.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ia32/include/arch/smp/smp.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,60 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia32 + * @{ + */ +/** @file + */ + +#ifndef KERN_ia32_SMP_H_ +#define KERN_ia32_SMP_H_ + +#include + +/** SMP config opertaions interface. */ +struct smp_config_operations { + /** Check whether a processor is enabled. */ + bool (* cpu_enabled)(size_t); + + /** Check whether a processor is BSP. */ + bool (*cpu_bootstrap)(size_t); + + /** Return APIC ID of a processor. */ + uint8_t (*cpu_apic_id)(size_t); + + /** Return mapping between IRQ and APIC pin. */ + int (*irq_to_pin)(unsigned int); +}; + +extern int smp_irq_to_pin(unsigned int); + +#endif + +/** @} + */ Index: kernel/arch/ia32/include/arch/syscall.h =================================================================== --- kernel/arch/ia32/include/arch/syscall.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ia32/include/arch/syscall.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,1 @@ +../.././../amd64/include/arch/syscall.h Index: kernel/arch/ia32/include/arch/types.h =================================================================== --- kernel/arch/ia32/include/arch/types.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ia32/include/arch/types.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,64 @@ +/* + * Copyright (c) 2001-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia32 + * @{ + */ +/** @file + */ + +#ifndef KERN_ia32_TYPES_H_ +#define KERN_ia32_TYPES_H_ + +typedef uint32_t size_t; +typedef int32_t ssize_t; + +typedef uint32_t uintptr_t; +typedef uint32_t pfn_t; + +typedef uint32_t ipl_t; + +typedef uint32_t sysarg_t; +typedef int32_t native_t; +typedef uint32_t atomic_count_t; + +typedef struct { +} fncptr_t; + +#define INTN_C(c) INT32_C(c) +#define UINTN_C(c) UINT32_C(c) + +#define PRIdn PRId32 /**< Format for native_t. */ +#define PRIun PRIu32 /**< Format for sysarg_t. */ +#define PRIxn PRIx32 /**< Format for hexadecimal sysarg_t. */ +#define PRIua PRIu32 /**< Format for atomic_count_t. */ + +#endif + +/** @} + */ Index: kernel/arch/ia32/include/asm.h =================================================================== --- kernel/arch/ia32/include/asm.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,521 +1,0 @@ -/* - * Copyright (c) 2001-2004 Jakub Jermar - * Copyright (c) 2005 Sergey Bondari - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia32 - * @{ - */ -/** @file - */ - -#ifndef KERN_ia32_ASM_H_ -#define KERN_ia32_ASM_H_ - -#include -#include -#include -#include -#include - -/** Halt CPU - * - * Halt the current CPU. - * - */ -NO_TRACE static inline __attribute__((noreturn)) void cpu_halt(void) -{ - while (true) { - asm volatile ( - "hlt\n" - ); - } -} - -NO_TRACE static inline void cpu_sleep(void) -{ - asm volatile ( - "hlt\n" - ); -} - -#define GEN_READ_REG(reg) NO_TRACE static inline sysarg_t read_ ##reg (void) \ - { \ - sysarg_t res; \ - asm volatile ( \ - "movl %%" #reg ", %[res]" \ - : [res] "=r" (res) \ - ); \ - return res; \ - } - -#define GEN_WRITE_REG(reg) NO_TRACE static inline void write_ ##reg (sysarg_t regn) \ - { \ - asm volatile ( \ - "movl %[regn], %%" #reg \ - :: [regn] "r" (regn) \ - ); \ - } - -GEN_READ_REG(cr0) -GEN_READ_REG(cr2) -GEN_READ_REG(cr3) -GEN_WRITE_REG(cr3) - -GEN_READ_REG(dr0) -GEN_READ_REG(dr1) -GEN_READ_REG(dr2) -GEN_READ_REG(dr3) -GEN_READ_REG(dr6) -GEN_READ_REG(dr7) - -GEN_WRITE_REG(dr0) -GEN_WRITE_REG(dr1) -GEN_WRITE_REG(dr2) -GEN_WRITE_REG(dr3) -GEN_WRITE_REG(dr6) -GEN_WRITE_REG(dr7) - -#define IO_SPACE_BOUNDARY ((void *) (64 * 1024)) - -/** Byte to port - * - * Output byte to port - * - * @param port Port to write to - * @param val Value to write - * - */ -NO_TRACE static inline void pio_write_8(ioport8_t *port, uint8_t val) -{ - if (port < (ioport8_t *) IO_SPACE_BOUNDARY) { - asm volatile ( - "outb %b[val], %w[port]\n" - :: [val] "a" (val), [port] "d" (port) - ); - } else - *port = val; -} - -/** Word to port - * - * Output word to port - * - * @param port Port to write to - * @param val Value to write - * - */ -NO_TRACE static inline void pio_write_16(ioport16_t *port, uint16_t val) -{ - if (port < (ioport16_t *) IO_SPACE_BOUNDARY) { - asm volatile ( - "outw %w[val], %w[port]\n" - :: [val] "a" (val), [port] "d" (port) - ); - } else - *port = val; -} - -/** Double word to port - * - * Output double word to port - * - * @param port Port to write to - * @param val Value to write - * - */ -NO_TRACE static inline void pio_write_32(ioport32_t *port, uint32_t val) -{ - if (port < (ioport32_t *) IO_SPACE_BOUNDARY) { - asm volatile ( - "outl %[val], %w[port]\n" - :: [val] "a" (val), [port] "d" (port) - ); - } else - *port = val; -} - -/** Byte from port - * - * Get byte from port - * - * @param port Port to read from - * @return Value read - * - */ -NO_TRACE static inline uint8_t pio_read_8(ioport8_t *port) -{ - if (((void *)port) < IO_SPACE_BOUNDARY) { - uint8_t val; - - asm volatile ( - "inb %w[port], %b[val]\n" - : [val] "=a" (val) - : [port] "d" (port) - ); - - return val; - } else - return (uint8_t) *port; -} - -/** Word from port - * - * Get word from port - * - * @param port Port to read from - * @return Value read - * - */ -NO_TRACE static inline uint16_t pio_read_16(ioport16_t *port) -{ - if (((void *)port) < IO_SPACE_BOUNDARY) { - uint16_t val; - - asm volatile ( - "inw %w[port], %w[val]\n" - : [val] "=a" (val) - : [port] "d" (port) - ); - - return val; - } else - return (uint16_t) *port; -} - -/** Double word from port - * - * Get double word from port - * - * @param port Port to read from - * @return Value read - * - */ -NO_TRACE static inline uint32_t pio_read_32(ioport32_t *port) -{ - if (((void *)port) < IO_SPACE_BOUNDARY) { - uint32_t val; - - asm volatile ( - "inl %w[port], %[val]\n" - : [val] "=a" (val) - : [port] "d" (port) - ); - - return val; - } else - return (uint32_t) *port; -} - -/** Enable interrupts. - * - * Enable interrupts and return previous - * value of EFLAGS. - * - * @return Old interrupt priority level. - * - */ -NO_TRACE static inline ipl_t interrupts_enable(void) -{ - ipl_t v; - - asm volatile ( - "pushf\n" - "popl %[v]\n" - "sti\n" - : [v] "=r" (v) - ); - - return v; -} - -/** Disable interrupts. - * - * Disable interrupts and return previous - * value of EFLAGS. - * - * @return Old interrupt priority level. - * - */ -NO_TRACE static inline ipl_t interrupts_disable(void) -{ - ipl_t v; - - asm volatile ( - "pushf\n" - "popl %[v]\n" - "cli\n" - : [v] "=r" (v) - ); - - return v; -} - -/** Restore interrupt priority level. - * - * Restore EFLAGS. - * - * @param ipl Saved interrupt priority level. - * - */ -NO_TRACE static inline void interrupts_restore(ipl_t ipl) -{ - asm volatile ( - "pushl %[ipl]\n" - "popf\n" - :: [ipl] "r" (ipl) - ); -} - -/** Return interrupt priority level. - * - * @return EFLAFS. - * - */ -NO_TRACE static inline ipl_t interrupts_read(void) -{ - ipl_t v; - - asm volatile ( - "pushf\n" - "popl %[v]\n" - : [v] "=r" (v) - ); - - return v; -} - -/** Check interrupts state. - * - * @return True if interrupts are disabled. - * - */ -NO_TRACE static inline bool interrupts_disabled(void) -{ - ipl_t v; - - asm volatile ( - "pushf\n" - "popl %[v]\n" - : [v] "=r" (v) - ); - - return ((v & EFLAGS_IF) == 0); -} - -#ifndef PROCESSOR_i486 - -/** Write to MSR */ -NO_TRACE static inline void write_msr(uint32_t msr, uint64_t value) -{ - asm volatile ( - "wrmsr" - :: "c" (msr), - "a" ((uint32_t) (value)), - "d" ((uint32_t) (value >> 32)) - ); -} - -NO_TRACE static inline uint64_t read_msr(uint32_t msr) -{ - uint32_t ax, dx; - - asm volatile ( - "rdmsr" - : "=a" (ax), - "=d" (dx) - : "c" (msr) - ); - - return ((uint64_t) dx << 32) | ax; -} - -#endif /* PROCESSOR_i486 */ - - -/** Return base address of current stack - * - * Return the base address of the current stack. - * The stack is assumed to be STACK_SIZE bytes long. - * The stack must start on page boundary. - * - */ -NO_TRACE static inline uintptr_t get_stack_base(void) -{ - uintptr_t v; - - asm volatile ( - "andl %%esp, %[v]\n" - : [v] "=r" (v) - : "0" (~(STACK_SIZE - 1)) - ); - - return v; -} - -/** Invalidate TLB Entry. - * - * @param addr Address on a page whose TLB entry is to be invalidated. - * - */ -NO_TRACE static inline void invlpg(uintptr_t addr) -{ - asm volatile ( - "invlpg %[addr]\n" - :: [addr] "m" (*(sysarg_t *) addr) - ); -} - -/** Load GDTR register from memory. - * - * @param gdtr_reg Address of memory from where to load GDTR. - * - */ -NO_TRACE static inline void gdtr_load(ptr_16_32_t *gdtr_reg) -{ - asm volatile ( - "lgdtl %[gdtr_reg]\n" - :: [gdtr_reg] "m" (*gdtr_reg) - ); -} - -/** Store GDTR register to memory. - * - * @param gdtr_reg Address of memory to where to load GDTR. - * - */ -NO_TRACE static inline void gdtr_store(ptr_16_32_t *gdtr_reg) -{ - asm volatile ( - "sgdtl %[gdtr_reg]\n" - : [gdtr_reg] "=m" (*gdtr_reg) - ); -} - -/** Load IDTR register from memory. - * - * @param idtr_reg Address of memory from where to load IDTR. - * - */ -NO_TRACE static inline void idtr_load(ptr_16_32_t *idtr_reg) -{ - asm volatile ( - "lidtl %[idtr_reg]\n" - :: [idtr_reg] "m" (*idtr_reg) - ); -} - -/** Load TR from descriptor table. - * - * @param sel Selector specifying descriptor of TSS segment. - * - */ -NO_TRACE static inline void tr_load(uint16_t sel) -{ - asm volatile ( - "ltr %[sel]" - :: [sel] "r" (sel) - ); -} - -extern void paging_on(void); -extern void enable_l_apic_in_msr(void); - -extern void asm_delay_loop(uint32_t); -extern void asm_fake_loop(uint32_t); - -extern uintptr_t int_syscall; - -extern uintptr_t int_0; -extern uintptr_t int_1; -extern uintptr_t int_2; -extern uintptr_t int_3; -extern uintptr_t int_4; -extern uintptr_t int_5; -extern uintptr_t int_6; -extern uintptr_t int_7; -extern uintptr_t int_8; -extern uintptr_t int_9; -extern uintptr_t int_10; -extern uintptr_t int_11; -extern uintptr_t int_12; -extern uintptr_t int_13; -extern uintptr_t int_14; -extern uintptr_t int_15; -extern uintptr_t int_16; -extern uintptr_t int_17; -extern uintptr_t int_18; -extern uintptr_t int_19; -extern uintptr_t int_20; -extern uintptr_t int_21; -extern uintptr_t int_22; -extern uintptr_t int_23; -extern uintptr_t int_24; -extern uintptr_t int_25; -extern uintptr_t int_26; -extern uintptr_t int_27; -extern uintptr_t int_28; -extern uintptr_t int_29; -extern uintptr_t int_30; -extern uintptr_t int_31; -extern uintptr_t int_32; -extern uintptr_t int_33; -extern uintptr_t int_34; -extern uintptr_t int_35; -extern uintptr_t int_36; -extern uintptr_t int_37; -extern uintptr_t int_38; -extern uintptr_t int_39; -extern uintptr_t int_40; -extern uintptr_t int_41; -extern uintptr_t int_42; -extern uintptr_t int_43; -extern uintptr_t int_44; -extern uintptr_t int_45; -extern uintptr_t int_46; -extern uintptr_t int_47; -extern uintptr_t int_48; -extern uintptr_t int_49; -extern uintptr_t int_50; -extern uintptr_t int_51; -extern uintptr_t int_52; -extern uintptr_t int_53; -extern uintptr_t int_54; -extern uintptr_t int_55; -extern uintptr_t int_56; -extern uintptr_t int_57; -extern uintptr_t int_58; -extern uintptr_t int_59; -extern uintptr_t int_60; -extern uintptr_t int_61; -extern uintptr_t int_62; -extern uintptr_t int_63; - -#endif - -/** @} - */ Index: kernel/arch/ia32/include/atomic.h =================================================================== --- kernel/arch/ia32/include/atomic.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,147 +1,0 @@ -/* - * Copyright (c) 2001-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia32 - * @{ - */ -/** @file - */ - -#ifndef KERN_ia32_ATOMIC_H_ -#define KERN_ia32_ATOMIC_H_ - -#include -#include -#include -#include - -NO_TRACE static inline void atomic_inc(atomic_t *val) -{ -#ifdef CONFIG_SMP - asm volatile ( - "lock incl %[count]\n" - : [count] "+m" (val->count) - ); -#else - asm volatile ( - "incl %[count]\n" - : [count] "+m" (val->count) - ); -#endif /* CONFIG_SMP */ -} - -NO_TRACE static inline void atomic_dec(atomic_t *val) -{ -#ifdef CONFIG_SMP - asm volatile ( - "lock decl %[count]\n" - : [count] "+m" (val->count) - ); -#else - asm volatile ( - "decl %[count]\n" - : [count] "+m" (val->count) - ); -#endif /* CONFIG_SMP */ -} - -NO_TRACE static inline atomic_count_t atomic_postinc(atomic_t *val) -{ - atomic_count_t r = 1; - - asm volatile ( - "lock xaddl %[r], %[count]\n" - : [count] "+m" (val->count), - [r] "+r" (r) - ); - - return r; -} - -NO_TRACE static inline atomic_count_t atomic_postdec(atomic_t *val) -{ - atomic_count_t r = -1; - - asm volatile ( - "lock xaddl %[r], %[count]\n" - : [count] "+m" (val->count), - [r] "+r" (r) - ); - - return r; -} - -#define atomic_preinc(val) (atomic_postinc(val) + 1) -#define atomic_predec(val) (atomic_postdec(val) - 1) - -NO_TRACE static inline atomic_count_t test_and_set(atomic_t *val) -{ - atomic_count_t v = 1; - - asm volatile ( - "xchgl %[v], %[count]\n" - : [v] "+r" (v), - [count] "+m" (val->count) - ); - - return v; -} - -/** ia32 specific fast spinlock */ -NO_TRACE static inline void atomic_lock_arch(atomic_t *val) -{ - atomic_count_t tmp; - - preemption_disable(); - asm volatile ( - "0:\n" -#ifndef PROCESSOR_i486 - "pause\n" /* Pentium 4's HT love this instruction */ -#endif - "mov %[count], %[tmp]\n" - "testl %[tmp], %[tmp]\n" - "jnz 0b\n" /* lightweight looping on locked spinlock */ - - "incl %[tmp]\n" /* now use the atomic operation */ - "xchgl %[count], %[tmp]\n" - "testl %[tmp], %[tmp]\n" - "jnz 0b\n" - : [count] "+m" (val->count), - [tmp] "=&r" (tmp) - ); - - /* - * Prevent critical section code from bleeding out this way up. - */ - CS_ENTER_BARRIER(); -} - -#endif - -/** @} - */ Index: kernel/arch/ia32/include/barrier.h =================================================================== --- kernel/arch/ia32/include/barrier.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,112 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia32 - * @{ - */ -/** @file - */ - -#ifndef KERN_ia32_BARRIER_H_ -#define KERN_ia32_BARRIER_H_ - -#include - -/* - * NOTE: - * No barriers for critical section (i.e. spinlock) on IA-32 are needed: - * - spinlock_lock() and spinlock_trylock() use serializing XCHG instruction - * - writes cannot pass reads on IA-32 => spinlock_unlock() needs no barriers - */ - -/* - * Provisions are made to prevent compiler from reordering instructions itself. - */ - -#define CS_ENTER_BARRIER() asm volatile ("" ::: "memory") -#define CS_LEAVE_BARRIER() asm volatile ("" ::: "memory") - -NO_TRACE static inline void cpuid_serialization(void) -{ -#ifndef __IN_SHARED_LIBC__ - asm volatile ( - "xorl %%eax, %%eax\n" - "cpuid\n" - ::: "eax", "ebx", "ecx", "edx", "memory" - ); -#else - /* Must not clobber PIC register ebx */ - asm volatile ( - "movl %%ebx, %%esi\n" - "xorl %%eax, %%eax\n" - "cpuid\n" - "movl %%esi, %%ebx\n" - ::: "eax", "ecx", "edx", "esi", "memory" - ); -#endif -} - -#if defined(CONFIG_FENCES_P4) - #define memory_barrier() asm volatile ("mfence\n" ::: "memory") - #define read_barrier() asm volatile ("lfence\n" ::: "memory") - #ifdef CONFIG_WEAK_MEMORY - #define write_barrier() asm volatile ("sfence\n" ::: "memory") - #else - #define write_barrier() asm volatile ("" ::: "memory"); - #endif -#elif defined(CONFIG_FENCES_P3) - #define memory_barrier() cpuid_serialization() - #define read_barrier() cpuid_serialization() - #ifdef CONFIG_WEAK_MEMORY - #define write_barrier() asm volatile ("sfence\n" ::: "memory") - #else - #define write_barrier() asm volatile ("" ::: "memory"); - #endif -#else - #define memory_barrier() cpuid_serialization() - #define read_barrier() cpuid_serialization() - #ifdef CONFIG_WEAK_MEMORY - #define write_barrier() cpuid_serialization() - #else - #define write_barrier() asm volatile ("" ::: "memory"); - #endif -#endif - -/* - * On ia32, the hardware takes care about instruction and data cache coherence, - * even on SMP systems. We issue a write barrier to be sure that writes - * queueing in the store buffer drain to the memory (even though it would be - * sufficient for them to drain to the D-cache). - */ -#define smc_coherence(a) write_barrier() -#define smc_coherence_block(a, l) write_barrier() - -#endif - -/** @} - */ Index: kernel/arch/ia32/include/bios/bios.h =================================================================== --- kernel/arch/ia32/include/bios/bios.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,47 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia32 - * @{ - */ -/** @file - */ - -#ifndef KERN_ia32_BIOS_H_ -#define KERN_ia32_BIOS_H_ - -#include - -extern uintptr_t ebda; - -extern void bios_init(void); - -#endif /* KERN_ia32_BIOS_H_ */ - -/** @} - */ Index: kernel/arch/ia32/include/boot/boot.h =================================================================== --- kernel/arch/ia32/include/boot/boot.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,56 +1,0 @@ -/* - * Copyright (c) 2005 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia32 - * @{ - */ -/** @file - */ - -#ifndef KERN_ia32_BOOT_H_ -#define KERN_ia32_BOOT_H_ - -#define BOOT_OFFSET 0x108000 -#define AP_BOOT_OFFSET 0x8000 -#define BOOT_STACK_SIZE 0x0400 - -#ifndef __ASM__ - -#ifdef CONFIG_SMP - -/* This is only a symbol so the type is dummy. Obtain the value using &. */ -extern int _hardcoded_unmapped_size; - -#endif /* CONFIG_SMP */ - -#endif /* __ASM__ */ - -#endif - -/** @} - */ Index: kernel/arch/ia32/include/boot/memmap.h =================================================================== --- kernel/arch/ia32/include/boot/memmap.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,79 +1,0 @@ -/* - * Copyright (c) 2005 Josef Cejka - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia32 - * @{ - */ -/** @file - */ - -#ifndef KERN_ia32_MEMMAP_H_ -#define KERN_ia32_MEMMAP_H_ - -/* E820h memory range types */ - -/* Free memory */ -#define MEMMAP_MEMORY_AVAILABLE 1 - -/* Not available for OS */ -#define MEMMAP_MEMORY_RESERVED 2 - -/* OS may use it after reading ACPI table */ -#define MEMMAP_MEMORY_ACPI 3 - -/* Unusable, required to be saved and restored across an NVS sleep */ -#define MEMMAP_MEMORY_NVS 4 - -/* Corrupted memory */ -#define MEMMAP_MEMORY_UNUSABLE 5 - -/* Size of one entry */ -#define MEMMAP_E820_RECORD_SIZE 20 - -/* Maximum entries */ -#define MEMMAP_E820_MAX_RECORDS 32 - -#ifndef __ASM__ - -#include - -typedef struct { - uint64_t base_address; - uint64_t size; - uint32_t type; -} __attribute__ ((packed)) e820memmap_t; - -extern e820memmap_t e820table[MEMMAP_E820_MAX_RECORDS]; -extern uint8_t e820counter; - -#endif - -#endif - -/** @} - */ Index: kernel/arch/ia32/include/context.h =================================================================== --- kernel/arch/ia32/include/context.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,74 +1,0 @@ -/* - * Copyright (c) 2001-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia32 - * @{ - */ -/** @file - */ - -#ifndef KERN_ia32_CONTEXT_H_ -#define KERN_ia32_CONTEXT_H_ - -#include - -#define STACK_ITEM_SIZE 4 - -/* - * Both context_save() and context_restore() eat two doublewords from the stack. - * First for pop of the saved register, second during ret instruction. - * - * One item is put onto stack to support get_stack_base(). - */ -#define SP_DELTA (8 + STACK_ITEM_SIZE) - -#define context_set(c, _pc, stack, size) \ - do { \ - (c)->pc = (uintptr_t) (_pc); \ - (c)->sp = ((uintptr_t) (stack)) + (size) - SP_DELTA; \ - (c)->ebp = 0; \ - } while (0) - -/* - * Only save registers that must be preserved across - * function calls. - */ -typedef struct { - uintptr_t sp; - uintptr_t pc; - uint32_t ebx; - uint32_t esi; - uint32_t edi; - uint32_t ebp; - ipl_t ipl; -} __attribute__ ((packed)) context_t; - -#endif - -/** @} - */ Index: kernel/arch/ia32/include/context_offset.h =================================================================== --- kernel/arch/ia32/include/context_offset.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,81 +1,0 @@ -/* - * Copyright (c) 2008 Josef Cejka - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia32 - * @{ - */ -/** @file - */ - -#ifndef KERN_ia32_CONTEXT_OFFSET_H_ -#define KERN_ia32_CONTEXT_OFFSET_H_ - -#define OFFSET_SP 0x00 -#define OFFSET_PC 0x04 -#define OFFSET_EBX 0x08 -#define OFFSET_ESI 0x0C -#define OFFSET_EDI 0x10 -#define OFFSET_EBP 0x14 - -#ifdef KERNEL - #define OFFSET_IPL 0x18 -#else - #define OFFSET_TLS 0x18 -#endif - -#ifdef __ASM__ - -# ctx: address of the structure with saved context -# pc: return address - -.macro CONTEXT_SAVE_ARCH_CORE ctx:req pc:req - movl %esp,OFFSET_SP(\ctx) # %esp -> ctx->sp - movl \pc,OFFSET_PC(\ctx) # %eip -> ctx->pc - movl %ebx,OFFSET_EBX(\ctx) # %ebx -> ctx->ebx - movl %esi,OFFSET_ESI(\ctx) # %esi -> ctx->esi - movl %edi,OFFSET_EDI(\ctx) # %edi -> ctx->edi - movl %ebp,OFFSET_EBP(\ctx) # %ebp -> ctx->ebp -.endm - -# ctx: address of the structure with saved context - -.macro CONTEXT_RESTORE_ARCH_CORE ctx:req pc:req - movl OFFSET_SP(\ctx),%esp # ctx->sp -> %esp - movl OFFSET_PC(\ctx),\pc # ctx->pc -> \pc - movl OFFSET_EBX(\ctx),%ebx # ctx->ebx -> %ebx - movl OFFSET_ESI(\ctx),%esi # ctx->esi -> %esi - movl OFFSET_EDI(\ctx),%edi # ctx->edi -> %edi - movl OFFSET_EBP(\ctx),%ebp # ctx->ebp -> %ebp -.endm - -#endif /* __ASM__ */ - -#endif - -/** @} - */ Index: kernel/arch/ia32/include/cpu.h =================================================================== --- kernel/arch/ia32/include/cpu.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,73 +1,0 @@ -/* - * Copyright (c) 2001-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia32 - * @{ - */ -/** @file - */ - -#ifndef KERN_ia32_CPU_H_ -#define KERN_ia32_CPU_H_ - -#define EFLAGS_IF (1 << 9) -#define EFLAGS_DF (1 << 10) -#define EFLAGS_NT (1 << 14) -#define EFLAGS_RF (1 << 16) - -#define CR4_OSFXSR_MASK (1<<9) - -/* Support for SYSENTER and SYSEXIT */ -#define IA32_MSR_SYSENTER_CS 0x174U -#define IA32_MSR_SYSENTER_ESP 0x175U -#define IA32_MSR_SYSENTER_EIP 0x176U - -#ifndef __ASM__ - -#include -#include -#include - -typedef struct { - unsigned int vendor; - unsigned int family; - unsigned int model; - unsigned int stepping; - cpuid_feature_info fi; - - tss_t *tss; - - size_t iomapver_copy; /** Copy of TASK's I/O Permission bitmap generation count. */ -} cpu_arch_t; - -#endif - -#endif - -/** @} - */ Index: kernel/arch/ia32/include/cpuid.h =================================================================== --- kernel/arch/ia32/include/cpuid.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,120 +1,0 @@ -/* - * Copyright (c) 2001-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia32 - * @{ - */ -/** @file - */ - -#ifndef KERN_ia32_CPUID_H_ -#define KERN_ia32_CPUID_H_ - -#define INTEL_CPUID_LEVEL 0x00000000 -#define INTEL_CPUID_STANDARD 0x00000001 -#define INTEL_PSE 3 -#define INTEL_SEP 11 - -#ifndef __ASM__ - -#include - -typedef struct { - uint32_t cpuid_eax; - uint32_t cpuid_ebx; - uint32_t cpuid_ecx; - uint32_t cpuid_edx; -} __attribute__ ((packed)) cpu_info_t; - -struct __cpuid_extended_feature_info { - unsigned sse3 : 1; - unsigned : 31; -} __attribute__ ((packed)); - -typedef union cpuid_extended_feature_info { - struct __cpuid_extended_feature_info bits; - uint32_t word; -} cpuid_extended_feature_info; - -struct __cpuid_feature_info { - unsigned : 11; - unsigned sep : 1; - unsigned : 11; - unsigned mmx : 1; - unsigned fxsr : 1; - unsigned sse : 1; - unsigned sse2 : 1; - unsigned : 5; -} __attribute__ ((packed)); - -typedef union cpuid_feature_info { - struct __cpuid_feature_info bits; - uint32_t word; -} cpuid_feature_info; - - -static inline uint32_t has_cpuid(void) -{ - uint32_t val, ret; - - asm volatile ( - "pushf\n" /* read flags */ - "popl %[ret]\n" - "movl %[ret], %[val]\n" - - "btcl $21, %[val]\n" /* swap the ID bit */ - - "pushl %[val]\n" /* propagate the change into flags */ - "popf\n" - "pushf\n" - "popl %[val]\n" - - "andl $(1 << 21), %[ret]\n" /* interrested only in ID bit */ - "andl $(1 << 21), %[val]\n" - "xorl %[val], %[ret]\n" - : [ret] "=r" (ret), [val] "=r" (val) - ); - - return ret; -} - -static inline void cpuid(uint32_t cmd, cpu_info_t *info) -{ - asm volatile ( - "cpuid\n" - : "=a" (info->cpuid_eax), "=b" (info->cpuid_ebx), - "=c" (info->cpuid_ecx), "=d" (info->cpuid_edx) - : "a" (cmd) - ); -} - -#endif /* !def __ASM__ */ -#endif - -/** @} - */ Index: kernel/arch/ia32/include/cycle.h =================================================================== --- kernel/arch/ia32/include/cycle.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,59 +1,0 @@ -/* - * Copyright (c) 2001-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia32 - * @{ - */ -/** @file - */ - -#ifndef KERN_ia32_CYCLE_H_ -#define KERN_ia32_CYCLE_H_ - -#include - -NO_TRACE static inline uint64_t get_cycle(void) -{ -#ifdef PROCESSOR_i486 - return 0; -#else - uint64_t v; - - asm volatile( - "rdtsc\n" - : "=A" (v) - ); - - return v; -#endif -} - -#endif - -/** @} - */ Index: kernel/arch/ia32/include/ddi/ddi.h =================================================================== --- kernel/arch/ia32/include/ddi/ddi.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,45 +1,0 @@ -/* - * Copyright (c) 2006 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia32ddi - * @{ - */ -/** - * @file - * @brief ia32 specific DDI declarations and macros. - */ - -#ifndef KERN_ia32_DDI_H_ -#define KERN_ia32_DDI_H_ - -extern void io_perm_bitmap_install(void); - -#endif - -/** @} - */ Index: kernel/arch/ia32/include/drivers/i8254.h =================================================================== --- kernel/arch/ia32/include/drivers/i8254.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,45 +1,0 @@ -/* - * Copyright (c) 2001-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia32 - * @{ - */ -/** @file - */ - -#ifndef KERN_ia32_I8254_H_ -#define KERN_ia32_I8254_H_ - -extern void i8254_init(void); -extern void i8254_calibrate_delay_loop(void); -extern void i8254_normal_operation(void); - -#endif - -/** @} - */ Index: kernel/arch/ia32/include/drivers/i8259.h =================================================================== --- kernel/arch/ia32/include/drivers/i8259.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,57 +1,0 @@ -/* - * Copyright (c) 2001-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia32 - * @{ - */ -/** @file - */ - -#ifndef KERN_ia32_I8259_H_ -#define KERN_ia32_I8259_H_ - -#include -#include - -#define PIC_PIC0PORT1 ((ioport8_t *) 0x20U) -#define PIC_PIC0PORT2 ((ioport8_t *) 0x21U) -#define PIC_PIC1PORT1 ((ioport8_t *) 0xa0U) -#define PIC_PIC1PORT2 ((ioport8_t *) 0xa1U) - -#define PIC_NEEDICW4 (1 << 0) -#define PIC_ICW1 (1 << 4) - -extern void i8259_init(void); -extern void pic_enable_irqs(uint16_t); -extern void pic_disable_irqs(uint16_t); -extern void pic_eoi(void); - -#endif - -/** @} - */ Index: kernel/arch/ia32/include/elf.h =================================================================== --- kernel/arch/ia32/include/elf.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,45 +1,0 @@ -/* - * Copyright (c) 2006 Sergey Bondari - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia32 - * @{ - */ -/** @file - */ - -#ifndef KERN_ia32_ELF_H_ -#define KERN_ia32_ELF_H_ - -#define ELF_MACHINE EM_386 -#define ELF_DATA_ENCODING ELFDATA2LSB -#define ELF_CLASS ELFCLASS32 - -#endif - -/** @} - */ Index: kernel/arch/ia32/include/faddr.h =================================================================== --- kernel/arch/ia32/include/faddr.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,45 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia32 - * @{ - */ -/** @file - */ - -#ifndef KERN_ia32_FADDR_H_ -#define KERN_ia32_FADDR_H_ - -#include - -#define FADDR(fptr) ((uintptr_t) (fptr)) - -#endif - -/** @} - */ Index: kernel/arch/ia32/include/fpu_context.h =================================================================== --- kernel/arch/ia32/include/fpu_context.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,52 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Vana - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia32 - * @{ - */ -/** @file - */ - -#ifndef KERN_ia32_FPU_CONTEXT_H_ -#define KERN_ia32_FPU_CONTEXT_H_ - -#include - -#define FPU_CONTEXT_ALIGN 16 - -typedef struct { - uint8_t fpu[512]; /* FXSAVE & FXRSTOR storage area */ -} fpu_context_t; - -extern void fpu_fxsr(void); -extern void fpu_fsr(void); - -#endif - -/** @} - */ Index: kernel/arch/ia32/include/interrupt.h =================================================================== --- kernel/arch/ia32/include/interrupt.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,84 +1,0 @@ -/* - * Copyright (c) 2001-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia32interrupt - * @{ - */ -/** @file - */ - -#ifndef KERN_ia32_INTERRUPT_H_ -#define KERN_ia32_INTERRUPT_H_ - -#include -#include -#include - -#define IVT_ITEMS IDT_ITEMS -#define IVT_FIRST 0 - -#define EXC_COUNT 32 -#define IRQ_COUNT 16 - -#define IVT_EXCBASE 0 -#define IVT_IRQBASE (IVT_EXCBASE + EXC_COUNT) -#define IVT_FREEBASE (IVT_IRQBASE + IRQ_COUNT) - -#define IRQ_CLK 0 -#define IRQ_KBD 1 -#define IRQ_PIC1 2 -#define IRQ_PIC_SPUR 7 -#define IRQ_MOUSE 12 - -/* This one must have four least significant bits set to ones */ -#define VECTOR_APIC_SPUR (IVT_ITEMS - 1) - -#if (((VECTOR_APIC_SPUR + 1) % 16) || VECTOR_APIC_SPUR >= IVT_ITEMS) -#error Wrong definition of VECTOR_APIC_SPUR -#endif - -#define VECTOR_DEBUG 1 -#define VECTOR_CLK (IVT_IRQBASE + IRQ_CLK) -#define VECTOR_PIC_SPUR (IVT_IRQBASE + IRQ_PIC_SPUR) -#define VECTOR_SYSCALL IVT_FREEBASE -#define VECTOR_TLB_SHOOTDOWN_IPI (IVT_FREEBASE + 1) -#define VECTOR_DEBUG_IPI (IVT_FREEBASE + 2) - -extern void (* disable_irqs_function)(uint16_t); -extern void (* enable_irqs_function)(uint16_t); -extern void (* eoi_function)(void); -extern const char *irqs_info; - -extern void interrupt_init(void); -extern void trap_virtual_enable_irqs(uint16_t); -extern void trap_virtual_disable_irqs(uint16_t); - -#endif - -/** @} - */ Index: kernel/arch/ia32/include/istate.h =================================================================== --- kernel/arch/ia32/include/istate.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,97 +1,0 @@ -/* - * Copyright (c) 2001-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia32interrupt - * @{ - */ -/** @file - */ - -#ifndef KERN_ia32_ISTATE_H_ -#define KERN_ia32_ISTATE_H_ - -#include - -typedef struct istate { - /* - * The strange order of the GPRs is given by the requirement to use the - * istate structure for both regular interrupts and exceptions as well - * as for syscall handlers which use this order as an optimization. - */ - uint32_t edx; - uint32_t ecx; - uint32_t ebx; - uint32_t esi; - uint32_t edi; - uint32_t ebp; - uint32_t eax; - - uint32_t ebp_frame; /* imitation of frame pointer linkage */ - uint32_t eip_frame; /* imitation of return address linkage */ - - uint32_t gs; - uint32_t fs; - uint32_t es; - uint32_t ds; - - uint32_t error_word; /* real or fake error word */ - uint32_t eip; - uint32_t cs; - uint32_t eflags; - uint32_t esp; /* only if istate_t is from uspace */ - uint32_t ss; /* only if istate_t is from uspace */ -} istate_t; - -#define RPL_USER 3 - -/** Return true if exception happened while in userspace */ -NO_TRACE static inline int istate_from_uspace(istate_t *istate) -{ - return (istate->cs & RPL_USER) == RPL_USER; -} - -NO_TRACE static inline void istate_set_retaddr(istate_t *istate, - uintptr_t retaddr) -{ - istate->eip = retaddr; -} - -NO_TRACE static inline uintptr_t istate_get_pc(istate_t *istate) -{ - return istate->eip; -} - -NO_TRACE static inline uintptr_t istate_get_fp(istate_t *istate) -{ - return istate->ebp; -} - -#endif - -/** @} - */ Index: kernel/arch/ia32/include/mm/as.h =================================================================== --- kernel/arch/ia32/include/mm/as.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,62 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia32mm - * @{ - */ -/** @file - */ - -#ifndef KERN_ia32_AS_H_ -#define KERN_ia32_AS_H_ - -#define KERNEL_ADDRESS_SPACE_SHADOWED_ARCH 0 - -#define KERNEL_ADDRESS_SPACE_START_ARCH UINT32_C(0x80000000) -#define KERNEL_ADDRESS_SPACE_END_ARCH UINT32_C(0xffffffff) -#define USER_ADDRESS_SPACE_START_ARCH UINT32_C(0x00000000) -#define USER_ADDRESS_SPACE_END_ARCH UINT32_C(0x7fffffff) - -typedef struct { -} as_arch_t; - -#include - -#define as_constructor_arch(as, flags) (as != as) -#define as_destructor_arch(as) (as != as) -#define as_create_arch(as, flags) (as != as) -#define as_install_arch(as) -#define as_deinstall_arch(as) -#define as_invalidate_translation_cache(as, page, cnt) - -extern void as_arch_init(void); - -#endif - -/** @} - */ Index: kernel/arch/ia32/include/mm/asid.h =================================================================== --- kernel/arch/ia32/include/mm/asid.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,57 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia32mm - * @{ - */ -/** @file - * @ingroup ia32mm, amd64mm - */ - -/* - * ia32 has no hardware support for address space identifiers. - * This file is provided to do nop-implementation of mm/asid.h - * interface. - */ - -#ifndef KERN_ia32_ASID_H_ -#define KERN_ia32_ASID_H_ - -#include - -typedef int32_t asid_t; - -#define ASID_MAX_ARCH 3 - -#define asid_get() (ASID_START + 1) -#define asid_put(asid) - -#endif - -/** @} - */ Index: kernel/arch/ia32/include/mm/frame.h =================================================================== --- kernel/arch/ia32/include/mm/frame.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,54 +1,0 @@ -/* - * Copyright (c) 2001-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia32mm - * @{ - */ -/** @file - */ - -#ifndef KERN_ia32_FRAME_H_ -#define KERN_ia32_FRAME_H_ - -#define FRAME_WIDTH 12 /* 4K */ -#define FRAME_SIZE (1 << FRAME_WIDTH) - -#ifndef __ASM__ - -#include - -extern void frame_low_arch_init(void); -extern void frame_high_arch_init(void); -extern void physmem_print(void); - -#endif /* __ASM__ */ - -#endif - -/** @} - */ Index: kernel/arch/ia32/include/mm/km.h =================================================================== --- kernel/arch/ia32/include/mm/km.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,53 +1,0 @@ -/* - * Copyright (c) 2011 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia32mm - * @{ - */ -/** @file - */ - -#ifndef KERN_ia32_KM_H_ -#define KERN_ia32_KM_H_ - -#include - -#define KM_IA32_IDENTITY_START UINT32_C(0x80000000) -#define KM_IA32_IDENTITY_SIZE UINT32_C(0x40000000) - -#define KM_IA32_NON_IDENTITY_START UINT32_C(0xc0000000) -#define KM_IA32_NON_IDENTITY_SIZE UINT32_C(0x40000000) - -extern void km_identity_arch_init(void); -extern void km_non_identity_arch_init(void); -extern bool km_is_non_identity_arch(uintptr_t); - -#endif - -/** @} - */ Index: kernel/arch/ia32/include/mm/page.h =================================================================== --- kernel/arch/ia32/include/mm/page.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,219 +1,0 @@ -/* - * Copyright (c) 2001-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia32mm - * @{ - */ -/** @file - */ - -#ifndef KERN_ia32_PAGE_H_ -#define KERN_ia32_PAGE_H_ - -#include -#include - -#define PAGE_WIDTH FRAME_WIDTH -#define PAGE_SIZE FRAME_SIZE - -#ifndef __ASM__ - -#define KA2PA(x) (((uintptr_t) (x)) - UINT32_C(0x80000000)) -#define PA2KA(x) (((uintptr_t) (x)) + UINT32_C(0x80000000)) - -#else /* __ASM__ */ - -#define KA2PA(x) ((x) - 0x80000000) -#define PA2KA(x) ((x) + 0x80000000) - -#endif /* __ASM__ */ - -/* - * Implementation of generic 4-level page table interface. - * IA-32 has 2-level page tables, so PTL1 and PTL2 are left out. - */ - -/* Number of entries in each level. */ -#define PTL0_ENTRIES_ARCH 1024 -#define PTL1_ENTRIES_ARCH 0 -#define PTL2_ENTRIES_ARCH 0 -#define PTL3_ENTRIES_ARCH 1024 - -/* Page table sizes for each level. */ -#define PTL0_SIZE_ARCH ONE_FRAME -#define PTL1_SIZE_ARCH 0 -#define PTL2_SIZE_ARCH 0 -#define PTL3_SIZE_ARCH ONE_FRAME - -/* Macros calculating indices for each level. */ -#define PTL0_INDEX_ARCH(vaddr) (((vaddr) >> 22) & 0x3ffU) -#define PTL1_INDEX_ARCH(vaddr) 0 -#define PTL2_INDEX_ARCH(vaddr) 0 -#define PTL3_INDEX_ARCH(vaddr) (((vaddr) >> 12) & 0x3ffU) - -/* Get PTE address accessors for each level. */ -#define GET_PTL1_ADDRESS_ARCH(ptl0, i) \ - ((pte_t *) ((((pte_t *) (ptl0))[(i)].frame_address) << 12)) -#define GET_PTL2_ADDRESS_ARCH(ptl1, i) \ - (ptl1) -#define GET_PTL3_ADDRESS_ARCH(ptl2, i) \ - (ptl2) -#define GET_FRAME_ADDRESS_ARCH(ptl3, i) \ - ((uintptr_t) ((((pte_t *) (ptl3))[(i)].frame_address) << 12)) - -/* Set PTE address accessors for each level. */ -#define SET_PTL0_ADDRESS_ARCH(ptl0) \ - (write_cr3((uintptr_t) (ptl0))) -#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) \ - (((pte_t *) (ptl0))[(i)].frame_address = (a) >> 12) -#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a) -#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a) -#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) \ - (((pte_t *) (ptl3))[(i)].frame_address = (a) >> 12) - -/* Get PTE flags accessors for each level. */ -#define GET_PTL1_FLAGS_ARCH(ptl0, i) \ - get_pt_flags((pte_t *) (ptl0), (size_t) (i)) -#define GET_PTL2_FLAGS_ARCH(ptl1, i) \ - PAGE_PRESENT -#define GET_PTL3_FLAGS_ARCH(ptl2, i) \ - PAGE_PRESENT -#define GET_FRAME_FLAGS_ARCH(ptl3, i) \ - get_pt_flags((pte_t *) (ptl3), (size_t) (i)) - -/* Set PTE flags accessors for each level. */ -#define SET_PTL1_FLAGS_ARCH(ptl0, i, x) \ - set_pt_flags((pte_t *) (ptl0), (size_t) (i), (x)) -#define SET_PTL2_FLAGS_ARCH(ptl1, i, x) -#define SET_PTL3_FLAGS_ARCH(ptl2, i, x) -#define SET_FRAME_FLAGS_ARCH(ptl3, i, x) \ - set_pt_flags((pte_t *) (ptl3), (size_t) (i), (x)) - -/* Set PTE present bit accessors for each level. */ -#define SET_PTL1_PRESENT_ARCH(ptl0, i) \ - set_pt_present((pte_t *) (ptl0), (size_t) (i)) -#define SET_PTL2_PRESENT_ARCH(ptl1, i) -#define SET_PTL3_PRESENT_ARCH(ptl2, i) -#define SET_FRAME_PRESENT_ARCH(ptl3, i) \ - set_pt_present((pte_t *) (ptl3), (size_t) (i)) - -/* Macros for querying the last level entries. */ -#define PTE_VALID_ARCH(p) \ - (*((uint32_t *) (p)) != 0) -#define PTE_PRESENT_ARCH(p) \ - ((p)->present != 0) -#define PTE_GET_FRAME_ARCH(p) \ - ((p)->frame_address << FRAME_WIDTH) -#define PTE_WRITABLE_ARCH(p) \ - ((p)->writeable != 0) -#define PTE_EXECUTABLE_ARCH(p) 1 - -#ifndef __ASM__ - -#include -#include -#include - -/* Page fault error codes. */ - -/** When bit on this position is 0, the page fault was caused by a not-present - * page. - */ -#define PFERR_CODE_P (1 << 0) - -/** When bit on this position is 1, the page fault was caused by a write. */ -#define PFERR_CODE_RW (1 << 1) - -/** When bit on this position is 1, the page fault was caused in user mode. */ -#define PFERR_CODE_US (1 << 2) - -/** When bit on this position is 1, a reserved bit was set in page directory. */ -#define PFERR_CODE_RSVD (1 << 3) - -/** Page Table Entry. */ -typedef struct { - unsigned present : 1; - unsigned writeable : 1; - unsigned uaccessible : 1; - unsigned page_write_through : 1; - unsigned page_cache_disable : 1; - unsigned accessed : 1; - unsigned dirty : 1; - unsigned pat : 1; - unsigned global : 1; - unsigned soft_valid : 1; /**< Valid content even if the present bit is not set. */ - unsigned avl : 2; - unsigned frame_address : 20; -} __attribute__ ((packed)) pte_t; - -NO_TRACE static inline unsigned int get_pt_flags(pte_t *pt, size_t i) -{ - pte_t *p = &pt[i]; - - return ((!p->page_cache_disable) << PAGE_CACHEABLE_SHIFT | - (!p->present) << PAGE_PRESENT_SHIFT | - p->uaccessible << PAGE_USER_SHIFT | - 1 << PAGE_READ_SHIFT | - p->writeable << PAGE_WRITE_SHIFT | - 1 << PAGE_EXEC_SHIFT | - p->global << PAGE_GLOBAL_SHIFT); -} - -NO_TRACE static inline void set_pt_flags(pte_t *pt, size_t i, int flags) -{ - pte_t *p = &pt[i]; - - p->page_cache_disable = !(flags & PAGE_CACHEABLE); - p->present = !(flags & PAGE_NOT_PRESENT); - p->uaccessible = (flags & PAGE_USER) != 0; - p->writeable = (flags & PAGE_WRITE) != 0; - p->global = (flags & PAGE_GLOBAL) != 0; - - /* - * Ensure that there is at least one bit set even if the present bit is - * cleared. - */ - p->soft_valid = true; -} - -NO_TRACE static inline void set_pt_present(pte_t *pt, size_t i) -{ - pte_t *p = &pt[i]; - - p->present = 1; -} - -extern void page_arch_init(void); -extern void page_fault(unsigned int, istate_t *); - -#endif /* __ASM__ */ - -#endif - -/** @} - */ Index: kernel/arch/ia32/include/mm/tlb.h =================================================================== --- kernel/arch/ia32/include/mm/tlb.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,41 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia32mm - * @{ - */ -/** @file - */ - -#ifndef KERN_ia32_TLB_H_ -#define KERN_ia32_TLB_H_ - -#endif - -/** @} - */ Index: kernel/arch/ia32/include/pm.h =================================================================== --- kernel/arch/ia32/include/pm.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,176 +1,0 @@ -/* - * Copyright (c) 2001-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia32 - * @{ - */ -/** @file - */ - -#ifndef KERN_ia32_PM_H_ -#define KERN_ia32_PM_H_ - -#define IDT_ITEMS 64 -#define GDT_ITEMS 7 - -#define NULL_DES 0 -#define KTEXT_DES 1 -#define KDATA_DES 2 -#define UTEXT_DES 3 -#define UDATA_DES 4 -#define TSS_DES 5 -#define TLS_DES 6 /* Pointer to Thread-Local-Storage data */ - -#ifdef CONFIG_FB - -#define VESA_INIT_SEGMENT 0x8000 -#define VESA_INIT_DES 7 -#define KTEXT32_DES KTEXT_DES - -#undef GDT_ITEMS -#define GDT_ITEMS 8 - -#endif /* CONFIG_FB */ - -#define GDT_SELECTOR(des) ((des) << 3) - -#define PL_KERNEL 0 -#define PL_USER 3 - -#define AR_PRESENT (1 << 7) -#define AR_DATA (2 << 3) -#define AR_CODE (3 << 3) -#define AR_WRITABLE (1 << 1) -#define AR_INTERRUPT (0xe) -#define AR_TRAP (0xf) -#define AR_TSS (0x9) - -#define DPL_KERNEL (PL_KERNEL << 5) -#define DPL_USER (PL_USER << 5) - -#define TSS_BASIC_SIZE 104 -#define TSS_IOMAP_SIZE (8 * 1024 + 1) /* 8K for bitmap + 1 terminating byte for convenience */ - -#define IO_PORTS (64 * 1024) - -#ifndef __ASM__ - -#include -#include - -typedef struct { - uint16_t limit; - uint32_t base; -} __attribute__ ((packed)) ptr_16_32_t; - -typedef struct { - unsigned limit_0_15: 16; - unsigned base_0_15: 16; - unsigned base_16_23: 8; - unsigned access: 8; - unsigned limit_16_19: 4; - unsigned available: 1; - unsigned unused: 1; - unsigned special: 1; - unsigned granularity : 1; - unsigned base_24_31: 8; -} __attribute__ ((packed)) descriptor_t; - -typedef struct { - unsigned offset_0_15: 16; - unsigned selector: 16; - unsigned unused: 8; - unsigned access: 8; - unsigned offset_16_31: 16; -} __attribute__ ((packed)) idescriptor_t; - -typedef struct { - uint16_t link; - unsigned : 16; - uint32_t esp0; - uint16_t ss0; - unsigned : 16; - uint32_t esp1; - uint16_t ss1; - unsigned : 16; - uint32_t esp2; - uint16_t ss2; - unsigned : 16; - uint32_t cr3; - uint32_t eip; - uint32_t eflags; - uint32_t eax; - uint32_t ecx; - uint32_t edx; - uint32_t ebx; - uint32_t esp; - uint32_t ebp; - uint32_t esi; - uint32_t edi; - uint16_t es; - unsigned : 16; - uint16_t cs; - unsigned : 16; - uint16_t ss; - unsigned : 16; - uint16_t ds; - unsigned : 16; - uint16_t fs; - unsigned : 16; - uint16_t gs; - unsigned : 16; - uint16_t ldtr; - unsigned : 16; - unsigned : 16; - uint16_t iomap_base; - uint8_t iomap[TSS_IOMAP_SIZE]; -} __attribute__ ((packed)) tss_t; - -extern ptr_16_32_t gdtr; -extern ptr_16_32_t protected_ap_gdtr; -extern tss_t *tss_p; - -extern descriptor_t gdt[]; - -extern void pm_init(void); - -extern void gdt_setbase(descriptor_t *d, uintptr_t base); -extern void gdt_setlimit(descriptor_t *d, uint32_t limit); - -extern void idt_init(void); -extern void idt_setoffset(idescriptor_t *d, uintptr_t offset); - -extern void tss_initialize(tss_t *t); -extern void set_tls_desc(uintptr_t tls); - -#endif /* __ASM__ */ - -#endif - -/** @} - */ Index: kernel/arch/ia32/include/proc/task.h =================================================================== --- kernel/arch/ia32/include/proc/task.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,51 +1,0 @@ -/* - * Copyright (c) 2006 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia32proc - * @{ - */ -/** @file - */ - -#ifndef KERN_ia32_TASK_H_ -#define KERN_ia32_TASK_H_ - -#include -#include - -typedef struct { - /** I/O Permission bitmap Generation counter. */ - size_t iomapver; - /** I/O Permission bitmap. */ - bitmap_t iomap; -} task_arch_t; - -#endif - -/** @} - */ Index: kernel/arch/ia32/include/proc/thread.h =================================================================== --- kernel/arch/ia32/include/proc/thread.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,50 +1,0 @@ -/* - * Copyright (c) 2001-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia32proc - * @{ - */ -/** @file - */ - -#ifndef KERN_ia32_THREAD_H_ -#define KERN_ia32_THREAD_H_ - -#include - -typedef struct { - sysarg_t tls; -} thread_arch_t; - -#define thr_constructor_arch(thr) -#define thr_destructor_arch(thr) - -#endif - -/** @} - */ Index: kernel/arch/ia32/include/smp/ap.h =================================================================== --- kernel/arch/ia32/include/smp/ap.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,43 +1,0 @@ -/* - * Copyright (c) 2001-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia32 - * @{ - */ -/** @file - */ - -#ifndef KERN_ia32_AP_H_ -#define KERN_ia32_AP_H_ - -extern void ap_boot(void); - -#endif - -/** @} - */ Index: kernel/arch/ia32/include/smp/apic.h =================================================================== --- kernel/arch/ia32/include/smp/apic.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,368 +1,0 @@ -/* - * Copyright (c) 2001-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia32 - * @{ - */ -/** @file - */ - -#ifndef KERN_ia32_APIC_H_ -#define KERN_ia32_APIC_H_ - -#include -#include - -#define FIXED (0 << 0) -#define LOPRI (1 << 0) - -#define APIC_ID_COUNT 16 - -/* local APIC macros */ -#define IPI_INIT 0 -#define IPI_STARTUP 0 - -/** Delivery modes. */ -#define DELMOD_FIXED 0x0U -#define DELMOD_LOWPRI 0x1U -#define DELMOD_SMI 0x2U -/* 0x3 reserved */ -#define DELMOD_NMI 0x4U -#define DELMOD_INIT 0x5U -#define DELMOD_STARTUP 0x6U -#define DELMOD_EXTINT 0x7U - -/** Destination modes. */ -#define DESTMOD_PHYS 0x0U -#define DESTMOD_LOGIC 0x1U - -/** Trigger Modes. */ -#define TRIGMOD_EDGE 0x0U -#define TRIGMOD_LEVEL 0x1U - -/** Levels. */ -#define LEVEL_DEASSERT 0x0U -#define LEVEL_ASSERT 0x1U - -/** Destination Shorthands. */ -#define SHORTHAND_NONE 0x0U -#define SHORTHAND_SELF 0x1U -#define SHORTHAND_ALL_INCL 0x2U -#define SHORTHAND_ALL_EXCL 0x3U - -/** Interrupt Input Pin Polarities. */ -#define POLARITY_HIGH 0x0U -#define POLARITY_LOW 0x1U - -/** Divide Values. (Bit 2 is always 0) */ -#define DIVIDE_2 0x0U -#define DIVIDE_4 0x1U -#define DIVIDE_8 0x2U -#define DIVIDE_16 0x3U -#define DIVIDE_32 0x8U -#define DIVIDE_64 0x9U -#define DIVIDE_128 0xaU -#define DIVIDE_1 0xbU - -/** Timer Modes. */ -#define TIMER_ONESHOT 0x0U -#define TIMER_PERIODIC 0x1U - -/** Delivery status. */ -#define DELIVS_IDLE 0x0U -#define DELIVS_PENDING 0x1U - -/** Destination masks. */ -#define DEST_ALL 0xffU - -/** Dest format models. */ -#define MODEL_FLAT 0xfU -#define MODEL_CLUSTER 0x0U - -/** Interrupt Command Register. */ -#define ICRlo (0x300U / sizeof(uint32_t)) -#define ICRhi (0x310U / sizeof(uint32_t)) - -typedef struct { - union { - uint32_t lo; - struct { - uint8_t vector; /**< Interrupt Vector. */ - unsigned int delmod : 3; /**< Delivery Mode. */ - unsigned int destmod : 1; /**< Destination Mode. */ - unsigned int delivs : 1; /**< Delivery status (RO). */ - unsigned int : 1; /**< Reserved. */ - unsigned int level : 1; /**< Level. */ - unsigned int trigger_mode : 1; /**< Trigger Mode. */ - unsigned int : 2; /**< Reserved. */ - unsigned int shorthand : 2; /**< Destination Shorthand. */ - unsigned int : 12; /**< Reserved. */ - } __attribute__ ((packed)); - }; - union { - uint32_t hi; - struct { - unsigned int : 24; /**< Reserved. */ - uint8_t dest; /**< Destination field. */ - } __attribute__ ((packed)); - }; -} __attribute__ ((packed)) icr_t; - -/* End Of Interrupt. */ -#define EOI (0x0b0U / sizeof(uint32_t)) - -/** Error Status Register. */ -#define ESR (0x280U / sizeof(uint32_t)) - -typedef union { - uint32_t value; - uint8_t err_bitmap; - struct { - unsigned int send_checksum_error : 1; - unsigned int receive_checksum_error : 1; - unsigned int send_accept_error : 1; - unsigned int receive_accept_error : 1; - unsigned int : 1; - unsigned int send_illegal_vector : 1; - unsigned int received_illegal_vector : 1; - unsigned int illegal_register_address : 1; - unsigned int : 24; - } __attribute__ ((packed)); -} esr_t; - -/* Task Priority Register */ -#define TPR (0x080U / sizeof(uint32_t)) - -typedef union { - uint32_t value; - struct { - unsigned int pri_sc : 4; /**< Task Priority Sub-Class. */ - unsigned int pri : 4; /**< Task Priority. */ - } __attribute__ ((packed)); -} tpr_t; - -/** Spurious-Interrupt Vector Register. */ -#define SVR (0x0f0U / sizeof(uint32_t)) - -typedef union { - uint32_t value; - struct { - uint8_t vector; /**< Spurious Vector. */ - unsigned int lapic_enabled : 1; /**< APIC Software Enable/Disable. */ - unsigned int focus_checking : 1; /**< Focus Processor Checking. */ - unsigned int : 22; /**< Reserved. */ - } __attribute__ ((packed)); -} svr_t; - -/** Time Divide Configuration Register. */ -#define TDCR (0x3e0U / sizeof(uint32_t)) - -typedef union { - uint32_t value; - struct { - unsigned int div_value : 4; /**< Divide Value, bit 2 is always 0. */ - unsigned int : 28; /**< Reserved. */ - } __attribute__ ((packed)); -} tdcr_t; - -/* Initial Count Register for Timer */ -#define ICRT (0x380U / sizeof(uint32_t)) - -/* Current Count Register for Timer */ -#define CCRT (0x390U / sizeof(uint32_t)) - -/** LVT Timer register. */ -#define LVT_Tm (0x320U / sizeof(uint32_t)) - -typedef union { - uint32_t value; - struct { - uint8_t vector; /**< Local Timer Interrupt vector. */ - unsigned int : 4; /**< Reserved. */ - unsigned int delivs : 1; /**< Delivery status (RO). */ - unsigned int : 3; /**< Reserved. */ - unsigned int masked : 1; /**< Interrupt Mask. */ - unsigned int mode : 1; /**< Timer Mode. */ - unsigned int : 14; /**< Reserved. */ - } __attribute__ ((packed)); -} lvt_tm_t; - -/** LVT LINT registers. */ -#define LVT_LINT0 (0x350U / sizeof(uint32_t)) -#define LVT_LINT1 (0x360U / sizeof(uint32_t)) - -typedef union { - uint32_t value; - struct { - uint8_t vector; /**< LINT Interrupt vector. */ - unsigned int delmod : 3; /**< Delivery Mode. */ - unsigned int : 1; /**< Reserved. */ - unsigned int delivs : 1; /**< Delivery status (RO). */ - unsigned int intpol : 1; /**< Interrupt Input Pin Polarity. */ - unsigned int irr : 1; /**< Remote IRR (RO). */ - unsigned int trigger_mode : 1; /**< Trigger Mode. */ - unsigned int masked : 1; /**< Interrupt Mask. */ - unsigned int : 15; /**< Reserved. */ - } __attribute__ ((packed)); -} lvt_lint_t; - -/** LVT Error register. */ -#define LVT_Err (0x370U / sizeof(uint32_t)) - -typedef union { - uint32_t value; - struct { - uint8_t vector; /**< Local Timer Interrupt vector. */ - unsigned int : 4; /**< Reserved. */ - unsigned int delivs : 1; /**< Delivery status (RO). */ - unsigned int : 3; /**< Reserved. */ - unsigned int masked : 1; /**< Interrupt Mask. */ - unsigned int : 15; /**< Reserved. */ - } __attribute__ ((packed)); -} lvt_error_t; - -/** Local APIC ID Register. */ -#define L_APIC_ID (0x020U / sizeof(uint32_t)) - -typedef union { - uint32_t value; - struct { - unsigned int : 24; /**< Reserved. */ - uint8_t apic_id; /**< Local APIC ID. */ - } __attribute__ ((packed)); -} l_apic_id_t; - -/** Local APIC Version Register */ -#define LAVR (0x030U / sizeof(uint32_t)) -#define LAVR_Mask 0xffU - -#define is_local_apic(x) (((x) & LAVR_Mask & 0xf0U) == 0x1U) -#define is_82489DX_apic(x) ((((x) & LAVR_Mask & 0xf0U) == 0x0U)) -#define is_local_xapic(x) (((x) & LAVR_Mask) == 0x14U) - -/** Logical Destination Register. */ -#define LDR (0x0d0U / sizeof(uint32_t)) - -typedef union { - uint32_t value; - struct { - unsigned int : 24; /**< Reserved. */ - uint8_t id; /**< Logical APIC ID. */ - } __attribute__ ((packed)); -} ldr_t; - -/** Destination Format Register. */ -#define DFR (0x0e0U / sizeof(uint32_t)) - -typedef union { - uint32_t value; - struct { - unsigned int : 28; /**< Reserved, all ones. */ - unsigned int model : 4; /**< Model. */ - } __attribute__ ((packed)); -} dfr_t; - -/* IO APIC */ -#define IOREGSEL (0x00U / sizeof(uint32_t)) -#define IOWIN (0x10U / sizeof(uint32_t)) - -#define IOAPICID 0x00U -#define IOAPICVER 0x01U -#define IOAPICARB 0x02U -#define IOREDTBL 0x10U - -/** I/O Register Select Register. */ -typedef union { - uint32_t value; - struct { - uint8_t reg_addr; /**< APIC Register Address. */ - unsigned int : 24; /**< Reserved. */ - } __attribute__ ((packed)); -} io_regsel_t; - -/** I/O Redirection Register. */ -typedef struct io_redirection_reg { - union { - uint32_t lo; - struct { - uint8_t intvec; /**< Interrupt Vector. */ - unsigned int delmod : 3; /**< Delivery Mode. */ - unsigned int destmod : 1; /**< Destination mode. */ - unsigned int delivs : 1; /**< Delivery status (RO). */ - unsigned int intpol : 1; /**< Interrupt Input Pin Polarity. */ - unsigned int irr : 1; /**< Remote IRR (RO). */ - unsigned int trigger_mode : 1; /**< Trigger Mode. */ - unsigned int masked : 1; /**< Interrupt Mask. */ - unsigned int : 15; /**< Reserved. */ - } __attribute__ ((packed)); - }; - union { - uint32_t hi; - struct { - unsigned int : 24; /**< Reserved. */ - uint8_t dest : 8; /**< Destination Field. */ - } __attribute__ ((packed)); - }; - -} __attribute__ ((packed)) io_redirection_reg_t; - - -/** IO APIC Identification Register. */ -typedef union { - uint32_t value; - struct { - unsigned int : 24; /**< Reserved. */ - unsigned int apic_id : 4; /**< IO APIC ID. */ - unsigned int : 4; /**< Reserved. */ - } __attribute__ ((packed)); -} io_apic_id_t; - -extern volatile uint32_t *l_apic; -extern volatile uint32_t *io_apic; - -extern uint32_t apic_id_mask; -extern uint8_t bsp_l_apic; - -extern void apic_init(void); - -extern void l_apic_init(void); -extern void l_apic_eoi(void); -extern int l_apic_broadcast_custom_ipi(uint8_t); -extern int l_apic_send_init_ipi(uint8_t); -extern void l_apic_debug(void); - -extern uint32_t io_apic_read(uint8_t); -extern void io_apic_write(uint8_t, uint32_t); -extern void io_apic_change_ioredtbl(uint8_t pin, uint8_t dest, uint8_t v, unsigned int); -extern void io_apic_disable_irqs(uint16_t); -extern void io_apic_enable_irqs(uint16_t); - -#endif - -/** @} - */ Index: kernel/arch/ia32/include/smp/mps.h =================================================================== --- kernel/arch/ia32/include/smp/mps.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,129 +1,0 @@ -/* - * Copyright (c) 2001-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia32 - * @{ - */ -/** @file - */ - -#ifndef KERN_ia32_MPS_H_ -#define KERN_ia32_MPS_H_ - -#include -#include -#include -#include - -#define CT_EXT_ENTRY_TYPE 0 -#define CT_EXT_ENTRY_LEN 1 - -struct mps_fs { - uint32_t signature; - uint32_t configuration_table; - uint8_t length; - uint8_t revision; - uint8_t checksum; - uint8_t config_type; - uint8_t mpfib2; - uint8_t mpfib3; - uint8_t mpfib4; - uint8_t mpfib5; -} __attribute__ ((packed)); - -struct mps_ct { - uint32_t signature; - uint16_t base_table_length; - uint8_t revision; - uint8_t checksum; - uint8_t oem_id[8]; - uint8_t product_id[12]; - uint32_t oem_table; - uint16_t oem_table_size; - uint16_t entry_count; - uint32_t l_apic; - uint16_t ext_table_length; - uint8_t ext_table_checksum; - uint8_t reserved; - uint8_t base_table[0]; -} __attribute__ ((packed)); - -struct __processor_entry { - uint8_t type; - uint8_t l_apic_id; - uint8_t l_apic_version; - uint8_t cpu_flags; - uint8_t cpu_signature[4]; - uint32_t feature_flags; - uint32_t reserved[2]; -} __attribute__ ((packed)); - -struct __bus_entry { - uint8_t type; - uint8_t bus_id; - uint8_t bus_type[6]; -} __attribute__ ((packed)); - -struct __io_apic_entry { - uint8_t type; - uint8_t io_apic_id; - uint8_t io_apic_version; - uint8_t io_apic_flags; - uint32_t io_apic; -} __attribute__ ((packed)); - -struct __io_intr_entry { - uint8_t type; - uint8_t intr_type; - uint8_t poel; - uint8_t reserved; - uint8_t src_bus_id; - uint8_t src_bus_irq; - uint8_t dst_io_apic_id; - uint8_t dst_io_apic_pin; -} __attribute__ ((packed)); - -struct __l_intr_entry { - uint8_t type; - uint8_t intr_type; - uint8_t poel; - uint8_t reserved; - uint8_t src_bus_id; - uint8_t src_bus_irq; - uint8_t dst_l_apic_id; - uint8_t dst_l_apic_pin; -} __attribute__ ((packed)); - -extern struct smp_config_operations mps_config_operations; - -extern void mps_init(void); - -#endif - -/** @} - */ Index: kernel/arch/ia32/include/smp/smp.h =================================================================== --- kernel/arch/ia32/include/smp/smp.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,60 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia32 - * @{ - */ -/** @file - */ - -#ifndef KERN_ia32_SMP_H_ -#define KERN_ia32_SMP_H_ - -#include - -/** SMP config opertaions interface. */ -struct smp_config_operations { - /** Check whether a processor is enabled. */ - bool (* cpu_enabled)(size_t); - - /** Check whether a processor is BSP. */ - bool (*cpu_bootstrap)(size_t); - - /** Return APIC ID of a processor. */ - uint8_t (*cpu_apic_id)(size_t); - - /** Return mapping between IRQ and APIC pin. */ - int (*irq_to_pin)(unsigned int); -}; - -extern int smp_irq_to_pin(unsigned int); - -#endif - -/** @} - */ Index: kernel/arch/ia32/include/syscall.h =================================================================== --- kernel/arch/ia32/include/syscall.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,1 +1,0 @@ -../../amd64/include/syscall.h Index: kernel/arch/ia32/include/types.h =================================================================== --- kernel/arch/ia32/include/types.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,64 +1,0 @@ -/* - * Copyright (c) 2001-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia32 - * @{ - */ -/** @file - */ - -#ifndef KERN_ia32_TYPES_H_ -#define KERN_ia32_TYPES_H_ - -typedef uint32_t size_t; -typedef int32_t ssize_t; - -typedef uint32_t uintptr_t; -typedef uint32_t pfn_t; - -typedef uint32_t ipl_t; - -typedef uint32_t sysarg_t; -typedef int32_t native_t; -typedef uint32_t atomic_count_t; - -typedef struct { -} fncptr_t; - -#define INTN_C(c) INT32_C(c) -#define UINTN_C(c) UINT32_C(c) - -#define PRIdn PRId32 /**< Format for native_t. */ -#define PRIun PRIu32 /**< Format for sysarg_t. */ -#define PRIxn PRIx32 /**< Format for hexadecimal sysarg_t. */ -#define PRIua PRIu32 /**< Format for atomic_count_t. */ - -#endif - -/** @} - */ Index: kernel/arch/ia64/include/arch.h =================================================================== --- kernel/arch/ia64/include/arch.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,43 +1,0 @@ -/* - * Copyright (c) 2005 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia64 - * @{ - */ -/** @file - */ - -#ifndef KERN_ia64_ARCH_H_ -#define KERN_ia64_ARCH_H_ - -extern void arch_pre_main(void); - -#endif - -/** @} - */ Index: kernel/arch/ia64/include/arch/arch.h =================================================================== --- kernel/arch/ia64/include/arch/arch.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ia64/include/arch/arch.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,43 @@ +/* + * Copyright (c) 2005 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia64 + * @{ + */ +/** @file + */ + +#ifndef KERN_ia64_ARCH_H_ +#define KERN_ia64_ARCH_H_ + +extern void arch_pre_main(void); + +#endif + +/** @} + */ Index: kernel/arch/ia64/include/arch/asm.h =================================================================== --- kernel/arch/ia64/include/arch/asm.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ia64/include/arch/asm.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,492 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia64 + * @{ + */ +/** @file + */ + +#ifndef KERN_ia64_ASM_H_ +#define KERN_ia64_ASM_H_ + +#include +#include +#include +#include +#include + +#define IO_SPACE_BOUNDARY ((void *) (64 * 1024)) + +/** Map the I/O port address to a legacy I/O address. */ +NO_TRACE static inline uintptr_t p2a(volatile void *p) +{ + uintptr_t prt = (uintptr_t) p; + + return legacyio_virt_base + (((prt >> 2) << 12) | (prt & 0xfff)); +} + +NO_TRACE static inline void pio_write_8(ioport8_t *port, uint8_t v) +{ + if (port < (ioport8_t *) IO_SPACE_BOUNDARY) + *((ioport8_t *) p2a(port)) = v; + else + *port = v; + + asm volatile ( + "mf\n" + "mf.a\n" + ::: "memory" + ); +} + +NO_TRACE static inline void pio_write_16(ioport16_t *port, uint16_t v) +{ + if (port < (ioport16_t *) IO_SPACE_BOUNDARY) + *((ioport16_t *) p2a(port)) = v; + else + *port = v; + + asm volatile ( + "mf\n" + "mf.a\n" + ::: "memory" + ); +} + +NO_TRACE static inline void pio_write_32(ioport32_t *port, uint32_t v) +{ + if (port < (ioport32_t *) IO_SPACE_BOUNDARY) + *((ioport32_t *) p2a(port)) = v; + else + *port = v; + + asm volatile ( + "mf\n" + "mf.a\n" + ::: "memory" + ); +} + +NO_TRACE static inline uint8_t pio_read_8(ioport8_t *port) +{ + uint8_t v; + + asm volatile ( + "mf\n" + ::: "memory" + ); + + if (port < (ioport8_t *) IO_SPACE_BOUNDARY) + v = *((ioport8_t *) p2a(port)); + else + v = *port; + + asm volatile ( + "mf.a\n" + ::: "memory" + ); + + return v; +} + +NO_TRACE static inline uint16_t pio_read_16(ioport16_t *port) +{ + uint16_t v; + + asm volatile ( + "mf\n" + ::: "memory" + ); + + if (port < (ioport16_t *) IO_SPACE_BOUNDARY) + v = *((ioport16_t *) p2a(port)); + else + v = *port; + + asm volatile ( + "mf.a\n" + ::: "memory" + ); + + return v; +} + +NO_TRACE static inline uint32_t pio_read_32(ioport32_t *port) +{ + uint32_t v; + + asm volatile ( + "mf\n" + ::: "memory" + ); + + if (port < (ioport32_t *) IO_SPACE_BOUNDARY) + v = *((ioport32_t *) p2a(port)); + else + v = *port; + + asm volatile ( + "mf.a\n" + ::: "memory" + ); + + return v; +} + +/** Return base address of current memory stack. + * + * The memory stack is assumed to be STACK_SIZE / 2 long. Note that there is + * also the RSE stack, which takes up the upper half of STACK_SIZE. + * The memory stack must start on page boundary. + */ +NO_TRACE static inline uintptr_t get_stack_base(void) +{ + uint64_t value; + + asm volatile ( + "mov %[value] = r12" + : [value] "=r" (value) + ); + + return (value & (~(STACK_SIZE / 2 - 1))); +} + +/** Return Processor State Register. + * + * @return PSR. + * + */ +NO_TRACE static inline uint64_t psr_read(void) +{ + uint64_t v; + + asm volatile ( + "mov %[value] = psr\n" + : [value] "=r" (v) + ); + + return v; +} + +/** Read IVA (Interruption Vector Address). + * + * @return Return location of interruption vector table. + * + */ +NO_TRACE static inline uint64_t iva_read(void) +{ + uint64_t v; + + asm volatile ( + "mov %[value] = cr.iva\n" + : [value] "=r" (v) + ); + + return v; +} + +/** Write IVA (Interruption Vector Address) register. + * + * @param v New location of interruption vector table. + * + */ +NO_TRACE static inline void iva_write(uint64_t v) +{ + asm volatile ( + "mov cr.iva = %[value]\n" + :: [value] "r" (v) + ); +} + +/** Read IVR (External Interrupt Vector Register). + * + * @return Highest priority, pending, unmasked external + * interrupt vector. + * + */ +NO_TRACE static inline uint64_t ivr_read(void) +{ + uint64_t v; + + asm volatile ( + "mov %[value] = cr.ivr\n" + : [value] "=r" (v) + ); + + return v; +} + +NO_TRACE static inline uint64_t cr64_read(void) +{ + uint64_t v; + + asm volatile ( + "mov %[value] = cr64\n" + : [value] "=r" (v) + ); + + return v; +} + +/** Write ITC (Interval Timer Counter) register. + * + * @param v New counter value. + * + */ +NO_TRACE static inline void itc_write(uint64_t v) +{ + asm volatile ( + "mov ar.itc = %[value]\n" + :: [value] "r" (v) + ); +} + +/** Read ITC (Interval Timer Counter) register. + * + * @return Current counter value. + * + */ +NO_TRACE static inline uint64_t itc_read(void) +{ + uint64_t v; + + asm volatile ( + "mov %[value] = ar.itc\n" + : [value] "=r" (v) + ); + + return v; +} + +/** Write ITM (Interval Timer Match) register. + * + * @param v New match value. + * + */ +NO_TRACE static inline void itm_write(uint64_t v) +{ + asm volatile ( + "mov cr.itm = %[value]\n" + :: [value] "r" (v) + ); +} + +/** Read ITM (Interval Timer Match) register. + * + * @return Match value. + * + */ +NO_TRACE static inline uint64_t itm_read(void) +{ + uint64_t v; + + asm volatile ( + "mov %[value] = cr.itm\n" + : [value] "=r" (v) + ); + + return v; +} + +/** Read ITV (Interval Timer Vector) register. + * + * @return Current vector and mask bit. + * + */ +NO_TRACE static inline uint64_t itv_read(void) +{ + uint64_t v; + + asm volatile ( + "mov %[value] = cr.itv\n" + : [value] "=r" (v) + ); + + return v; +} + +/** Write ITV (Interval Timer Vector) register. + * + * @param v New vector and mask bit. + * + */ +NO_TRACE static inline void itv_write(uint64_t v) +{ + asm volatile ( + "mov cr.itv = %[value]\n" + :: [value] "r" (v) + ); +} + +/** Write EOI (End Of Interrupt) register. + * + * @param v This value is ignored. + * + */ +NO_TRACE static inline void eoi_write(uint64_t v) +{ + asm volatile ( + "mov cr.eoi = %[value]\n" + :: [value] "r" (v) + ); +} + +/** Read TPR (Task Priority Register). + * + * @return Current value of TPR. + * + */ +NO_TRACE static inline uint64_t tpr_read(void) +{ + uint64_t v; + + asm volatile ( + "mov %[value] = cr.tpr\n" + : [value] "=r" (v) + ); + + return v; +} + +/** Write TPR (Task Priority Register). + * + * @param v New value of TPR. + * + */ +NO_TRACE static inline void tpr_write(uint64_t v) +{ + asm volatile ( + "mov cr.tpr = %[value]\n" + :: [value] "r" (v) + ); +} + +/** Disable interrupts. + * + * Disable interrupts and return previous + * value of PSR. + * + * @return Old interrupt priority level. + * + */ +NO_TRACE static ipl_t interrupts_disable(void) +{ + uint64_t v; + + asm volatile ( + "mov %[value] = psr\n" + "rsm %[mask]\n" + : [value] "=r" (v) + : [mask] "i" (PSR_I_MASK) + ); + + return (ipl_t) v; +} + +/** Enable interrupts. + * + * Enable interrupts and return previous + * value of PSR. + * + * @return Old interrupt priority level. + * + */ +NO_TRACE static ipl_t interrupts_enable(void) +{ + uint64_t v; + + asm volatile ( + "mov %[value] = psr\n" + "ssm %[mask]\n" + ";;\n" + "srlz.d\n" + : [value] "=r" (v) + : [mask] "i" (PSR_I_MASK) + ); + + return (ipl_t) v; +} + +/** Restore interrupt priority level. + * + * Restore PSR. + * + * @param ipl Saved interrupt priority level. + * + */ +NO_TRACE static inline void interrupts_restore(ipl_t ipl) +{ + if (ipl & PSR_I_MASK) + (void) interrupts_enable(); + else + (void) interrupts_disable(); +} + +/** Return interrupt priority level. + * + * @return PSR. + * + */ +NO_TRACE static inline ipl_t interrupts_read(void) +{ + return (ipl_t) psr_read(); +} + +/** Check interrupts state. + * + * @return True if interrupts are disabled. + * + */ +NO_TRACE static inline bool interrupts_disabled(void) +{ + return !(psr_read() & PSR_I_MASK); +} + +/** Disable protection key checking. */ +NO_TRACE static inline void pk_disable(void) +{ + asm volatile ( + "rsm %[mask]\n" + ";;\n" + "srlz.d\n" + :: [mask] "i" (PSR_PK_MASK) + ); +} + +extern void cpu_halt(void) __attribute__((noreturn)); +extern void cpu_sleep(void); +extern void asm_delay_loop(uint32_t t); + +extern void switch_to_userspace(uintptr_t, uintptr_t, uintptr_t, uintptr_t, + uint64_t, uint64_t); + +#endif + +/** @} + */ Index: kernel/arch/ia64/include/arch/atomic.h =================================================================== --- kernel/arch/ia64/include/arch/atomic.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ia64/include/arch/atomic.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,138 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia64 + * @{ + */ +/** @file + */ + +#ifndef KERN_ia64_ATOMIC_H_ +#define KERN_ia64_ATOMIC_H_ + +#include + +NO_TRACE static inline atomic_count_t test_and_set(atomic_t *val) +{ + atomic_count_t v; + + asm volatile ( + "movl %[v] = 0x1;;\n" + "xchg8 %[v] = %[count], %[v];;\n" + : [v] "=r" (v), + [count] "+m" (val->count) + ); + + return v; +} + +NO_TRACE static inline void atomic_lock_arch(atomic_t *val) +{ + do { + while (val->count); + } while (test_and_set(val)); +} + +NO_TRACE static inline void atomic_inc(atomic_t *val) +{ + atomic_count_t v; + + asm volatile ( + "fetchadd8.rel %[v] = %[count], 1\n" + : [v] "=r" (v), + [count] "+m" (val->count) + ); +} + +NO_TRACE static inline void atomic_dec(atomic_t *val) +{ + atomic_count_t v; + + asm volatile ( + "fetchadd8.rel %[v] = %[count], -1\n" + : [v] "=r" (v), + [count] "+m" (val->count) + ); +} + +NO_TRACE static inline atomic_count_t atomic_preinc(atomic_t *val) +{ + atomic_count_t v; + + asm volatile ( + "fetchadd8.rel %[v] = %[count], 1\n" + : [v] "=r" (v), + [count] "+m" (val->count) + ); + + return (v + 1); +} + +NO_TRACE static inline atomic_count_t atomic_predec(atomic_t *val) +{ + atomic_count_t v; + + asm volatile ( + "fetchadd8.rel %[v] = %[count], -1\n" + : [v] "=r" (v), + [count] "+m" (val->count) + ); + + return (v - 1); +} + +NO_TRACE static inline atomic_count_t atomic_postinc(atomic_t *val) +{ + atomic_count_t v; + + asm volatile ( + "fetchadd8.rel %[v] = %[count], 1\n" + : [v] "=r" (v), + [count] "+m" (val->count) + ); + + return v; +} + +NO_TRACE static inline atomic_count_t atomic_postdec(atomic_t *val) +{ + atomic_count_t v; + + asm volatile ( + "fetchadd8.rel %[v] = %[count], -1\n" + : [v] "=r" (v), + [count] "+m" (val->count) + ); + + return v; +} + +#endif + +/** @} + */ Index: kernel/arch/ia64/include/arch/barrier.h =================================================================== --- kernel/arch/ia64/include/arch/barrier.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ia64/include/arch/barrier.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,78 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia64 + * @{ + */ +/** @file + */ + +#ifndef KERN_ia64_BARRIER_H_ +#define KERN_ia64_BARRIER_H_ + +/* + * TODO: Implement true IA-64 memory barriers for macros below. + */ +#define CS_ENTER_BARRIER() memory_barrier() +#define CS_LEAVE_BARRIER() memory_barrier() + +#define memory_barrier() asm volatile ("mf\n" ::: "memory") +#define read_barrier() memory_barrier() +#define write_barrier() memory_barrier() + +#define srlz_i() \ + asm volatile (";; srlz.i ;;\n" ::: "memory") +#define srlz_d() \ + asm volatile (";; srlz.d\n" ::: "memory") + +#define fc_i(a) \ + asm volatile ("fc.i %0\n" :: "r" ((a)) : "memory") +#define sync_i() \ + asm volatile (";; sync.i\n" ::: "memory") + +#define smc_coherence(a) \ +{ \ + fc_i((a)); \ + sync_i(); \ + srlz_i(); \ +} + +#define FC_INVAL_MIN 32 +#define smc_coherence_block(a, l) \ +{ \ + unsigned long i; \ + for (i = 0; i < (l); i += FC_INVAL_MIN) \ + fc_i((void *)(a) + i); \ + sync_i(); \ + srlz_i(); \ +} + +#endif + +/** @} + */ Index: kernel/arch/ia64/include/arch/bootinfo.h =================================================================== --- kernel/arch/ia64/include/arch/bootinfo.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ia64/include/arch/bootinfo.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,72 @@ +/* + * Copyright (c) 2005 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef KERN_ia64_BOOTINFO_H_ +#define KERN_ia64_BOOTINFO_H_ + +#define TASKMAP_MAX_RECORDS 32 + +#define MEMMAP_ITEMS 128 + +#define MEMMAP_FREE_MEM 0 + +/** Size of buffer for storing task name in binit_task_t. */ +#define BOOTINFO_TASK_NAME_BUFLEN 32 + +typedef struct { + void *addr; + size_t size; + char name[BOOTINFO_TASK_NAME_BUFLEN]; +} binit_task_t; + +typedef struct { + size_t cnt; + binit_task_t tasks[TASKMAP_MAX_RECORDS]; +} binit_t; + +typedef struct { + unsigned int type; + unsigned long base; + unsigned long size; +} memmap_item_t; + +typedef struct { + binit_t taskmap; + + memmap_item_t memmap[MEMMAP_ITEMS]; + unsigned int memmap_items; + + sysarg_t *sapic; + unsigned long sys_freq; + unsigned long freq_scale; + unsigned int wakeup_intno; +} bootinfo_t; + +extern bootinfo_t *bootinfo; + +#endif Index: kernel/arch/ia64/include/arch/context.h =================================================================== --- kernel/arch/ia64/include/arch/context.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ia64/include/arch/context.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,131 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia64 + * @{ + */ +/** @file + */ + +#ifndef KERN_ia64_CONTEXT_H_ +#define KERN_ia64_CONTEXT_H_ + +#include +#include +#include +#include + +/* + * context_save_arch() and context_restore_arch() are both leaf procedures. + * No need to allocate scratch area. + * + * One item is put onto the stack to support get_stack_base(). + */ +#define SP_DELTA (0 + ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT)) + +/* RSE stack starts at the bottom of memory stack, hence the division by 2. */ +#define context_set(c, _pc, stack, size) \ + do { \ + (c)->pc = (uintptr_t) _pc; \ + (c)->bsp = ((uintptr_t) stack) + ALIGN_UP((size / 2), REGISTER_STACK_ALIGNMENT); \ + (c)->ar_pfs &= PFM_MASK; \ + (c)->sp = ((uintptr_t) stack) + ALIGN_UP((size / 2), STACK_ALIGNMENT) - SP_DELTA; \ + } while (0) + +/* + * Only save registers that must be preserved across + * function calls. + */ +typedef struct { + + /* + * Application registers + */ + uint64_t ar_pfs; + uint64_t ar_unat_caller; + uint64_t ar_unat_callee; + uint64_t ar_rsc; + uintptr_t bsp; /* ar_bsp */ + uint64_t ar_rnat; + uint64_t ar_lc; + + /* + * General registers + */ + uint64_t r1; + uint64_t r4; + uint64_t r5; + uint64_t r6; + uint64_t r7; + uintptr_t sp; /* r12 */ + uint64_t r13; + + /* + * Branch registers + */ + uintptr_t pc; /* b0 */ + uint64_t b1; + uint64_t b2; + uint64_t b3; + uint64_t b4; + uint64_t b5; + + /* + * Predicate registers + */ + uint64_t pr; + + uint128_t f2 __attribute__ ((aligned(16))); + uint128_t f3; + uint128_t f4; + uint128_t f5; + + uint128_t f16; + uint128_t f17; + uint128_t f18; + uint128_t f19; + uint128_t f20; + uint128_t f21; + uint128_t f22; + uint128_t f23; + uint128_t f24; + uint128_t f25; + uint128_t f26; + uint128_t f27; + uint128_t f28; + uint128_t f29; + uint128_t f30; + uint128_t f31; + + ipl_t ipl; +} context_t; + +#endif + +/** @} + */ Index: kernel/arch/ia64/include/arch/cpu.h =================================================================== --- kernel/arch/ia64/include/arch/cpu.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ia64/include/arch/cpu.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,99 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia64 + * @{ + */ +/** @file + */ + +#ifndef KERN_ia64_CPU_H_ +#define KERN_ia64_CPU_H_ + +#include +#include +#include +#include +#include + +#define FAMILY_ITANIUM 0x7 +#define FAMILY_ITANIUM2 0x1f + +#define CR64_ID_SHIFT 24 +#define CR64_ID_MASK 0xff000000 +#define CR64_EID_SHIFT 16 +#define CR64_EID_MASK 0xff0000 + +typedef struct { + uint64_t cpuid0; + uint64_t cpuid1; + cpuid3_t cpuid3; +} cpu_arch_t; + +/** Read CPUID register. + * + * @param n CPUID register number. + * + * @return Value of CPUID[n] register. + * + */ +NO_TRACE static inline uint64_t cpuid_read(int n) +{ + uint64_t v; + + asm volatile ( + "mov %[v] = cpuid[%[r]]\n" + : [v] "=r" (v) + : [r] "r" (n) + ); + + return v; +} + +NO_TRACE static inline int ia64_get_cpu_id(void) +{ + uint64_t cr64 = cr64_read(); + return ((CR64_ID_MASK) &cr64) >> CR64_ID_SHIFT; +} + +NO_TRACE static inline int ia64_get_cpu_eid(void) +{ + uint64_t cr64 = cr64_read(); + return ((CR64_EID_MASK) &cr64) >> CR64_EID_SHIFT; +} + +NO_TRACE static inline void ipi_send_ipi(int id, int eid, int intno) +{ + (bootinfo->sapic)[2 * (id * 256 + eid)] = intno; + srlz_d(); +} + +#endif + +/** @} + */ Index: kernel/arch/ia64/include/arch/cycle.h =================================================================== --- kernel/arch/ia64/include/arch/cycle.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ia64/include/arch/cycle.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,48 @@ +/* + * Copyright (c) 2006 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia64 + * @{ + */ +/** @file + */ + +#ifndef KERN_ia64_CYCLE_H_ +#define KERN_ia64_CYCLE_H_ + +#include + +NO_TRACE static inline uint64_t get_cycle(void) +{ + return 0; +} + +#endif + +/** @} + */ Index: kernel/arch/ia64/include/arch/drivers/it.h =================================================================== --- kernel/arch/ia64/include/arch/drivers/it.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ia64/include/arch/drivers/it.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,51 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia64 + * @{ + */ +/** @file + */ + +#ifndef KERN_ia64_IT_H_ +#define KERN_ia64_IT_H_ + +/* + * Unfortunately, Ski does not emulate PAL, + * so we can't read the real frequency ratios + * from firmware. + * + */ +#define IT_DELTA it_delta + +extern void it_init(void); + +#endif + +/** @} + */ Index: kernel/arch/ia64/include/arch/drivers/kbd.h =================================================================== --- kernel/arch/ia64/include/arch/drivers/kbd.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ia64/include/arch/drivers/kbd.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,46 @@ +/* + * Copyright (c) 2006 Jakub Jermar, Jakub Vana + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia6464 + * @{ + */ +/** @file + */ + +#ifndef KERN_ia64_KBD_H_ +#define KERN_ia64_KBD_H_ + +#define KBD_UNKNOWN 0 +#define KBD_SKI 1 +#define KBD_LEGACY 2 +#define KBD_NS16550 3 + +#endif + +/** @} + */ Index: kernel/arch/ia64/include/arch/drivers/ski.h =================================================================== --- kernel/arch/ia64/include/arch/drivers/ski.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ia64/include/arch/drivers/ski.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,54 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia64 + * @{ + */ +/** @file + */ + +#ifndef KERN_ia64_SKI_H_ +#define KERN_ia64_SKI_H_ + +#include +#include + +typedef struct { + thread_t *thread; + indev_t *srlnin; +} ski_instance_t; + +extern outdev_t *skiout_init(void); + +extern ski_instance_t *skiin_init(void); +extern void skiin_wire(ski_instance_t *, indev_t *); + +#endif + +/** @} + */ Index: kernel/arch/ia64/include/arch/elf.h =================================================================== --- kernel/arch/ia64/include/arch/elf.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ia64/include/arch/elf.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2006 Sergey Bondari + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia64 + * @{ + */ +/** @file + */ + +#ifndef KERN_ia64_ELF_H_ +#define KERN_ia64_ELF_H_ + +#define ELF_MACHINE EM_IA_64 +#define ELF_DATA_ENCODING ELFDATA2LSB +#define ELF_CLASS ELFCLASS64 + +#endif + +/** @} + */ Index: kernel/arch/ia64/include/arch/faddr.h =================================================================== --- kernel/arch/ia64/include/arch/faddr.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ia64/include/arch/faddr.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,53 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia64 + * @{ + */ +/** @file + */ + +#ifndef KERN_ia64_FADDR_H_ +#define KERN_ia64_FADDR_H_ + +#include + +/** + * + * Calculate absolute address of function + * referenced by fptr pointer. + * + * @param fptr Function pointer. + * + */ +#define FADDR(fptr) (((fncptr_t *) (fptr))->fnc) + +#endif + +/** @} + */ Index: kernel/arch/ia64/include/arch/fpu_context.h =================================================================== --- kernel/arch/ia64/include/arch/fpu_context.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ia64/include/arch/fpu_context.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,51 @@ +/* + * Copyright (c) 2005 Jakub Vana + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia64 + * @{ + */ +/** @file + */ + +#ifndef KERN_ia64_FPU_CONTEXT_H_ +#define KERN_ia64_FPU_CONTEXT_H_ + +#define FPU_CONTEXT_ALIGN 16 + +#include + +#define FRS 96 + +typedef struct { + uint128_t fr[FRS]; +} fpu_context_t; + +#endif + +/** @} + */ Index: kernel/arch/ia64/include/arch/interrupt.h =================================================================== --- kernel/arch/ia64/include/arch/interrupt.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ia64/include/arch/interrupt.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,88 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia64interrupt + * @{ + */ +/** @file + */ + +#ifndef KERN_ia64_INTERRUPT_H_ +#define KERN_ia64_INTERRUPT_H_ + +#include +#include + +/** ia64 has 256 INRs. */ +#define INR_COUNT 256 + +/* + * We need to keep this just to compile. + * We might eventually move interrupt/ stuff + * to genarch. + */ +#define IVT_ITEMS 0 +#define IVT_FIRST 0 + +/** External Interrupt vectors. */ + +#define VECTOR_TLB_SHOOTDOWN_IPI 0xf0 + +#define INTERRUPT_SPURIOUS 15 +#define INTERRUPT_TIMER 255 + +#define LEGACY_INTERRUPT_BASE 0x20 + +#define IRQ_KBD (0x01 + LEGACY_INTERRUPT_BASE) +#define IRQ_MOUSE (0x0c + LEGACY_INTERRUPT_BASE) + +/** General Exception codes. */ +#define GE_ILLEGALOP 0 +#define GE_PRIVOP 1 +#define GE_PRIVREG 2 +#define GE_RESREGFLD 3 +#define GE_DISBLDISTRAN 4 +#define GE_ILLEGALDEP 8 + +#define EOI 0 /**< The actual value doesn't matter. */ + +extern void *ivt; + +extern void general_exception(uint64_t, istate_t *); +extern int break_instruction(uint64_t, istate_t *); +extern void universal_handler(uint64_t, istate_t *); +extern void nop_handler(uint64_t, istate_t *); +extern void external_interrupt(uint64_t, istate_t *); +extern void disabled_fp_register(uint64_t, istate_t *); + +extern void trap_virtual_enable_irqs(uint16_t); + +#endif + +/** @} + */ Index: kernel/arch/ia64/include/arch/istate.h =================================================================== --- kernel/arch/ia64/include/arch/istate.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ia64/include/arch/istate.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,139 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia64interrupt + * @{ + */ +/** @file + */ + +#ifndef KERN_ia64_ISTATE_H_ +#define KERN_ia64_ISTATE_H_ + +#include + +#ifdef KERNEL + +#include + +#else /* KERNEL */ + +#include + +#endif /* KERNEL */ + +typedef struct istate { + uint128_t f2; + uint128_t f3; + uint128_t f4; + uint128_t f5; + uint128_t f6; + uint128_t f7; + uint128_t f8; + uint128_t f9; + uint128_t f10; + uint128_t f11; + uint128_t f12; + uint128_t f13; + uint128_t f14; + uint128_t f15; + uint128_t f16; + uint128_t f17; + uint128_t f18; + uint128_t f19; + uint128_t f20; + uint128_t f21; + uint128_t f22; + uint128_t f23; + uint128_t f24; + uint128_t f25; + uint128_t f26; + uint128_t f27; + uint128_t f28; + uint128_t f29; + uint128_t f30; + uint128_t f31; + + uintptr_t ar_bsp; + uintptr_t ar_bspstore; + uintptr_t ar_bspstore_new; + uint64_t ar_rnat; + uint64_t ar_ifs; + uint64_t ar_pfs; + uint64_t ar_rsc; + uintptr_t cr_ifa; + cr_isr_t cr_isr; + uintptr_t cr_iipa; + psr_t cr_ipsr; + uintptr_t cr_iip; + uint64_t pr; + uintptr_t sp; + + /* + * The following variables are defined only for break_instruction + * handler. + */ + uint64_t in0; + uint64_t in1; + uint64_t in2; + uint64_t in3; + uint64_t in4; + uint64_t in5; + uint64_t in6; + + uint64_t alignment; +} istate_t; + +NO_TRACE static inline void istate_set_retaddr(istate_t *istate, + uintptr_t retaddr) +{ + istate->cr_iip = retaddr; + istate->cr_ipsr.ri = 0; /* return to instruction slot #0 */ +} + +NO_TRACE static inline uintptr_t istate_get_pc(istate_t *istate) +{ + return istate->cr_iip; +} + +NO_TRACE static inline uintptr_t istate_get_fp(istate_t *istate) +{ + /* FIXME */ + + return 0; +} + +NO_TRACE static inline int istate_from_uspace(istate_t *istate) +{ + return (istate->cr_iip) < 0xe000000000000000ULL; +} + +#endif + +/** @} + */ Index: kernel/arch/ia64/include/arch/legacyio.h =================================================================== --- kernel/arch/ia64/include/arch/legacyio.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ia64/include/arch/legacyio.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,55 @@ +/* + * Copyright (c) 2011 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia64 + * @{ + */ +/** @file + */ + +#ifndef KERN_ia64_LEGACYIO_H_ +#define KERN_ia64_LEGACYIO_H_ + +#include + +#define LEGACYIO_PHYS_BASE 0x00000FFFFC000000ULL + +/* Legacy I/O space - static uspace address, FIXME */ +#define LEGACYIO_USER_BASE 0x0001000000000000ULL + +#define LEGACYIO_PAGE_WIDTH 26 /* 64M */ +#define LEGACYIO_SINGLE_PAGE_WIDTH 12 /* 4K */ + +#define LEGACYIO_SIZE (1ULL << LEGACYIO_PAGE_WIDTH) + +extern uintptr_t legacyio_virt_base; + +#endif + +/** @} + */ Index: kernel/arch/ia64/include/arch/mm/as.h =================================================================== --- kernel/arch/ia64/include/arch/mm/as.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ia64/include/arch/mm/as.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,61 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia64mm + * @{ + */ +/** @file + */ + +#ifndef KERN_ia64_AS_H_ +#define KERN_ia64_AS_H_ + +#define KERNEL_ADDRESS_SPACE_SHADOWED_ARCH 0 + +#define KERNEL_ADDRESS_SPACE_START_ARCH UINT64_C(0xe000000000000000) +#define KERNEL_ADDRESS_SPACE_END_ARCH UINT64_C(0xffffffffffffffff) +#define USER_ADDRESS_SPACE_START_ARCH UINT64_C(0x0000000000000000) +#define USER_ADDRESS_SPACE_END_ARCH UINT64_C(0xdfffffffffffffff) + +typedef struct { +} as_arch_t; + +#include + +#define as_constructor_arch(as, flags) (as != as) +#define as_destructor_arch(as) (as != as) +#define as_create_arch(as, flags) (as != as) +#define as_deinstall_arch(as) +#define as_invalidate_translation_cache(as, page, cnt) + +extern void as_arch_init(void); + +#endif + +/** @} + */ Index: kernel/arch/ia64/include/arch/mm/asid.h =================================================================== --- kernel/arch/ia64/include/arch/mm/asid.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ia64/include/arch/mm/asid.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,68 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia64mm + * @{ + */ +/** @file + */ + +#ifndef KERN_ia64_ASID_H_ +#define KERN_ia64_ASID_H_ + +#ifndef __ASM__ + +#include + +typedef uint16_t asid_t; +typedef uint32_t rid_t; + +#endif /* __ASM__ */ + +/** + * Number of ia64 RIDs (Region Identifiers) per kernel ASID. + * Note that some architectures may support more bits, + * but those extra bits are not used by the kernel. + */ +#define RIDS_PER_ASID 8 + +#define RID_MAX 262143 /* 2^18 - 1 */ +#define RID_KERNEL7 7 + +#define ASID2RID(asid, vrn) \ + ((asid) * RIDS_PER_ASID + (vrn)) + +#define RID2ASID(rid) \ + ((rid) / RIDS_PER_ASID) + +#define ASID_MAX_ARCH (RID_MAX / RIDS_PER_ASID) + +#endif + +/** @} + */ Index: kernel/arch/ia64/include/arch/mm/frame.h =================================================================== --- kernel/arch/ia64/include/arch/mm/frame.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ia64/include/arch/mm/frame.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,56 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia64mm + * @{ + */ +/** @file + */ + +#ifndef KERN_ia64_FRAME_H_ +#define KERN_ia64_FRAME_H_ + +#define FRAME_WIDTH 14 /* 16K */ +#define FRAME_SIZE (1 << FRAME_WIDTH) + +#ifndef __ASM__ + +#include + +extern uintptr_t end_of_identity; + +extern void frame_low_arch_init(void); +extern void frame_high_arch_init(void); +#define physmem_print() + +#endif /* __ASM__ */ + +#endif + +/** @} + */ Index: kernel/arch/ia64/include/arch/mm/km.h =================================================================== --- kernel/arch/ia64/include/arch/mm/km.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ia64/include/arch/mm/km.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,59 @@ +/* + * Copyright (c) 2011 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia64mm + * @{ + */ +/** @file + */ + +#ifndef KERN_ia64_KM_H_ +#define KERN_ia64_KM_H_ + +#include + +/* + * Be conservative and assume the minimal (3 + 51)-bit virtual address width + * of the Itanium CPU even if running on CPU with full 64-bit virtual + * address width, such as Itanium 2. + */ + +#define KM_IA64_IDENTITY_START UINT64_C(0xe000000000000000) +#define KM_IA64_IDENTITY_SIZE UINT64_C(0x0004000000000000) + +#define KM_IA64_NON_IDENTITY_START UINT64_C(0xfffc000000000000) +#define KM_IA64_NON_IDENTITY_SIZE UINT64_C(0x0004000000000000) + +extern void km_identity_arch_init(void); +extern void km_non_identity_arch_init(void); +extern bool km_is_non_identity_arch(uintptr_t); + +#endif + +/** @} + */ Index: kernel/arch/ia64/include/arch/mm/page.h =================================================================== --- kernel/arch/ia64/include/arch/mm/page.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ia64/include/arch/mm/page.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,300 @@ +/* + * Copyright (c) 2005 - 2006 Jakub Jermar + * Copyright (c) 2006 Jakub Vana + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia64mm + * @{ + */ +/** @file + */ + +#ifndef KERN_ia64_PAGE_H_ +#define KERN_ia64_PAGE_H_ + +#include + +#define PAGE_SIZE FRAME_SIZE +#define PAGE_WIDTH FRAME_WIDTH + +/** Bit width of the TLB-locked portion of kernel address space. */ +#define KERNEL_PAGE_WIDTH 28 /* 256M */ + +#define PPN_SHIFT 12 + +#define VRN_SHIFT 61 +#define VRN_MASK (7ULL << VRN_SHIFT) +#define VA2VRN(va) ((va) >> VRN_SHIFT) + +#ifdef __ASM__ + #define VRN_KERNEL 7 +#else + #define VRN_KERNEL 7ULL +#endif + +#define REGION_REGISTERS 8 + +#define KA2PA(x) ((uintptr_t) ((x) - (VRN_KERNEL << VRN_SHIFT))) +#define PA2KA(x) ((uintptr_t) ((x) + (VRN_KERNEL << VRN_SHIFT))) + +#define VHPT_WIDTH 20 /* 1M */ +#define VHPT_SIZE (1 << VHPT_WIDTH) + +#define PTA_BASE_SHIFT 15 + +/** Memory Attributes. */ +#define MA_WRITEBACK 0x00 +#define MA_UNCACHEABLE 0x04 + +/** Privilege Levels. Only the most and the least privileged ones are ever used. */ +#define PL_KERNEL 0x00 +#define PL_USER 0x03 + +/* Access Rigths. Only certain combinations are used by the kernel. */ +#define AR_READ 0x00 +#define AR_EXECUTE 0x01 +#define AR_WRITE 0x02 + +#ifndef __ASM__ + +#include +#include +#include +#include +#include +#include +#include + +struct vhpt_tag_info { + unsigned long long tag : 63; + unsigned int ti : 1; +} __attribute__ ((packed)); + +union vhpt_tag { + struct vhpt_tag_info tag_info; + unsigned tag_word; +}; + +struct vhpt_entry_present { + /* Word 0 */ + unsigned int p : 1; + unsigned int : 1; + unsigned int ma : 3; + unsigned int a : 1; + unsigned int d : 1; + unsigned int pl : 2; + unsigned int ar : 3; + unsigned long long ppn : 38; + unsigned int : 2; + unsigned int ed : 1; + unsigned int ig1 : 11; + + /* Word 1 */ + unsigned int : 2; + unsigned int ps : 6; + unsigned int key : 24; + unsigned int : 32; + + /* Word 2 */ + union vhpt_tag tag; + + /* Word 3 */ + uint64_t ig3 : 64; +} __attribute__ ((packed)); + +struct vhpt_entry_not_present { + /* Word 0 */ + unsigned int p : 1; + unsigned long long ig0 : 52; + unsigned int ig1 : 11; + + /* Word 1 */ + unsigned int : 2; + unsigned int ps : 6; + unsigned long long ig2 : 56; + + /* Word 2 */ + union vhpt_tag tag; + + /* Word 3 */ + uint64_t ig3 : 64; +} __attribute__ ((packed)); + +typedef union { + struct vhpt_entry_present present; + struct vhpt_entry_not_present not_present; + uint64_t word[4]; +} vhpt_entry_t; + +struct region_register_map { + unsigned int ve : 1; + unsigned int : 1; + unsigned int ps : 6; + unsigned int rid : 24; + unsigned int : 32; +} __attribute__ ((packed)); + +typedef union { + struct region_register_map map; + unsigned long long word; +} region_register_t; + +struct pta_register_map { + unsigned int ve : 1; + unsigned int : 1; + unsigned int size : 6; + unsigned int vf : 1; + unsigned int : 6; + unsigned long long base : 49; +} __attribute__ ((packed)); + +typedef union pta_register { + struct pta_register_map map; + uint64_t word; +} pta_register_t; + +/** Return Translation Hashed Entry Address. + * + * VRN bits are used to read RID (ASID) from one + * of the eight region registers registers. + * + * @param va Virtual address including VRN bits. + * + * @return Address of the head of VHPT collision chain. + */ +NO_TRACE static inline uint64_t thash(uint64_t va) +{ + uint64_t ret; + + asm volatile ( + "thash %[ret] = %[va]\n" + : [ret] "=r" (ret) + : [va] "r" (va) + ); + + return ret; +} + +/** Return Translation Hashed Entry Tag. + * + * VRN bits are used to read RID (ASID) from one + * of the eight region registers. + * + * @param va Virtual address including VRN bits. + * + * @return The unique tag for VPN and RID in the collision chain returned by thash(). + */ +NO_TRACE static inline uint64_t ttag(uint64_t va) +{ + uint64_t ret; + + asm volatile ( + "ttag %[ret] = %[va]\n" + : [ret] "=r" (ret) + : [va] "r" (va) + ); + + return ret; +} + +/** Read Region Register. + * + * @param i Region register index. + * + * @return Current contents of rr[i]. + */ +NO_TRACE static inline uint64_t rr_read(size_t i) +{ + uint64_t ret; + + ASSERT(i < REGION_REGISTERS); + + asm volatile ( + "mov %[ret] = rr[%[index]]\n" + : [ret] "=r" (ret) + : [index] "r" (i << VRN_SHIFT) + ); + + return ret; +} + +/** Write Region Register. + * + * @param i Region register index. + * @param v Value to be written to rr[i]. + */ +NO_TRACE static inline void rr_write(size_t i, uint64_t v) +{ + ASSERT(i < REGION_REGISTERS); + + asm volatile ( + "mov rr[%[index]] = %[value]\n" + :: [index] "r" (i << VRN_SHIFT), + [value] "r" (v) + ); +} + +/** Read Page Table Register. + * + * @return Current value stored in PTA. + */ +NO_TRACE static inline uint64_t pta_read(void) +{ + uint64_t ret; + + asm volatile ( + "mov %[ret] = cr.pta\n" + : [ret] "=r" (ret) + ); + + return ret; +} + +/** Write Page Table Register. + * + * @param v New value to be stored in PTA. + */ +NO_TRACE static inline void pta_write(uint64_t v) +{ + asm volatile ( + "mov cr.pta = %[value]\n" + :: [value] "r" (v) + ); +} + +extern void page_arch_init(void); + +extern vhpt_entry_t *vhpt_hash(uintptr_t page, asid_t asid); +extern bool vhpt_compare(uintptr_t page, asid_t asid, vhpt_entry_t *v); +extern void vhpt_set_record(vhpt_entry_t *v, uintptr_t page, asid_t asid, uintptr_t frame, int flags); + +#endif /* __ASM__ */ + +#endif + +/** @} + */ Index: kernel/arch/ia64/include/arch/mm/tlb.h =================================================================== --- kernel/arch/ia64/include/arch/mm/tlb.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ia64/include/arch/mm/tlb.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,100 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia64mm + * @{ + */ +/** @file + */ + +#ifndef KERN_ia64_TLB_H_ +#define KERN_ia64_TLB_H_ + +#include +#include +#include +#include + +/** Data and instruction Translation Register indices. */ +#define DTR_KERNEL 0 +#define ITR_KERNEL 0 +#define DTR_KSTACK1 4 +#define DTR_KSTACK2 5 + +/** Portion of TLB insertion format data structure. */ +typedef union { + uint64_t word[2]; + struct { + /* Word 0 */ + unsigned int p : 1; /**< Present. */ + unsigned int : 1; + unsigned int ma : 3; /**< Memory attribute. */ + unsigned int a : 1; /**< Accessed. */ + unsigned int d : 1; /**< Dirty. */ + unsigned int pl : 2; /**< Privilege level. */ + unsigned int ar : 3; /**< Access rights. */ + unsigned long long ppn : 38; /**< Physical Page Number, a.k.a. PFN. */ + unsigned int : 2; + unsigned int ed : 1; + unsigned int ig1 : 11; + + /* Word 1 */ + unsigned int : 2; + unsigned int ps : 6; /**< Page size will be 2^ps. */ + unsigned int key : 24; /**< Protection key, unused. */ + unsigned int : 32; + } __attribute__ ((packed)); +} __attribute__ ((packed)) tlb_entry_t; + +extern void tc_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry, bool dtc); +extern void dtc_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry); +extern void itc_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry); + +extern void tr_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry, bool dtr, size_t tr); +extern void dtr_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry, size_t tr); +extern void itr_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry, size_t tr); + +extern void dtlb_kernel_mapping_insert(uintptr_t page, uintptr_t frame, bool dtr, size_t tr); +extern void dtr_purge(uintptr_t page, size_t width); + +extern void dtc_pte_copy(pte_t *t); +extern void itc_pte_copy(pte_t *t); + +extern void alternate_instruction_tlb_fault(uint64_t vector, istate_t *istate); +extern void alternate_data_tlb_fault(uint64_t vector, istate_t *istate); +extern void data_nested_tlb_fault(uint64_t vector, istate_t *istate); +extern void data_dirty_bit_fault(uint64_t vector, istate_t *istate); +extern void instruction_access_bit_fault(uint64_t vector, istate_t *istate); +extern void data_access_bit_fault(uint64_t vector, istate_t *istate); +extern void data_access_rights_fault(uint64_t vector, istate_t *istate); +extern void page_not_present(uint64_t vector, istate_t *istate); + +#endif + +/** @} + */ Index: kernel/arch/ia64/include/arch/mm/vhpt.h =================================================================== --- kernel/arch/ia64/include/arch/mm/vhpt.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ia64/include/arch/mm/vhpt.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,60 @@ +/* + * Copyright (c) 2006 Jakub Vana + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia64mm + * @{ + */ +/** @file +*/ + +#ifndef KERN_ia64_VHPT_H_ +#define KERN_ia64_VHPT_H_ + +#include +#include + +uintptr_t vhpt_set_up(void); + +static inline vhpt_entry_t tlb_entry_t2vhpt_entry_t(tlb_entry_t tentry) +{ + vhpt_entry_t ventry; + + ventry.word[0] = tentry.word[0]; + ventry.word[1] = tentry.word[1]; + + return ventry; +} + +void vhpt_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry); +void vhpt_invalidate_all(void); +void vhpt_invalidate_asid(asid_t asid); + +#endif + +/** @} + */ Index: kernel/arch/ia64/include/arch/pal/pal.h =================================================================== --- kernel/arch/ia64/include/arch/pal/pal.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ia64/include/arch/pal/pal.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,109 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia64 + * @{ + */ +/** @file + */ + +#ifndef KERN_ia64_PAL_H_ +#define KERN_ia64_PAL_H_ + +#define PAL_OK 0 /**< Call completed without error. */ +#define PAL_UNIMPL -1 /**< Unimplemented procedure. */ +#define PAL_INVARG -2 /**< Invalid argument. */ +#define PAL_ERR -3 /**< Can not compete call without error. */ + +/** These are the indices for PAL_PROC. */ +#define PAL_CACHE_FLUSH 1 +#define PAL_CACHE_INFO 2 +#define PAL_CACHE_INIT 3 +#define PAL_CACHE_PROT_INFO 38 +#define PAL_CACHE_SHARED_INFO 43 +#define PAL_CACHE_SUMMARY 4 + +#define PAL_MEM_ATTRIB 5 +#define PAL_PREFETCH_VISIBILITY 41 +#define PAL_PTCE_INFO 6 +#define PAL_VM_INFO 7 +#define PAL_VM_PAGE_SIZE 34 +#define PAL_VM_SUMMARY 8 +#define PAL_VM_TR_READ 261 + +#define PAL_BUS_GET_FEATURES 9 +#define PAL_BUS_SET_FEATURES 10 +#define PAL_DEBUG_INFO 11 +#define PAL_FIXED_ADDR 12 +#define PAL_FREQ_BASE 13 +#define PAL_FREQ_RATIOS 14 +#define PAL_LOGICAL_TO_PHYSICAL 42 +#define PAL_PERF_MON_INFO 15 +#define PAL_PLATFORM_ADDR 16 +#define PAL_PROC_GET_FEATURES 17 +#define PAL_PROC_SET_FEATURES 18 +#define PAL_REGISTER_INFO 39 +#define PAL_RSE_INFO 19 +#define PAL_VERSION 20 + +#define PAL_MC_CLEAR_LOG 21 +#define PAL_MC_DRAIN 22 +#define PAL_MC_DYNAMIC_STATE 24 +#define PAL_MC_ERROR_INFO 25 +#define PAL_MC_EXPECTED 23 +#define PAL_MC_REGISTER_MEM 27 +#define PAL_MC_RESUME 26 + +#define PAL_HALT 28 +#define PAL_HALT_INFO 257 +#define PAL_HALT_LIGHT 29 + +#define PAL_CACHE_LINE_INIT 31 +#define PAL_CACHE_READ 259 +#define PAL_CACHE_WRITE 260 +#define PAL_TEST_INFO 37 +#define PAL_TEST_PROC 258 + +#define PAL_COPY_INFO 30 +#define PAL_COPY_PAL 256 +#define PAL_ENTER_IA_32_ENV 33 +#define PAL_PMI_ENTRYPOINT 32 + +/* + * Ski PTCE data + */ +#define PAL_PTCE_INFO_BASE() (0x100000000LL) +#define PAL_PTCE_INFO_COUNT1() (2) +#define PAL_PTCE_INFO_COUNT2() (3) +#define PAL_PTCE_INFO_STRIDE1() (0x10000000) +#define PAL_PTCE_INFO_STRIDE2() (0x2000) + +#endif + +/** @} + */ Index: kernel/arch/ia64/include/arch/proc/task.h =================================================================== --- kernel/arch/ia64/include/arch/proc/task.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ia64/include/arch/proc/task.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,52 @@ +/* + * Copyright (c) 2006 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia64proc + * @{ + */ +/** @file + */ +#include + +#ifndef KERN_ia64_TASK_H_ +#define KERN_ia64_TASK_H_ + +#include + +typedef struct { + bitmap_t *iomap; +} task_arch_t; + + +#define task_create_arch(t) { (t)->arch.iomap = NULL; } +#define task_destroy_arch(t) + +#endif + +/** @} + */ Index: kernel/arch/ia64/include/arch/proc/thread.h =================================================================== --- kernel/arch/ia64/include/arch/proc/thread.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ia64/include/arch/proc/thread.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,48 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia64proc + * @{ + */ +/** @file + */ + +#ifndef KERN_ia64_THREAD_H_ +#define KERN_ia64_THREAD_H_ + +typedef struct { +} thread_arch_t; + +#define thr_constructor_arch(t) +#define thr_destructor_arch(t) +#define thread_create_arch(t) + +#endif + +/** @} + */ Index: kernel/arch/ia64/include/arch/register.h =================================================================== --- kernel/arch/ia64/include/arch/register.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ia64/include/arch/register.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,276 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia64 + * @{ + */ +/** @file + */ + +#ifndef KERN_ia64_REGISTER_H_ +#define KERN_ia64_REGISTER_H_ + +#define DCR_PP_MASK (1 << 0) +#define DCR_BE_MASK (1 << 1) +#define DCR_LC_MASK (1 << 2) +#define DCR_DM_MASK (1 << 8) +#define DCR_DP_MASK (1 << 9) +#define DCR_DK_MASK (1 << 10) +#define DCR_DX_MASK (1 << 11) +#define DCR_DR_MASK (1 << 12) +#define DCR_DA_MASK (1 << 13) +#define DCR_DD_MASK (1 << 14) + +#define CR_IVR_MASK 0x0f + +#define PSR_IC_MASK (1 << 13) +#define PSR_I_MASK (1 << 14) +#define PSR_PK_MASK (1 << 15) +#define PSR_DT_MASK (1 << 17) +#define PSR_DFL_MASK (1 << 18) +#define PSR_DFH_MASK (1 << 19) +#define PSR_RT_MASK (1 << 27) +#define PSR_IT_MASK (1 << 36) + +#define PSR_CPL_SHIFT 32 +#define PSR_CPL_MASK_SHIFTED 3 + +#define PSR_RI_SHIFT 41 +#define PSR_RI_LEN 2 + +#define PFM_MASK (~0x3fffffffff) + +#define RSC_MODE_MASK 3 +#define RSC_PL_MASK 12 + +/** Application registers. */ +#define AR_KR0 0 +#define AR_KR1 1 +#define AR_KR2 2 +#define AR_KR3 3 +#define AR_KR4 4 +#define AR_KR5 5 +#define AR_KR6 6 +#define AR_KR7 7 +/* ARs 8-15 are reserved */ +#define AR_RSC 16 +#define AR_BSP 17 +#define AR_BSPSTORE 18 +#define AR_RNAT 19 +/* AR 20 is reserved */ +#define AR_FCR 21 +/* ARs 22-23 are reserved */ +#define AR_EFLAG 24 +#define AR_CSD 25 +#define AR_SSD 26 +#define AR_CFLG 27 +#define AR_FSR 28 +#define AR_FIR 29 +#define AR_FDR 30 +/* AR 31 is reserved */ +#define AR_CCV 32 +/* ARs 33-35 are reserved */ +#define AR_UNAT 36 +/* ARs 37-39 are reserved */ +#define AR_FPSR 40 +/* ARs 41-43 are reserved */ +#define AR_ITC 44 +/* ARs 45-47 are reserved */ +/* ARs 48-63 are ignored */ +#define AR_PFS 64 +#define AR_LC 65 +#define AR_EC 66 +/* ARs 67-111 are reserved */ +/* ARs 112-127 are ignored */ + +/** Control registers. */ +#define CR_DCR 0 +#define CR_ITM 1 +#define CR_IVA 2 +/* CR3-CR7 are reserved */ +#define CR_PTA 8 +/* CR9-CR15 are reserved */ +#define CR_IPSR 16 +#define CR_ISR 17 +/* CR18 is reserved */ +#define CR_IIP 19 +#define CR_IFA 20 +#define CR_ITIR 21 +#define CR_IIPA 22 +#define CR_IFS 23 +#define CR_IIM 24 +#define CR_IHA 25 +/* CR26-CR63 are reserved */ +#define CR_LID 64 +#define CR_IVR 65 +#define CR_TPR 66 +#define CR_EOI 67 +#define CR_IRR0 68 +#define CR_IRR1 69 +#define CR_IRR2 70 +#define CR_IRR3 71 +#define CR_ITV 72 +#define CR_PMV 73 +#define CR_CMCV 74 +/* CR75-CR79 are reserved */ +#define CR_LRR0 80 +#define CR_LRR1 81 +/* CR82-CR127 are reserved */ + +#ifndef __ASM__ + +/** Processor Status Register. */ +typedef union { + uint64_t value; + struct { + unsigned int : 1; + unsigned int be : 1; /**< Big-Endian data accesses. */ + unsigned int up : 1; /**< User Performance monitor enable. */ + unsigned int ac : 1; /**< Alignment Check. */ + unsigned int mfl : 1; /**< Lower floating-point register written. */ + unsigned int mfh : 1; /**< Upper floating-point register written. */ + unsigned int : 7; + unsigned int ic : 1; /**< Interruption Collection. */ + unsigned int i : 1; /**< Interrupt Bit. */ + unsigned int pk : 1; /**< Protection Key enable. */ + unsigned int : 1; + unsigned int dt : 1; /**< Data address Translation. */ + unsigned int dfl : 1; /**< Disabled Floating-point Low register set. */ + unsigned int dfh : 1; /**< Disabled Floating-point High register set. */ + unsigned int sp : 1; /**< Secure Performance monitors. */ + unsigned int pp : 1; /**< Privileged Performance monitor enable. */ + unsigned int di : 1; /**< Disable Instruction set transition. */ + unsigned int si : 1; /**< Secure Interval timer. */ + unsigned int db : 1; /**< Debug Breakpoint fault. */ + unsigned int lp : 1; /**< Lower Privilege transfer trap. */ + unsigned int tb : 1; /**< Taken Branch trap. */ + unsigned int rt : 1; /**< Register Stack Translation. */ + unsigned int : 4; + unsigned int cpl : 2; /**< Current Privilege Level. */ + unsigned int is : 1; /**< Instruction Set. */ + unsigned int mc : 1; /**< Machine Check abort mask. */ + unsigned int it : 1; /**< Instruction address Translation. */ + unsigned int id : 1; /**< Instruction Debug fault disable. */ + unsigned int da : 1; /**< Disable Data Access and Dirty-bit faults. */ + unsigned int dd : 1; /**< Data Debug fault disable. */ + unsigned int ss : 1; /**< Single Step enable. */ + unsigned int ri : 2; /**< Restart Instruction. */ + unsigned int ed : 1; /**< Exception Deferral. */ + unsigned int bn : 1; /**< Register Bank. */ + unsigned int ia : 1; /**< Disable Instruction Access-bit faults. */ + } __attribute__ ((packed)); +} psr_t; + +/** Register Stack Configuration Register */ +typedef union { + uint64_t value; + struct { + unsigned int mode : 2; + unsigned int pl : 2; /**< Privilege Level. */ + unsigned int be : 1; /**< Big-endian. */ + unsigned int : 11; + unsigned int loadrs : 14; + } __attribute__ ((packed)); +} rsc_t; + +/** External Interrupt Vector Register */ +typedef union { + uint8_t vector; + uint64_t value; +} cr_ivr_t; + +/** Task Priority Register */ +typedef union { + uint64_t value; + struct { + unsigned int : 4; + unsigned int mic: 4; /**< Mask Interrupt Class. */ + unsigned int : 8; + unsigned int mmi: 1; /**< Mask Maskable Interrupts. */ + } __attribute__ ((packed)); +} cr_tpr_t; + +/** Interval Timer Vector */ +typedef union { + uint64_t value; + struct { + unsigned int vector : 8; + unsigned int : 4; + unsigned int : 1; + unsigned int : 3; + unsigned int m : 1; /**< Mask. */ + } __attribute__ ((packed)); +} cr_itv_t; + +/** Interruption Status Register */ +typedef union { + uint64_t value; + struct { + union { + /** General Exception code field structuring. */ + uint16_t code; + struct { + unsigned int ge_na : 4; + unsigned int ge_code : 4; + } __attribute__ ((packed)); + }; + uint8_t vector; + unsigned int : 8; + unsigned int x : 1; /**< Execute exception. */ + unsigned int w : 1; /**< Write exception. */ + unsigned int r : 1; /**< Read exception. */ + unsigned int na : 1; /**< Non-access exception. */ + unsigned int sp : 1; /**< Speculative load exception. */ + unsigned int rs : 1; /**< Register stack. */ + unsigned int ir : 1; /**< Incomplete Register frame. */ + unsigned int ni : 1; /**< Nested Interruption. */ + unsigned int so : 1; /**< IA-32 Supervisor Override. */ + unsigned int ei : 2; /**< Excepting Instruction. */ + unsigned int ed : 1; /**< Exception Deferral. */ + unsigned int : 20; + } __attribute__ ((packed)); +} cr_isr_t; + +/** CPUID Register 3 */ +typedef union { + uint64_t value; + struct { + uint8_t number; + uint8_t revision; + uint8_t model; + uint8_t family; + uint8_t archrev; + } __attribute__ ((packed)); +} cpuid3_t; + +#endif /* !__ASM__ */ + +#endif + +/** @} + */ Index: kernel/arch/ia64/include/arch/stack.h =================================================================== --- kernel/arch/ia64/include/arch/stack.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ia64/include/arch/stack.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,46 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia64 + * @{ + */ +/** @file + */ + +#ifndef KERN_ia64_STACK_H_ +#define KERN_ia64_STACK_H_ + +#define STACK_ITEM_SIZE 8 +#define STACK_ALIGNMENT 16 +#define STACK_SCRATCH_AREA_SIZE 16 +#define REGISTER_STACK_ALIGNMENT 8 + +#endif + +/** @} + */ Index: kernel/arch/ia64/include/arch/types.h =================================================================== --- kernel/arch/ia64/include/arch/types.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ia64/include/arch/types.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,66 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia64 + * @{ + */ +/** @file + */ + +#ifndef KERN_ia64_TYPES_H_ +#define KERN_ia64_TYPES_H_ + +typedef uint64_t size_t; +typedef int64_t ssize_t; + +typedef uint64_t uintptr_t; +typedef uint64_t pfn_t; + +typedef uint64_t ipl_t; + +typedef uint64_t sysarg_t; +typedef int64_t native_t; +typedef uint64_t atomic_count_t; + +typedef struct { + sysarg_t fnc; + sysarg_t gp; +} __attribute__((may_alias)) fncptr_t; + +#define INTN_C(c) INT64_C(c) +#define UINTN_C(c) UINT64_C(c) + +#define PRIdn PRId64 /**< Format for native_t. */ +#define PRIun PRIu64 /**< Format for sysarg_t. */ +#define PRIxn PRIx64 /**< Format for hexadecimal sysarg_t. */ +#define PRIua PRIu64 /**< Format for atomic_count_t. */ + +#endif + +/** @} + */ Index: kernel/arch/ia64/include/asm.h =================================================================== --- kernel/arch/ia64/include/asm.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,492 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia64 - * @{ - */ -/** @file - */ - -#ifndef KERN_ia64_ASM_H_ -#define KERN_ia64_ASM_H_ - -#include -#include -#include -#include -#include - -#define IO_SPACE_BOUNDARY ((void *) (64 * 1024)) - -/** Map the I/O port address to a legacy I/O address. */ -NO_TRACE static inline uintptr_t p2a(volatile void *p) -{ - uintptr_t prt = (uintptr_t) p; - - return legacyio_virt_base + (((prt >> 2) << 12) | (prt & 0xfff)); -} - -NO_TRACE static inline void pio_write_8(ioport8_t *port, uint8_t v) -{ - if (port < (ioport8_t *) IO_SPACE_BOUNDARY) - *((ioport8_t *) p2a(port)) = v; - else - *port = v; - - asm volatile ( - "mf\n" - "mf.a\n" - ::: "memory" - ); -} - -NO_TRACE static inline void pio_write_16(ioport16_t *port, uint16_t v) -{ - if (port < (ioport16_t *) IO_SPACE_BOUNDARY) - *((ioport16_t *) p2a(port)) = v; - else - *port = v; - - asm volatile ( - "mf\n" - "mf.a\n" - ::: "memory" - ); -} - -NO_TRACE static inline void pio_write_32(ioport32_t *port, uint32_t v) -{ - if (port < (ioport32_t *) IO_SPACE_BOUNDARY) - *((ioport32_t *) p2a(port)) = v; - else - *port = v; - - asm volatile ( - "mf\n" - "mf.a\n" - ::: "memory" - ); -} - -NO_TRACE static inline uint8_t pio_read_8(ioport8_t *port) -{ - uint8_t v; - - asm volatile ( - "mf\n" - ::: "memory" - ); - - if (port < (ioport8_t *) IO_SPACE_BOUNDARY) - v = *((ioport8_t *) p2a(port)); - else - v = *port; - - asm volatile ( - "mf.a\n" - ::: "memory" - ); - - return v; -} - -NO_TRACE static inline uint16_t pio_read_16(ioport16_t *port) -{ - uint16_t v; - - asm volatile ( - "mf\n" - ::: "memory" - ); - - if (port < (ioport16_t *) IO_SPACE_BOUNDARY) - v = *((ioport16_t *) p2a(port)); - else - v = *port; - - asm volatile ( - "mf.a\n" - ::: "memory" - ); - - return v; -} - -NO_TRACE static inline uint32_t pio_read_32(ioport32_t *port) -{ - uint32_t v; - - asm volatile ( - "mf\n" - ::: "memory" - ); - - if (port < (ioport32_t *) IO_SPACE_BOUNDARY) - v = *((ioport32_t *) p2a(port)); - else - v = *port; - - asm volatile ( - "mf.a\n" - ::: "memory" - ); - - return v; -} - -/** Return base address of current memory stack. - * - * The memory stack is assumed to be STACK_SIZE / 2 long. Note that there is - * also the RSE stack, which takes up the upper half of STACK_SIZE. - * The memory stack must start on page boundary. - */ -NO_TRACE static inline uintptr_t get_stack_base(void) -{ - uint64_t value; - - asm volatile ( - "mov %[value] = r12" - : [value] "=r" (value) - ); - - return (value & (~(STACK_SIZE / 2 - 1))); -} - -/** Return Processor State Register. - * - * @return PSR. - * - */ -NO_TRACE static inline uint64_t psr_read(void) -{ - uint64_t v; - - asm volatile ( - "mov %[value] = psr\n" - : [value] "=r" (v) - ); - - return v; -} - -/** Read IVA (Interruption Vector Address). - * - * @return Return location of interruption vector table. - * - */ -NO_TRACE static inline uint64_t iva_read(void) -{ - uint64_t v; - - asm volatile ( - "mov %[value] = cr.iva\n" - : [value] "=r" (v) - ); - - return v; -} - -/** Write IVA (Interruption Vector Address) register. - * - * @param v New location of interruption vector table. - * - */ -NO_TRACE static inline void iva_write(uint64_t v) -{ - asm volatile ( - "mov cr.iva = %[value]\n" - :: [value] "r" (v) - ); -} - -/** Read IVR (External Interrupt Vector Register). - * - * @return Highest priority, pending, unmasked external - * interrupt vector. - * - */ -NO_TRACE static inline uint64_t ivr_read(void) -{ - uint64_t v; - - asm volatile ( - "mov %[value] = cr.ivr\n" - : [value] "=r" (v) - ); - - return v; -} - -NO_TRACE static inline uint64_t cr64_read(void) -{ - uint64_t v; - - asm volatile ( - "mov %[value] = cr64\n" - : [value] "=r" (v) - ); - - return v; -} - -/** Write ITC (Interval Timer Counter) register. - * - * @param v New counter value. - * - */ -NO_TRACE static inline void itc_write(uint64_t v) -{ - asm volatile ( - "mov ar.itc = %[value]\n" - :: [value] "r" (v) - ); -} - -/** Read ITC (Interval Timer Counter) register. - * - * @return Current counter value. - * - */ -NO_TRACE static inline uint64_t itc_read(void) -{ - uint64_t v; - - asm volatile ( - "mov %[value] = ar.itc\n" - : [value] "=r" (v) - ); - - return v; -} - -/** Write ITM (Interval Timer Match) register. - * - * @param v New match value. - * - */ -NO_TRACE static inline void itm_write(uint64_t v) -{ - asm volatile ( - "mov cr.itm = %[value]\n" - :: [value] "r" (v) - ); -} - -/** Read ITM (Interval Timer Match) register. - * - * @return Match value. - * - */ -NO_TRACE static inline uint64_t itm_read(void) -{ - uint64_t v; - - asm volatile ( - "mov %[value] = cr.itm\n" - : [value] "=r" (v) - ); - - return v; -} - -/** Read ITV (Interval Timer Vector) register. - * - * @return Current vector and mask bit. - * - */ -NO_TRACE static inline uint64_t itv_read(void) -{ - uint64_t v; - - asm volatile ( - "mov %[value] = cr.itv\n" - : [value] "=r" (v) - ); - - return v; -} - -/** Write ITV (Interval Timer Vector) register. - * - * @param v New vector and mask bit. - * - */ -NO_TRACE static inline void itv_write(uint64_t v) -{ - asm volatile ( - "mov cr.itv = %[value]\n" - :: [value] "r" (v) - ); -} - -/** Write EOI (End Of Interrupt) register. - * - * @param v This value is ignored. - * - */ -NO_TRACE static inline void eoi_write(uint64_t v) -{ - asm volatile ( - "mov cr.eoi = %[value]\n" - :: [value] "r" (v) - ); -} - -/** Read TPR (Task Priority Register). - * - * @return Current value of TPR. - * - */ -NO_TRACE static inline uint64_t tpr_read(void) -{ - uint64_t v; - - asm volatile ( - "mov %[value] = cr.tpr\n" - : [value] "=r" (v) - ); - - return v; -} - -/** Write TPR (Task Priority Register). - * - * @param v New value of TPR. - * - */ -NO_TRACE static inline void tpr_write(uint64_t v) -{ - asm volatile ( - "mov cr.tpr = %[value]\n" - :: [value] "r" (v) - ); -} - -/** Disable interrupts. - * - * Disable interrupts and return previous - * value of PSR. - * - * @return Old interrupt priority level. - * - */ -NO_TRACE static ipl_t interrupts_disable(void) -{ - uint64_t v; - - asm volatile ( - "mov %[value] = psr\n" - "rsm %[mask]\n" - : [value] "=r" (v) - : [mask] "i" (PSR_I_MASK) - ); - - return (ipl_t) v; -} - -/** Enable interrupts. - * - * Enable interrupts and return previous - * value of PSR. - * - * @return Old interrupt priority level. - * - */ -NO_TRACE static ipl_t interrupts_enable(void) -{ - uint64_t v; - - asm volatile ( - "mov %[value] = psr\n" - "ssm %[mask]\n" - ";;\n" - "srlz.d\n" - : [value] "=r" (v) - : [mask] "i" (PSR_I_MASK) - ); - - return (ipl_t) v; -} - -/** Restore interrupt priority level. - * - * Restore PSR. - * - * @param ipl Saved interrupt priority level. - * - */ -NO_TRACE static inline void interrupts_restore(ipl_t ipl) -{ - if (ipl & PSR_I_MASK) - (void) interrupts_enable(); - else - (void) interrupts_disable(); -} - -/** Return interrupt priority level. - * - * @return PSR. - * - */ -NO_TRACE static inline ipl_t interrupts_read(void) -{ - return (ipl_t) psr_read(); -} - -/** Check interrupts state. - * - * @return True if interrupts are disabled. - * - */ -NO_TRACE static inline bool interrupts_disabled(void) -{ - return !(psr_read() & PSR_I_MASK); -} - -/** Disable protection key checking. */ -NO_TRACE static inline void pk_disable(void) -{ - asm volatile ( - "rsm %[mask]\n" - ";;\n" - "srlz.d\n" - :: [mask] "i" (PSR_PK_MASK) - ); -} - -extern void cpu_halt(void) __attribute__((noreturn)); -extern void cpu_sleep(void); -extern void asm_delay_loop(uint32_t t); - -extern void switch_to_userspace(uintptr_t, uintptr_t, uintptr_t, uintptr_t, - uint64_t, uint64_t); - -#endif - -/** @} - */ Index: kernel/arch/ia64/include/atomic.h =================================================================== --- kernel/arch/ia64/include/atomic.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,138 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia64 - * @{ - */ -/** @file - */ - -#ifndef KERN_ia64_ATOMIC_H_ -#define KERN_ia64_ATOMIC_H_ - -#include - -NO_TRACE static inline atomic_count_t test_and_set(atomic_t *val) -{ - atomic_count_t v; - - asm volatile ( - "movl %[v] = 0x1;;\n" - "xchg8 %[v] = %[count], %[v];;\n" - : [v] "=r" (v), - [count] "+m" (val->count) - ); - - return v; -} - -NO_TRACE static inline void atomic_lock_arch(atomic_t *val) -{ - do { - while (val->count); - } while (test_and_set(val)); -} - -NO_TRACE static inline void atomic_inc(atomic_t *val) -{ - atomic_count_t v; - - asm volatile ( - "fetchadd8.rel %[v] = %[count], 1\n" - : [v] "=r" (v), - [count] "+m" (val->count) - ); -} - -NO_TRACE static inline void atomic_dec(atomic_t *val) -{ - atomic_count_t v; - - asm volatile ( - "fetchadd8.rel %[v] = %[count], -1\n" - : [v] "=r" (v), - [count] "+m" (val->count) - ); -} - -NO_TRACE static inline atomic_count_t atomic_preinc(atomic_t *val) -{ - atomic_count_t v; - - asm volatile ( - "fetchadd8.rel %[v] = %[count], 1\n" - : [v] "=r" (v), - [count] "+m" (val->count) - ); - - return (v + 1); -} - -NO_TRACE static inline atomic_count_t atomic_predec(atomic_t *val) -{ - atomic_count_t v; - - asm volatile ( - "fetchadd8.rel %[v] = %[count], -1\n" - : [v] "=r" (v), - [count] "+m" (val->count) - ); - - return (v - 1); -} - -NO_TRACE static inline atomic_count_t atomic_postinc(atomic_t *val) -{ - atomic_count_t v; - - asm volatile ( - "fetchadd8.rel %[v] = %[count], 1\n" - : [v] "=r" (v), - [count] "+m" (val->count) - ); - - return v; -} - -NO_TRACE static inline atomic_count_t atomic_postdec(atomic_t *val) -{ - atomic_count_t v; - - asm volatile ( - "fetchadd8.rel %[v] = %[count], -1\n" - : [v] "=r" (v), - [count] "+m" (val->count) - ); - - return v; -} - -#endif - -/** @} - */ Index: kernel/arch/ia64/include/barrier.h =================================================================== --- kernel/arch/ia64/include/barrier.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,78 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia64 - * @{ - */ -/** @file - */ - -#ifndef KERN_ia64_BARRIER_H_ -#define KERN_ia64_BARRIER_H_ - -/* - * TODO: Implement true IA-64 memory barriers for macros below. - */ -#define CS_ENTER_BARRIER() memory_barrier() -#define CS_LEAVE_BARRIER() memory_barrier() - -#define memory_barrier() asm volatile ("mf\n" ::: "memory") -#define read_barrier() memory_barrier() -#define write_barrier() memory_barrier() - -#define srlz_i() \ - asm volatile (";; srlz.i ;;\n" ::: "memory") -#define srlz_d() \ - asm volatile (";; srlz.d\n" ::: "memory") - -#define fc_i(a) \ - asm volatile ("fc.i %0\n" :: "r" ((a)) : "memory") -#define sync_i() \ - asm volatile (";; sync.i\n" ::: "memory") - -#define smc_coherence(a) \ -{ \ - fc_i((a)); \ - sync_i(); \ - srlz_i(); \ -} - -#define FC_INVAL_MIN 32 -#define smc_coherence_block(a, l) \ -{ \ - unsigned long i; \ - for (i = 0; i < (l); i += FC_INVAL_MIN) \ - fc_i((void *)(a) + i); \ - sync_i(); \ - srlz_i(); \ -} - -#endif - -/** @} - */ Index: kernel/arch/ia64/include/bootinfo.h =================================================================== --- kernel/arch/ia64/include/bootinfo.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,72 +1,0 @@ -/* - * Copyright (c) 2005 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef KERN_ia64_BOOTINFO_H_ -#define KERN_ia64_BOOTINFO_H_ - -#define TASKMAP_MAX_RECORDS 32 - -#define MEMMAP_ITEMS 128 - -#define MEMMAP_FREE_MEM 0 - -/** Size of buffer for storing task name in binit_task_t. */ -#define BOOTINFO_TASK_NAME_BUFLEN 32 - -typedef struct { - void *addr; - size_t size; - char name[BOOTINFO_TASK_NAME_BUFLEN]; -} binit_task_t; - -typedef struct { - size_t cnt; - binit_task_t tasks[TASKMAP_MAX_RECORDS]; -} binit_t; - -typedef struct { - unsigned int type; - unsigned long base; - unsigned long size; -} memmap_item_t; - -typedef struct { - binit_t taskmap; - - memmap_item_t memmap[MEMMAP_ITEMS]; - unsigned int memmap_items; - - sysarg_t *sapic; - unsigned long sys_freq; - unsigned long freq_scale; - unsigned int wakeup_intno; -} bootinfo_t; - -extern bootinfo_t *bootinfo; - -#endif Index: kernel/arch/ia64/include/context.h =================================================================== --- kernel/arch/ia64/include/context.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,131 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia64 - * @{ - */ -/** @file - */ - -#ifndef KERN_ia64_CONTEXT_H_ -#define KERN_ia64_CONTEXT_H_ - -#include -#include -#include -#include - -/* - * context_save_arch() and context_restore_arch() are both leaf procedures. - * No need to allocate scratch area. - * - * One item is put onto the stack to support get_stack_base(). - */ -#define SP_DELTA (0 + ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT)) - -/* RSE stack starts at the bottom of memory stack, hence the division by 2. */ -#define context_set(c, _pc, stack, size) \ - do { \ - (c)->pc = (uintptr_t) _pc; \ - (c)->bsp = ((uintptr_t) stack) + ALIGN_UP((size / 2), REGISTER_STACK_ALIGNMENT); \ - (c)->ar_pfs &= PFM_MASK; \ - (c)->sp = ((uintptr_t) stack) + ALIGN_UP((size / 2), STACK_ALIGNMENT) - SP_DELTA; \ - } while (0) - -/* - * Only save registers that must be preserved across - * function calls. - */ -typedef struct { - - /* - * Application registers - */ - uint64_t ar_pfs; - uint64_t ar_unat_caller; - uint64_t ar_unat_callee; - uint64_t ar_rsc; - uintptr_t bsp; /* ar_bsp */ - uint64_t ar_rnat; - uint64_t ar_lc; - - /* - * General registers - */ - uint64_t r1; - uint64_t r4; - uint64_t r5; - uint64_t r6; - uint64_t r7; - uintptr_t sp; /* r12 */ - uint64_t r13; - - /* - * Branch registers - */ - uintptr_t pc; /* b0 */ - uint64_t b1; - uint64_t b2; - uint64_t b3; - uint64_t b4; - uint64_t b5; - - /* - * Predicate registers - */ - uint64_t pr; - - uint128_t f2 __attribute__ ((aligned(16))); - uint128_t f3; - uint128_t f4; - uint128_t f5; - - uint128_t f16; - uint128_t f17; - uint128_t f18; - uint128_t f19; - uint128_t f20; - uint128_t f21; - uint128_t f22; - uint128_t f23; - uint128_t f24; - uint128_t f25; - uint128_t f26; - uint128_t f27; - uint128_t f28; - uint128_t f29; - uint128_t f30; - uint128_t f31; - - ipl_t ipl; -} context_t; - -#endif - -/** @} - */ Index: kernel/arch/ia64/include/cpu.h =================================================================== --- kernel/arch/ia64/include/cpu.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,99 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia64 - * @{ - */ -/** @file - */ - -#ifndef KERN_ia64_CPU_H_ -#define KERN_ia64_CPU_H_ - -#include -#include -#include -#include -#include - -#define FAMILY_ITANIUM 0x7 -#define FAMILY_ITANIUM2 0x1f - -#define CR64_ID_SHIFT 24 -#define CR64_ID_MASK 0xff000000 -#define CR64_EID_SHIFT 16 -#define CR64_EID_MASK 0xff0000 - -typedef struct { - uint64_t cpuid0; - uint64_t cpuid1; - cpuid3_t cpuid3; -} cpu_arch_t; - -/** Read CPUID register. - * - * @param n CPUID register number. - * - * @return Value of CPUID[n] register. - * - */ -NO_TRACE static inline uint64_t cpuid_read(int n) -{ - uint64_t v; - - asm volatile ( - "mov %[v] = cpuid[%[r]]\n" - : [v] "=r" (v) - : [r] "r" (n) - ); - - return v; -} - -NO_TRACE static inline int ia64_get_cpu_id(void) -{ - uint64_t cr64 = cr64_read(); - return ((CR64_ID_MASK) &cr64) >> CR64_ID_SHIFT; -} - -NO_TRACE static inline int ia64_get_cpu_eid(void) -{ - uint64_t cr64 = cr64_read(); - return ((CR64_EID_MASK) &cr64) >> CR64_EID_SHIFT; -} - -NO_TRACE static inline void ipi_send_ipi(int id, int eid, int intno) -{ - (bootinfo->sapic)[2 * (id * 256 + eid)] = intno; - srlz_d(); -} - -#endif - -/** @} - */ Index: kernel/arch/ia64/include/cycle.h =================================================================== --- kernel/arch/ia64/include/cycle.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,48 +1,0 @@ -/* - * Copyright (c) 2006 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia64 - * @{ - */ -/** @file - */ - -#ifndef KERN_ia64_CYCLE_H_ -#define KERN_ia64_CYCLE_H_ - -#include - -NO_TRACE static inline uint64_t get_cycle(void) -{ - return 0; -} - -#endif - -/** @} - */ Index: kernel/arch/ia64/include/drivers/it.h =================================================================== --- kernel/arch/ia64/include/drivers/it.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,51 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia64 - * @{ - */ -/** @file - */ - -#ifndef KERN_ia64_IT_H_ -#define KERN_ia64_IT_H_ - -/* - * Unfortunately, Ski does not emulate PAL, - * so we can't read the real frequency ratios - * from firmware. - * - */ -#define IT_DELTA it_delta - -extern void it_init(void); - -#endif - -/** @} - */ Index: kernel/arch/ia64/include/drivers/kbd.h =================================================================== --- kernel/arch/ia64/include/drivers/kbd.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,46 +1,0 @@ -/* - * Copyright (c) 2006 Jakub Jermar, Jakub Vana - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia6464 - * @{ - */ -/** @file - */ - -#ifndef KERN_ia64_KBD_H_ -#define KERN_ia64_KBD_H_ - -#define KBD_UNKNOWN 0 -#define KBD_SKI 1 -#define KBD_LEGACY 2 -#define KBD_NS16550 3 - -#endif - -/** @} - */ Index: kernel/arch/ia64/include/drivers/ski.h =================================================================== --- kernel/arch/ia64/include/drivers/ski.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,54 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia64 - * @{ - */ -/** @file - */ - -#ifndef KERN_ia64_SKI_H_ -#define KERN_ia64_SKI_H_ - -#include -#include - -typedef struct { - thread_t *thread; - indev_t *srlnin; -} ski_instance_t; - -extern outdev_t *skiout_init(void); - -extern ski_instance_t *skiin_init(void); -extern void skiin_wire(ski_instance_t *, indev_t *); - -#endif - -/** @} - */ Index: kernel/arch/ia64/include/elf.h =================================================================== --- kernel/arch/ia64/include/elf.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,45 +1,0 @@ -/* - * Copyright (c) 2006 Sergey Bondari - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia64 - * @{ - */ -/** @file - */ - -#ifndef KERN_ia64_ELF_H_ -#define KERN_ia64_ELF_H_ - -#define ELF_MACHINE EM_IA_64 -#define ELF_DATA_ENCODING ELFDATA2LSB -#define ELF_CLASS ELFCLASS64 - -#endif - -/** @} - */ Index: kernel/arch/ia64/include/faddr.h =================================================================== --- kernel/arch/ia64/include/faddr.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,53 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia64 - * @{ - */ -/** @file - */ - -#ifndef KERN_ia64_FADDR_H_ -#define KERN_ia64_FADDR_H_ - -#include - -/** - * - * Calculate absolute address of function - * referenced by fptr pointer. - * - * @param fptr Function pointer. - * - */ -#define FADDR(fptr) (((fncptr_t *) (fptr))->fnc) - -#endif - -/** @} - */ Index: kernel/arch/ia64/include/fpu_context.h =================================================================== --- kernel/arch/ia64/include/fpu_context.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,51 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Vana - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia64 - * @{ - */ -/** @file - */ - -#ifndef KERN_ia64_FPU_CONTEXT_H_ -#define KERN_ia64_FPU_CONTEXT_H_ - -#define FPU_CONTEXT_ALIGN 16 - -#include - -#define FRS 96 - -typedef struct { - uint128_t fr[FRS]; -} fpu_context_t; - -#endif - -/** @} - */ Index: kernel/arch/ia64/include/interrupt.h =================================================================== --- kernel/arch/ia64/include/interrupt.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,88 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia64interrupt - * @{ - */ -/** @file - */ - -#ifndef KERN_ia64_INTERRUPT_H_ -#define KERN_ia64_INTERRUPT_H_ - -#include -#include - -/** ia64 has 256 INRs. */ -#define INR_COUNT 256 - -/* - * We need to keep this just to compile. - * We might eventually move interrupt/ stuff - * to genarch. - */ -#define IVT_ITEMS 0 -#define IVT_FIRST 0 - -/** External Interrupt vectors. */ - -#define VECTOR_TLB_SHOOTDOWN_IPI 0xf0 - -#define INTERRUPT_SPURIOUS 15 -#define INTERRUPT_TIMER 255 - -#define LEGACY_INTERRUPT_BASE 0x20 - -#define IRQ_KBD (0x01 + LEGACY_INTERRUPT_BASE) -#define IRQ_MOUSE (0x0c + LEGACY_INTERRUPT_BASE) - -/** General Exception codes. */ -#define GE_ILLEGALOP 0 -#define GE_PRIVOP 1 -#define GE_PRIVREG 2 -#define GE_RESREGFLD 3 -#define GE_DISBLDISTRAN 4 -#define GE_ILLEGALDEP 8 - -#define EOI 0 /**< The actual value doesn't matter. */ - -extern void *ivt; - -extern void general_exception(uint64_t, istate_t *); -extern int break_instruction(uint64_t, istate_t *); -extern void universal_handler(uint64_t, istate_t *); -extern void nop_handler(uint64_t, istate_t *); -extern void external_interrupt(uint64_t, istate_t *); -extern void disabled_fp_register(uint64_t, istate_t *); - -extern void trap_virtual_enable_irqs(uint16_t); - -#endif - -/** @} - */ Index: kernel/arch/ia64/include/istate.h =================================================================== --- kernel/arch/ia64/include/istate.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,139 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia64interrupt - * @{ - */ -/** @file - */ - -#ifndef KERN_ia64_ISTATE_H_ -#define KERN_ia64_ISTATE_H_ - -#include - -#ifdef KERNEL - -#include - -#else /* KERNEL */ - -#include - -#endif /* KERNEL */ - -typedef struct istate { - uint128_t f2; - uint128_t f3; - uint128_t f4; - uint128_t f5; - uint128_t f6; - uint128_t f7; - uint128_t f8; - uint128_t f9; - uint128_t f10; - uint128_t f11; - uint128_t f12; - uint128_t f13; - uint128_t f14; - uint128_t f15; - uint128_t f16; - uint128_t f17; - uint128_t f18; - uint128_t f19; - uint128_t f20; - uint128_t f21; - uint128_t f22; - uint128_t f23; - uint128_t f24; - uint128_t f25; - uint128_t f26; - uint128_t f27; - uint128_t f28; - uint128_t f29; - uint128_t f30; - uint128_t f31; - - uintptr_t ar_bsp; - uintptr_t ar_bspstore; - uintptr_t ar_bspstore_new; - uint64_t ar_rnat; - uint64_t ar_ifs; - uint64_t ar_pfs; - uint64_t ar_rsc; - uintptr_t cr_ifa; - cr_isr_t cr_isr; - uintptr_t cr_iipa; - psr_t cr_ipsr; - uintptr_t cr_iip; - uint64_t pr; - uintptr_t sp; - - /* - * The following variables are defined only for break_instruction - * handler. - */ - uint64_t in0; - uint64_t in1; - uint64_t in2; - uint64_t in3; - uint64_t in4; - uint64_t in5; - uint64_t in6; - - uint64_t alignment; -} istate_t; - -NO_TRACE static inline void istate_set_retaddr(istate_t *istate, - uintptr_t retaddr) -{ - istate->cr_iip = retaddr; - istate->cr_ipsr.ri = 0; /* return to instruction slot #0 */ -} - -NO_TRACE static inline uintptr_t istate_get_pc(istate_t *istate) -{ - return istate->cr_iip; -} - -NO_TRACE static inline uintptr_t istate_get_fp(istate_t *istate) -{ - /* FIXME */ - - return 0; -} - -NO_TRACE static inline int istate_from_uspace(istate_t *istate) -{ - return (istate->cr_iip) < 0xe000000000000000ULL; -} - -#endif - -/** @} - */ Index: kernel/arch/ia64/include/legacyio.h =================================================================== --- kernel/arch/ia64/include/legacyio.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,55 +1,0 @@ -/* - * Copyright (c) 2011 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia64 - * @{ - */ -/** @file - */ - -#ifndef KERN_ia64_LEGACYIO_H_ -#define KERN_ia64_LEGACYIO_H_ - -#include - -#define LEGACYIO_PHYS_BASE 0x00000FFFFC000000ULL - -/* Legacy I/O space - static uspace address, FIXME */ -#define LEGACYIO_USER_BASE 0x0001000000000000ULL - -#define LEGACYIO_PAGE_WIDTH 26 /* 64M */ -#define LEGACYIO_SINGLE_PAGE_WIDTH 12 /* 4K */ - -#define LEGACYIO_SIZE (1ULL << LEGACYIO_PAGE_WIDTH) - -extern uintptr_t legacyio_virt_base; - -#endif - -/** @} - */ Index: kernel/arch/ia64/include/mm/as.h =================================================================== --- kernel/arch/ia64/include/mm/as.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,61 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia64mm - * @{ - */ -/** @file - */ - -#ifndef KERN_ia64_AS_H_ -#define KERN_ia64_AS_H_ - -#define KERNEL_ADDRESS_SPACE_SHADOWED_ARCH 0 - -#define KERNEL_ADDRESS_SPACE_START_ARCH UINT64_C(0xe000000000000000) -#define KERNEL_ADDRESS_SPACE_END_ARCH UINT64_C(0xffffffffffffffff) -#define USER_ADDRESS_SPACE_START_ARCH UINT64_C(0x0000000000000000) -#define USER_ADDRESS_SPACE_END_ARCH UINT64_C(0xdfffffffffffffff) - -typedef struct { -} as_arch_t; - -#include - -#define as_constructor_arch(as, flags) (as != as) -#define as_destructor_arch(as) (as != as) -#define as_create_arch(as, flags) (as != as) -#define as_deinstall_arch(as) -#define as_invalidate_translation_cache(as, page, cnt) - -extern void as_arch_init(void); - -#endif - -/** @} - */ Index: kernel/arch/ia64/include/mm/asid.h =================================================================== --- kernel/arch/ia64/include/mm/asid.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,68 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia64mm - * @{ - */ -/** @file - */ - -#ifndef KERN_ia64_ASID_H_ -#define KERN_ia64_ASID_H_ - -#ifndef __ASM__ - -#include - -typedef uint16_t asid_t; -typedef uint32_t rid_t; - -#endif /* __ASM__ */ - -/** - * Number of ia64 RIDs (Region Identifiers) per kernel ASID. - * Note that some architectures may support more bits, - * but those extra bits are not used by the kernel. - */ -#define RIDS_PER_ASID 8 - -#define RID_MAX 262143 /* 2^18 - 1 */ -#define RID_KERNEL7 7 - -#define ASID2RID(asid, vrn) \ - ((asid) * RIDS_PER_ASID + (vrn)) - -#define RID2ASID(rid) \ - ((rid) / RIDS_PER_ASID) - -#define ASID_MAX_ARCH (RID_MAX / RIDS_PER_ASID) - -#endif - -/** @} - */ Index: kernel/arch/ia64/include/mm/frame.h =================================================================== --- kernel/arch/ia64/include/mm/frame.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,56 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia64mm - * @{ - */ -/** @file - */ - -#ifndef KERN_ia64_FRAME_H_ -#define KERN_ia64_FRAME_H_ - -#define FRAME_WIDTH 14 /* 16K */ -#define FRAME_SIZE (1 << FRAME_WIDTH) - -#ifndef __ASM__ - -#include - -extern uintptr_t end_of_identity; - -extern void frame_low_arch_init(void); -extern void frame_high_arch_init(void); -#define physmem_print() - -#endif /* __ASM__ */ - -#endif - -/** @} - */ Index: kernel/arch/ia64/include/mm/km.h =================================================================== --- kernel/arch/ia64/include/mm/km.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,59 +1,0 @@ -/* - * Copyright (c) 2011 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia64mm - * @{ - */ -/** @file - */ - -#ifndef KERN_ia64_KM_H_ -#define KERN_ia64_KM_H_ - -#include - -/* - * Be conservative and assume the minimal (3 + 51)-bit virtual address width - * of the Itanium CPU even if running on CPU with full 64-bit virtual - * address width, such as Itanium 2. - */ - -#define KM_IA64_IDENTITY_START UINT64_C(0xe000000000000000) -#define KM_IA64_IDENTITY_SIZE UINT64_C(0x0004000000000000) - -#define KM_IA64_NON_IDENTITY_START UINT64_C(0xfffc000000000000) -#define KM_IA64_NON_IDENTITY_SIZE UINT64_C(0x0004000000000000) - -extern void km_identity_arch_init(void); -extern void km_non_identity_arch_init(void); -extern bool km_is_non_identity_arch(uintptr_t); - -#endif - -/** @} - */ Index: kernel/arch/ia64/include/mm/page.h =================================================================== --- kernel/arch/ia64/include/mm/page.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,300 +1,0 @@ -/* - * Copyright (c) 2005 - 2006 Jakub Jermar - * Copyright (c) 2006 Jakub Vana - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia64mm - * @{ - */ -/** @file - */ - -#ifndef KERN_ia64_PAGE_H_ -#define KERN_ia64_PAGE_H_ - -#include - -#define PAGE_SIZE FRAME_SIZE -#define PAGE_WIDTH FRAME_WIDTH - -/** Bit width of the TLB-locked portion of kernel address space. */ -#define KERNEL_PAGE_WIDTH 28 /* 256M */ - -#define PPN_SHIFT 12 - -#define VRN_SHIFT 61 -#define VRN_MASK (7ULL << VRN_SHIFT) -#define VA2VRN(va) ((va) >> VRN_SHIFT) - -#ifdef __ASM__ - #define VRN_KERNEL 7 -#else - #define VRN_KERNEL 7ULL -#endif - -#define REGION_REGISTERS 8 - -#define KA2PA(x) ((uintptr_t) ((x) - (VRN_KERNEL << VRN_SHIFT))) -#define PA2KA(x) ((uintptr_t) ((x) + (VRN_KERNEL << VRN_SHIFT))) - -#define VHPT_WIDTH 20 /* 1M */ -#define VHPT_SIZE (1 << VHPT_WIDTH) - -#define PTA_BASE_SHIFT 15 - -/** Memory Attributes. */ -#define MA_WRITEBACK 0x00 -#define MA_UNCACHEABLE 0x04 - -/** Privilege Levels. Only the most and the least privileged ones are ever used. */ -#define PL_KERNEL 0x00 -#define PL_USER 0x03 - -/* Access Rigths. Only certain combinations are used by the kernel. */ -#define AR_READ 0x00 -#define AR_EXECUTE 0x01 -#define AR_WRITE 0x02 - -#ifndef __ASM__ - -#include -#include -#include -#include -#include -#include -#include - -struct vhpt_tag_info { - unsigned long long tag : 63; - unsigned int ti : 1; -} __attribute__ ((packed)); - -union vhpt_tag { - struct vhpt_tag_info tag_info; - unsigned tag_word; -}; - -struct vhpt_entry_present { - /* Word 0 */ - unsigned int p : 1; - unsigned int : 1; - unsigned int ma : 3; - unsigned int a : 1; - unsigned int d : 1; - unsigned int pl : 2; - unsigned int ar : 3; - unsigned long long ppn : 38; - unsigned int : 2; - unsigned int ed : 1; - unsigned int ig1 : 11; - - /* Word 1 */ - unsigned int : 2; - unsigned int ps : 6; - unsigned int key : 24; - unsigned int : 32; - - /* Word 2 */ - union vhpt_tag tag; - - /* Word 3 */ - uint64_t ig3 : 64; -} __attribute__ ((packed)); - -struct vhpt_entry_not_present { - /* Word 0 */ - unsigned int p : 1; - unsigned long long ig0 : 52; - unsigned int ig1 : 11; - - /* Word 1 */ - unsigned int : 2; - unsigned int ps : 6; - unsigned long long ig2 : 56; - - /* Word 2 */ - union vhpt_tag tag; - - /* Word 3 */ - uint64_t ig3 : 64; -} __attribute__ ((packed)); - -typedef union { - struct vhpt_entry_present present; - struct vhpt_entry_not_present not_present; - uint64_t word[4]; -} vhpt_entry_t; - -struct region_register_map { - unsigned int ve : 1; - unsigned int : 1; - unsigned int ps : 6; - unsigned int rid : 24; - unsigned int : 32; -} __attribute__ ((packed)); - -typedef union { - struct region_register_map map; - unsigned long long word; -} region_register_t; - -struct pta_register_map { - unsigned int ve : 1; - unsigned int : 1; - unsigned int size : 6; - unsigned int vf : 1; - unsigned int : 6; - unsigned long long base : 49; -} __attribute__ ((packed)); - -typedef union pta_register { - struct pta_register_map map; - uint64_t word; -} pta_register_t; - -/** Return Translation Hashed Entry Address. - * - * VRN bits are used to read RID (ASID) from one - * of the eight region registers registers. - * - * @param va Virtual address including VRN bits. - * - * @return Address of the head of VHPT collision chain. - */ -NO_TRACE static inline uint64_t thash(uint64_t va) -{ - uint64_t ret; - - asm volatile ( - "thash %[ret] = %[va]\n" - : [ret] "=r" (ret) - : [va] "r" (va) - ); - - return ret; -} - -/** Return Translation Hashed Entry Tag. - * - * VRN bits are used to read RID (ASID) from one - * of the eight region registers. - * - * @param va Virtual address including VRN bits. - * - * @return The unique tag for VPN and RID in the collision chain returned by thash(). - */ -NO_TRACE static inline uint64_t ttag(uint64_t va) -{ - uint64_t ret; - - asm volatile ( - "ttag %[ret] = %[va]\n" - : [ret] "=r" (ret) - : [va] "r" (va) - ); - - return ret; -} - -/** Read Region Register. - * - * @param i Region register index. - * - * @return Current contents of rr[i]. - */ -NO_TRACE static inline uint64_t rr_read(size_t i) -{ - uint64_t ret; - - ASSERT(i < REGION_REGISTERS); - - asm volatile ( - "mov %[ret] = rr[%[index]]\n" - : [ret] "=r" (ret) - : [index] "r" (i << VRN_SHIFT) - ); - - return ret; -} - -/** Write Region Register. - * - * @param i Region register index. - * @param v Value to be written to rr[i]. - */ -NO_TRACE static inline void rr_write(size_t i, uint64_t v) -{ - ASSERT(i < REGION_REGISTERS); - - asm volatile ( - "mov rr[%[index]] = %[value]\n" - :: [index] "r" (i << VRN_SHIFT), - [value] "r" (v) - ); -} - -/** Read Page Table Register. - * - * @return Current value stored in PTA. - */ -NO_TRACE static inline uint64_t pta_read(void) -{ - uint64_t ret; - - asm volatile ( - "mov %[ret] = cr.pta\n" - : [ret] "=r" (ret) - ); - - return ret; -} - -/** Write Page Table Register. - * - * @param v New value to be stored in PTA. - */ -NO_TRACE static inline void pta_write(uint64_t v) -{ - asm volatile ( - "mov cr.pta = %[value]\n" - :: [value] "r" (v) - ); -} - -extern void page_arch_init(void); - -extern vhpt_entry_t *vhpt_hash(uintptr_t page, asid_t asid); -extern bool vhpt_compare(uintptr_t page, asid_t asid, vhpt_entry_t *v); -extern void vhpt_set_record(vhpt_entry_t *v, uintptr_t page, asid_t asid, uintptr_t frame, int flags); - -#endif /* __ASM__ */ - -#endif - -/** @} - */ Index: kernel/arch/ia64/include/mm/tlb.h =================================================================== --- kernel/arch/ia64/include/mm/tlb.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,100 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia64mm - * @{ - */ -/** @file - */ - -#ifndef KERN_ia64_TLB_H_ -#define KERN_ia64_TLB_H_ - -#include -#include -#include -#include - -/** Data and instruction Translation Register indices. */ -#define DTR_KERNEL 0 -#define ITR_KERNEL 0 -#define DTR_KSTACK1 4 -#define DTR_KSTACK2 5 - -/** Portion of TLB insertion format data structure. */ -typedef union { - uint64_t word[2]; - struct { - /* Word 0 */ - unsigned int p : 1; /**< Present. */ - unsigned int : 1; - unsigned int ma : 3; /**< Memory attribute. */ - unsigned int a : 1; /**< Accessed. */ - unsigned int d : 1; /**< Dirty. */ - unsigned int pl : 2; /**< Privilege level. */ - unsigned int ar : 3; /**< Access rights. */ - unsigned long long ppn : 38; /**< Physical Page Number, a.k.a. PFN. */ - unsigned int : 2; - unsigned int ed : 1; - unsigned int ig1 : 11; - - /* Word 1 */ - unsigned int : 2; - unsigned int ps : 6; /**< Page size will be 2^ps. */ - unsigned int key : 24; /**< Protection key, unused. */ - unsigned int : 32; - } __attribute__ ((packed)); -} __attribute__ ((packed)) tlb_entry_t; - -extern void tc_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry, bool dtc); -extern void dtc_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry); -extern void itc_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry); - -extern void tr_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry, bool dtr, size_t tr); -extern void dtr_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry, size_t tr); -extern void itr_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry, size_t tr); - -extern void dtlb_kernel_mapping_insert(uintptr_t page, uintptr_t frame, bool dtr, size_t tr); -extern void dtr_purge(uintptr_t page, size_t width); - -extern void dtc_pte_copy(pte_t *t); -extern void itc_pte_copy(pte_t *t); - -extern void alternate_instruction_tlb_fault(uint64_t vector, istate_t *istate); -extern void alternate_data_tlb_fault(uint64_t vector, istate_t *istate); -extern void data_nested_tlb_fault(uint64_t vector, istate_t *istate); -extern void data_dirty_bit_fault(uint64_t vector, istate_t *istate); -extern void instruction_access_bit_fault(uint64_t vector, istate_t *istate); -extern void data_access_bit_fault(uint64_t vector, istate_t *istate); -extern void data_access_rights_fault(uint64_t vector, istate_t *istate); -extern void page_not_present(uint64_t vector, istate_t *istate); - -#endif - -/** @} - */ Index: kernel/arch/ia64/include/mm/vhpt.h =================================================================== --- kernel/arch/ia64/include/mm/vhpt.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,60 +1,0 @@ -/* - * Copyright (c) 2006 Jakub Vana - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia64mm - * @{ - */ -/** @file -*/ - -#ifndef KERN_ia64_VHPT_H_ -#define KERN_ia64_VHPT_H_ - -#include -#include - -uintptr_t vhpt_set_up(void); - -static inline vhpt_entry_t tlb_entry_t2vhpt_entry_t(tlb_entry_t tentry) -{ - vhpt_entry_t ventry; - - ventry.word[0] = tentry.word[0]; - ventry.word[1] = tentry.word[1]; - - return ventry; -} - -void vhpt_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry); -void vhpt_invalidate_all(void); -void vhpt_invalidate_asid(asid_t asid); - -#endif - -/** @} - */ Index: kernel/arch/ia64/include/pal/pal.h =================================================================== --- kernel/arch/ia64/include/pal/pal.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,109 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia64 - * @{ - */ -/** @file - */ - -#ifndef KERN_ia64_PAL_H_ -#define KERN_ia64_PAL_H_ - -#define PAL_OK 0 /**< Call completed without error. */ -#define PAL_UNIMPL -1 /**< Unimplemented procedure. */ -#define PAL_INVARG -2 /**< Invalid argument. */ -#define PAL_ERR -3 /**< Can not compete call without error. */ - -/** These are the indices for PAL_PROC. */ -#define PAL_CACHE_FLUSH 1 -#define PAL_CACHE_INFO 2 -#define PAL_CACHE_INIT 3 -#define PAL_CACHE_PROT_INFO 38 -#define PAL_CACHE_SHARED_INFO 43 -#define PAL_CACHE_SUMMARY 4 - -#define PAL_MEM_ATTRIB 5 -#define PAL_PREFETCH_VISIBILITY 41 -#define PAL_PTCE_INFO 6 -#define PAL_VM_INFO 7 -#define PAL_VM_PAGE_SIZE 34 -#define PAL_VM_SUMMARY 8 -#define PAL_VM_TR_READ 261 - -#define PAL_BUS_GET_FEATURES 9 -#define PAL_BUS_SET_FEATURES 10 -#define PAL_DEBUG_INFO 11 -#define PAL_FIXED_ADDR 12 -#define PAL_FREQ_BASE 13 -#define PAL_FREQ_RATIOS 14 -#define PAL_LOGICAL_TO_PHYSICAL 42 -#define PAL_PERF_MON_INFO 15 -#define PAL_PLATFORM_ADDR 16 -#define PAL_PROC_GET_FEATURES 17 -#define PAL_PROC_SET_FEATURES 18 -#define PAL_REGISTER_INFO 39 -#define PAL_RSE_INFO 19 -#define PAL_VERSION 20 - -#define PAL_MC_CLEAR_LOG 21 -#define PAL_MC_DRAIN 22 -#define PAL_MC_DYNAMIC_STATE 24 -#define PAL_MC_ERROR_INFO 25 -#define PAL_MC_EXPECTED 23 -#define PAL_MC_REGISTER_MEM 27 -#define PAL_MC_RESUME 26 - -#define PAL_HALT 28 -#define PAL_HALT_INFO 257 -#define PAL_HALT_LIGHT 29 - -#define PAL_CACHE_LINE_INIT 31 -#define PAL_CACHE_READ 259 -#define PAL_CACHE_WRITE 260 -#define PAL_TEST_INFO 37 -#define PAL_TEST_PROC 258 - -#define PAL_COPY_INFO 30 -#define PAL_COPY_PAL 256 -#define PAL_ENTER_IA_32_ENV 33 -#define PAL_PMI_ENTRYPOINT 32 - -/* - * Ski PTCE data - */ -#define PAL_PTCE_INFO_BASE() (0x100000000LL) -#define PAL_PTCE_INFO_COUNT1() (2) -#define PAL_PTCE_INFO_COUNT2() (3) -#define PAL_PTCE_INFO_STRIDE1() (0x10000000) -#define PAL_PTCE_INFO_STRIDE2() (0x2000) - -#endif - -/** @} - */ Index: kernel/arch/ia64/include/proc/task.h =================================================================== --- kernel/arch/ia64/include/proc/task.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,52 +1,0 @@ -/* - * Copyright (c) 2006 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia64proc - * @{ - */ -/** @file - */ -#include - -#ifndef KERN_ia64_TASK_H_ -#define KERN_ia64_TASK_H_ - -#include - -typedef struct { - bitmap_t *iomap; -} task_arch_t; - - -#define task_create_arch(t) { (t)->arch.iomap = NULL; } -#define task_destroy_arch(t) - -#endif - -/** @} - */ Index: kernel/arch/ia64/include/proc/thread.h =================================================================== --- kernel/arch/ia64/include/proc/thread.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,48 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia64proc - * @{ - */ -/** @file - */ - -#ifndef KERN_ia64_THREAD_H_ -#define KERN_ia64_THREAD_H_ - -typedef struct { -} thread_arch_t; - -#define thr_constructor_arch(t) -#define thr_destructor_arch(t) -#define thread_create_arch(t) - -#endif - -/** @} - */ Index: kernel/arch/ia64/include/register.h =================================================================== --- kernel/arch/ia64/include/register.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,276 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia64 - * @{ - */ -/** @file - */ - -#ifndef KERN_ia64_REGISTER_H_ -#define KERN_ia64_REGISTER_H_ - -#define DCR_PP_MASK (1 << 0) -#define DCR_BE_MASK (1 << 1) -#define DCR_LC_MASK (1 << 2) -#define DCR_DM_MASK (1 << 8) -#define DCR_DP_MASK (1 << 9) -#define DCR_DK_MASK (1 << 10) -#define DCR_DX_MASK (1 << 11) -#define DCR_DR_MASK (1 << 12) -#define DCR_DA_MASK (1 << 13) -#define DCR_DD_MASK (1 << 14) - -#define CR_IVR_MASK 0x0f - -#define PSR_IC_MASK (1 << 13) -#define PSR_I_MASK (1 << 14) -#define PSR_PK_MASK (1 << 15) -#define PSR_DT_MASK (1 << 17) -#define PSR_DFL_MASK (1 << 18) -#define PSR_DFH_MASK (1 << 19) -#define PSR_RT_MASK (1 << 27) -#define PSR_IT_MASK (1 << 36) - -#define PSR_CPL_SHIFT 32 -#define PSR_CPL_MASK_SHIFTED 3 - -#define PSR_RI_SHIFT 41 -#define PSR_RI_LEN 2 - -#define PFM_MASK (~0x3fffffffff) - -#define RSC_MODE_MASK 3 -#define RSC_PL_MASK 12 - -/** Application registers. */ -#define AR_KR0 0 -#define AR_KR1 1 -#define AR_KR2 2 -#define AR_KR3 3 -#define AR_KR4 4 -#define AR_KR5 5 -#define AR_KR6 6 -#define AR_KR7 7 -/* ARs 8-15 are reserved */ -#define AR_RSC 16 -#define AR_BSP 17 -#define AR_BSPSTORE 18 -#define AR_RNAT 19 -/* AR 20 is reserved */ -#define AR_FCR 21 -/* ARs 22-23 are reserved */ -#define AR_EFLAG 24 -#define AR_CSD 25 -#define AR_SSD 26 -#define AR_CFLG 27 -#define AR_FSR 28 -#define AR_FIR 29 -#define AR_FDR 30 -/* AR 31 is reserved */ -#define AR_CCV 32 -/* ARs 33-35 are reserved */ -#define AR_UNAT 36 -/* ARs 37-39 are reserved */ -#define AR_FPSR 40 -/* ARs 41-43 are reserved */ -#define AR_ITC 44 -/* ARs 45-47 are reserved */ -/* ARs 48-63 are ignored */ -#define AR_PFS 64 -#define AR_LC 65 -#define AR_EC 66 -/* ARs 67-111 are reserved */ -/* ARs 112-127 are ignored */ - -/** Control registers. */ -#define CR_DCR 0 -#define CR_ITM 1 -#define CR_IVA 2 -/* CR3-CR7 are reserved */ -#define CR_PTA 8 -/* CR9-CR15 are reserved */ -#define CR_IPSR 16 -#define CR_ISR 17 -/* CR18 is reserved */ -#define CR_IIP 19 -#define CR_IFA 20 -#define CR_ITIR 21 -#define CR_IIPA 22 -#define CR_IFS 23 -#define CR_IIM 24 -#define CR_IHA 25 -/* CR26-CR63 are reserved */ -#define CR_LID 64 -#define CR_IVR 65 -#define CR_TPR 66 -#define CR_EOI 67 -#define CR_IRR0 68 -#define CR_IRR1 69 -#define CR_IRR2 70 -#define CR_IRR3 71 -#define CR_ITV 72 -#define CR_PMV 73 -#define CR_CMCV 74 -/* CR75-CR79 are reserved */ -#define CR_LRR0 80 -#define CR_LRR1 81 -/* CR82-CR127 are reserved */ - -#ifndef __ASM__ - -/** Processor Status Register. */ -typedef union { - uint64_t value; - struct { - unsigned int : 1; - unsigned int be : 1; /**< Big-Endian data accesses. */ - unsigned int up : 1; /**< User Performance monitor enable. */ - unsigned int ac : 1; /**< Alignment Check. */ - unsigned int mfl : 1; /**< Lower floating-point register written. */ - unsigned int mfh : 1; /**< Upper floating-point register written. */ - unsigned int : 7; - unsigned int ic : 1; /**< Interruption Collection. */ - unsigned int i : 1; /**< Interrupt Bit. */ - unsigned int pk : 1; /**< Protection Key enable. */ - unsigned int : 1; - unsigned int dt : 1; /**< Data address Translation. */ - unsigned int dfl : 1; /**< Disabled Floating-point Low register set. */ - unsigned int dfh : 1; /**< Disabled Floating-point High register set. */ - unsigned int sp : 1; /**< Secure Performance monitors. */ - unsigned int pp : 1; /**< Privileged Performance monitor enable. */ - unsigned int di : 1; /**< Disable Instruction set transition. */ - unsigned int si : 1; /**< Secure Interval timer. */ - unsigned int db : 1; /**< Debug Breakpoint fault. */ - unsigned int lp : 1; /**< Lower Privilege transfer trap. */ - unsigned int tb : 1; /**< Taken Branch trap. */ - unsigned int rt : 1; /**< Register Stack Translation. */ - unsigned int : 4; - unsigned int cpl : 2; /**< Current Privilege Level. */ - unsigned int is : 1; /**< Instruction Set. */ - unsigned int mc : 1; /**< Machine Check abort mask. */ - unsigned int it : 1; /**< Instruction address Translation. */ - unsigned int id : 1; /**< Instruction Debug fault disable. */ - unsigned int da : 1; /**< Disable Data Access and Dirty-bit faults. */ - unsigned int dd : 1; /**< Data Debug fault disable. */ - unsigned int ss : 1; /**< Single Step enable. */ - unsigned int ri : 2; /**< Restart Instruction. */ - unsigned int ed : 1; /**< Exception Deferral. */ - unsigned int bn : 1; /**< Register Bank. */ - unsigned int ia : 1; /**< Disable Instruction Access-bit faults. */ - } __attribute__ ((packed)); -} psr_t; - -/** Register Stack Configuration Register */ -typedef union { - uint64_t value; - struct { - unsigned int mode : 2; - unsigned int pl : 2; /**< Privilege Level. */ - unsigned int be : 1; /**< Big-endian. */ - unsigned int : 11; - unsigned int loadrs : 14; - } __attribute__ ((packed)); -} rsc_t; - -/** External Interrupt Vector Register */ -typedef union { - uint8_t vector; - uint64_t value; -} cr_ivr_t; - -/** Task Priority Register */ -typedef union { - uint64_t value; - struct { - unsigned int : 4; - unsigned int mic: 4; /**< Mask Interrupt Class. */ - unsigned int : 8; - unsigned int mmi: 1; /**< Mask Maskable Interrupts. */ - } __attribute__ ((packed)); -} cr_tpr_t; - -/** Interval Timer Vector */ -typedef union { - uint64_t value; - struct { - unsigned int vector : 8; - unsigned int : 4; - unsigned int : 1; - unsigned int : 3; - unsigned int m : 1; /**< Mask. */ - } __attribute__ ((packed)); -} cr_itv_t; - -/** Interruption Status Register */ -typedef union { - uint64_t value; - struct { - union { - /** General Exception code field structuring. */ - uint16_t code; - struct { - unsigned int ge_na : 4; - unsigned int ge_code : 4; - } __attribute__ ((packed)); - }; - uint8_t vector; - unsigned int : 8; - unsigned int x : 1; /**< Execute exception. */ - unsigned int w : 1; /**< Write exception. */ - unsigned int r : 1; /**< Read exception. */ - unsigned int na : 1; /**< Non-access exception. */ - unsigned int sp : 1; /**< Speculative load exception. */ - unsigned int rs : 1; /**< Register stack. */ - unsigned int ir : 1; /**< Incomplete Register frame. */ - unsigned int ni : 1; /**< Nested Interruption. */ - unsigned int so : 1; /**< IA-32 Supervisor Override. */ - unsigned int ei : 2; /**< Excepting Instruction. */ - unsigned int ed : 1; /**< Exception Deferral. */ - unsigned int : 20; - } __attribute__ ((packed)); -} cr_isr_t; - -/** CPUID Register 3 */ -typedef union { - uint64_t value; - struct { - uint8_t number; - uint8_t revision; - uint8_t model; - uint8_t family; - uint8_t archrev; - } __attribute__ ((packed)); -} cpuid3_t; - -#endif /* !__ASM__ */ - -#endif - -/** @} - */ Index: kernel/arch/ia64/include/stack.h =================================================================== --- kernel/arch/ia64/include/stack.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,46 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia64 - * @{ - */ -/** @file - */ - -#ifndef KERN_ia64_STACK_H_ -#define KERN_ia64_STACK_H_ - -#define STACK_ITEM_SIZE 8 -#define STACK_ALIGNMENT 16 -#define STACK_SCRATCH_AREA_SIZE 16 -#define REGISTER_STACK_ALIGNMENT 8 - -#endif - -/** @} - */ Index: kernel/arch/ia64/include/types.h =================================================================== --- kernel/arch/ia64/include/types.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,66 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia64 - * @{ - */ -/** @file - */ - -#ifndef KERN_ia64_TYPES_H_ -#define KERN_ia64_TYPES_H_ - -typedef uint64_t size_t; -typedef int64_t ssize_t; - -typedef uint64_t uintptr_t; -typedef uint64_t pfn_t; - -typedef uint64_t ipl_t; - -typedef uint64_t sysarg_t; -typedef int64_t native_t; -typedef uint64_t atomic_count_t; - -typedef struct { - sysarg_t fnc; - sysarg_t gp; -} __attribute__((may_alias)) fncptr_t; - -#define INTN_C(c) INT64_C(c) -#define UINTN_C(c) UINT64_C(c) - -#define PRIdn PRId64 /**< Format for native_t. */ -#define PRIun PRIu64 /**< Format for sysarg_t. */ -#define PRIxn PRIx64 /**< Format for hexadecimal sysarg_t. */ -#define PRIua PRIu64 /**< Format for atomic_count_t. */ - -#endif - -/** @} - */ Index: kernel/arch/mips32/include/arch.h =================================================================== --- kernel/arch/mips32/include/arch.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,63 +1,0 @@ -/* - * Copyright (c) 2005 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips32 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips32_ARCH_H_ -#define KERN_mips32_ARCH_H_ - -#include - -#define TASKMAP_MAX_RECORDS 32 -#define CPUMAP_MAX_RECORDS 32 -#define BOOTINFO_TASK_NAME_BUFLEN 32 - -extern size_t cpu_count; - -typedef struct { - void *addr; - size_t size; - char name[BOOTINFO_TASK_NAME_BUFLEN]; -} utask_t; - -typedef struct { - uint32_t cpumap; - size_t cnt; - utask_t tasks[TASKMAP_MAX_RECORDS]; -} bootinfo_t; - -extern void arch_pre_main(void *entry, bootinfo_t *bootinfo); - -#endif - -/** @} - */ Index: kernel/arch/mips32/include/arch/arch.h =================================================================== --- kernel/arch/mips32/include/arch/arch.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/mips32/include/arch/arch.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,63 @@ +/* + * Copyright (c) 2005 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips32 + * @{ + */ +/** @file + */ + +#ifndef KERN_mips32_ARCH_H_ +#define KERN_mips32_ARCH_H_ + +#include + +#define TASKMAP_MAX_RECORDS 32 +#define CPUMAP_MAX_RECORDS 32 +#define BOOTINFO_TASK_NAME_BUFLEN 32 + +extern size_t cpu_count; + +typedef struct { + void *addr; + size_t size; + char name[BOOTINFO_TASK_NAME_BUFLEN]; +} utask_t; + +typedef struct { + uint32_t cpumap; + size_t cnt; + utask_t tasks[TASKMAP_MAX_RECORDS]; +} bootinfo_t; + +extern void arch_pre_main(void *entry, bootinfo_t *bootinfo); + +#endif + +/** @} + */ Index: kernel/arch/mips32/include/arch/asm.h =================================================================== --- kernel/arch/mips32/include/arch/asm.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/mips32/include/arch/asm.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,117 @@ +/* + * Copyright (c) 2003-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips32 + * @{ + */ +/** @file + */ + +#ifndef KERN_mips32_ASM_H_ +#define KERN_mips32_ASM_H_ + +#include +#include +#include + +NO_TRACE static inline void cpu_sleep(void) +{ + /* + * Unfortunatelly most of the simulators do not support + * + * asm volatile ( + * "wait" + * ); + * + */ +} + +/** Return base address of current stack + * + * Return the base address of the current stack. + * The stack is assumed to be STACK_SIZE bytes long. + * The stack must start on page boundary. + * + */ +NO_TRACE static inline uintptr_t get_stack_base(void) +{ + uintptr_t base; + + asm volatile ( + "and %[base], $29, %[mask]\n" + : [base] "=r" (base) + : [mask] "r" (~(STACK_SIZE - 1)) + ); + + return base; +} + +NO_TRACE static inline void pio_write_8(ioport8_t *port, uint8_t v) +{ + *port = v; +} + +NO_TRACE static inline void pio_write_16(ioport16_t *port, uint16_t v) +{ + *port = v; +} + +NO_TRACE static inline void pio_write_32(ioport32_t *port, uint32_t v) +{ + *port = v; +} + +NO_TRACE static inline uint8_t pio_read_8(ioport8_t *port) +{ + return *port; +} + +NO_TRACE static inline uint16_t pio_read_16(ioport16_t *port) +{ + return *port; +} + +NO_TRACE static inline uint32_t pio_read_32(ioport32_t *port) +{ + return *port; +} + +extern void cpu_halt(void) __attribute__((noreturn)); +extern void asm_delay_loop(uint32_t); +extern void userspace_asm(uintptr_t, uintptr_t, uintptr_t); + +extern ipl_t interrupts_disable(void); +extern ipl_t interrupts_enable(void); +extern void interrupts_restore(ipl_t); +extern ipl_t interrupts_read(void); +extern bool interrupts_disabled(void); + +#endif + +/** @} + */ Index: kernel/arch/mips32/include/arch/asm/boot.h =================================================================== --- kernel/arch/mips32/include/arch/asm/boot.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/mips32/include/arch/asm/boot.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,44 @@ +/* + * Copyright (c) 2005 Ondrej Palkovsky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips32 + * @{ + */ +/** @file + */ + +#ifndef KERN_mips32_BOOT_H_ +#define KERN_mips32_BOOT_H_ + +/* Temporary stack size for boot process */ +#define TEMP_STACK_SIZE 0x100 + +#endif + +/** @} + */ Index: kernel/arch/mips32/include/arch/asm/regname.h =================================================================== --- kernel/arch/mips32/include/arch/asm/regname.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/mips32/include/arch/asm/regname.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,97 @@ +/* + * Copyright (c) 2005 Ondrej Palkovsky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips32 + * @{ + */ +/** @file + */ + +#ifndef KERN_mips32_REGNAME_H_ +#define KERN_mips32_REGNAME_H_ + +#define zero 0 +#define at 1 +#define v0 2 +#define v1 3 +#define a0 4 +#define a1 5 +#define a2 6 +#define a3 7 +#define t0 8 +#define t1 9 +#define t2 10 +#define t3 11 +#define t4 12 +#define t5 13 +#define t6 14 +#define t7 15 +#define s0 16 +#define s1 17 +#define s2 18 +#define s3 19 +#define s4 20 +#define s5 21 +#define s6 22 +#define s7 23 +#define t8 24 +#define t9 25 +#define k0 26 +#define k1 27 +#define gp 28 +#define sp 29 +#define s8 30 +#define ra 31 + +#define rindex 0 +#define rrandom 1 +#define entrylo0 2 +#define entrylo1 3 +#define context 4 +#define pagemask 5 +#define wired 6 +#define badvaddr 8 +#define count 9 +#define entryhi 10 +#define compare 11 +#define status 12 +#define cause 13 +#define epc 14 +#define rconfig 16 +#define lladdr 17 +#define watchlo 18 +#define watchhi 19 +#define xcontext 20 +#define rdebug 23 +#define depc 24 +#define eepc 30 + +#endif + +/** @} + */ Index: kernel/arch/mips32/include/arch/atomic.h =================================================================== --- kernel/arch/mips32/include/arch/atomic.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/mips32/include/arch/atomic.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,114 @@ +/* + * Copyright (c) 2005 Ondrej Palkovsky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips32 + * @{ + */ +/** @file + */ + +#ifndef KERN_mips32_ATOMIC_H_ +#define KERN_mips32_ATOMIC_H_ + +#include + +#define atomic_inc(x) ((void) atomic_add(x, 1)) +#define atomic_dec(x) ((void) atomic_add(x, -1)) + +#define atomic_postinc(x) (atomic_add(x, 1) - 1) +#define atomic_postdec(x) (atomic_add(x, -1) + 1) + +#define atomic_preinc(x) atomic_add(x, 1) +#define atomic_predec(x) atomic_add(x, -1) + +/* Atomic addition of immediate value. + * + * @param val Memory location to which will be the immediate value added. + * @param i Signed immediate that will be added to *val. + * + * @return Value after addition. + * + */ +NO_TRACE static inline atomic_count_t atomic_add(atomic_t *val, + atomic_count_t i) +{ + atomic_count_t tmp; + atomic_count_t v; + + asm volatile ( + "1:\n" + " ll %0, %1\n" + " addu %0, %0, %3\n" /* same as addi, but never traps on overflow */ + " move %2, %0\n" + " sc %0, %1\n" + " beq %0, %4, 1b\n" /* if the atomic operation failed, try again */ + " nop\n" + : "=&r" (tmp), + "+m" (val->count), + "=&r" (v) + : "r" (i), + "i" (0) + ); + + return v; +} + +NO_TRACE static inline atomic_count_t test_and_set(atomic_t *val) +{ + atomic_count_t tmp; + atomic_count_t v; + + asm volatile ( + "1:\n" + " ll %2, %1\n" + " bnez %2, 2f\n" + " li %0, %3\n" + " sc %0, %1\n" + " beqz %0, 1b\n" + " nop\n" + "2:\n" + : "=&r" (tmp), + "+m" (val->count), + "=&r" (v) + : "i" (1) + ); + + return v; +} + +NO_TRACE static inline void atomic_lock_arch(atomic_t *val) +{ + do { + while (val->count); + } while (test_and_set(val)); +} + +#endif + +/** @} + */ Index: kernel/arch/mips32/include/arch/barrier.h =================================================================== --- kernel/arch/mips32/include/arch/barrier.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/mips32/include/arch/barrier.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,54 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips32 + * @{ + */ +/** @file + */ + +#ifndef KERN_mips32_BARRIER_H_ +#define KERN_mips32_BARRIER_H_ + +/* + * TODO: implement true MIPS memory barriers for macros below. + */ +#define CS_ENTER_BARRIER() asm volatile ("" ::: "memory") +#define CS_LEAVE_BARRIER() asm volatile ("" ::: "memory") + +#define memory_barrier() asm volatile ("" ::: "memory") +#define read_barrier() asm volatile ("" ::: "memory") +#define write_barrier() asm volatile ("" ::: "memory") + +#define smc_coherence(a) +#define smc_coherence_block(a, l) + +#endif + +/** @} + */ Index: kernel/arch/mips32/include/arch/cache.h =================================================================== --- kernel/arch/mips32/include/arch/cache.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/mips32/include/arch/cache.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2003-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips32 + * @{ + */ +/** @file + */ + +#ifndef KERN_mips32_CACHE_H_ +#define KERN_mips32_CACHE_H_ + +#include + +extern void cache_error(istate_t *istate); + +#endif + +/** @} + */ Index: kernel/arch/mips32/include/arch/context.h =================================================================== --- kernel/arch/mips32/include/arch/context.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/mips32/include/arch/context.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,80 @@ +/* + * Copyright (c) 2003-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips32 + * @{ + */ +/** @file + */ + +#ifndef KERN_mips32_CONTEXT_H_ +#define KERN_mips32_CONTEXT_H_ + +#include +#include + +/* + * Put one item onto the stack to support get_stack_base() and align it up. + */ +#define SP_DELTA (ABI_STACK_FRAME + ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT)) + +#ifndef __ASM__ + +#include + +#define context_set(ctx, pc, stack, size) \ + context_set_generic(ctx, pc, stack, size) + +/* + * Only save registers that must be preserved across + * function calls. + */ +typedef struct { + uintptr_t sp; + uintptr_t pc; + + uint32_t s0; + uint32_t s1; + uint32_t s2; + uint32_t s3; + uint32_t s4; + uint32_t s5; + uint32_t s6; + uint32_t s7; + uint32_t s8; + uint32_t gp; + + ipl_t ipl; +} context_t; + +#endif /* __ASM__ */ + +#endif + +/** @} + */ Index: kernel/arch/mips32/include/arch/context_offset.h =================================================================== --- kernel/arch/mips32/include/arch/context_offset.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/mips32/include/arch/context_offset.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,188 @@ +/* + * Copyright (c) 2005 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef KERN_mips32_CONTEXT_OFFSET_H_ +#define KERN_mips32_CONTEXT_OFFSET_H_ + +#define OFFSET_SP 0x0 +#define OFFSET_PC 0x4 +#define OFFSET_S0 0x8 +#define OFFSET_S1 0xc +#define OFFSET_S2 0x10 +#define OFFSET_S3 0x14 +#define OFFSET_S4 0x18 +#define OFFSET_S5 0x1c +#define OFFSET_S6 0x20 +#define OFFSET_S7 0x24 +#define OFFSET_S8 0x28 +#define OFFSET_GP 0x2c + +#ifdef KERNEL +# define OFFSET_IPL 0x30 +#else +# define OFFSET_TLS 0x30 + +# define OFFSET_F20 0x34 +# define OFFSET_F21 0x38 +# define OFFSET_F22 0x3c +# define OFFSET_F23 0x40 +# define OFFSET_F24 0x44 +# define OFFSET_F25 0x48 +# define OFFSET_F26 0x4c +# define OFFSET_F27 0x50 +# define OFFSET_F28 0x54 +# define OFFSET_F29 0x58 +# define OFFSET_F30 0x5c +#endif /* KERNEL */ + +#ifdef __ASM__ + +#ifdef KERNEL + +#include + +#else /* KERNEL */ + +#include + +#endif /* KERNEL */ + +/* ctx: address of the structure with saved context */ +.macro CONTEXT_SAVE_ARCH_CORE ctx:req + sw $s0, OFFSET_S0(\ctx) + sw $s1, OFFSET_S1(\ctx) + sw $s2, OFFSET_S2(\ctx) + sw $s3, OFFSET_S3(\ctx) + sw $s4, OFFSET_S4(\ctx) + sw $s5, OFFSET_S5(\ctx) + sw $s6, OFFSET_S6(\ctx) + sw $s7, OFFSET_S7(\ctx) + sw $s8, OFFSET_S8(\ctx) + sw $gp, OFFSET_GP(\ctx) + +#ifndef KERNEL + sw $k1, OFFSET_TLS(\ctx) + +#ifdef CONFIG_FPU + mfc1 $t0, $20 + sw $t0, OFFSET_F20(\ctx) + + mfc1 $t0, $21 + sw $t0, OFFSET_F21(\ctx) + + mfc1 $t0, $22 + sw $t0, OFFSET_F22(\ctx) + + mfc1 $t0, $23 + sw $t0, OFFSET_F23(\ctx) + + mfc1 $t0, $24 + sw $t0, OFFSET_F24(\ctx) + + mfc1 $t0, $25 + sw $t0, OFFSET_F25(\ctx) + + mfc1 $t0, $26 + sw $t0, OFFSET_F26(\ctx) + + mfc1 $t0, $27 + sw $t0, OFFSET_F27(\ctx) + + mfc1 $t0, $28 + sw $t0, OFFSET_F28(\ctx) + + mfc1 $t0, $29 + sw $t0, OFFSET_F29(\ctx) + + mfc1 $t0, $30 + sw $t0, OFFSET_F30(\ctx) +#endif /* CONFIG_FPU */ +#endif /* KERNEL */ + + sw $ra, OFFSET_PC(\ctx) + sw $sp, OFFSET_SP(\ctx) +.endm + +/* ctx: address of the structure with saved context */ +.macro CONTEXT_RESTORE_ARCH_CORE ctx:req + lw $s0, OFFSET_S0(\ctx) + lw $s1, OFFSET_S1(\ctx) + lw $s2, OFFSET_S2(\ctx) + lw $s3, OFFSET_S3(\ctx) + lw $s4, OFFSET_S4(\ctx) + lw $s5, OFFSET_S5(\ctx) + lw $s6, OFFSET_S6(\ctx) + lw $s7, OFFSET_S7(\ctx) + lw $s8, OFFSET_S8(\ctx) + lw $gp, OFFSET_GP(\ctx) +#ifndef KERNEL + lw $k1, OFFSET_TLS(\ctx) + +#ifdef CONFIG_FPU + lw $t0, OFFSET_F20(\ctx) + mtc1 $t0, $20 + + lw $t0, OFFSET_F21(\ctx) + mtc1 $t0, $21 + + lw $t0, OFFSET_F22(\ctx) + mtc1 $t0, $22 + + lw $t0, OFFSET_F23(\ctx) + mtc1 $t0, $23 + + lw $t0, OFFSET_F24(\ctx) + mtc1 $t0, $24 + + lw $t0, OFFSET_F25(\ctx) + mtc1 $t0, $25 + + lw $t0, OFFSET_F26(\ctx) + mtc1 $t0, $26 + + lw $t0, OFFSET_F27(\ctx) + mtc1 $t0, $27 + + lw $t0, OFFSET_F28(\ctx) + mtc1 $t0, $28 + + lw $t0, OFFSET_F29(\ctx) + mtc1 $t0, $29 + + lw $t0, OFFSET_F30(\ctx) + mtc1 $t0, $30 +#endif /* CONFIG_FPU */ +#endif /* KERNEL */ + + lw $ra, OFFSET_PC(\ctx) + lw $sp, OFFSET_SP(\ctx) +.endm + +#endif /* __ASM__ */ + +#endif Index: kernel/arch/mips32/include/arch/cp0.h =================================================================== --- kernel/arch/mips32/include/arch/cp0.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/mips32/include/arch/cp0.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,137 @@ +/* + * Copyright (c) 2003-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips32 + * @{ + */ +/** @file + */ + +#ifndef KERN_mips32_CP0_H_ +#define KERN_mips32_CP0_H_ + +#define cp0_status_ie_enabled_bit (1 << 0) +#define cp0_status_exl_exception_bit (1 << 1) +#define cp0_status_erl_error_bit (1 << 2) +#define cp0_status_um_bit (1 << 4) +#define cp0_status_bev_bootstrap_bit (1 << 22) +#define cp0_status_fpu_bit (1 << 29) + +#define cp0_status_im_shift 8 +#define cp0_status_im_mask 0xff00 + +#define cp0_cause_excno(cause) ((cause >> 2) & 0x1f) +#define cp0_cause_coperr(cause) ((cause >> 28) & 0x3) + +#define fpu_cop_id 1 + +/* + * Magic value for use in msim. + */ +#define cp0_compare_value 100000 + +#define cp0_mask_all_int() \ + cp0_status_write(cp0_status_read() & ~(cp0_status_im_mask)) + +#define cp0_unmask_all_int() \ + cp0_status_write(cp0_status_read() | cp0_status_im_mask) + +#define cp0_mask_int(it) \ + cp0_status_write(cp0_status_read() & ~(1 << (cp0_status_im_shift + (it)))) + +#define cp0_unmask_int(it) \ + cp0_status_write(cp0_status_read() | (1 << (cp0_status_im_shift + (it)))) + +#define GEN_READ_CP0(nm, reg) \ + static inline uint32_t cp0_ ##nm##_read(void) \ + { \ + uint32_t retval; \ + \ + asm volatile ( \ + "mfc0 %0, $" #reg \ + : "=r"(retval) \ + ); \ + \ + return retval; \ + } + +#define GEN_WRITE_CP0(nm, reg) \ + static inline void cp0_ ##nm##_write(uint32_t val) \ + { \ + asm volatile ( \ + "mtc0 %0, $" #reg \ + :: "r"(val) \ + ); \ + } + +GEN_READ_CP0(index, 0); +GEN_WRITE_CP0(index, 0); + +GEN_READ_CP0(random, 1); + +GEN_READ_CP0(entry_lo0, 2); +GEN_WRITE_CP0(entry_lo0, 2); + +GEN_READ_CP0(entry_lo1, 3); +GEN_WRITE_CP0(entry_lo1, 3); + +GEN_READ_CP0(context, 4); +GEN_WRITE_CP0(context, 4); + +GEN_READ_CP0(pagemask, 5); +GEN_WRITE_CP0(pagemask, 5); + +GEN_READ_CP0(wired, 6); +GEN_WRITE_CP0(wired, 6); + +GEN_READ_CP0(badvaddr, 8); + +GEN_READ_CP0(count, 9); +GEN_WRITE_CP0(count, 9); + +GEN_READ_CP0(entry_hi, 10); +GEN_WRITE_CP0(entry_hi, 10); + +GEN_READ_CP0(compare, 11); +GEN_WRITE_CP0(compare, 11); + +GEN_READ_CP0(status, 12); +GEN_WRITE_CP0(status, 12); + +GEN_READ_CP0(cause, 13); +GEN_WRITE_CP0(cause, 13); + +GEN_READ_CP0(epc, 14); +GEN_WRITE_CP0(epc, 14); + +GEN_READ_CP0(prid, 15); + +#endif + +/** @} + */ Index: kernel/arch/mips32/include/arch/cpu.h =================================================================== --- kernel/arch/mips32/include/arch/cpu.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/mips32/include/arch/cpu.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,49 @@ +/* + * Copyright (c) 2003-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips32 + * @{ + */ +/** @file + */ + +#ifndef KERN_mips32_CPU_H_ +#define KERN_mips32_CPU_H_ + +#include +#include + +typedef struct { + uint32_t imp_num; + uint32_t rev_num; +} cpu_arch_t; + +#endif + +/** @} + */ Index: kernel/arch/mips32/include/arch/cycle.h =================================================================== --- kernel/arch/mips32/include/arch/cycle.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/mips32/include/arch/cycle.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,50 @@ +/* + * Copyright (c) 2006 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips32 + * @{ + */ +/** @file + */ + +#ifndef KERN_mips32_CYCLE_H_ +#define KERN_mips32_CYCLE_H_ + +#include +#include +#include + +NO_TRACE static inline uint64_t get_cycle(void) +{ + return ((uint64_t) count_hi << 32) + ((uint64_t) cp0_count_read()); +} + +#endif + +/** @} + */ Index: kernel/arch/mips32/include/arch/debug.h =================================================================== --- kernel/arch/mips32/include/arch/debug.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/mips32/include/arch/debug.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,56 @@ +/* + * Copyright (c) 2005 Ondrej Palkovsky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips32debug + * @{ + */ +/** @file + */ + +#ifndef KERN_mips32_DEBUG_H_ +#define KERN_mips32_DEBUG_H_ + +/** Enter the simulator trace mode */ +#define ___traceon() asm volatile ( "\t.word\t0x39\n"); + +/** Leave the simulator trace mode */ +#define ___traceoff() asm volatile ( "\t.word\t0x3d\n"); + +/** Ask the simulator to dump registers */ +#define ___regview() asm volatile ( "\t.word\t0x37\n"); + +/** Halt the simulator */ +#define ___halt() asm volatile ( "\t.word\t0x28\n"); + +/** Enter the simulator interactive mode */ +#define ___intmode() asm volatile ( "\t.word\t0x29\n"); + +#endif + +/** @} + */ Index: kernel/arch/mips32/include/arch/debugger.h =================================================================== --- kernel/arch/mips32/include/arch/debugger.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/mips32/include/arch/debugger.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,78 @@ +/* + * Copyright (c) 2005 Ondrej Palkovsky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips32debug + * @{ + */ +/** @file + */ + +#ifndef KERN_mips32_DEBUGGER_H_ +#define KERN_mips32_DEBUGGER_H_ + +#include +#include + +#define BKPOINTS_MAX 10 + +/** Breakpoint was shot */ +#define BKPOINT_INPROG (1 << 0) + +/** One-time breakpoint, mandatory for j/b instructions */ +#define BKPOINT_ONESHOT (1 << 1) + +/** + * Breakpoint is set on the next instruction, so that it + * could be reinstalled on the previous one + */ +#define BKPOINT_REINST (1 << 2) + +/** Call a predefined function */ +#define BKPOINT_FUNCCALL (1 << 3) + + +typedef struct { + uintptr_t address; /**< Breakpoint address */ + sysarg_t instruction; /**< Original instruction */ + sysarg_t nextinstruction; /**< Original instruction following break */ + unsigned int flags; /**< Flags regarding breakpoint */ + size_t counter; + void (*bkfunc)(void *, istate_t *); +} bpinfo_t; + +extern bpinfo_t breakpoints[BKPOINTS_MAX]; + +extern bool is_jump(sysarg_t); + +extern void debugger_init(void); +extern void debugger_bpoint(istate_t *); + +#endif + +/** @} + */ Index: kernel/arch/mips32/include/arch/drivers/msim.h =================================================================== --- kernel/arch/mips32/include/arch/drivers/msim.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/mips32/include/arch/drivers/msim.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,46 @@ +/* + * Copyright (c) 2005 Ondrej Palkovsky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips32 + * @{ + */ +/** @file + */ + +#ifndef KERN_mips32_MSIM_H_ +#define KERN_mips32_MSIM_H_ + +/** Address of devices. */ +#define MSIM_VIDEORAM 0x90000000 +#define MSIM_KBD_ADDRESS 0x90000000 +#define MSIM_KBD_IRQ 2 + +#endif + +/** @} + */ Index: kernel/arch/mips32/include/arch/elf.h =================================================================== --- kernel/arch/mips32/include/arch/elf.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/mips32/include/arch/elf.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,51 @@ +/* + * Copyright (c) 2006 Sergey Bondari + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips32 + * @{ + */ +/** @file + */ + +#ifndef KERN_mips32_ELF_H_ +#define KERN_mips32_ELF_H_ + +#define ELF_MACHINE EM_MIPS + +#ifdef __BE__ + #define ELF_DATA_ENCODING ELFDATA2MSB +#else + #define ELF_DATA_ENCODING ELFDATA2LSB +#endif + +#define ELF_CLASS ELFCLASS32 + +#endif + +/** @} + */ Index: kernel/arch/mips32/include/arch/exception.h =================================================================== --- kernel/arch/mips32/include/arch/exception.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/mips32/include/arch/exception.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,69 @@ +/* + * Copyright (c) 2003-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips32 + * @{ + */ +/** @file + */ + +#ifndef KERN_mips32_EXCEPTION_H_ +#define KERN_mips32_EXCEPTION_H_ + +#include +#include + +#define EXC_Int 0 +#define EXC_Mod 1 +#define EXC_TLBL 2 +#define EXC_TLBS 3 +#define EXC_AdEL 4 +#define EXC_AdES 5 +#define EXC_IBE 6 +#define EXC_DBE 7 +#define EXC_Sys 8 +#define EXC_Bp 9 +#define EXC_RI 10 +#define EXC_CpU 11 +#define EXC_Ov 12 +#define EXC_Tr 13 +#define EXC_VCEI 14 +#define EXC_FPE 15 +#define EXC_WATCH 23 +#define EXC_VCED 31 + +extern void exception(istate_t *istate); +extern void tlb_refill_entry(void); +extern void exception_entry(void); +extern void cache_error_entry(void); +extern void exception_init(void); + +#endif + +/** @} + */ Index: kernel/arch/mips32/include/arch/faddr.h =================================================================== --- kernel/arch/mips32/include/arch/faddr.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/mips32/include/arch/faddr.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips32 + * @{ + */ +/** @file + */ + +#ifndef KERN_mips32_FADDR_H_ +#define KERN_mips32_FADDR_H_ + +#include + +#define FADDR(fptr) ((uintptr_t) (fptr)) + +#endif + +/** @} + */ Index: kernel/arch/mips32/include/arch/fpu_context.h =================================================================== --- kernel/arch/mips32/include/arch/fpu_context.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/mips32/include/arch/fpu_context.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,50 @@ +/* + * Copyright (c) 2005 Jakub Vana + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips32 + * @{ + */ +/** @file + */ + +#ifndef KERN_mips32_FPU_CONTEXT_H_ +#define KERN_mips32_FPU_CONTEXT_H_ + +#include + +#define FPU_CONTEXT_ALIGN sizeof(sysarg_t) + +typedef struct { + sysarg_t dregs[32]; + sysarg_t cregs[32]; +} fpu_context_t; + +#endif + +/** @} + */ Index: kernel/arch/mips32/include/arch/interrupt.h =================================================================== --- kernel/arch/mips32/include/arch/interrupt.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/mips32/include/arch/interrupt.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,54 @@ +/* + * Copyright (c) 2003-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips32interrupt + * @{ + */ +/** @file + */ + +#ifndef KERN_mips32_INTERRUPT_H_ +#define KERN_mips32_INTERRUPT_H_ + +#include +#include + +#define IVT_ITEMS 32 +#define IVT_FIRST 0 + +#define VECTOR_TLB_SHOOTDOWN_IPI EXC_Int + +extern function virtual_timer_fnc; +extern uint32_t count_hi; + +extern void interrupt_init(void); + +#endif + +/** @} + */ Index: kernel/arch/mips32/include/arch/istate.h =================================================================== --- kernel/arch/mips32/include/arch/istate.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/mips32/include/arch/istate.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,121 @@ +/* + * Copyright (c) 2003-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips32interrupt + * @{ + */ +/** @file + */ + +#ifndef KERN_mips32_ISTATE_H_ +#define KERN_mips32_ISTATE_H_ + +#include + +#ifdef KERNEL + +#include + +#else /* KERNEL */ + +#include + +#endif /* KERNEL */ + +typedef struct istate { + /* + * The first seven registers are arranged so that the istate structure + * can be used both for exception handlers and for the syscall handler. + */ + uint32_t a0; /* arg1 */ + uint32_t a1; /* arg2 */ + uint32_t a2; /* arg3 */ + uint32_t a3; /* arg4 */ + uint32_t t0; /* arg5 */ + uint32_t t1; /* arg6 */ + uint32_t v0; /* arg7 */ + uint32_t v1; + uint32_t at; + uint32_t t2; + uint32_t t3; + uint32_t t4; + uint32_t t5; + uint32_t t6; + uint32_t t7; + uint32_t s0; + uint32_t s1; + uint32_t s2; + uint32_t s3; + uint32_t s4; + uint32_t s5; + uint32_t s6; + uint32_t s7; + uint32_t t8; + uint32_t t9; + uint32_t kt0; + uint32_t kt1; /* We use it as thread-local pointer */ + uint32_t gp; + uint32_t sp; + uint32_t s8; + uint32_t ra; + + uint32_t lo; + uint32_t hi; + + uint32_t status; /* cp0_status */ + uint32_t epc; /* cp0_epc */ + + uint32_t alignment; /* to make sizeof(istate_t) a multiple of 8 */ +} istate_t; + +NO_TRACE static inline void istate_set_retaddr(istate_t *istate, + uintptr_t retaddr) +{ + istate->epc = retaddr; +} + +/** Return true if exception happened while in userspace */ +NO_TRACE static inline int istate_from_uspace(istate_t *istate) +{ + return istate->status & cp0_status_um_bit; +} + +NO_TRACE static inline uintptr_t istate_get_pc(istate_t *istate) +{ + return istate->epc; +} + +NO_TRACE static inline uintptr_t istate_get_fp(istate_t *istate) +{ + return istate->sp; +} + +#endif + +/** @} + */ Index: kernel/arch/mips32/include/arch/mm/as.h =================================================================== --- kernel/arch/mips32/include/arch/mm/as.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/mips32/include/arch/mm/as.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,61 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips32mm + * @{ + */ +/** @file + */ + +#ifndef KERN_mips32_AS_H_ +#define KERN_mips32_AS_H_ + +#define KERNEL_ADDRESS_SPACE_SHADOWED_ARCH 0 + +#define KERNEL_ADDRESS_SPACE_START_ARCH UINT32_C(0x80000000) +#define KERNEL_ADDRESS_SPACE_END_ARCH UINT32_C(0xffffffff) +#define USER_ADDRESS_SPACE_START_ARCH UINT32_C(0x00000000) +#define USER_ADDRESS_SPACE_END_ARCH UINT32_C(0x7fffffff) + +typedef struct { +} as_arch_t; + +#include + +#define as_constructor_arch(as, flags) (as != as) +#define as_destructor_arch(as) (as != as) +#define as_create_arch(as, flags) (as != as) +#define as_deinstall_arch(as) +#define as_invalidate_translation_cache(as, page, cnt) + +extern void as_arch_init(void); + +#endif + +/** @} + */ Index: kernel/arch/mips32/include/arch/mm/asid.h =================================================================== --- kernel/arch/mips32/include/arch/mm/asid.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/mips32/include/arch/mm/asid.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,47 @@ +/* + * Copyright (c) 2005 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips32mm + * @{ + */ +/** @file + */ + +#ifndef KERN_mips32_ASID_H_ +#define KERN_mips32_ASID_H_ + +#include + +#define ASID_MAX_ARCH 255 /* 2^8 - 1 */ + +typedef uint8_t asid_t; + +#endif + +/** @} + */ Index: kernel/arch/mips32/include/arch/mm/frame.h =================================================================== --- kernel/arch/mips32/include/arch/mm/frame.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/mips32/include/arch/mm/frame.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,52 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips32mm + * @{ + */ +/** @file + */ + +#ifndef KERN_mips32_FRAME_H_ +#define KERN_mips32_FRAME_H_ + +#define FRAME_WIDTH 14 /* 16K */ +#define FRAME_SIZE (1 << FRAME_WIDTH) + +#ifndef __ASM__ + +extern void frame_low_arch_init(void); +extern void frame_high_arch_init(void); +extern void physmem_print(void); + +#endif /* __ASM__ */ + +#endif + +/** @} + */ Index: kernel/arch/mips32/include/arch/mm/km.h =================================================================== --- kernel/arch/mips32/include/arch/mm/km.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/mips32/include/arch/mm/km.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,56 @@ +/* + * Copyright (c) 2011 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips32mm + * @{ + */ +/** @file + */ + +#ifndef KERN_mips32_KM_H_ +#define KERN_mips32_KM_H_ + +#include + +#define KM_MIPS32_KSEG0_START UINT32_C(0x80000000) +#define KM_MIPS32_KSEG0_SIZE UINT32_C(0x20000000) + +#define KM_MIPS32_KSSEG_START UINT32_C(0xc0000000) +#define KM_MIPS32_KSSEG_SIZE UINT32_C(0x20000000) + +#define KM_MIPS32_KSEG3_START UINT32_C(0xe0000000) +#define KM_MIPS32_KSEG3_SIZE UINT32_C(0x20000000) + +extern void km_identity_arch_init(void); +extern void km_non_identity_arch_init(void); +extern bool km_is_non_identity_arch(uintptr_t); + +#endif + +/** @} + */ Index: kernel/arch/mips32/include/arch/mm/page.h =================================================================== --- kernel/arch/mips32/include/arch/mm/page.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/mips32/include/arch/mm/page.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,207 @@ +/* + * Copyright (c) 2003-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips32mm + * @{ + */ +/** @file + */ + +#ifndef KERN_mips32_PAGE_H_ +#define KERN_mips32_PAGE_H_ + +#include +#include + +#define PAGE_WIDTH FRAME_WIDTH +#define PAGE_SIZE FRAME_SIZE + +#ifndef __ASM__ +# define KA2PA(x) (((uintptr_t) (x)) - 0x80000000) +# define PA2KA(x) (((uintptr_t) (x)) + 0x80000000) +#else +# define KA2PA(x) ((x) - 0x80000000) +# define PA2KA(x) ((x) + 0x80000000) +#endif + +/* + * Implementation of generic 4-level page table interface. + * + * Page table layout: + * - 32-bit virtual addresses + * - Offset is 14 bits => pages are 16K long + * - PTE's use similar format as CP0 EntryLo[01] registers => PTE is therefore + * 4 bytes long + * - PTE's replace EntryLo v (valid) bit with p (present) bit + * - PTE's use only one bit to distinguish between cacheable and uncacheable + * mappings + * - PTE's define soft_valid field to ensure there is at least one 1 bit even if + * the p bit is cleared + * - PTE's make use of CP0 EntryLo's two-bit reserved field for bit W (writable) + * and bit A (accessed) + * - PTL0 has 64 entries (6 bits) + * - PTL1 is not used + * - PTL2 is not used + * - PTL3 has 4096 entries (12 bits) + */ + +/* Macros describing number of entries in each level. */ +#define PTL0_ENTRIES_ARCH 64 +#define PTL1_ENTRIES_ARCH 0 +#define PTL2_ENTRIES_ARCH 0 +#define PTL3_ENTRIES_ARCH 4096 + +/* Macros describing size of page tables in each level. */ +#define PTL0_SIZE_ARCH ONE_FRAME +#define PTL1_SIZE_ARCH 0 +#define PTL2_SIZE_ARCH 0 +#define PTL3_SIZE_ARCH ONE_FRAME + +/* Macros calculating entry indices for each level. */ +#define PTL0_INDEX_ARCH(vaddr) ((vaddr) >> 26) +#define PTL1_INDEX_ARCH(vaddr) 0 +#define PTL2_INDEX_ARCH(vaddr) 0 +#define PTL3_INDEX_ARCH(vaddr) (((vaddr) >> 14) & 0xfff) + +/* Set accessor for PTL0 address. */ +#define SET_PTL0_ADDRESS_ARCH(ptl0) + +/* Get PTE address accessors for each level. */ +#define GET_PTL1_ADDRESS_ARCH(ptl0, i) \ + (((pte_t *) (ptl0))[(i)].pfn << 12) +#define GET_PTL2_ADDRESS_ARCH(ptl1, i) \ + (ptl1) +#define GET_PTL3_ADDRESS_ARCH(ptl2, i) \ + (ptl2) +#define GET_FRAME_ADDRESS_ARCH(ptl3, i) \ + (((pte_t *) (ptl3))[(i)].pfn << 12) + +/* Set PTE address accessors for each level. */ +#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) \ + (((pte_t *) (ptl0))[(i)].pfn = (a) >> 12) +#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a) +#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a) +#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) \ + (((pte_t *) (ptl3))[(i)].pfn = (a) >> 12) + +/* Get PTE flags accessors for each level. */ +#define GET_PTL1_FLAGS_ARCH(ptl0, i) \ + get_pt_flags((pte_t *) (ptl0), (size_t) (i)) +#define GET_PTL2_FLAGS_ARCH(ptl1, i) \ + PAGE_PRESENT +#define GET_PTL3_FLAGS_ARCH(ptl2, i) \ + PAGE_PRESENT +#define GET_FRAME_FLAGS_ARCH(ptl3, i) \ + get_pt_flags((pte_t *) (ptl3), (size_t) (i)) + +/* Set PTE flags accessors for each level. */ +#define SET_PTL1_FLAGS_ARCH(ptl0, i, x) \ + set_pt_flags((pte_t *) (ptl0), (size_t) (i), (x)) +#define SET_PTL2_FLAGS_ARCH(ptl1, i, x) +#define SET_PTL3_FLAGS_ARCH(ptl2, i, x) +#define SET_FRAME_FLAGS_ARCH(ptl3, i, x) \ + set_pt_flags((pte_t *) (ptl3), (size_t) (i), (x)) + +/* Set PTE present bit accessors for each level. */ +#define SET_PTL1_PRESENT_ARCH(ptl0, i) \ + set_pt_present((pte_t *) (ptl0), (size_t) (i)) +#define SET_PTL2_PRESENT_ARCH(ptl1, i) +#define SET_PTL3_PRESENT_ARCH(ptl2, i) +#define SET_FRAME_PRESENT_ARCH(ptl3, i) \ + set_pt_present((pte_t *) (ptl3), (size_t) (i)) + +/* Last-level info macros. */ +#define PTE_VALID_ARCH(pte) (*((uint32_t *) (pte)) != 0) +#define PTE_PRESENT_ARCH(pte) ((pte)->p != 0) +#define PTE_GET_FRAME_ARCH(pte) ((pte)->pfn << 12) +#define PTE_WRITABLE_ARCH(pte) ((pte)->w != 0) +#define PTE_EXECUTABLE_ARCH(pte) 1 + +#ifndef __ASM__ + +#include +#include + +/** Page Table Entry. */ +typedef struct { + unsigned g : 1; /**< Global bit. */ + unsigned p : 1; /**< Present bit. */ + unsigned d : 1; /**< Dirty bit. */ + unsigned cacheable : 1; /**< Cacheable bit. */ + unsigned : 1; /**< Unused. */ + unsigned soft_valid : 1; /**< Valid content even if not present. */ + unsigned pfn : 24; /**< Physical frame number. */ + unsigned w : 1; /**< Page writable bit. */ + unsigned a : 1; /**< Accessed bit. */ +} pte_t; + + +NO_TRACE static inline unsigned int get_pt_flags(pte_t *pt, size_t i) +{ + pte_t *p = &pt[i]; + + return ((p->cacheable << PAGE_CACHEABLE_SHIFT) | + ((!p->p) << PAGE_PRESENT_SHIFT) | + (1 << PAGE_USER_SHIFT) | + (1 << PAGE_READ_SHIFT) | + ((p->w) << PAGE_WRITE_SHIFT) | + (1 << PAGE_EXEC_SHIFT) | + (p->g << PAGE_GLOBAL_SHIFT)); +} + +NO_TRACE static inline void set_pt_flags(pte_t *pt, size_t i, int flags) +{ + pte_t *p = &pt[i]; + + p->cacheable = (flags & PAGE_CACHEABLE) != 0; + p->p = !(flags & PAGE_NOT_PRESENT); + p->g = (flags & PAGE_GLOBAL) != 0; + p->w = (flags & PAGE_WRITE) != 0; + + /* + * Ensure that valid entries have at least one bit set. + */ + p->soft_valid = 1; +} + +NO_TRACE static inline void set_pt_present(pte_t *pt, size_t i) +{ + pte_t *p = &pt[i]; + + p->p = 1; +} + + +extern void page_arch_init(void); + +#endif /* __ASM__ */ + +#endif + +/** @} + */ Index: kernel/arch/mips32/include/arch/mm/tlb.h =================================================================== --- kernel/arch/mips32/include/arch/mm/tlb.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/mips32/include/arch/mm/tlb.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,173 @@ +/* + * Copyright (c) 2003-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips32mm + * @{ + */ +/** @file + */ + +#ifndef KERN_mips32_TLB_H_ +#define KERN_mips32_TLB_H_ + +#include +#include +#include +#include + +#define TLB_ENTRY_COUNT 48 + +#define TLB_WIRED 1 +#define TLB_KSTACK_WIRED_INDEX 0 + +#define TLB_PAGE_MASK_4K (0x000 << 13) +#define TLB_PAGE_MASK_16K (0x003 << 13) +#define TLB_PAGE_MASK_64K (0x00f << 13) +#define TLB_PAGE_MASK_256K (0x03f << 13) +#define TLB_PAGE_MASK_1M (0x0ff << 13) +#define TLB_PAGE_MASK_4M (0x3ff << 13) +#define TLB_PAGE_MASK_16M (0xfff << 13) + +#define PAGE_UNCACHED 2 +#define PAGE_CACHEABLE_EXC_WRITE 5 + +typedef union { + struct { +#ifdef __BE__ + unsigned : 2; /* zero */ + unsigned pfn : 24; /* frame number */ + unsigned c : 3; /* cache coherency attribute */ + unsigned d : 1; /* dirty/write-protect bit */ + unsigned v : 1; /* valid bit */ + unsigned g : 1; /* global bit */ +#else + unsigned g : 1; /* global bit */ + unsigned v : 1; /* valid bit */ + unsigned d : 1; /* dirty/write-protect bit */ + unsigned c : 3; /* cache coherency attribute */ + unsigned pfn : 24; /* frame number */ + unsigned : 2; /* zero */ +#endif + } __attribute__ ((packed)); + uint32_t value; +} entry_lo_t; + +typedef union { + struct { +#ifdef __BE__ + unsigned vpn2 : 19; + unsigned : 5; + unsigned asid : 8; +#else + unsigned asid : 8; + unsigned : 5; + unsigned vpn2 : 19; +#endif + } __attribute__ ((packed)); + uint32_t value; +} entry_hi_t; + +typedef union { + struct { +#ifdef __BE__ + unsigned : 7; + unsigned mask : 12; + unsigned : 13; +#else + unsigned : 13; + unsigned mask : 12; + unsigned : 7; +#endif + } __attribute__ ((packed)); + uint32_t value; +} page_mask_t; + +typedef union { + struct { +#ifdef __BE__ + unsigned p : 1; + unsigned : 25; + unsigned index : 6; +#else + unsigned index : 6; + unsigned : 25; + unsigned p : 1; +#endif + } __attribute__ ((packed)); + uint32_t value; +} tlb_index_t; + +/** Probe TLB for Matching Entry + * + * Probe TLB for Matching Entry. + */ +NO_TRACE static inline void tlbp(void) +{ + asm volatile ("tlbp\n\t"); +} + + +/** Read Indexed TLB Entry + * + * Read Indexed TLB Entry. + */ +NO_TRACE static inline void tlbr(void) +{ + asm volatile ("tlbr\n\t"); +} + +/** Write Indexed TLB Entry + * + * Write Indexed TLB Entry. + */ +NO_TRACE static inline void tlbwi(void) +{ + asm volatile ("tlbwi\n\t"); +} + +/** Write Random TLB Entry + * + * Write Random TLB Entry. + */ +NO_TRACE static inline void tlbwr(void) +{ + asm volatile ("tlbwr\n\t"); +} + +#define tlb_invalidate(asid) tlb_invalidate_asid(asid) + +extern void tlb_invalid(istate_t *istate); +extern void tlb_refill(istate_t *istate); +extern void tlb_modified(istate_t *istate); +extern void tlb_prepare_entry_lo(entry_lo_t *lo, bool g, bool v, bool d, bool cacheable, uintptr_t pfn); +extern void tlb_prepare_entry_hi(entry_hi_t *hi, asid_t asid, uintptr_t addr); + +#endif + +/** @} + */ Index: kernel/arch/mips32/include/arch/proc/task.h =================================================================== --- kernel/arch/mips32/include/arch/proc/task.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/mips32/include/arch/proc/task.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,47 @@ +/* + * Copyright (c) 2006 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips32proc + * @{ + */ +/** @file + */ + +#ifndef KERN_mips32_TASK_H_ +#define KERN_mips32_TASK_H_ + +typedef struct { +} task_arch_t; + +#define task_create_arch(t) +#define task_destroy_arch(t) + +#endif + +/** @} + */ Index: kernel/arch/mips32/include/arch/proc/thread.h =================================================================== --- kernel/arch/mips32/include/arch/proc/thread.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/mips32/include/arch/proc/thread.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,49 @@ +/* + * Copyright (c) 2003-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips32proc + * @{ + */ +/** @file + */ + +#ifndef KERN_mips32_THREAD_H_ +#define KERN_mips32_THREAD_H_ + +typedef struct { +} thread_arch_t; + +#define thr_constructor_arch(t) +#define thr_destructor_arch(t) +#define thread_create_arch(t) + +#endif + +/** @} + */ + Index: kernel/arch/mips32/include/arch/smp/dorder.h =================================================================== --- kernel/arch/mips32/include/arch/smp/dorder.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/mips32/include/arch/smp/dorder.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,46 @@ +/* + * Copyright (c) 2007 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips32 + * @{ + */ +/** @file + */ + +#ifndef KERN_mips32_DORDER_H_ +#define KERN_mips32_DORDER_H_ + +#include + +extern uint32_t dorder_cpuid(void); +extern void dorder_ipi_ack(uint32_t); + +#endif + +/** @} + */ Index: kernel/arch/mips32/include/arch/stack.h =================================================================== --- kernel/arch/mips32/include/arch/stack.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/mips32/include/arch/stack.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2006 Josef Cejka + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips32 + * @{ + */ +/** @file + */ + +#ifndef KERN_mips32_STACK_H_ +#define KERN_mips32_STACK_H_ + +#define STACK_ITEM_SIZE 4 +#define STACK_ALIGNMENT 8 +#define ABI_STACK_FRAME 32 + +#endif + +/** @} + */ Index: kernel/arch/mips32/include/arch/types.h =================================================================== --- kernel/arch/mips32/include/arch/types.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/mips32/include/arch/types.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,64 @@ +/* + * Copyright (c) 2003-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips32 + * @{ + */ +/** @file + */ + +#ifndef KERN_mips32_TYPES_H_ +#define KERN_mips32_TYPES_H_ + +typedef uint32_t size_t; +typedef int32_t ssize_t; + +typedef uint32_t uintptr_t; +typedef uint32_t pfn_t; + +typedef uint32_t ipl_t; + +typedef uint32_t sysarg_t; +typedef int32_t native_t; +typedef uint32_t atomic_count_t; + +typedef struct { +} fncptr_t; + +#define INTN_C(c) INT32_C(c) +#define UINTN_C(c) UINT32_C(c) + +#define PRIdn PRId32 /**< Format for native_t. */ +#define PRIun PRIu32 /**< Format for sysarg_t. */ +#define PRIxn PRIx32 /**< Format for hexadecimal sysarg_t. */ +#define PRIua PRIu32 /**< Format for atomic_count_t. */ + +#endif + +/** @} + */ Index: kernel/arch/mips32/include/asm.h =================================================================== --- kernel/arch/mips32/include/asm.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,117 +1,0 @@ -/* - * Copyright (c) 2003-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips32 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips32_ASM_H_ -#define KERN_mips32_ASM_H_ - -#include -#include -#include - -NO_TRACE static inline void cpu_sleep(void) -{ - /* - * Unfortunatelly most of the simulators do not support - * - * asm volatile ( - * "wait" - * ); - * - */ -} - -/** Return base address of current stack - * - * Return the base address of the current stack. - * The stack is assumed to be STACK_SIZE bytes long. - * The stack must start on page boundary. - * - */ -NO_TRACE static inline uintptr_t get_stack_base(void) -{ - uintptr_t base; - - asm volatile ( - "and %[base], $29, %[mask]\n" - : [base] "=r" (base) - : [mask] "r" (~(STACK_SIZE - 1)) - ); - - return base; -} - -NO_TRACE static inline void pio_write_8(ioport8_t *port, uint8_t v) -{ - *port = v; -} - -NO_TRACE static inline void pio_write_16(ioport16_t *port, uint16_t v) -{ - *port = v; -} - -NO_TRACE static inline void pio_write_32(ioport32_t *port, uint32_t v) -{ - *port = v; -} - -NO_TRACE static inline uint8_t pio_read_8(ioport8_t *port) -{ - return *port; -} - -NO_TRACE static inline uint16_t pio_read_16(ioport16_t *port) -{ - return *port; -} - -NO_TRACE static inline uint32_t pio_read_32(ioport32_t *port) -{ - return *port; -} - -extern void cpu_halt(void) __attribute__((noreturn)); -extern void asm_delay_loop(uint32_t); -extern void userspace_asm(uintptr_t, uintptr_t, uintptr_t); - -extern ipl_t interrupts_disable(void); -extern ipl_t interrupts_enable(void); -extern void interrupts_restore(ipl_t); -extern ipl_t interrupts_read(void); -extern bool interrupts_disabled(void); - -#endif - -/** @} - */ Index: kernel/arch/mips32/include/asm/boot.h =================================================================== --- kernel/arch/mips32/include/asm/boot.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,44 +1,0 @@ -/* - * Copyright (c) 2005 Ondrej Palkovsky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips32 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips32_BOOT_H_ -#define KERN_mips32_BOOT_H_ - -/* Temporary stack size for boot process */ -#define TEMP_STACK_SIZE 0x100 - -#endif - -/** @} - */ Index: kernel/arch/mips32/include/asm/regname.h =================================================================== --- kernel/arch/mips32/include/asm/regname.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,97 +1,0 @@ -/* - * Copyright (c) 2005 Ondrej Palkovsky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips32 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips32_REGNAME_H_ -#define KERN_mips32_REGNAME_H_ - -#define zero 0 -#define at 1 -#define v0 2 -#define v1 3 -#define a0 4 -#define a1 5 -#define a2 6 -#define a3 7 -#define t0 8 -#define t1 9 -#define t2 10 -#define t3 11 -#define t4 12 -#define t5 13 -#define t6 14 -#define t7 15 -#define s0 16 -#define s1 17 -#define s2 18 -#define s3 19 -#define s4 20 -#define s5 21 -#define s6 22 -#define s7 23 -#define t8 24 -#define t9 25 -#define k0 26 -#define k1 27 -#define gp 28 -#define sp 29 -#define s8 30 -#define ra 31 - -#define rindex 0 -#define rrandom 1 -#define entrylo0 2 -#define entrylo1 3 -#define context 4 -#define pagemask 5 -#define wired 6 -#define badvaddr 8 -#define count 9 -#define entryhi 10 -#define compare 11 -#define status 12 -#define cause 13 -#define epc 14 -#define rconfig 16 -#define lladdr 17 -#define watchlo 18 -#define watchhi 19 -#define xcontext 20 -#define rdebug 23 -#define depc 24 -#define eepc 30 - -#endif - -/** @} - */ Index: kernel/arch/mips32/include/atomic.h =================================================================== --- kernel/arch/mips32/include/atomic.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,114 +1,0 @@ -/* - * Copyright (c) 2005 Ondrej Palkovsky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips32 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips32_ATOMIC_H_ -#define KERN_mips32_ATOMIC_H_ - -#include - -#define atomic_inc(x) ((void) atomic_add(x, 1)) -#define atomic_dec(x) ((void) atomic_add(x, -1)) - -#define atomic_postinc(x) (atomic_add(x, 1) - 1) -#define atomic_postdec(x) (atomic_add(x, -1) + 1) - -#define atomic_preinc(x) atomic_add(x, 1) -#define atomic_predec(x) atomic_add(x, -1) - -/* Atomic addition of immediate value. - * - * @param val Memory location to which will be the immediate value added. - * @param i Signed immediate that will be added to *val. - * - * @return Value after addition. - * - */ -NO_TRACE static inline atomic_count_t atomic_add(atomic_t *val, - atomic_count_t i) -{ - atomic_count_t tmp; - atomic_count_t v; - - asm volatile ( - "1:\n" - " ll %0, %1\n" - " addu %0, %0, %3\n" /* same as addi, but never traps on overflow */ - " move %2, %0\n" - " sc %0, %1\n" - " beq %0, %4, 1b\n" /* if the atomic operation failed, try again */ - " nop\n" - : "=&r" (tmp), - "+m" (val->count), - "=&r" (v) - : "r" (i), - "i" (0) - ); - - return v; -} - -NO_TRACE static inline atomic_count_t test_and_set(atomic_t *val) -{ - atomic_count_t tmp; - atomic_count_t v; - - asm volatile ( - "1:\n" - " ll %2, %1\n" - " bnez %2, 2f\n" - " li %0, %3\n" - " sc %0, %1\n" - " beqz %0, 1b\n" - " nop\n" - "2:\n" - : "=&r" (tmp), - "+m" (val->count), - "=&r" (v) - : "i" (1) - ); - - return v; -} - -NO_TRACE static inline void atomic_lock_arch(atomic_t *val) -{ - do { - while (val->count); - } while (test_and_set(val)); -} - -#endif - -/** @} - */ Index: kernel/arch/mips32/include/barrier.h =================================================================== --- kernel/arch/mips32/include/barrier.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,54 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips32 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips32_BARRIER_H_ -#define KERN_mips32_BARRIER_H_ - -/* - * TODO: implement true MIPS memory barriers for macros below. - */ -#define CS_ENTER_BARRIER() asm volatile ("" ::: "memory") -#define CS_LEAVE_BARRIER() asm volatile ("" ::: "memory") - -#define memory_barrier() asm volatile ("" ::: "memory") -#define read_barrier() asm volatile ("" ::: "memory") -#define write_barrier() asm volatile ("" ::: "memory") - -#define smc_coherence(a) -#define smc_coherence_block(a, l) - -#endif - -/** @} - */ Index: kernel/arch/mips32/include/cache.h =================================================================== --- kernel/arch/mips32/include/cache.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,45 +1,0 @@ -/* - * Copyright (c) 2003-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips32 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips32_CACHE_H_ -#define KERN_mips32_CACHE_H_ - -#include - -extern void cache_error(istate_t *istate); - -#endif - -/** @} - */ Index: kernel/arch/mips32/include/context.h =================================================================== --- kernel/arch/mips32/include/context.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,80 +1,0 @@ -/* - * Copyright (c) 2003-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips32 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips32_CONTEXT_H_ -#define KERN_mips32_CONTEXT_H_ - -#include -#include - -/* - * Put one item onto the stack to support get_stack_base() and align it up. - */ -#define SP_DELTA (ABI_STACK_FRAME + ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT)) - -#ifndef __ASM__ - -#include - -#define context_set(ctx, pc, stack, size) \ - context_set_generic(ctx, pc, stack, size) - -/* - * Only save registers that must be preserved across - * function calls. - */ -typedef struct { - uintptr_t sp; - uintptr_t pc; - - uint32_t s0; - uint32_t s1; - uint32_t s2; - uint32_t s3; - uint32_t s4; - uint32_t s5; - uint32_t s6; - uint32_t s7; - uint32_t s8; - uint32_t gp; - - ipl_t ipl; -} context_t; - -#endif /* __ASM__ */ - -#endif - -/** @} - */ Index: kernel/arch/mips32/include/context_offset.h =================================================================== --- kernel/arch/mips32/include/context_offset.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,188 +1,0 @@ -/* - * Copyright (c) 2005 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef KERN_mips32_CONTEXT_OFFSET_H_ -#define KERN_mips32_CONTEXT_OFFSET_H_ - -#define OFFSET_SP 0x0 -#define OFFSET_PC 0x4 -#define OFFSET_S0 0x8 -#define OFFSET_S1 0xc -#define OFFSET_S2 0x10 -#define OFFSET_S3 0x14 -#define OFFSET_S4 0x18 -#define OFFSET_S5 0x1c -#define OFFSET_S6 0x20 -#define OFFSET_S7 0x24 -#define OFFSET_S8 0x28 -#define OFFSET_GP 0x2c - -#ifdef KERNEL -# define OFFSET_IPL 0x30 -#else -# define OFFSET_TLS 0x30 - -# define OFFSET_F20 0x34 -# define OFFSET_F21 0x38 -# define OFFSET_F22 0x3c -# define OFFSET_F23 0x40 -# define OFFSET_F24 0x44 -# define OFFSET_F25 0x48 -# define OFFSET_F26 0x4c -# define OFFSET_F27 0x50 -# define OFFSET_F28 0x54 -# define OFFSET_F29 0x58 -# define OFFSET_F30 0x5c -#endif /* KERNEL */ - -#ifdef __ASM__ - -#ifdef KERNEL - -#include - -#else /* KERNEL */ - -#include - -#endif /* KERNEL */ - -/* ctx: address of the structure with saved context */ -.macro CONTEXT_SAVE_ARCH_CORE ctx:req - sw $s0, OFFSET_S0(\ctx) - sw $s1, OFFSET_S1(\ctx) - sw $s2, OFFSET_S2(\ctx) - sw $s3, OFFSET_S3(\ctx) - sw $s4, OFFSET_S4(\ctx) - sw $s5, OFFSET_S5(\ctx) - sw $s6, OFFSET_S6(\ctx) - sw $s7, OFFSET_S7(\ctx) - sw $s8, OFFSET_S8(\ctx) - sw $gp, OFFSET_GP(\ctx) - -#ifndef KERNEL - sw $k1, OFFSET_TLS(\ctx) - -#ifdef CONFIG_FPU - mfc1 $t0, $20 - sw $t0, OFFSET_F20(\ctx) - - mfc1 $t0, $21 - sw $t0, OFFSET_F21(\ctx) - - mfc1 $t0, $22 - sw $t0, OFFSET_F22(\ctx) - - mfc1 $t0, $23 - sw $t0, OFFSET_F23(\ctx) - - mfc1 $t0, $24 - sw $t0, OFFSET_F24(\ctx) - - mfc1 $t0, $25 - sw $t0, OFFSET_F25(\ctx) - - mfc1 $t0, $26 - sw $t0, OFFSET_F26(\ctx) - - mfc1 $t0, $27 - sw $t0, OFFSET_F27(\ctx) - - mfc1 $t0, $28 - sw $t0, OFFSET_F28(\ctx) - - mfc1 $t0, $29 - sw $t0, OFFSET_F29(\ctx) - - mfc1 $t0, $30 - sw $t0, OFFSET_F30(\ctx) -#endif /* CONFIG_FPU */ -#endif /* KERNEL */ - - sw $ra, OFFSET_PC(\ctx) - sw $sp, OFFSET_SP(\ctx) -.endm - -/* ctx: address of the structure with saved context */ -.macro CONTEXT_RESTORE_ARCH_CORE ctx:req - lw $s0, OFFSET_S0(\ctx) - lw $s1, OFFSET_S1(\ctx) - lw $s2, OFFSET_S2(\ctx) - lw $s3, OFFSET_S3(\ctx) - lw $s4, OFFSET_S4(\ctx) - lw $s5, OFFSET_S5(\ctx) - lw $s6, OFFSET_S6(\ctx) - lw $s7, OFFSET_S7(\ctx) - lw $s8, OFFSET_S8(\ctx) - lw $gp, OFFSET_GP(\ctx) -#ifndef KERNEL - lw $k1, OFFSET_TLS(\ctx) - -#ifdef CONFIG_FPU - lw $t0, OFFSET_F20(\ctx) - mtc1 $t0, $20 - - lw $t0, OFFSET_F21(\ctx) - mtc1 $t0, $21 - - lw $t0, OFFSET_F22(\ctx) - mtc1 $t0, $22 - - lw $t0, OFFSET_F23(\ctx) - mtc1 $t0, $23 - - lw $t0, OFFSET_F24(\ctx) - mtc1 $t0, $24 - - lw $t0, OFFSET_F25(\ctx) - mtc1 $t0, $25 - - lw $t0, OFFSET_F26(\ctx) - mtc1 $t0, $26 - - lw $t0, OFFSET_F27(\ctx) - mtc1 $t0, $27 - - lw $t0, OFFSET_F28(\ctx) - mtc1 $t0, $28 - - lw $t0, OFFSET_F29(\ctx) - mtc1 $t0, $29 - - lw $t0, OFFSET_F30(\ctx) - mtc1 $t0, $30 -#endif /* CONFIG_FPU */ -#endif /* KERNEL */ - - lw $ra, OFFSET_PC(\ctx) - lw $sp, OFFSET_SP(\ctx) -.endm - -#endif /* __ASM__ */ - -#endif Index: kernel/arch/mips32/include/cp0.h =================================================================== --- kernel/arch/mips32/include/cp0.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,137 +1,0 @@ -/* - * Copyright (c) 2003-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips32 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips32_CP0_H_ -#define KERN_mips32_CP0_H_ - -#define cp0_status_ie_enabled_bit (1 << 0) -#define cp0_status_exl_exception_bit (1 << 1) -#define cp0_status_erl_error_bit (1 << 2) -#define cp0_status_um_bit (1 << 4) -#define cp0_status_bev_bootstrap_bit (1 << 22) -#define cp0_status_fpu_bit (1 << 29) - -#define cp0_status_im_shift 8 -#define cp0_status_im_mask 0xff00 - -#define cp0_cause_excno(cause) ((cause >> 2) & 0x1f) -#define cp0_cause_coperr(cause) ((cause >> 28) & 0x3) - -#define fpu_cop_id 1 - -/* - * Magic value for use in msim. - */ -#define cp0_compare_value 100000 - -#define cp0_mask_all_int() \ - cp0_status_write(cp0_status_read() & ~(cp0_status_im_mask)) - -#define cp0_unmask_all_int() \ - cp0_status_write(cp0_status_read() | cp0_status_im_mask) - -#define cp0_mask_int(it) \ - cp0_status_write(cp0_status_read() & ~(1 << (cp0_status_im_shift + (it)))) - -#define cp0_unmask_int(it) \ - cp0_status_write(cp0_status_read() | (1 << (cp0_status_im_shift + (it)))) - -#define GEN_READ_CP0(nm, reg) \ - static inline uint32_t cp0_ ##nm##_read(void) \ - { \ - uint32_t retval; \ - \ - asm volatile ( \ - "mfc0 %0, $" #reg \ - : "=r"(retval) \ - ); \ - \ - return retval; \ - } - -#define GEN_WRITE_CP0(nm, reg) \ - static inline void cp0_ ##nm##_write(uint32_t val) \ - { \ - asm volatile ( \ - "mtc0 %0, $" #reg \ - :: "r"(val) \ - ); \ - } - -GEN_READ_CP0(index, 0); -GEN_WRITE_CP0(index, 0); - -GEN_READ_CP0(random, 1); - -GEN_READ_CP0(entry_lo0, 2); -GEN_WRITE_CP0(entry_lo0, 2); - -GEN_READ_CP0(entry_lo1, 3); -GEN_WRITE_CP0(entry_lo1, 3); - -GEN_READ_CP0(context, 4); -GEN_WRITE_CP0(context, 4); - -GEN_READ_CP0(pagemask, 5); -GEN_WRITE_CP0(pagemask, 5); - -GEN_READ_CP0(wired, 6); -GEN_WRITE_CP0(wired, 6); - -GEN_READ_CP0(badvaddr, 8); - -GEN_READ_CP0(count, 9); -GEN_WRITE_CP0(count, 9); - -GEN_READ_CP0(entry_hi, 10); -GEN_WRITE_CP0(entry_hi, 10); - -GEN_READ_CP0(compare, 11); -GEN_WRITE_CP0(compare, 11); - -GEN_READ_CP0(status, 12); -GEN_WRITE_CP0(status, 12); - -GEN_READ_CP0(cause, 13); -GEN_WRITE_CP0(cause, 13); - -GEN_READ_CP0(epc, 14); -GEN_WRITE_CP0(epc, 14); - -GEN_READ_CP0(prid, 15); - -#endif - -/** @} - */ Index: kernel/arch/mips32/include/cpu.h =================================================================== --- kernel/arch/mips32/include/cpu.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,49 +1,0 @@ -/* - * Copyright (c) 2003-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips32 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips32_CPU_H_ -#define KERN_mips32_CPU_H_ - -#include -#include - -typedef struct { - uint32_t imp_num; - uint32_t rev_num; -} cpu_arch_t; - -#endif - -/** @} - */ Index: kernel/arch/mips32/include/cycle.h =================================================================== --- kernel/arch/mips32/include/cycle.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,50 +1,0 @@ -/* - * Copyright (c) 2006 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips32 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips32_CYCLE_H_ -#define KERN_mips32_CYCLE_H_ - -#include -#include -#include - -NO_TRACE static inline uint64_t get_cycle(void) -{ - return ((uint64_t) count_hi << 32) + ((uint64_t) cp0_count_read()); -} - -#endif - -/** @} - */ Index: kernel/arch/mips32/include/debug.h =================================================================== --- kernel/arch/mips32/include/debug.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,56 +1,0 @@ -/* - * Copyright (c) 2005 Ondrej Palkovsky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips32debug - * @{ - */ -/** @file - */ - -#ifndef KERN_mips32_DEBUG_H_ -#define KERN_mips32_DEBUG_H_ - -/** Enter the simulator trace mode */ -#define ___traceon() asm volatile ( "\t.word\t0x39\n"); - -/** Leave the simulator trace mode */ -#define ___traceoff() asm volatile ( "\t.word\t0x3d\n"); - -/** Ask the simulator to dump registers */ -#define ___regview() asm volatile ( "\t.word\t0x37\n"); - -/** Halt the simulator */ -#define ___halt() asm volatile ( "\t.word\t0x28\n"); - -/** Enter the simulator interactive mode */ -#define ___intmode() asm volatile ( "\t.word\t0x29\n"); - -#endif - -/** @} - */ Index: kernel/arch/mips32/include/debugger.h =================================================================== --- kernel/arch/mips32/include/debugger.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,78 +1,0 @@ -/* - * Copyright (c) 2005 Ondrej Palkovsky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips32debug - * @{ - */ -/** @file - */ - -#ifndef KERN_mips32_DEBUGGER_H_ -#define KERN_mips32_DEBUGGER_H_ - -#include -#include - -#define BKPOINTS_MAX 10 - -/** Breakpoint was shot */ -#define BKPOINT_INPROG (1 << 0) - -/** One-time breakpoint, mandatory for j/b instructions */ -#define BKPOINT_ONESHOT (1 << 1) - -/** - * Breakpoint is set on the next instruction, so that it - * could be reinstalled on the previous one - */ -#define BKPOINT_REINST (1 << 2) - -/** Call a predefined function */ -#define BKPOINT_FUNCCALL (1 << 3) - - -typedef struct { - uintptr_t address; /**< Breakpoint address */ - sysarg_t instruction; /**< Original instruction */ - sysarg_t nextinstruction; /**< Original instruction following break */ - unsigned int flags; /**< Flags regarding breakpoint */ - size_t counter; - void (*bkfunc)(void *, istate_t *); -} bpinfo_t; - -extern bpinfo_t breakpoints[BKPOINTS_MAX]; - -extern bool is_jump(sysarg_t); - -extern void debugger_init(void); -extern void debugger_bpoint(istate_t *); - -#endif - -/** @} - */ Index: kernel/arch/mips32/include/drivers/msim.h =================================================================== --- kernel/arch/mips32/include/drivers/msim.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,46 +1,0 @@ -/* - * Copyright (c) 2005 Ondrej Palkovsky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips32 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips32_MSIM_H_ -#define KERN_mips32_MSIM_H_ - -/** Address of devices. */ -#define MSIM_VIDEORAM 0x90000000 -#define MSIM_KBD_ADDRESS 0x90000000 -#define MSIM_KBD_IRQ 2 - -#endif - -/** @} - */ Index: kernel/arch/mips32/include/elf.h =================================================================== --- kernel/arch/mips32/include/elf.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,51 +1,0 @@ -/* - * Copyright (c) 2006 Sergey Bondari - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips32 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips32_ELF_H_ -#define KERN_mips32_ELF_H_ - -#define ELF_MACHINE EM_MIPS - -#ifdef __BE__ - #define ELF_DATA_ENCODING ELFDATA2MSB -#else - #define ELF_DATA_ENCODING ELFDATA2LSB -#endif - -#define ELF_CLASS ELFCLASS32 - -#endif - -/** @} - */ Index: kernel/arch/mips32/include/exception.h =================================================================== --- kernel/arch/mips32/include/exception.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,69 +1,0 @@ -/* - * Copyright (c) 2003-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips32 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips32_EXCEPTION_H_ -#define KERN_mips32_EXCEPTION_H_ - -#include -#include - -#define EXC_Int 0 -#define EXC_Mod 1 -#define EXC_TLBL 2 -#define EXC_TLBS 3 -#define EXC_AdEL 4 -#define EXC_AdES 5 -#define EXC_IBE 6 -#define EXC_DBE 7 -#define EXC_Sys 8 -#define EXC_Bp 9 -#define EXC_RI 10 -#define EXC_CpU 11 -#define EXC_Ov 12 -#define EXC_Tr 13 -#define EXC_VCEI 14 -#define EXC_FPE 15 -#define EXC_WATCH 23 -#define EXC_VCED 31 - -extern void exception(istate_t *istate); -extern void tlb_refill_entry(void); -extern void exception_entry(void); -extern void cache_error_entry(void); -extern void exception_init(void); - -#endif - -/** @} - */ Index: kernel/arch/mips32/include/faddr.h =================================================================== --- kernel/arch/mips32/include/faddr.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,45 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips32 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips32_FADDR_H_ -#define KERN_mips32_FADDR_H_ - -#include - -#define FADDR(fptr) ((uintptr_t) (fptr)) - -#endif - -/** @} - */ Index: kernel/arch/mips32/include/fpu_context.h =================================================================== --- kernel/arch/mips32/include/fpu_context.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,50 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Vana - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips32 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips32_FPU_CONTEXT_H_ -#define KERN_mips32_FPU_CONTEXT_H_ - -#include - -#define FPU_CONTEXT_ALIGN sizeof(sysarg_t) - -typedef struct { - sysarg_t dregs[32]; - sysarg_t cregs[32]; -} fpu_context_t; - -#endif - -/** @} - */ Index: kernel/arch/mips32/include/interrupt.h =================================================================== --- kernel/arch/mips32/include/interrupt.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,54 +1,0 @@ -/* - * Copyright (c) 2003-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips32interrupt - * @{ - */ -/** @file - */ - -#ifndef KERN_mips32_INTERRUPT_H_ -#define KERN_mips32_INTERRUPT_H_ - -#include -#include - -#define IVT_ITEMS 32 -#define IVT_FIRST 0 - -#define VECTOR_TLB_SHOOTDOWN_IPI EXC_Int - -extern function virtual_timer_fnc; -extern uint32_t count_hi; - -extern void interrupt_init(void); - -#endif - -/** @} - */ Index: kernel/arch/mips32/include/istate.h =================================================================== --- kernel/arch/mips32/include/istate.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,121 +1,0 @@ -/* - * Copyright (c) 2003-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips32interrupt - * @{ - */ -/** @file - */ - -#ifndef KERN_mips32_ISTATE_H_ -#define KERN_mips32_ISTATE_H_ - -#include - -#ifdef KERNEL - -#include - -#else /* KERNEL */ - -#include - -#endif /* KERNEL */ - -typedef struct istate { - /* - * The first seven registers are arranged so that the istate structure - * can be used both for exception handlers and for the syscall handler. - */ - uint32_t a0; /* arg1 */ - uint32_t a1; /* arg2 */ - uint32_t a2; /* arg3 */ - uint32_t a3; /* arg4 */ - uint32_t t0; /* arg5 */ - uint32_t t1; /* arg6 */ - uint32_t v0; /* arg7 */ - uint32_t v1; - uint32_t at; - uint32_t t2; - uint32_t t3; - uint32_t t4; - uint32_t t5; - uint32_t t6; - uint32_t t7; - uint32_t s0; - uint32_t s1; - uint32_t s2; - uint32_t s3; - uint32_t s4; - uint32_t s5; - uint32_t s6; - uint32_t s7; - uint32_t t8; - uint32_t t9; - uint32_t kt0; - uint32_t kt1; /* We use it as thread-local pointer */ - uint32_t gp; - uint32_t sp; - uint32_t s8; - uint32_t ra; - - uint32_t lo; - uint32_t hi; - - uint32_t status; /* cp0_status */ - uint32_t epc; /* cp0_epc */ - - uint32_t alignment; /* to make sizeof(istate_t) a multiple of 8 */ -} istate_t; - -NO_TRACE static inline void istate_set_retaddr(istate_t *istate, - uintptr_t retaddr) -{ - istate->epc = retaddr; -} - -/** Return true if exception happened while in userspace */ -NO_TRACE static inline int istate_from_uspace(istate_t *istate) -{ - return istate->status & cp0_status_um_bit; -} - -NO_TRACE static inline uintptr_t istate_get_pc(istate_t *istate) -{ - return istate->epc; -} - -NO_TRACE static inline uintptr_t istate_get_fp(istate_t *istate) -{ - return istate->sp; -} - -#endif - -/** @} - */ Index: kernel/arch/mips32/include/mm/as.h =================================================================== --- kernel/arch/mips32/include/mm/as.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,61 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips32mm - * @{ - */ -/** @file - */ - -#ifndef KERN_mips32_AS_H_ -#define KERN_mips32_AS_H_ - -#define KERNEL_ADDRESS_SPACE_SHADOWED_ARCH 0 - -#define KERNEL_ADDRESS_SPACE_START_ARCH UINT32_C(0x80000000) -#define KERNEL_ADDRESS_SPACE_END_ARCH UINT32_C(0xffffffff) -#define USER_ADDRESS_SPACE_START_ARCH UINT32_C(0x00000000) -#define USER_ADDRESS_SPACE_END_ARCH UINT32_C(0x7fffffff) - -typedef struct { -} as_arch_t; - -#include - -#define as_constructor_arch(as, flags) (as != as) -#define as_destructor_arch(as) (as != as) -#define as_create_arch(as, flags) (as != as) -#define as_deinstall_arch(as) -#define as_invalidate_translation_cache(as, page, cnt) - -extern void as_arch_init(void); - -#endif - -/** @} - */ Index: kernel/arch/mips32/include/mm/asid.h =================================================================== --- kernel/arch/mips32/include/mm/asid.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,47 +1,0 @@ -/* - * Copyright (c) 2005 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips32mm - * @{ - */ -/** @file - */ - -#ifndef KERN_mips32_ASID_H_ -#define KERN_mips32_ASID_H_ - -#include - -#define ASID_MAX_ARCH 255 /* 2^8 - 1 */ - -typedef uint8_t asid_t; - -#endif - -/** @} - */ Index: kernel/arch/mips32/include/mm/frame.h =================================================================== --- kernel/arch/mips32/include/mm/frame.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,52 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips32mm - * @{ - */ -/** @file - */ - -#ifndef KERN_mips32_FRAME_H_ -#define KERN_mips32_FRAME_H_ - -#define FRAME_WIDTH 14 /* 16K */ -#define FRAME_SIZE (1 << FRAME_WIDTH) - -#ifndef __ASM__ - -extern void frame_low_arch_init(void); -extern void frame_high_arch_init(void); -extern void physmem_print(void); - -#endif /* __ASM__ */ - -#endif - -/** @} - */ Index: kernel/arch/mips32/include/mm/km.h =================================================================== --- kernel/arch/mips32/include/mm/km.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,56 +1,0 @@ -/* - * Copyright (c) 2011 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips32mm - * @{ - */ -/** @file - */ - -#ifndef KERN_mips32_KM_H_ -#define KERN_mips32_KM_H_ - -#include - -#define KM_MIPS32_KSEG0_START UINT32_C(0x80000000) -#define KM_MIPS32_KSEG0_SIZE UINT32_C(0x20000000) - -#define KM_MIPS32_KSSEG_START UINT32_C(0xc0000000) -#define KM_MIPS32_KSSEG_SIZE UINT32_C(0x20000000) - -#define KM_MIPS32_KSEG3_START UINT32_C(0xe0000000) -#define KM_MIPS32_KSEG3_SIZE UINT32_C(0x20000000) - -extern void km_identity_arch_init(void); -extern void km_non_identity_arch_init(void); -extern bool km_is_non_identity_arch(uintptr_t); - -#endif - -/** @} - */ Index: kernel/arch/mips32/include/mm/page.h =================================================================== --- kernel/arch/mips32/include/mm/page.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,207 +1,0 @@ -/* - * Copyright (c) 2003-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips32mm - * @{ - */ -/** @file - */ - -#ifndef KERN_mips32_PAGE_H_ -#define KERN_mips32_PAGE_H_ - -#include -#include - -#define PAGE_WIDTH FRAME_WIDTH -#define PAGE_SIZE FRAME_SIZE - -#ifndef __ASM__ -# define KA2PA(x) (((uintptr_t) (x)) - 0x80000000) -# define PA2KA(x) (((uintptr_t) (x)) + 0x80000000) -#else -# define KA2PA(x) ((x) - 0x80000000) -# define PA2KA(x) ((x) + 0x80000000) -#endif - -/* - * Implementation of generic 4-level page table interface. - * - * Page table layout: - * - 32-bit virtual addresses - * - Offset is 14 bits => pages are 16K long - * - PTE's use similar format as CP0 EntryLo[01] registers => PTE is therefore - * 4 bytes long - * - PTE's replace EntryLo v (valid) bit with p (present) bit - * - PTE's use only one bit to distinguish between cacheable and uncacheable - * mappings - * - PTE's define soft_valid field to ensure there is at least one 1 bit even if - * the p bit is cleared - * - PTE's make use of CP0 EntryLo's two-bit reserved field for bit W (writable) - * and bit A (accessed) - * - PTL0 has 64 entries (6 bits) - * - PTL1 is not used - * - PTL2 is not used - * - PTL3 has 4096 entries (12 bits) - */ - -/* Macros describing number of entries in each level. */ -#define PTL0_ENTRIES_ARCH 64 -#define PTL1_ENTRIES_ARCH 0 -#define PTL2_ENTRIES_ARCH 0 -#define PTL3_ENTRIES_ARCH 4096 - -/* Macros describing size of page tables in each level. */ -#define PTL0_SIZE_ARCH ONE_FRAME -#define PTL1_SIZE_ARCH 0 -#define PTL2_SIZE_ARCH 0 -#define PTL3_SIZE_ARCH ONE_FRAME - -/* Macros calculating entry indices for each level. */ -#define PTL0_INDEX_ARCH(vaddr) ((vaddr) >> 26) -#define PTL1_INDEX_ARCH(vaddr) 0 -#define PTL2_INDEX_ARCH(vaddr) 0 -#define PTL3_INDEX_ARCH(vaddr) (((vaddr) >> 14) & 0xfff) - -/* Set accessor for PTL0 address. */ -#define SET_PTL0_ADDRESS_ARCH(ptl0) - -/* Get PTE address accessors for each level. */ -#define GET_PTL1_ADDRESS_ARCH(ptl0, i) \ - (((pte_t *) (ptl0))[(i)].pfn << 12) -#define GET_PTL2_ADDRESS_ARCH(ptl1, i) \ - (ptl1) -#define GET_PTL3_ADDRESS_ARCH(ptl2, i) \ - (ptl2) -#define GET_FRAME_ADDRESS_ARCH(ptl3, i) \ - (((pte_t *) (ptl3))[(i)].pfn << 12) - -/* Set PTE address accessors for each level. */ -#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) \ - (((pte_t *) (ptl0))[(i)].pfn = (a) >> 12) -#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a) -#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a) -#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) \ - (((pte_t *) (ptl3))[(i)].pfn = (a) >> 12) - -/* Get PTE flags accessors for each level. */ -#define GET_PTL1_FLAGS_ARCH(ptl0, i) \ - get_pt_flags((pte_t *) (ptl0), (size_t) (i)) -#define GET_PTL2_FLAGS_ARCH(ptl1, i) \ - PAGE_PRESENT -#define GET_PTL3_FLAGS_ARCH(ptl2, i) \ - PAGE_PRESENT -#define GET_FRAME_FLAGS_ARCH(ptl3, i) \ - get_pt_flags((pte_t *) (ptl3), (size_t) (i)) - -/* Set PTE flags accessors for each level. */ -#define SET_PTL1_FLAGS_ARCH(ptl0, i, x) \ - set_pt_flags((pte_t *) (ptl0), (size_t) (i), (x)) -#define SET_PTL2_FLAGS_ARCH(ptl1, i, x) -#define SET_PTL3_FLAGS_ARCH(ptl2, i, x) -#define SET_FRAME_FLAGS_ARCH(ptl3, i, x) \ - set_pt_flags((pte_t *) (ptl3), (size_t) (i), (x)) - -/* Set PTE present bit accessors for each level. */ -#define SET_PTL1_PRESENT_ARCH(ptl0, i) \ - set_pt_present((pte_t *) (ptl0), (size_t) (i)) -#define SET_PTL2_PRESENT_ARCH(ptl1, i) -#define SET_PTL3_PRESENT_ARCH(ptl2, i) -#define SET_FRAME_PRESENT_ARCH(ptl3, i) \ - set_pt_present((pte_t *) (ptl3), (size_t) (i)) - -/* Last-level info macros. */ -#define PTE_VALID_ARCH(pte) (*((uint32_t *) (pte)) != 0) -#define PTE_PRESENT_ARCH(pte) ((pte)->p != 0) -#define PTE_GET_FRAME_ARCH(pte) ((pte)->pfn << 12) -#define PTE_WRITABLE_ARCH(pte) ((pte)->w != 0) -#define PTE_EXECUTABLE_ARCH(pte) 1 - -#ifndef __ASM__ - -#include -#include - -/** Page Table Entry. */ -typedef struct { - unsigned g : 1; /**< Global bit. */ - unsigned p : 1; /**< Present bit. */ - unsigned d : 1; /**< Dirty bit. */ - unsigned cacheable : 1; /**< Cacheable bit. */ - unsigned : 1; /**< Unused. */ - unsigned soft_valid : 1; /**< Valid content even if not present. */ - unsigned pfn : 24; /**< Physical frame number. */ - unsigned w : 1; /**< Page writable bit. */ - unsigned a : 1; /**< Accessed bit. */ -} pte_t; - - -NO_TRACE static inline unsigned int get_pt_flags(pte_t *pt, size_t i) -{ - pte_t *p = &pt[i]; - - return ((p->cacheable << PAGE_CACHEABLE_SHIFT) | - ((!p->p) << PAGE_PRESENT_SHIFT) | - (1 << PAGE_USER_SHIFT) | - (1 << PAGE_READ_SHIFT) | - ((p->w) << PAGE_WRITE_SHIFT) | - (1 << PAGE_EXEC_SHIFT) | - (p->g << PAGE_GLOBAL_SHIFT)); -} - -NO_TRACE static inline void set_pt_flags(pte_t *pt, size_t i, int flags) -{ - pte_t *p = &pt[i]; - - p->cacheable = (flags & PAGE_CACHEABLE) != 0; - p->p = !(flags & PAGE_NOT_PRESENT); - p->g = (flags & PAGE_GLOBAL) != 0; - p->w = (flags & PAGE_WRITE) != 0; - - /* - * Ensure that valid entries have at least one bit set. - */ - p->soft_valid = 1; -} - -NO_TRACE static inline void set_pt_present(pte_t *pt, size_t i) -{ - pte_t *p = &pt[i]; - - p->p = 1; -} - - -extern void page_arch_init(void); - -#endif /* __ASM__ */ - -#endif - -/** @} - */ Index: kernel/arch/mips32/include/mm/tlb.h =================================================================== --- kernel/arch/mips32/include/mm/tlb.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,173 +1,0 @@ -/* - * Copyright (c) 2003-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips32mm - * @{ - */ -/** @file - */ - -#ifndef KERN_mips32_TLB_H_ -#define KERN_mips32_TLB_H_ - -#include -#include -#include -#include - -#define TLB_ENTRY_COUNT 48 - -#define TLB_WIRED 1 -#define TLB_KSTACK_WIRED_INDEX 0 - -#define TLB_PAGE_MASK_4K (0x000 << 13) -#define TLB_PAGE_MASK_16K (0x003 << 13) -#define TLB_PAGE_MASK_64K (0x00f << 13) -#define TLB_PAGE_MASK_256K (0x03f << 13) -#define TLB_PAGE_MASK_1M (0x0ff << 13) -#define TLB_PAGE_MASK_4M (0x3ff << 13) -#define TLB_PAGE_MASK_16M (0xfff << 13) - -#define PAGE_UNCACHED 2 -#define PAGE_CACHEABLE_EXC_WRITE 5 - -typedef union { - struct { -#ifdef __BE__ - unsigned : 2; /* zero */ - unsigned pfn : 24; /* frame number */ - unsigned c : 3; /* cache coherency attribute */ - unsigned d : 1; /* dirty/write-protect bit */ - unsigned v : 1; /* valid bit */ - unsigned g : 1; /* global bit */ -#else - unsigned g : 1; /* global bit */ - unsigned v : 1; /* valid bit */ - unsigned d : 1; /* dirty/write-protect bit */ - unsigned c : 3; /* cache coherency attribute */ - unsigned pfn : 24; /* frame number */ - unsigned : 2; /* zero */ -#endif - } __attribute__ ((packed)); - uint32_t value; -} entry_lo_t; - -typedef union { - struct { -#ifdef __BE__ - unsigned vpn2 : 19; - unsigned : 5; - unsigned asid : 8; -#else - unsigned asid : 8; - unsigned : 5; - unsigned vpn2 : 19; -#endif - } __attribute__ ((packed)); - uint32_t value; -} entry_hi_t; - -typedef union { - struct { -#ifdef __BE__ - unsigned : 7; - unsigned mask : 12; - unsigned : 13; -#else - unsigned : 13; - unsigned mask : 12; - unsigned : 7; -#endif - } __attribute__ ((packed)); - uint32_t value; -} page_mask_t; - -typedef union { - struct { -#ifdef __BE__ - unsigned p : 1; - unsigned : 25; - unsigned index : 6; -#else - unsigned index : 6; - unsigned : 25; - unsigned p : 1; -#endif - } __attribute__ ((packed)); - uint32_t value; -} tlb_index_t; - -/** Probe TLB for Matching Entry - * - * Probe TLB for Matching Entry. - */ -NO_TRACE static inline void tlbp(void) -{ - asm volatile ("tlbp\n\t"); -} - - -/** Read Indexed TLB Entry - * - * Read Indexed TLB Entry. - */ -NO_TRACE static inline void tlbr(void) -{ - asm volatile ("tlbr\n\t"); -} - -/** Write Indexed TLB Entry - * - * Write Indexed TLB Entry. - */ -NO_TRACE static inline void tlbwi(void) -{ - asm volatile ("tlbwi\n\t"); -} - -/** Write Random TLB Entry - * - * Write Random TLB Entry. - */ -NO_TRACE static inline void tlbwr(void) -{ - asm volatile ("tlbwr\n\t"); -} - -#define tlb_invalidate(asid) tlb_invalidate_asid(asid) - -extern void tlb_invalid(istate_t *istate); -extern void tlb_refill(istate_t *istate); -extern void tlb_modified(istate_t *istate); -extern void tlb_prepare_entry_lo(entry_lo_t *lo, bool g, bool v, bool d, bool cacheable, uintptr_t pfn); -extern void tlb_prepare_entry_hi(entry_hi_t *hi, asid_t asid, uintptr_t addr); - -#endif - -/** @} - */ Index: kernel/arch/mips32/include/proc/task.h =================================================================== --- kernel/arch/mips32/include/proc/task.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,47 +1,0 @@ -/* - * Copyright (c) 2006 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips32proc - * @{ - */ -/** @file - */ - -#ifndef KERN_mips32_TASK_H_ -#define KERN_mips32_TASK_H_ - -typedef struct { -} task_arch_t; - -#define task_create_arch(t) -#define task_destroy_arch(t) - -#endif - -/** @} - */ Index: kernel/arch/mips32/include/proc/thread.h =================================================================== --- kernel/arch/mips32/include/proc/thread.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,49 +1,0 @@ -/* - * Copyright (c) 2003-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips32proc - * @{ - */ -/** @file - */ - -#ifndef KERN_mips32_THREAD_H_ -#define KERN_mips32_THREAD_H_ - -typedef struct { -} thread_arch_t; - -#define thr_constructor_arch(t) -#define thr_destructor_arch(t) -#define thread_create_arch(t) - -#endif - -/** @} - */ - Index: kernel/arch/mips32/include/smp/dorder.h =================================================================== --- kernel/arch/mips32/include/smp/dorder.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,46 +1,0 @@ -/* - * Copyright (c) 2007 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips32 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips32_DORDER_H_ -#define KERN_mips32_DORDER_H_ - -#include - -extern uint32_t dorder_cpuid(void); -extern void dorder_ipi_ack(uint32_t); - -#endif - -/** @} - */ Index: kernel/arch/mips32/include/stack.h =================================================================== --- kernel/arch/mips32/include/stack.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,45 +1,0 @@ -/* - * Copyright (c) 2006 Josef Cejka - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips32 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips32_STACK_H_ -#define KERN_mips32_STACK_H_ - -#define STACK_ITEM_SIZE 4 -#define STACK_ALIGNMENT 8 -#define ABI_STACK_FRAME 32 - -#endif - -/** @} - */ Index: kernel/arch/mips32/include/types.h =================================================================== --- kernel/arch/mips32/include/types.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,64 +1,0 @@ -/* - * Copyright (c) 2003-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips32 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips32_TYPES_H_ -#define KERN_mips32_TYPES_H_ - -typedef uint32_t size_t; -typedef int32_t ssize_t; - -typedef uint32_t uintptr_t; -typedef uint32_t pfn_t; - -typedef uint32_t ipl_t; - -typedef uint32_t sysarg_t; -typedef int32_t native_t; -typedef uint32_t atomic_count_t; - -typedef struct { -} fncptr_t; - -#define INTN_C(c) INT32_C(c) -#define UINTN_C(c) UINT32_C(c) - -#define PRIdn PRId32 /**< Format for native_t. */ -#define PRIun PRIu32 /**< Format for sysarg_t. */ -#define PRIxn PRIx32 /**< Format for hexadecimal sysarg_t. */ -#define PRIua PRIu32 /**< Format for atomic_count_t. */ - -#endif - -/** @} - */ Index: kernel/arch/mips64/include/arch.h =================================================================== --- kernel/arch/mips64/include/arch.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,63 +1,0 @@ -/* - * Copyright (c) 2005 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips64 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips64_ARCH_H_ -#define KERN_mips64_ARCH_H_ - -#include - -#define TASKMAP_MAX_RECORDS 32 -#define CPUMAP_MAX_RECORDS 32 -#define BOOTINFO_TASK_NAME_BUFLEN 32 - -extern size_t cpu_count; - -typedef struct { - void *addr; - size_t size; - char name[BOOTINFO_TASK_NAME_BUFLEN]; -} utask_t; - -typedef struct { - uint32_t cpumap; - size_t cnt; - utask_t tasks[TASKMAP_MAX_RECORDS]; -} bootinfo_t; - -extern void arch_pre_main(void *entry, bootinfo_t *bootinfo); - -#endif - -/** @} - */ Index: kernel/arch/mips64/include/arch/arch.h =================================================================== --- kernel/arch/mips64/include/arch/arch.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/mips64/include/arch/arch.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,63 @@ +/* + * Copyright (c) 2005 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips64 + * @{ + */ +/** @file + */ + +#ifndef KERN_mips64_ARCH_H_ +#define KERN_mips64_ARCH_H_ + +#include + +#define TASKMAP_MAX_RECORDS 32 +#define CPUMAP_MAX_RECORDS 32 +#define BOOTINFO_TASK_NAME_BUFLEN 32 + +extern size_t cpu_count; + +typedef struct { + void *addr; + size_t size; + char name[BOOTINFO_TASK_NAME_BUFLEN]; +} utask_t; + +typedef struct { + uint32_t cpumap; + size_t cnt; + utask_t tasks[TASKMAP_MAX_RECORDS]; +} bootinfo_t; + +extern void arch_pre_main(void *entry, bootinfo_t *bootinfo); + +#endif + +/** @} + */ Index: kernel/arch/mips64/include/arch/asm.h =================================================================== --- kernel/arch/mips64/include/arch/asm.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/mips64/include/arch/asm.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,117 @@ +/* + * Copyright (c) 2003-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips64 + * @{ + */ +/** @file + */ + +#ifndef KERN_mips64_ASM_H_ +#define KERN_mips64_ASM_H_ + +#include +#include +#include + +NO_TRACE static inline void cpu_sleep(void) +{ + /* + * Unfortunatelly most of the simulators do not support + * + * asm volatile ( + * "wait" + * ); + * + */ +} + +/** Return base address of current stack + * + * Return the base address of the current stack. + * The stack is assumed to be STACK_SIZE bytes long. + * The stack must start on page boundary. + * + */ +NO_TRACE static inline uintptr_t get_stack_base(void) +{ + uintptr_t base; + + asm volatile ( + "and %[base], $29, %[mask]\n" + : [base] "=r" (base) + : [mask] "r" (~(STACK_SIZE - 1)) + ); + + return base; +} + +NO_TRACE static inline void pio_write_8(ioport8_t *port, uint8_t v) +{ + *port = v; +} + +NO_TRACE static inline void pio_write_16(ioport16_t *port, uint16_t v) +{ + *port = v; +} + +NO_TRACE static inline void pio_write_32(ioport32_t *port, uint32_t v) +{ + *port = v; +} + +NO_TRACE static inline uint8_t pio_read_8(ioport8_t *port) +{ + return *port; +} + +NO_TRACE static inline uint16_t pio_read_16(ioport16_t *port) +{ + return *port; +} + +NO_TRACE static inline uint32_t pio_read_32(ioport32_t *port) +{ + return *port; +} + +extern void cpu_halt(void) __attribute__((noreturn)); +extern void asm_delay_loop(uint32_t); +extern void userspace_asm(uintptr_t, uintptr_t, uintptr_t); + +extern ipl_t interrupts_disable(void); +extern ipl_t interrupts_enable(void); +extern void interrupts_restore(ipl_t); +extern ipl_t interrupts_read(void); +extern bool interrupts_disabled(void); + +#endif + +/** @} + */ Index: kernel/arch/mips64/include/arch/asm/boot.h =================================================================== --- kernel/arch/mips64/include/arch/asm/boot.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/mips64/include/arch/asm/boot.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,44 @@ +/* + * Copyright (c) 2005 Ondrej Palkovsky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips64 + * @{ + */ +/** @file + */ + +#ifndef KERN_mips64_BOOT_H_ +#define KERN_mips64_BOOT_H_ + +/* Temporary stack size for boot process */ +#define TEMP_STACK_SIZE 0x100 + +#endif + +/** @} + */ Index: kernel/arch/mips64/include/arch/asm/regname.h =================================================================== --- kernel/arch/mips64/include/arch/asm/regname.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/mips64/include/arch/asm/regname.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,97 @@ +/* + * Copyright (c) 2005 Ondrej Palkovsky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips64 + * @{ + */ +/** @file + */ + +#ifndef KERN_mips64_REGNAME_H_ +#define KERN_mips64_REGNAME_H_ + +#define zero 0 +#define at 1 +#define v0 2 +#define v1 3 +#define a0 4 +#define a1 5 +#define a2 6 +#define a3 7 +#define t0 8 +#define t1 9 +#define t2 10 +#define t3 11 +#define t4 12 +#define t5 13 +#define t6 14 +#define t7 15 +#define s0 16 +#define s1 17 +#define s2 18 +#define s3 19 +#define s4 20 +#define s5 21 +#define s6 22 +#define s7 23 +#define t8 24 +#define t9 25 +#define k0 26 +#define k1 27 +#define gp 28 +#define sp 29 +#define s8 30 +#define ra 31 + +#define rindex 0 +#define rrandom 1 +#define entrylo0 2 +#define entrylo1 3 +#define context 4 +#define pagemask 5 +#define wired 6 +#define badvaddr 8 +#define count 9 +#define entryhi 10 +#define compare 11 +#define status 12 +#define cause 13 +#define epc 14 +#define rconfig 16 +#define lladdr 17 +#define watchlo 18 +#define watchhi 19 +#define xcontext 20 +#define rdebug 23 +#define depc 24 +#define eepc 30 + +#endif + +/** @} + */ Index: kernel/arch/mips64/include/arch/atomic.h =================================================================== --- kernel/arch/mips64/include/arch/atomic.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/mips64/include/arch/atomic.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,114 @@ +/* + * Copyright (c) 2005 Ondrej Palkovsky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips64 + * @{ + */ +/** @file + */ + +#ifndef KERN_mips64_ATOMIC_H_ +#define KERN_mips64_ATOMIC_H_ + +#include + +#define atomic_inc(x) ((void) atomic_add(x, 1)) +#define atomic_dec(x) ((void) atomic_add(x, -1)) + +#define atomic_postinc(x) (atomic_add(x, 1) - 1) +#define atomic_postdec(x) (atomic_add(x, -1) + 1) + +#define atomic_preinc(x) atomic_add(x, 1) +#define atomic_predec(x) atomic_add(x, -1) + +/* Atomic addition of immediate value. + * + * @param val Memory location to which will be the immediate value added. + * @param i Signed immediate that will be added to *val. + * + * @return Value after addition. + * + */ +NO_TRACE static inline atomic_count_t atomic_add(atomic_t *val, + atomic_count_t i) +{ + atomic_count_t tmp; + atomic_count_t v; + + asm volatile ( + "1:\n" + " lld %0, %1\n" + " daddu %0, %0, %3\n" /* same as daddi, but never traps on overflow */ + " move %2, %0\n" + " scd %0, %1\n" + " beq %0, %4, 1b\n" /* if the atomic operation failed, try again */ + " nop\n" + : "=&r" (tmp), + "+m" (val->count), + "=&r" (v) + : "r" (i), + "i" (0) + ); + + return v; +} + +NO_TRACE static inline atomic_count_t test_and_set(atomic_t *val) +{ + atomic_count_t tmp; + atomic_count_t v; + + asm volatile ( + "1:\n" + " lld %2, %1\n" + " bnez %2, 2f\n" + " dli %0, %3\n" + " scd %0, %1\n" + " beqz %0, 1b\n" + " nop\n" + "2:\n" + : "=&r" (tmp), + "+m" (val->count), + "=&r" (v) + : "i" (1) + ); + + return v; +} + +NO_TRACE static inline void atomic_lock_arch(atomic_t *val) +{ + do { + while (val->count); + } while (test_and_set(val)); +} + +#endif + +/** @} + */ Index: kernel/arch/mips64/include/arch/barrier.h =================================================================== --- kernel/arch/mips64/include/arch/barrier.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/mips64/include/arch/barrier.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,54 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips64 + * @{ + */ +/** @file + */ + +#ifndef KERN_mips64_BARRIER_H_ +#define KERN_mips64_BARRIER_H_ + +/* + * TODO: implement true MIPS memory barriers for macros below. + */ +#define CS_ENTER_BARRIER() asm volatile ("" ::: "memory") +#define CS_LEAVE_BARRIER() asm volatile ("" ::: "memory") + +#define memory_barrier() asm volatile ("" ::: "memory") +#define read_barrier() asm volatile ("" ::: "memory") +#define write_barrier() asm volatile ("" ::: "memory") + +#define smc_coherence(a) +#define smc_coherence_block(a, l) + +#endif + +/** @} + */ Index: kernel/arch/mips64/include/arch/cache.h =================================================================== --- kernel/arch/mips64/include/arch/cache.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/mips64/include/arch/cache.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2003-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips64 + * @{ + */ +/** @file + */ + +#ifndef KERN_mips64_CACHE_H_ +#define KERN_mips64_CACHE_H_ + +#include + +extern void cache_error(istate_t *); + +#endif + +/** @} + */ Index: kernel/arch/mips64/include/arch/context.h =================================================================== --- kernel/arch/mips64/include/arch/context.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/mips64/include/arch/context.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,80 @@ +/* + * Copyright (c) 2003-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips64 + * @{ + */ +/** @file + */ + +#ifndef KERN_mips64_CONTEXT_H_ +#define KERN_mips64_CONTEXT_H_ + +#include +#include + +/* + * Put one item onto the stack to support get_stack_base() and align it up. + */ +#define SP_DELTA (ABI_STACK_FRAME + ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT)) + +#ifndef __ASM__ + +#include + +#define context_set(ctx, pc, stack, size) \ + context_set_generic(ctx, pc, stack, size) + +/* + * Only save registers that must be preserved across + * function calls. + */ +typedef struct { + uintptr_t sp; + uintptr_t pc; + + uint64_t s0; + uint64_t s1; + uint64_t s2; + uint64_t s3; + uint64_t s4; + uint64_t s5; + uint64_t s6; + uint64_t s7; + uint64_t s8; + uint64_t gp; + + ipl_t ipl; +} context_t; + +#endif /* __ASM__ */ + +#endif + +/** @} + */ Index: kernel/arch/mips64/include/arch/context_offset.h =================================================================== --- kernel/arch/mips64/include/arch/context_offset.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/mips64/include/arch/context_offset.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,189 @@ +/* + * Copyright (c) 2005 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef KERN_mips64_CONTEXT_OFFSET_H_ +#define KERN_mips64_CONTEXT_OFFSET_H_ + +#define OFFSET_SP 0x00 +#define OFFSET_PC 0x08 +#define OFFSET_S0 0x10 +#define OFFSET_S1 0x18 +#define OFFSET_S2 0x20 +#define OFFSET_S3 0x28 +#define OFFSET_S4 0x30 +#define OFFSET_S5 0x38 +#define OFFSET_S6 0x40 +#define OFFSET_S7 0x48 +#define OFFSET_S8 0x50 +#define OFFSET_GP 0x58 + +#ifdef KERNEL + #define OFFSET_IPL 0x60 +#else + #define OFFSET_TLS 0x60 + + #define OFFSET_F20 0x68 + #define OFFSET_F21 0x70 + #define OFFSET_F22 0x78 + #define OFFSET_F23 0x80 + #define OFFSET_F24 0x88 + #define OFFSET_F25 0x90 + #define OFFSET_F26 0x98 + #define OFFSET_F27 0xa0 + #define OFFSET_F28 0xa8 + #define OFFSET_F29 0xb0 + #define OFFSET_F30 0xb8 +#endif /* KERNEL */ + +#ifdef __ASM__ + +#ifdef KERNEL + +#include + +#else /* KERNEL */ + +#include + +#endif /* KERNEL */ + +/* ctx: address of the structure with saved context */ +.macro CONTEXT_SAVE_ARCH_CORE ctx:req + sd $s0, OFFSET_S0(\ctx) + sd $s1, OFFSET_S1(\ctx) + sd $s2, OFFSET_S2(\ctx) + sd $s3, OFFSET_S3(\ctx) + sd $s4, OFFSET_S4(\ctx) + sd $s5, OFFSET_S5(\ctx) + sd $s6, OFFSET_S6(\ctx) + sd $s7, OFFSET_S7(\ctx) + sd $s8, OFFSET_S8(\ctx) + sd $gp, OFFSET_GP(\ctx) + +#ifndef KERNEL + sd $k1, OFFSET_TLS(\ctx) + +#ifdef CONFIG_FPU + dmfc1 $t0, $20 + sd $t0, OFFSET_F20(\ctx) + + dmfc1 $t0,$21 + sd $t0, OFFSET_F21(\ctx) + + dmfc1 $t0,$22 + sd $t0, OFFSET_F22(\ctx) + + dmfc1 $t0,$23 + sd $t0, OFFSET_F23(\ctx) + + dmfc1 $t0,$24 + sd $t0, OFFSET_F24(\ctx) + + dmfc1 $t0,$25 + sd $t0, OFFSET_F25(\ctx) + + dmfc1 $t0,$26 + sd $t0, OFFSET_F26(\ctx) + + dmfc1 $t0,$27 + sd $t0, OFFSET_F27(\ctx) + + dmfc1 $t0,$28 + sd $t0, OFFSET_F28(\ctx) + + dmfc1 $t0,$29 + sd $t0, OFFSET_F29(\ctx) + + dmfc1 $t0,$30 + sd $t0, OFFSET_F30(\ctx) +#endif /* CONFIG_FPU */ +#endif /* KERNEL */ + + sd $ra, OFFSET_PC(\ctx) + sd $sp, OFFSET_SP(\ctx) +.endm + +/* ctx: address of the structure with saved context */ +.macro CONTEXT_RESTORE_ARCH_CORE ctx:req + ld $s0, OFFSET_S0(\ctx) + ld $s1, OFFSET_S1(\ctx) + ld $s2, OFFSET_S2(\ctx) + ld $s3, OFFSET_S3(\ctx) + ld $s4, OFFSET_S4(\ctx) + ld $s5, OFFSET_S5(\ctx) + ld $s6, OFFSET_S6(\ctx) + ld $s7, OFFSET_S7(\ctx) + ld $s8, OFFSET_S8(\ctx) + ld $gp, OFFSET_GP(\ctx) + +#ifndef KERNEL + ld $k1, OFFSET_TLS(\ctx) + +#ifdef CONFIG_FPU + ld $t0, OFFSET_F20(\ctx) + dmtc1 $t0,$20 + + ld $t0, OFFSET_F21(\ctx) + dmtc1 $t0,$21 + + ld $t0, OFFSET_F22(\ctx) + dmtc1 $t0,$22 + + ld $t0, OFFSET_F23(\ctx) + dmtc1 $t0,$23 + + ld $t0, OFFSET_F24(\ctx) + dmtc1 $t0,$24 + + ld $t0, OFFSET_F25(\ctx) + dmtc1 $t0,$25 + + ld $t0, OFFSET_F26(\ctx) + dmtc1 $t0,$26 + + ld $t0, OFFSET_F27(\ctx) + dmtc1 $t0,$27 + + ld $t0, OFFSET_F28(\ctx) + dmtc1 $t0,$28 + + ld $t0, OFFSET_F29(\ctx) + dmtc1 $t0,$29 + + ld $t0, OFFSET_F30(\ctx) + dmtc1 $t0,$30 +#endif /* CONFIG_FPU */ +#endif /* KERNEL */ + + ld $ra, OFFSET_PC(\ctx) + ld $sp, OFFSET_SP(\ctx) +.endm + +#endif /* __ASM__ */ + +#endif Index: kernel/arch/mips64/include/arch/cp0.h =================================================================== --- kernel/arch/mips64/include/arch/cp0.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/mips64/include/arch/cp0.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,133 @@ +/* + * Copyright (c) 2003-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips64 + * @{ + */ +/** @file + */ + +#ifndef KERN_mips64_CP0_H_ +#define KERN_mips64_CP0_H_ + +#define cp0_status_ie_enabled_bit (1 << 0) +#define cp0_status_exl_exception_bit (1 << 1) +#define cp0_status_erl_error_bit (1 << 2) +#define cp0_status_um_bit (1 << 4) +#define cp0_status_bev_bootstrap_bit (1 << 22) +#define cp0_status_fpu_bit (1 << 29) + +#define cp0_status_im_shift 8 +#define cp0_status_im_mask 0xff00 + +#define cp0_cause_excno(cause) ((cause >> 2) & 0x1f) +#define cp0_cause_coperr(cause) ((cause >> 28) & 0x3) + +#define fpu_cop_id 1 + +/* + * Magic value for use in msim. + */ +#define cp0_compare_value 100000 + +#define cp0_mask_all_int() \ + cp0_status_write(cp0_status_read() & ~(cp0_status_im_mask)) + +#define cp0_unmask_all_int() \ + cp0_status_write(cp0_status_read() | cp0_status_im_mask) + +#define cp0_mask_int(it) \ + cp0_status_write(cp0_status_read() & ~(1 << (cp0_status_im_shift + (it)))) + +#define cp0_unmask_int(it) \ + cp0_status_write(cp0_status_read() | (1 << (cp0_status_im_shift + (it)))) + +#define GEN_READ_CP0(nm,reg) static inline uint64_t cp0_ ##nm##_read(void) \ + { \ + uint64_t retval; \ + asm volatile ( \ + "dmfc0 %0, $" #reg \ + : "=r" (retval) \ + ); \ + return retval; \ + } + +#define GEN_WRITE_CP0(nm,reg) static inline void cp0_ ##nm##_write(uint32_t val) \ + { \ + asm volatile ( \ + "dmtc0 %0, $" #reg \ + :: "r" (val) \ + ); \ + } + +GEN_READ_CP0(index, 0); +GEN_WRITE_CP0(index, 0); + +GEN_READ_CP0(random, 1); + +GEN_READ_CP0(entry_lo0, 2); +GEN_WRITE_CP0(entry_lo0, 2); + +GEN_READ_CP0(entry_lo1, 3); +GEN_WRITE_CP0(entry_lo1, 3); + +GEN_READ_CP0(context, 4); +GEN_WRITE_CP0(context, 4); + +GEN_READ_CP0(pagemask, 5); +GEN_WRITE_CP0(pagemask, 5); + +GEN_READ_CP0(wired, 6); +GEN_WRITE_CP0(wired, 6); + +GEN_READ_CP0(badvaddr, 8); + +GEN_READ_CP0(count, 9); +GEN_WRITE_CP0(count, 9); + +GEN_READ_CP0(entry_hi, 10); +GEN_WRITE_CP0(entry_hi, 10); + +GEN_READ_CP0(compare, 11); +GEN_WRITE_CP0(compare, 11); + +GEN_READ_CP0(status, 12); +GEN_WRITE_CP0(status, 12); + +GEN_READ_CP0(cause, 13); +GEN_WRITE_CP0(cause, 13); + +GEN_READ_CP0(epc, 14); +GEN_WRITE_CP0(epc, 14); + +GEN_READ_CP0(prid, 15); + +#endif + +/** @} + */ Index: kernel/arch/mips64/include/arch/cpu.h =================================================================== --- kernel/arch/mips64/include/arch/cpu.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/mips64/include/arch/cpu.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,49 @@ +/* + * Copyright (c) 2003-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips64 + * @{ + */ +/** @file + */ + +#ifndef KERN_mips64_CPU_H_ +#define KERN_mips64_CPU_H_ + +#include +#include + +typedef struct { + uint32_t imp_num; + uint32_t rev_num; +} cpu_arch_t; + +#endif + +/** @} + */ Index: kernel/arch/mips64/include/arch/cycle.h =================================================================== --- kernel/arch/mips64/include/arch/cycle.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/mips64/include/arch/cycle.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,50 @@ +/* + * Copyright (c) 2006 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips64 + * @{ + */ +/** @file + */ + +#ifndef KERN_mips64_CYCLE_H_ +#define KERN_mips64_CYCLE_H_ + +#include +#include +#include + +NO_TRACE static inline uint64_t get_cycle(void) +{ + return ((uint64_t) count_hi << 32) + ((uint64_t) cp0_count_read()); +} + +#endif + +/** @} + */ Index: kernel/arch/mips64/include/arch/debug.h =================================================================== --- kernel/arch/mips64/include/arch/debug.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/mips64/include/arch/debug.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,71 @@ +/* + * Copyright (c) 2005 Ondrej Palkovsky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips64 + * @{ + */ +/** @file + */ + +#ifndef KERN_mips64_DEBUG_H_ +#define KERN_mips64_DEBUG_H_ + +/** Enter the simulator trace mode */ +#define ___traceon() \ + asm volatile ( \ + "\t.word\t0x39\n" \ + ); + +/** Leave the simulator trace mode */ +#define ___traceoff() \ + asm volatile ( \ + "\t.word\t0x3d\n" \ + ); + +/** Ask the simulator to dump registers */ +#define ___regview() \ + asm volatile ( \ + "\t.word\t0x37\n" \ + ); + +/** Halt the simulator */ +#define ___halt() \ + asm volatile ( \ + "\t.word\t0x28\n" \ + ); + +/** Enter the simulator interactive mode */ +#define ___intmode() \ + asm volatile ( \ + "\t.word\t0x29\n" \ + ); + +#endif + +/** @} + */ Index: kernel/arch/mips64/include/arch/debugger.h =================================================================== --- kernel/arch/mips64/include/arch/debugger.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/mips64/include/arch/debugger.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,78 @@ +/* + * Copyright (c) 2005 Ondrej Palkovsky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips64 + * @{ + */ +/** @file + */ + +#ifndef KERN_mips64_DEBUGGER_H_ +#define KERN_mips64_DEBUGGER_H_ + +#include +#include + +#define BKPOINTS_MAX 10 + +/** Breakpoint was shot */ +#define BKPOINT_INPROG (1 << 0) + +/** One-time breakpoint, mandatory for j/b instructions */ +#define BKPOINT_ONESHOT (1 << 1) + +/** + * Breakpoint is set on the next instruction, so that it + * could be reinstalled on the previous one + */ +#define BKPOINT_REINST (1 << 2) + +/** Call a predefined function */ +#define BKPOINT_FUNCCALL (1 << 3) + + +typedef struct { + uintptr_t address; /**< Breakpoint address */ + sysarg_t instruction; /**< Original instruction */ + sysarg_t nextinstruction; /**< Original instruction following break */ + unsigned int flags; /**< Flags regarding breakpoint */ + size_t counter; + void (*bkfunc)(void *, istate_t *); +} bpinfo_t; + +extern bpinfo_t breakpoints[BKPOINTS_MAX]; + +extern bool is_jump(sysarg_t); + +extern void debugger_init(void); +extern void debugger_bpoint(istate_t *); + +#endif + +/** @} + */ Index: kernel/arch/mips64/include/arch/drivers/msim.h =================================================================== --- kernel/arch/mips64/include/arch/drivers/msim.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/mips64/include/arch/drivers/msim.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,46 @@ +/* + * Copyright (c) 2005 Ondrej Palkovsky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips64 + * @{ + */ +/** @file + */ + +#ifndef KERN_mips64_MSIM_H_ +#define KERN_mips64_MSIM_H_ + +/** Address of devices. */ +#define MSIM_VIDEORAM 0xffffffff90000000 +#define MSIM_KBD_ADDRESS 0xffffffff90000000 +#define MSIM_KBD_IRQ 2 + +#endif + +/** @} + */ Index: kernel/arch/mips64/include/arch/elf.h =================================================================== --- kernel/arch/mips64/include/arch/elf.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/mips64/include/arch/elf.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,51 @@ +/* + * Copyright (c) 2006 Sergey Bondari + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips64 + * @{ + */ +/** @file + */ + +#ifndef KERN_mips64_ELF_H_ +#define KERN_mips64_ELF_H_ + +#define ELF_MACHINE EM_MIPS + +#ifdef __BE__ + #define ELF_DATA_ENCODING ELFDATA2MSB +#else + #define ELF_DATA_ENCODING ELFDATA2LSB +#endif + +#define ELF_CLASS ELFCLASS64 + +#endif + +/** @} + */ Index: kernel/arch/mips64/include/arch/exception.h =================================================================== --- kernel/arch/mips64/include/arch/exception.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/mips64/include/arch/exception.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,69 @@ +/* + * Copyright (c) 2003-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips64 + * @{ + */ +/** @file + */ + +#ifndef KERN_mips64_EXCEPTION_H_ +#define KERN_mips64_EXCEPTION_H_ + +#include +#include + +#define EXC_Int 0 +#define EXC_Mod 1 +#define EXC_TLBL 2 +#define EXC_TLBS 3 +#define EXC_AdEL 4 +#define EXC_AdES 5 +#define EXC_IBE 6 +#define EXC_DBE 7 +#define EXC_Sys 8 +#define EXC_Bp 9 +#define EXC_RI 10 +#define EXC_CpU 11 +#define EXC_Ov 12 +#define EXC_Tr 13 +#define EXC_VCEI 14 +#define EXC_FPE 15 +#define EXC_WATCH 23 +#define EXC_VCED 31 + +extern void exception(istate_t *istate); +extern void tlb_refill_entry(void); +extern void exception_entry(void); +extern void cache_error_entry(void); +extern void exception_init(void); + +#endif + +/** @} + */ Index: kernel/arch/mips64/include/arch/faddr.h =================================================================== --- kernel/arch/mips64/include/arch/faddr.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/mips64/include/arch/faddr.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips64 + * @{ + */ +/** @file + */ + +#ifndef KERN_mips64_FADDR_H_ +#define KERN_mips64_FADDR_H_ + +#include + +#define FADDR(fptr) ((uintptr_t) (fptr)) + +#endif + +/** @} + */ Index: kernel/arch/mips64/include/arch/fpu_context.h =================================================================== --- kernel/arch/mips64/include/arch/fpu_context.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/mips64/include/arch/fpu_context.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,50 @@ +/* + * Copyright (c) 2005 Jakub Vana + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips64 + * @{ + */ +/** @file + */ + +#ifndef KERN_mips64_FPU_CONTEXT_H_ +#define KERN_mips64_FPU_CONTEXT_H_ + +#include + +#define FPU_CONTEXT_ALIGN sizeof(sysarg_t) + +typedef struct { + sysarg_t dregs[32]; + sysarg_t cregs[32]; +} fpu_context_t; + +#endif + +/** @} + */ Index: kernel/arch/mips64/include/arch/interrupt.h =================================================================== --- kernel/arch/mips64/include/arch/interrupt.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/mips64/include/arch/interrupt.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,54 @@ +/* + * Copyright (c) 2003-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips64 + * @{ + */ +/** @file + */ + +#ifndef KERN_mips64_INTERRUPT_H_ +#define KERN_mips64_INTERRUPT_H_ + +#include +#include + +#define IVT_ITEMS 32 +#define IVT_FIRST 0 + +#define VECTOR_TLB_SHOOTDOWN_IPI EXC_Int + +extern function virtual_timer_fnc; +extern uint32_t count_hi; + +extern void interrupt_init(void); + +#endif + +/** @} + */ Index: kernel/arch/mips64/include/arch/istate.h =================================================================== --- kernel/arch/mips64/include/arch/istate.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/mips64/include/arch/istate.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,119 @@ +/* + * Copyright (c) 2003-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips64 + * @{ + */ +/** @file + */ + +#ifndef KERN_mips64_ISTATE_H_ +#define KERN_mips64_ISTATE_H_ + +#include + +#ifdef KERNEL + +#include + +#else /* KERNEL */ + +#include + +#endif /* KERNEL */ + +typedef struct istate { + /* + * The first seven registers are arranged so that the istate structure + * can be used both for exception handlers and for the syscall handler. + */ + uint64_t a0; /* arg1 */ + uint64_t a1; /* arg2 */ + uint64_t a2; /* arg3 */ + uint64_t a3; /* arg4 */ + uint64_t t0; /* arg5 */ + uint64_t t1; /* arg6 */ + uint64_t v0; /* arg7 */ + uint64_t v1; + uint64_t at; + uint64_t t2; + uint64_t t3; + uint64_t t4; + uint64_t t5; + uint64_t t6; + uint64_t t7; + uint64_t s0; + uint64_t s1; + uint64_t s2; + uint64_t s3; + uint64_t s4; + uint64_t s5; + uint64_t s6; + uint64_t s7; + uint64_t t8; + uint64_t t9; + uint64_t kt0; + uint64_t kt1; /* We use it as thread-local pointer */ + uint64_t gp; + uint64_t sp; + uint64_t s8; + uint64_t ra; + + uint64_t lo; + uint64_t hi; + + uint64_t status; /* cp0_status */ + uint64_t epc; /* cp0_epc */ +} istate_t; + +NO_TRACE static inline void istate_set_retaddr(istate_t *istate, + uintptr_t retaddr) +{ + istate->epc = retaddr; +} + +/** Return true if exception happened while in userspace */ +NO_TRACE static inline int istate_from_uspace(istate_t *istate) +{ + return istate->status & cp0_status_um_bit; +} + +NO_TRACE static inline uintptr_t istate_get_pc(istate_t *istate) +{ + return istate->epc; +} + +NO_TRACE static inline uintptr_t istate_get_fp(istate_t *istate) +{ + return istate->sp; +} + +#endif + +/** @} + */ Index: kernel/arch/mips64/include/arch/mm/as.h =================================================================== --- kernel/arch/mips64/include/arch/mm/as.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/mips64/include/arch/mm/as.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,61 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips64mm + * @{ + */ +/** @file + */ + +#ifndef KERN_mips64_AS_H_ +#define KERN_mips64_AS_H_ + +#define KERNEL_ADDRESS_SPACE_SHADOWED_ARCH 0 + +#define KERNEL_ADDRESS_SPACE_START_ARCH UINT64_C(0xffffffff80000000) +#define KERNEL_ADDRESS_SPACE_END_ARCH UINT64_C(0xffffffff9fffffff) +#define USER_ADDRESS_SPACE_START_ARCH UINT64_C(0x0000000000000000) +#define USER_ADDRESS_SPACE_END_ARCH UINT32_C(0x000000ffffffffff) + +typedef struct { +} as_arch_t; + +#include + +#define as_constructor_arch(as, flags) (as != as) +#define as_destructor_arch(as) (as != as) +#define as_create_arch(as, flags) (as != as) +#define as_deinstall_arch(as) +#define as_invalidate_translation_cache(as, page, cnt) + +extern void as_arch_init(void); + +#endif + +/** @} + */ Index: kernel/arch/mips64/include/arch/mm/asid.h =================================================================== --- kernel/arch/mips64/include/arch/mm/asid.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/mips64/include/arch/mm/asid.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,47 @@ +/* + * Copyright (c) 2005 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips64mm + * @{ + */ +/** @file + */ + +#ifndef KERN_mips64_ASID_H_ +#define KERN_mips64_ASID_H_ + +#include + +#define ASID_MAX_ARCH 255 /* 2^8 - 1 */ + +typedef uint8_t asid_t; + +#endif + +/** @} + */ Index: kernel/arch/mips64/include/arch/mm/frame.h =================================================================== --- kernel/arch/mips64/include/arch/mm/frame.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/mips64/include/arch/mm/frame.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,52 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips64mm + * @{ + */ +/** @file + */ + +#ifndef KERN_mips64_FRAME_H_ +#define KERN_mips64_FRAME_H_ + +#define FRAME_WIDTH 14 /* 16K */ +#define FRAME_SIZE (1 << FRAME_WIDTH) + +#ifndef __ASM__ + +extern void frame_low_arch_init(void); +extern void frame_high_arch_init(void); +extern void physmem_print(void); + +#endif /* __ASM__ */ + +#endif + +/** @} + */ Index: kernel/arch/mips64/include/arch/mm/km.h =================================================================== --- kernel/arch/mips64/include/arch/mm/km.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/mips64/include/arch/mm/km.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,47 @@ +/* + * Copyright (c) 2011 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips64mm + * @{ + */ +/** @file + */ + +#ifndef KERN_mips64_KM_H_ +#define KERN_mips64_KM_H_ + +#include + +extern void km_identity_arch_init(void); +extern void km_non_identity_arch_init(void); +extern bool km_is_non_identity_arch(uintptr_t); + +#endif + +/** @} + */ Index: kernel/arch/mips64/include/arch/mm/page.h =================================================================== --- kernel/arch/mips64/include/arch/mm/page.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/mips64/include/arch/mm/page.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,61 @@ +/* + * Copyright (c) 2003-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips64mm + * @{ + */ +/** @file + */ + +#ifndef KERN_mips64_PAGE_H_ +#define KERN_mips64_PAGE_H_ + +#include +#include + +#define PAGE_WIDTH FRAME_WIDTH +#define PAGE_SIZE FRAME_SIZE + +#ifndef __ASM__ + #define KA2PA(addr) (((uintptr_t) (addr)) - 0xffffffff80000000) + #define PA2KA(addr) (((uintptr_t) (addr)) + 0xffffffff80000000) +#else + #define KA2PA(addr) ((addr) - 0xffffffff80000000) + #define PA2KA(addr) ((addr) + 0xffffffff80000000) +#endif + +#ifndef __ASM__ + +extern void page_arch_init(void); + +#endif /* __ASM__ */ + +#endif + +/** @} + */ Index: kernel/arch/mips64/include/arch/mm/tlb.h =================================================================== --- kernel/arch/mips64/include/arch/mm/tlb.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/mips64/include/arch/mm/tlb.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,181 @@ +/* + * Copyright (c) 2003-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips64mm + * @{ + */ +/** @file + */ + +#ifndef KERN_mips64_TLB_H_ +#define KERN_mips64_TLB_H_ + +#include +#include +#include +#include + +#define TLB_ENTRY_COUNT 48 + +#define TLB_WIRED 1 +#define TLB_KSTACK_WIRED_INDEX 0 + +#define TLB_PAGE_MASK_4K (0x000 << 13) +#define TLB_PAGE_MASK_16K (0x003 << 13) +#define TLB_PAGE_MASK_64K (0x00f << 13) +#define TLB_PAGE_MASK_256K (0x03f << 13) +#define TLB_PAGE_MASK_1M (0x0ff << 13) +#define TLB_PAGE_MASK_4M (0x3ff << 13) +#define TLB_PAGE_MASK_16M (0xfff << 13) + +#define PAGE_UNCACHED 2 +#define PAGE_CACHEABLE_EXC_WRITE 5 + +typedef union { + struct { +#ifdef __BE__ + unsigned int : 2; /* zero */ + unsigned int pfn : 24; /* frame number */ + unsigned int c : 3; /* cache coherency attribute */ + unsigned int d : 1; /* dirty/write-protect bit */ + unsigned int v : 1; /* valid bit */ + unsigned int g : 1; /* global bit */ +#else + unsigned int g : 1; /* global bit */ + unsigned int v : 1; /* valid bit */ + unsigned int d : 1; /* dirty/write-protect bit */ + unsigned int c : 3; /* cache coherency attribute */ + unsigned int pfn : 24; /* frame number */ + unsigned int : 2; /* zero */ +#endif + } __attribute__ ((packed)); + uint32_t value; +} entry_lo_t; + +typedef union { + struct { +#ifdef __BE__ + unsigned int vpn2 : 19; + unsigned int : 5; + unsigned int asid : 8; +#else + unsigned int asid : 8; + unsigned int : 5; + unsigned int vpn2 : 19; +#endif + } __attribute__ ((packed)); + uint32_t value; +} entry_hi_t; + +typedef union { + struct { +#ifdef __BE__ + unsigned int : 7; + unsigned int mask : 12; + unsigned int : 13; +#else + unsigned int : 13; + unsigned int mask : 12; + unsigned int : 7; +#endif + } __attribute__ ((packed)); + uint32_t value; +} page_mask_t; + +typedef union { + struct { +#ifdef __BE__ + unsigned int p : 1; + unsigned int : 27; + unsigned int index : 4; +#else + unsigned int index : 4; + unsigned int : 27; + unsigned int p : 1; +#endif + } __attribute__ ((packed)); + uint32_t value; +} tlb_index_t; + +/** Probe TLB for Matching Entry + * + * Probe TLB for Matching Entry. + */ +NO_TRACE static inline void tlbp(void) +{ + asm volatile ( + "tlbp\n\t" + ); +} + +/** Read Indexed TLB Entry + * + * Read Indexed TLB Entry. + */ +NO_TRACE static inline void tlbr(void) +{ + asm volatile ( + "tlbr\n\t" + ); +} + +/** Write Indexed TLB Entry + * + * Write Indexed TLB Entry. + */ +NO_TRACE static inline void tlbwi(void) +{ + asm volatile ( + "tlbwi\n\t" + ); +} + +/** Write Random TLB Entry + * + * Write Random TLB Entry. + */ +NO_TRACE static inline void tlbwr(void) +{ + asm volatile ( + "tlbwr\n\t" + ); +} + +#define tlb_invalidate(asid) tlb_invalidate_asid(asid) + +extern void tlb_invalid(istate_t *); +extern void tlb_refill(istate_t *); +extern void tlb_modified(istate_t *); +extern void tlb_prepare_entry_lo(entry_lo_t *, bool, bool, bool, bool, + uintptr_t); +extern void tlb_prepare_entry_hi(entry_hi_t *, asid_t, uintptr_t); + +#endif + +/** @} + */ Index: kernel/arch/mips64/include/arch/proc/task.h =================================================================== --- kernel/arch/mips64/include/arch/proc/task.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/mips64/include/arch/proc/task.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,47 @@ +/* + * Copyright (c) 2006 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips64proc + * @{ + */ +/** @file + */ + +#ifndef KERN_mips64_TASK_H_ +#define KERN_mips64_TASK_H_ + +typedef struct { +} task_arch_t; + +#define task_create_arch(task) +#define task_destroy_arch(task) + +#endif + +/** @} + */ Index: kernel/arch/mips64/include/arch/proc/thread.h =================================================================== --- kernel/arch/mips64/include/arch/proc/thread.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/mips64/include/arch/proc/thread.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,48 @@ +/* + * Copyright (c) 2003-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips64proc + * @{ + */ +/** @file + */ + +#ifndef KERN_mips64_THREAD_H_ +#define KERN_mips64_THREAD_H_ + +typedef struct { +} thread_arch_t; + +#define thr_constructor_arch(thread) +#define thr_destructor_arch(thread) +#define thread_create_arch(thread) + +#endif + +/** @} + */ Index: kernel/arch/mips64/include/arch/smp/dorder.h =================================================================== --- kernel/arch/mips64/include/arch/smp/dorder.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/mips64/include/arch/smp/dorder.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,46 @@ +/* + * Copyright (c) 2007 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips64 + * @{ + */ +/** @file + */ + +#ifndef KERN_mips64_DORDER_H_ +#define KERN_mips64_DORDER_H_ + +#include + +extern uint32_t dorder_cpuid(void); +extern void dorder_ipi_ack(uint32_t); + +#endif + +/** @} + */ Index: kernel/arch/mips64/include/arch/stack.h =================================================================== --- kernel/arch/mips64/include/arch/stack.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/mips64/include/arch/stack.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2006 Josef Cejka + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips64 + * @{ + */ +/** @file + */ + +#ifndef KERN_mips64_STACK_H_ +#define KERN_mips64_STACK_H_ + +#define STACK_ITEM_SIZE 8 +#define STACK_ALIGNMENT 8 +#define ABI_STACK_FRAME 64 + +#endif + +/** @} + */ Index: kernel/arch/mips64/include/arch/types.h =================================================================== --- kernel/arch/mips64/include/arch/types.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/mips64/include/arch/types.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,64 @@ +/* + * Copyright (c) 2003-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips64 + * @{ + */ +/** @file + */ + +#ifndef KERN_mips64_TYPES_H_ +#define KERN_mips64_TYPES_H_ + +typedef uint64_t size_t; +typedef int64_t ssize_t; + +typedef uint64_t uintptr_t; +typedef uint64_t pfn_t; + +typedef uint64_t ipl_t; + +typedef uint64_t sysarg_t; +typedef int64_t native_t; +typedef uint64_t atomic_count_t; + +typedef struct { +} fncptr_t; + +#define INTN_C(c) INT64_C(c) +#define UINTN_C(c) UINT64_C(c) + +#define PRIdn PRId64 /**< Format for native_t. */ +#define PRIun PRIu64 /**< Format for sysarg_t. */ +#define PRIxn PRIx64 /**< Format for hexadecimal sysarg_t. */ +#define PRIua PRIu64 /**< Format for atomic_count_t. */ + +#endif + +/** @} + */ Index: kernel/arch/mips64/include/asm.h =================================================================== --- kernel/arch/mips64/include/asm.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,117 +1,0 @@ -/* - * Copyright (c) 2003-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips64 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips64_ASM_H_ -#define KERN_mips64_ASM_H_ - -#include -#include -#include - -NO_TRACE static inline void cpu_sleep(void) -{ - /* - * Unfortunatelly most of the simulators do not support - * - * asm volatile ( - * "wait" - * ); - * - */ -} - -/** Return base address of current stack - * - * Return the base address of the current stack. - * The stack is assumed to be STACK_SIZE bytes long. - * The stack must start on page boundary. - * - */ -NO_TRACE static inline uintptr_t get_stack_base(void) -{ - uintptr_t base; - - asm volatile ( - "and %[base], $29, %[mask]\n" - : [base] "=r" (base) - : [mask] "r" (~(STACK_SIZE - 1)) - ); - - return base; -} - -NO_TRACE static inline void pio_write_8(ioport8_t *port, uint8_t v) -{ - *port = v; -} - -NO_TRACE static inline void pio_write_16(ioport16_t *port, uint16_t v) -{ - *port = v; -} - -NO_TRACE static inline void pio_write_32(ioport32_t *port, uint32_t v) -{ - *port = v; -} - -NO_TRACE static inline uint8_t pio_read_8(ioport8_t *port) -{ - return *port; -} - -NO_TRACE static inline uint16_t pio_read_16(ioport16_t *port) -{ - return *port; -} - -NO_TRACE static inline uint32_t pio_read_32(ioport32_t *port) -{ - return *port; -} - -extern void cpu_halt(void) __attribute__((noreturn)); -extern void asm_delay_loop(uint32_t); -extern void userspace_asm(uintptr_t, uintptr_t, uintptr_t); - -extern ipl_t interrupts_disable(void); -extern ipl_t interrupts_enable(void); -extern void interrupts_restore(ipl_t); -extern ipl_t interrupts_read(void); -extern bool interrupts_disabled(void); - -#endif - -/** @} - */ Index: kernel/arch/mips64/include/asm/boot.h =================================================================== --- kernel/arch/mips64/include/asm/boot.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,44 +1,0 @@ -/* - * Copyright (c) 2005 Ondrej Palkovsky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips64 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips64_BOOT_H_ -#define KERN_mips64_BOOT_H_ - -/* Temporary stack size for boot process */ -#define TEMP_STACK_SIZE 0x100 - -#endif - -/** @} - */ Index: kernel/arch/mips64/include/asm/regname.h =================================================================== --- kernel/arch/mips64/include/asm/regname.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,97 +1,0 @@ -/* - * Copyright (c) 2005 Ondrej Palkovsky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips64 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips64_REGNAME_H_ -#define KERN_mips64_REGNAME_H_ - -#define zero 0 -#define at 1 -#define v0 2 -#define v1 3 -#define a0 4 -#define a1 5 -#define a2 6 -#define a3 7 -#define t0 8 -#define t1 9 -#define t2 10 -#define t3 11 -#define t4 12 -#define t5 13 -#define t6 14 -#define t7 15 -#define s0 16 -#define s1 17 -#define s2 18 -#define s3 19 -#define s4 20 -#define s5 21 -#define s6 22 -#define s7 23 -#define t8 24 -#define t9 25 -#define k0 26 -#define k1 27 -#define gp 28 -#define sp 29 -#define s8 30 -#define ra 31 - -#define rindex 0 -#define rrandom 1 -#define entrylo0 2 -#define entrylo1 3 -#define context 4 -#define pagemask 5 -#define wired 6 -#define badvaddr 8 -#define count 9 -#define entryhi 10 -#define compare 11 -#define status 12 -#define cause 13 -#define epc 14 -#define rconfig 16 -#define lladdr 17 -#define watchlo 18 -#define watchhi 19 -#define xcontext 20 -#define rdebug 23 -#define depc 24 -#define eepc 30 - -#endif - -/** @} - */ Index: kernel/arch/mips64/include/atomic.h =================================================================== --- kernel/arch/mips64/include/atomic.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,114 +1,0 @@ -/* - * Copyright (c) 2005 Ondrej Palkovsky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips64 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips64_ATOMIC_H_ -#define KERN_mips64_ATOMIC_H_ - -#include - -#define atomic_inc(x) ((void) atomic_add(x, 1)) -#define atomic_dec(x) ((void) atomic_add(x, -1)) - -#define atomic_postinc(x) (atomic_add(x, 1) - 1) -#define atomic_postdec(x) (atomic_add(x, -1) + 1) - -#define atomic_preinc(x) atomic_add(x, 1) -#define atomic_predec(x) atomic_add(x, -1) - -/* Atomic addition of immediate value. - * - * @param val Memory location to which will be the immediate value added. - * @param i Signed immediate that will be added to *val. - * - * @return Value after addition. - * - */ -NO_TRACE static inline atomic_count_t atomic_add(atomic_t *val, - atomic_count_t i) -{ - atomic_count_t tmp; - atomic_count_t v; - - asm volatile ( - "1:\n" - " lld %0, %1\n" - " daddu %0, %0, %3\n" /* same as daddi, but never traps on overflow */ - " move %2, %0\n" - " scd %0, %1\n" - " beq %0, %4, 1b\n" /* if the atomic operation failed, try again */ - " nop\n" - : "=&r" (tmp), - "+m" (val->count), - "=&r" (v) - : "r" (i), - "i" (0) - ); - - return v; -} - -NO_TRACE static inline atomic_count_t test_and_set(atomic_t *val) -{ - atomic_count_t tmp; - atomic_count_t v; - - asm volatile ( - "1:\n" - " lld %2, %1\n" - " bnez %2, 2f\n" - " dli %0, %3\n" - " scd %0, %1\n" - " beqz %0, 1b\n" - " nop\n" - "2:\n" - : "=&r" (tmp), - "+m" (val->count), - "=&r" (v) - : "i" (1) - ); - - return v; -} - -NO_TRACE static inline void atomic_lock_arch(atomic_t *val) -{ - do { - while (val->count); - } while (test_and_set(val)); -} - -#endif - -/** @} - */ Index: kernel/arch/mips64/include/barrier.h =================================================================== --- kernel/arch/mips64/include/barrier.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,54 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips64 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips64_BARRIER_H_ -#define KERN_mips64_BARRIER_H_ - -/* - * TODO: implement true MIPS memory barriers for macros below. - */ -#define CS_ENTER_BARRIER() asm volatile ("" ::: "memory") -#define CS_LEAVE_BARRIER() asm volatile ("" ::: "memory") - -#define memory_barrier() asm volatile ("" ::: "memory") -#define read_barrier() asm volatile ("" ::: "memory") -#define write_barrier() asm volatile ("" ::: "memory") - -#define smc_coherence(a) -#define smc_coherence_block(a, l) - -#endif - -/** @} - */ Index: kernel/arch/mips64/include/cache.h =================================================================== --- kernel/arch/mips64/include/cache.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,45 +1,0 @@ -/* - * Copyright (c) 2003-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips64 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips64_CACHE_H_ -#define KERN_mips64_CACHE_H_ - -#include - -extern void cache_error(istate_t *); - -#endif - -/** @} - */ Index: kernel/arch/mips64/include/context.h =================================================================== --- kernel/arch/mips64/include/context.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,80 +1,0 @@ -/* - * Copyright (c) 2003-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips64 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips64_CONTEXT_H_ -#define KERN_mips64_CONTEXT_H_ - -#include -#include - -/* - * Put one item onto the stack to support get_stack_base() and align it up. - */ -#define SP_DELTA (ABI_STACK_FRAME + ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT)) - -#ifndef __ASM__ - -#include - -#define context_set(ctx, pc, stack, size) \ - context_set_generic(ctx, pc, stack, size) - -/* - * Only save registers that must be preserved across - * function calls. - */ -typedef struct { - uintptr_t sp; - uintptr_t pc; - - uint64_t s0; - uint64_t s1; - uint64_t s2; - uint64_t s3; - uint64_t s4; - uint64_t s5; - uint64_t s6; - uint64_t s7; - uint64_t s8; - uint64_t gp; - - ipl_t ipl; -} context_t; - -#endif /* __ASM__ */ - -#endif - -/** @} - */ Index: kernel/arch/mips64/include/context_offset.h =================================================================== --- kernel/arch/mips64/include/context_offset.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,189 +1,0 @@ -/* - * Copyright (c) 2005 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef KERN_mips64_CONTEXT_OFFSET_H_ -#define KERN_mips64_CONTEXT_OFFSET_H_ - -#define OFFSET_SP 0x00 -#define OFFSET_PC 0x08 -#define OFFSET_S0 0x10 -#define OFFSET_S1 0x18 -#define OFFSET_S2 0x20 -#define OFFSET_S3 0x28 -#define OFFSET_S4 0x30 -#define OFFSET_S5 0x38 -#define OFFSET_S6 0x40 -#define OFFSET_S7 0x48 -#define OFFSET_S8 0x50 -#define OFFSET_GP 0x58 - -#ifdef KERNEL - #define OFFSET_IPL 0x60 -#else - #define OFFSET_TLS 0x60 - - #define OFFSET_F20 0x68 - #define OFFSET_F21 0x70 - #define OFFSET_F22 0x78 - #define OFFSET_F23 0x80 - #define OFFSET_F24 0x88 - #define OFFSET_F25 0x90 - #define OFFSET_F26 0x98 - #define OFFSET_F27 0xa0 - #define OFFSET_F28 0xa8 - #define OFFSET_F29 0xb0 - #define OFFSET_F30 0xb8 -#endif /* KERNEL */ - -#ifdef __ASM__ - -#ifdef KERNEL - -#include - -#else /* KERNEL */ - -#include - -#endif /* KERNEL */ - -/* ctx: address of the structure with saved context */ -.macro CONTEXT_SAVE_ARCH_CORE ctx:req - sd $s0, OFFSET_S0(\ctx) - sd $s1, OFFSET_S1(\ctx) - sd $s2, OFFSET_S2(\ctx) - sd $s3, OFFSET_S3(\ctx) - sd $s4, OFFSET_S4(\ctx) - sd $s5, OFFSET_S5(\ctx) - sd $s6, OFFSET_S6(\ctx) - sd $s7, OFFSET_S7(\ctx) - sd $s8, OFFSET_S8(\ctx) - sd $gp, OFFSET_GP(\ctx) - -#ifndef KERNEL - sd $k1, OFFSET_TLS(\ctx) - -#ifdef CONFIG_FPU - dmfc1 $t0, $20 - sd $t0, OFFSET_F20(\ctx) - - dmfc1 $t0,$21 - sd $t0, OFFSET_F21(\ctx) - - dmfc1 $t0,$22 - sd $t0, OFFSET_F22(\ctx) - - dmfc1 $t0,$23 - sd $t0, OFFSET_F23(\ctx) - - dmfc1 $t0,$24 - sd $t0, OFFSET_F24(\ctx) - - dmfc1 $t0,$25 - sd $t0, OFFSET_F25(\ctx) - - dmfc1 $t0,$26 - sd $t0, OFFSET_F26(\ctx) - - dmfc1 $t0,$27 - sd $t0, OFFSET_F27(\ctx) - - dmfc1 $t0,$28 - sd $t0, OFFSET_F28(\ctx) - - dmfc1 $t0,$29 - sd $t0, OFFSET_F29(\ctx) - - dmfc1 $t0,$30 - sd $t0, OFFSET_F30(\ctx) -#endif /* CONFIG_FPU */ -#endif /* KERNEL */ - - sd $ra, OFFSET_PC(\ctx) - sd $sp, OFFSET_SP(\ctx) -.endm - -/* ctx: address of the structure with saved context */ -.macro CONTEXT_RESTORE_ARCH_CORE ctx:req - ld $s0, OFFSET_S0(\ctx) - ld $s1, OFFSET_S1(\ctx) - ld $s2, OFFSET_S2(\ctx) - ld $s3, OFFSET_S3(\ctx) - ld $s4, OFFSET_S4(\ctx) - ld $s5, OFFSET_S5(\ctx) - ld $s6, OFFSET_S6(\ctx) - ld $s7, OFFSET_S7(\ctx) - ld $s8, OFFSET_S8(\ctx) - ld $gp, OFFSET_GP(\ctx) - -#ifndef KERNEL - ld $k1, OFFSET_TLS(\ctx) - -#ifdef CONFIG_FPU - ld $t0, OFFSET_F20(\ctx) - dmtc1 $t0,$20 - - ld $t0, OFFSET_F21(\ctx) - dmtc1 $t0,$21 - - ld $t0, OFFSET_F22(\ctx) - dmtc1 $t0,$22 - - ld $t0, OFFSET_F23(\ctx) - dmtc1 $t0,$23 - - ld $t0, OFFSET_F24(\ctx) - dmtc1 $t0,$24 - - ld $t0, OFFSET_F25(\ctx) - dmtc1 $t0,$25 - - ld $t0, OFFSET_F26(\ctx) - dmtc1 $t0,$26 - - ld $t0, OFFSET_F27(\ctx) - dmtc1 $t0,$27 - - ld $t0, OFFSET_F28(\ctx) - dmtc1 $t0,$28 - - ld $t0, OFFSET_F29(\ctx) - dmtc1 $t0,$29 - - ld $t0, OFFSET_F30(\ctx) - dmtc1 $t0,$30 -#endif /* CONFIG_FPU */ -#endif /* KERNEL */ - - ld $ra, OFFSET_PC(\ctx) - ld $sp, OFFSET_SP(\ctx) -.endm - -#endif /* __ASM__ */ - -#endif Index: kernel/arch/mips64/include/cp0.h =================================================================== --- kernel/arch/mips64/include/cp0.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,133 +1,0 @@ -/* - * Copyright (c) 2003-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips64 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips64_CP0_H_ -#define KERN_mips64_CP0_H_ - -#define cp0_status_ie_enabled_bit (1 << 0) -#define cp0_status_exl_exception_bit (1 << 1) -#define cp0_status_erl_error_bit (1 << 2) -#define cp0_status_um_bit (1 << 4) -#define cp0_status_bev_bootstrap_bit (1 << 22) -#define cp0_status_fpu_bit (1 << 29) - -#define cp0_status_im_shift 8 -#define cp0_status_im_mask 0xff00 - -#define cp0_cause_excno(cause) ((cause >> 2) & 0x1f) -#define cp0_cause_coperr(cause) ((cause >> 28) & 0x3) - -#define fpu_cop_id 1 - -/* - * Magic value for use in msim. - */ -#define cp0_compare_value 100000 - -#define cp0_mask_all_int() \ - cp0_status_write(cp0_status_read() & ~(cp0_status_im_mask)) - -#define cp0_unmask_all_int() \ - cp0_status_write(cp0_status_read() | cp0_status_im_mask) - -#define cp0_mask_int(it) \ - cp0_status_write(cp0_status_read() & ~(1 << (cp0_status_im_shift + (it)))) - -#define cp0_unmask_int(it) \ - cp0_status_write(cp0_status_read() | (1 << (cp0_status_im_shift + (it)))) - -#define GEN_READ_CP0(nm,reg) static inline uint64_t cp0_ ##nm##_read(void) \ - { \ - uint64_t retval; \ - asm volatile ( \ - "dmfc0 %0, $" #reg \ - : "=r" (retval) \ - ); \ - return retval; \ - } - -#define GEN_WRITE_CP0(nm,reg) static inline void cp0_ ##nm##_write(uint32_t val) \ - { \ - asm volatile ( \ - "dmtc0 %0, $" #reg \ - :: "r" (val) \ - ); \ - } - -GEN_READ_CP0(index, 0); -GEN_WRITE_CP0(index, 0); - -GEN_READ_CP0(random, 1); - -GEN_READ_CP0(entry_lo0, 2); -GEN_WRITE_CP0(entry_lo0, 2); - -GEN_READ_CP0(entry_lo1, 3); -GEN_WRITE_CP0(entry_lo1, 3); - -GEN_READ_CP0(context, 4); -GEN_WRITE_CP0(context, 4); - -GEN_READ_CP0(pagemask, 5); -GEN_WRITE_CP0(pagemask, 5); - -GEN_READ_CP0(wired, 6); -GEN_WRITE_CP0(wired, 6); - -GEN_READ_CP0(badvaddr, 8); - -GEN_READ_CP0(count, 9); -GEN_WRITE_CP0(count, 9); - -GEN_READ_CP0(entry_hi, 10); -GEN_WRITE_CP0(entry_hi, 10); - -GEN_READ_CP0(compare, 11); -GEN_WRITE_CP0(compare, 11); - -GEN_READ_CP0(status, 12); -GEN_WRITE_CP0(status, 12); - -GEN_READ_CP0(cause, 13); -GEN_WRITE_CP0(cause, 13); - -GEN_READ_CP0(epc, 14); -GEN_WRITE_CP0(epc, 14); - -GEN_READ_CP0(prid, 15); - -#endif - -/** @} - */ Index: kernel/arch/mips64/include/cpu.h =================================================================== --- kernel/arch/mips64/include/cpu.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,49 +1,0 @@ -/* - * Copyright (c) 2003-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips64 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips64_CPU_H_ -#define KERN_mips64_CPU_H_ - -#include -#include - -typedef struct { - uint32_t imp_num; - uint32_t rev_num; -} cpu_arch_t; - -#endif - -/** @} - */ Index: kernel/arch/mips64/include/cycle.h =================================================================== --- kernel/arch/mips64/include/cycle.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,50 +1,0 @@ -/* - * Copyright (c) 2006 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips64 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips64_CYCLE_H_ -#define KERN_mips64_CYCLE_H_ - -#include -#include -#include - -NO_TRACE static inline uint64_t get_cycle(void) -{ - return ((uint64_t) count_hi << 32) + ((uint64_t) cp0_count_read()); -} - -#endif - -/** @} - */ Index: kernel/arch/mips64/include/debug.h =================================================================== --- kernel/arch/mips64/include/debug.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,71 +1,0 @@ -/* - * Copyright (c) 2005 Ondrej Palkovsky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips64 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips64_DEBUG_H_ -#define KERN_mips64_DEBUG_H_ - -/** Enter the simulator trace mode */ -#define ___traceon() \ - asm volatile ( \ - "\t.word\t0x39\n" \ - ); - -/** Leave the simulator trace mode */ -#define ___traceoff() \ - asm volatile ( \ - "\t.word\t0x3d\n" \ - ); - -/** Ask the simulator to dump registers */ -#define ___regview() \ - asm volatile ( \ - "\t.word\t0x37\n" \ - ); - -/** Halt the simulator */ -#define ___halt() \ - asm volatile ( \ - "\t.word\t0x28\n" \ - ); - -/** Enter the simulator interactive mode */ -#define ___intmode() \ - asm volatile ( \ - "\t.word\t0x29\n" \ - ); - -#endif - -/** @} - */ Index: kernel/arch/mips64/include/debugger.h =================================================================== --- kernel/arch/mips64/include/debugger.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,78 +1,0 @@ -/* - * Copyright (c) 2005 Ondrej Palkovsky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips64 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips64_DEBUGGER_H_ -#define KERN_mips64_DEBUGGER_H_ - -#include -#include - -#define BKPOINTS_MAX 10 - -/** Breakpoint was shot */ -#define BKPOINT_INPROG (1 << 0) - -/** One-time breakpoint, mandatory for j/b instructions */ -#define BKPOINT_ONESHOT (1 << 1) - -/** - * Breakpoint is set on the next instruction, so that it - * could be reinstalled on the previous one - */ -#define BKPOINT_REINST (1 << 2) - -/** Call a predefined function */ -#define BKPOINT_FUNCCALL (1 << 3) - - -typedef struct { - uintptr_t address; /**< Breakpoint address */ - sysarg_t instruction; /**< Original instruction */ - sysarg_t nextinstruction; /**< Original instruction following break */ - unsigned int flags; /**< Flags regarding breakpoint */ - size_t counter; - void (*bkfunc)(void *, istate_t *); -} bpinfo_t; - -extern bpinfo_t breakpoints[BKPOINTS_MAX]; - -extern bool is_jump(sysarg_t); - -extern void debugger_init(void); -extern void debugger_bpoint(istate_t *); - -#endif - -/** @} - */ Index: kernel/arch/mips64/include/drivers/msim.h =================================================================== --- kernel/arch/mips64/include/drivers/msim.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,46 +1,0 @@ -/* - * Copyright (c) 2005 Ondrej Palkovsky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips64 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips64_MSIM_H_ -#define KERN_mips64_MSIM_H_ - -/** Address of devices. */ -#define MSIM_VIDEORAM 0xffffffff90000000 -#define MSIM_KBD_ADDRESS 0xffffffff90000000 -#define MSIM_KBD_IRQ 2 - -#endif - -/** @} - */ Index: kernel/arch/mips64/include/elf.h =================================================================== --- kernel/arch/mips64/include/elf.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,51 +1,0 @@ -/* - * Copyright (c) 2006 Sergey Bondari - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips64 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips64_ELF_H_ -#define KERN_mips64_ELF_H_ - -#define ELF_MACHINE EM_MIPS - -#ifdef __BE__ - #define ELF_DATA_ENCODING ELFDATA2MSB -#else - #define ELF_DATA_ENCODING ELFDATA2LSB -#endif - -#define ELF_CLASS ELFCLASS64 - -#endif - -/** @} - */ Index: kernel/arch/mips64/include/exception.h =================================================================== --- kernel/arch/mips64/include/exception.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,69 +1,0 @@ -/* - * Copyright (c) 2003-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips64 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips64_EXCEPTION_H_ -#define KERN_mips64_EXCEPTION_H_ - -#include -#include - -#define EXC_Int 0 -#define EXC_Mod 1 -#define EXC_TLBL 2 -#define EXC_TLBS 3 -#define EXC_AdEL 4 -#define EXC_AdES 5 -#define EXC_IBE 6 -#define EXC_DBE 7 -#define EXC_Sys 8 -#define EXC_Bp 9 -#define EXC_RI 10 -#define EXC_CpU 11 -#define EXC_Ov 12 -#define EXC_Tr 13 -#define EXC_VCEI 14 -#define EXC_FPE 15 -#define EXC_WATCH 23 -#define EXC_VCED 31 - -extern void exception(istate_t *istate); -extern void tlb_refill_entry(void); -extern void exception_entry(void); -extern void cache_error_entry(void); -extern void exception_init(void); - -#endif - -/** @} - */ Index: kernel/arch/mips64/include/faddr.h =================================================================== --- kernel/arch/mips64/include/faddr.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,45 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips64 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips64_FADDR_H_ -#define KERN_mips64_FADDR_H_ - -#include - -#define FADDR(fptr) ((uintptr_t) (fptr)) - -#endif - -/** @} - */ Index: kernel/arch/mips64/include/fpu_context.h =================================================================== --- kernel/arch/mips64/include/fpu_context.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,50 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Vana - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips64 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips64_FPU_CONTEXT_H_ -#define KERN_mips64_FPU_CONTEXT_H_ - -#include - -#define FPU_CONTEXT_ALIGN sizeof(sysarg_t) - -typedef struct { - sysarg_t dregs[32]; - sysarg_t cregs[32]; -} fpu_context_t; - -#endif - -/** @} - */ Index: kernel/arch/mips64/include/interrupt.h =================================================================== --- kernel/arch/mips64/include/interrupt.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,54 +1,0 @@ -/* - * Copyright (c) 2003-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips64 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips64_INTERRUPT_H_ -#define KERN_mips64_INTERRUPT_H_ - -#include -#include - -#define IVT_ITEMS 32 -#define IVT_FIRST 0 - -#define VECTOR_TLB_SHOOTDOWN_IPI EXC_Int - -extern function virtual_timer_fnc; -extern uint32_t count_hi; - -extern void interrupt_init(void); - -#endif - -/** @} - */ Index: kernel/arch/mips64/include/istate.h =================================================================== --- kernel/arch/mips64/include/istate.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,119 +1,0 @@ -/* - * Copyright (c) 2003-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips64 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips64_ISTATE_H_ -#define KERN_mips64_ISTATE_H_ - -#include - -#ifdef KERNEL - -#include - -#else /* KERNEL */ - -#include - -#endif /* KERNEL */ - -typedef struct istate { - /* - * The first seven registers are arranged so that the istate structure - * can be used both for exception handlers and for the syscall handler. - */ - uint64_t a0; /* arg1 */ - uint64_t a1; /* arg2 */ - uint64_t a2; /* arg3 */ - uint64_t a3; /* arg4 */ - uint64_t t0; /* arg5 */ - uint64_t t1; /* arg6 */ - uint64_t v0; /* arg7 */ - uint64_t v1; - uint64_t at; - uint64_t t2; - uint64_t t3; - uint64_t t4; - uint64_t t5; - uint64_t t6; - uint64_t t7; - uint64_t s0; - uint64_t s1; - uint64_t s2; - uint64_t s3; - uint64_t s4; - uint64_t s5; - uint64_t s6; - uint64_t s7; - uint64_t t8; - uint64_t t9; - uint64_t kt0; - uint64_t kt1; /* We use it as thread-local pointer */ - uint64_t gp; - uint64_t sp; - uint64_t s8; - uint64_t ra; - - uint64_t lo; - uint64_t hi; - - uint64_t status; /* cp0_status */ - uint64_t epc; /* cp0_epc */ -} istate_t; - -NO_TRACE static inline void istate_set_retaddr(istate_t *istate, - uintptr_t retaddr) -{ - istate->epc = retaddr; -} - -/** Return true if exception happened while in userspace */ -NO_TRACE static inline int istate_from_uspace(istate_t *istate) -{ - return istate->status & cp0_status_um_bit; -} - -NO_TRACE static inline uintptr_t istate_get_pc(istate_t *istate) -{ - return istate->epc; -} - -NO_TRACE static inline uintptr_t istate_get_fp(istate_t *istate) -{ - return istate->sp; -} - -#endif - -/** @} - */ Index: kernel/arch/mips64/include/mm/as.h =================================================================== --- kernel/arch/mips64/include/mm/as.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,61 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips64mm - * @{ - */ -/** @file - */ - -#ifndef KERN_mips64_AS_H_ -#define KERN_mips64_AS_H_ - -#define KERNEL_ADDRESS_SPACE_SHADOWED_ARCH 0 - -#define KERNEL_ADDRESS_SPACE_START_ARCH UINT64_C(0xffffffff80000000) -#define KERNEL_ADDRESS_SPACE_END_ARCH UINT64_C(0xffffffff9fffffff) -#define USER_ADDRESS_SPACE_START_ARCH UINT64_C(0x0000000000000000) -#define USER_ADDRESS_SPACE_END_ARCH UINT32_C(0x000000ffffffffff) - -typedef struct { -} as_arch_t; - -#include - -#define as_constructor_arch(as, flags) (as != as) -#define as_destructor_arch(as) (as != as) -#define as_create_arch(as, flags) (as != as) -#define as_deinstall_arch(as) -#define as_invalidate_translation_cache(as, page, cnt) - -extern void as_arch_init(void); - -#endif - -/** @} - */ Index: kernel/arch/mips64/include/mm/asid.h =================================================================== --- kernel/arch/mips64/include/mm/asid.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,47 +1,0 @@ -/* - * Copyright (c) 2005 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips64mm - * @{ - */ -/** @file - */ - -#ifndef KERN_mips64_ASID_H_ -#define KERN_mips64_ASID_H_ - -#include - -#define ASID_MAX_ARCH 255 /* 2^8 - 1 */ - -typedef uint8_t asid_t; - -#endif - -/** @} - */ Index: kernel/arch/mips64/include/mm/frame.h =================================================================== --- kernel/arch/mips64/include/mm/frame.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,52 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips64mm - * @{ - */ -/** @file - */ - -#ifndef KERN_mips64_FRAME_H_ -#define KERN_mips64_FRAME_H_ - -#define FRAME_WIDTH 14 /* 16K */ -#define FRAME_SIZE (1 << FRAME_WIDTH) - -#ifndef __ASM__ - -extern void frame_low_arch_init(void); -extern void frame_high_arch_init(void); -extern void physmem_print(void); - -#endif /* __ASM__ */ - -#endif - -/** @} - */ Index: kernel/arch/mips64/include/mm/km.h =================================================================== --- kernel/arch/mips64/include/mm/km.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,47 +1,0 @@ -/* - * Copyright (c) 2011 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips64mm - * @{ - */ -/** @file - */ - -#ifndef KERN_mips64_KM_H_ -#define KERN_mips64_KM_H_ - -#include - -extern void km_identity_arch_init(void); -extern void km_non_identity_arch_init(void); -extern bool km_is_non_identity_arch(uintptr_t); - -#endif - -/** @} - */ Index: kernel/arch/mips64/include/mm/page.h =================================================================== --- kernel/arch/mips64/include/mm/page.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,61 +1,0 @@ -/* - * Copyright (c) 2003-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips64mm - * @{ - */ -/** @file - */ - -#ifndef KERN_mips64_PAGE_H_ -#define KERN_mips64_PAGE_H_ - -#include -#include - -#define PAGE_WIDTH FRAME_WIDTH -#define PAGE_SIZE FRAME_SIZE - -#ifndef __ASM__ - #define KA2PA(addr) (((uintptr_t) (addr)) - 0xffffffff80000000) - #define PA2KA(addr) (((uintptr_t) (addr)) + 0xffffffff80000000) -#else - #define KA2PA(addr) ((addr) - 0xffffffff80000000) - #define PA2KA(addr) ((addr) + 0xffffffff80000000) -#endif - -#ifndef __ASM__ - -extern void page_arch_init(void); - -#endif /* __ASM__ */ - -#endif - -/** @} - */ Index: kernel/arch/mips64/include/mm/tlb.h =================================================================== --- kernel/arch/mips64/include/mm/tlb.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,181 +1,0 @@ -/* - * Copyright (c) 2003-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips64mm - * @{ - */ -/** @file - */ - -#ifndef KERN_mips64_TLB_H_ -#define KERN_mips64_TLB_H_ - -#include -#include -#include -#include - -#define TLB_ENTRY_COUNT 48 - -#define TLB_WIRED 1 -#define TLB_KSTACK_WIRED_INDEX 0 - -#define TLB_PAGE_MASK_4K (0x000 << 13) -#define TLB_PAGE_MASK_16K (0x003 << 13) -#define TLB_PAGE_MASK_64K (0x00f << 13) -#define TLB_PAGE_MASK_256K (0x03f << 13) -#define TLB_PAGE_MASK_1M (0x0ff << 13) -#define TLB_PAGE_MASK_4M (0x3ff << 13) -#define TLB_PAGE_MASK_16M (0xfff << 13) - -#define PAGE_UNCACHED 2 -#define PAGE_CACHEABLE_EXC_WRITE 5 - -typedef union { - struct { -#ifdef __BE__ - unsigned int : 2; /* zero */ - unsigned int pfn : 24; /* frame number */ - unsigned int c : 3; /* cache coherency attribute */ - unsigned int d : 1; /* dirty/write-protect bit */ - unsigned int v : 1; /* valid bit */ - unsigned int g : 1; /* global bit */ -#else - unsigned int g : 1; /* global bit */ - unsigned int v : 1; /* valid bit */ - unsigned int d : 1; /* dirty/write-protect bit */ - unsigned int c : 3; /* cache coherency attribute */ - unsigned int pfn : 24; /* frame number */ - unsigned int : 2; /* zero */ -#endif - } __attribute__ ((packed)); - uint32_t value; -} entry_lo_t; - -typedef union { - struct { -#ifdef __BE__ - unsigned int vpn2 : 19; - unsigned int : 5; - unsigned int asid : 8; -#else - unsigned int asid : 8; - unsigned int : 5; - unsigned int vpn2 : 19; -#endif - } __attribute__ ((packed)); - uint32_t value; -} entry_hi_t; - -typedef union { - struct { -#ifdef __BE__ - unsigned int : 7; - unsigned int mask : 12; - unsigned int : 13; -#else - unsigned int : 13; - unsigned int mask : 12; - unsigned int : 7; -#endif - } __attribute__ ((packed)); - uint32_t value; -} page_mask_t; - -typedef union { - struct { -#ifdef __BE__ - unsigned int p : 1; - unsigned int : 27; - unsigned int index : 4; -#else - unsigned int index : 4; - unsigned int : 27; - unsigned int p : 1; -#endif - } __attribute__ ((packed)); - uint32_t value; -} tlb_index_t; - -/** Probe TLB for Matching Entry - * - * Probe TLB for Matching Entry. - */ -NO_TRACE static inline void tlbp(void) -{ - asm volatile ( - "tlbp\n\t" - ); -} - -/** Read Indexed TLB Entry - * - * Read Indexed TLB Entry. - */ -NO_TRACE static inline void tlbr(void) -{ - asm volatile ( - "tlbr\n\t" - ); -} - -/** Write Indexed TLB Entry - * - * Write Indexed TLB Entry. - */ -NO_TRACE static inline void tlbwi(void) -{ - asm volatile ( - "tlbwi\n\t" - ); -} - -/** Write Random TLB Entry - * - * Write Random TLB Entry. - */ -NO_TRACE static inline void tlbwr(void) -{ - asm volatile ( - "tlbwr\n\t" - ); -} - -#define tlb_invalidate(asid) tlb_invalidate_asid(asid) - -extern void tlb_invalid(istate_t *); -extern void tlb_refill(istate_t *); -extern void tlb_modified(istate_t *); -extern void tlb_prepare_entry_lo(entry_lo_t *, bool, bool, bool, bool, - uintptr_t); -extern void tlb_prepare_entry_hi(entry_hi_t *, asid_t, uintptr_t); - -#endif - -/** @} - */ Index: kernel/arch/mips64/include/proc/task.h =================================================================== --- kernel/arch/mips64/include/proc/task.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,47 +1,0 @@ -/* - * Copyright (c) 2006 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips64proc - * @{ - */ -/** @file - */ - -#ifndef KERN_mips64_TASK_H_ -#define KERN_mips64_TASK_H_ - -typedef struct { -} task_arch_t; - -#define task_create_arch(task) -#define task_destroy_arch(task) - -#endif - -/** @} - */ Index: kernel/arch/mips64/include/proc/thread.h =================================================================== --- kernel/arch/mips64/include/proc/thread.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,48 +1,0 @@ -/* - * Copyright (c) 2003-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips64proc - * @{ - */ -/** @file - */ - -#ifndef KERN_mips64_THREAD_H_ -#define KERN_mips64_THREAD_H_ - -typedef struct { -} thread_arch_t; - -#define thr_constructor_arch(thread) -#define thr_destructor_arch(thread) -#define thread_create_arch(thread) - -#endif - -/** @} - */ Index: kernel/arch/mips64/include/smp/dorder.h =================================================================== --- kernel/arch/mips64/include/smp/dorder.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,46 +1,0 @@ -/* - * Copyright (c) 2007 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips64 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips64_DORDER_H_ -#define KERN_mips64_DORDER_H_ - -#include - -extern uint32_t dorder_cpuid(void); -extern void dorder_ipi_ack(uint32_t); - -#endif - -/** @} - */ Index: kernel/arch/mips64/include/stack.h =================================================================== --- kernel/arch/mips64/include/stack.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,45 +1,0 @@ -/* - * Copyright (c) 2006 Josef Cejka - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips64 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips64_STACK_H_ -#define KERN_mips64_STACK_H_ - -#define STACK_ITEM_SIZE 8 -#define STACK_ALIGNMENT 8 -#define ABI_STACK_FRAME 64 - -#endif - -/** @} - */ Index: kernel/arch/mips64/include/types.h =================================================================== --- kernel/arch/mips64/include/types.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,64 +1,0 @@ -/* - * Copyright (c) 2003-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips64 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips64_TYPES_H_ -#define KERN_mips64_TYPES_H_ - -typedef uint64_t size_t; -typedef int64_t ssize_t; - -typedef uint64_t uintptr_t; -typedef uint64_t pfn_t; - -typedef uint64_t ipl_t; - -typedef uint64_t sysarg_t; -typedef int64_t native_t; -typedef uint64_t atomic_count_t; - -typedef struct { -} fncptr_t; - -#define INTN_C(c) INT64_C(c) -#define UINTN_C(c) UINT64_C(c) - -#define PRIdn PRId64 /**< Format for native_t. */ -#define PRIun PRIu64 /**< Format for sysarg_t. */ -#define PRIxn PRIx64 /**< Format for hexadecimal sysarg_t. */ -#define PRIua PRIu64 /**< Format for atomic_count_t. */ - -#endif - -/** @} - */ Index: kernel/arch/ppc32/include/arch.h =================================================================== --- kernel/arch/ppc32/include/arch.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,45 +1,0 @@ -/* - * Copyright (c) 2005 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ppc32 - * @{ - */ -/** @file - */ - -#ifndef KERN_ppc32_ARCH_H_ -#define KERN_ppc32_ARCH_H_ - -#include - -extern void arch_pre_main(bootinfo_t *); - -#endif - -/** @} - */ Index: kernel/arch/ppc32/include/arch/arch.h =================================================================== --- kernel/arch/ppc32/include/arch/arch.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ppc32/include/arch/arch.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2005 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ppc32 + * @{ + */ +/** @file + */ + +#ifndef KERN_ppc32_ARCH_H_ +#define KERN_ppc32_ARCH_H_ + +#include + +extern void arch_pre_main(bootinfo_t *); + +#endif + +/** @} + */ Index: kernel/arch/ppc32/include/arch/asm.h =================================================================== --- kernel/arch/ppc32/include/arch/asm.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ppc32/include/arch/asm.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,223 @@ +/* + * Copyright (c) 2005 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ppc32 + * @{ + */ +/** @file + */ + +#ifndef KERN_ppc32_ASM_H_ +#define KERN_ppc32_ASM_H_ + +#include +#include +#include +#include +#include + +NO_TRACE static inline uint32_t msr_read(void) +{ + uint32_t msr; + + asm volatile ( + "mfmsr %[msr]\n" + : [msr] "=r" (msr) + ); + + return msr; +} + +NO_TRACE static inline void msr_write(uint32_t msr) +{ + asm volatile ( + "mtmsr %[msr]\n" + :: [msr] "r" (msr) + ); +} + +NO_TRACE static inline void sr_set(uint32_t flags, asid_t asid, uint32_t sr) +{ + asm volatile ( + "mtsrin %[value], %[sr]\n" + :: [value] "r" ((flags << 16) + (asid << 4) + sr), + [sr] "r" (sr << 28) + ); +} + +NO_TRACE static inline uint32_t sr_get(uint32_t vaddr) +{ + uint32_t vsid; + + asm volatile ( + "mfsrin %[vsid], %[vaddr]\n" + : [vsid] "=r" (vsid) + : [vaddr] "r" (vaddr) + ); + + return vsid; +} + +NO_TRACE static inline uint32_t sdr1_get(void) +{ + uint32_t sdr1; + + asm volatile ( + "mfsdr1 %[sdr1]\n" + : [sdr1] "=r" (sdr1) + ); + + return sdr1; +} + +/** Enable interrupts. + * + * Enable interrupts and return previous + * value of EE. + * + * @return Old interrupt priority level. + * + */ +NO_TRACE static inline ipl_t interrupts_enable(void) +{ + ipl_t ipl = msr_read(); + msr_write(ipl | MSR_EE); + return ipl; +} + +/** Disable interrupts. + * + * Disable interrupts and return previous + * value of EE. + * + * @return Old interrupt priority level. + * + */ +NO_TRACE static inline ipl_t interrupts_disable(void) +{ + ipl_t ipl = msr_read(); + msr_write(ipl & (~MSR_EE)); + return ipl; +} + +/** Restore interrupt priority level. + * + * Restore EE. + * + * @param ipl Saved interrupt priority level. + * + */ +NO_TRACE static inline void interrupts_restore(ipl_t ipl) +{ + msr_write((msr_read() & (~MSR_EE)) | (ipl & MSR_EE)); +} + +/** Return interrupt priority level. + * + * Return EE. + * + * @return Current interrupt priority level. + * + */ +NO_TRACE static inline ipl_t interrupts_read(void) +{ + return msr_read(); +} + +/** Check whether interrupts are disabled. + * + * @return True if interrupts are disabled. + * + */ +NO_TRACE static inline bool interrupts_disabled(void) +{ + return ((msr_read() & MSR_EE) == 0); +} + +/** Return base address of current stack. + * + * Return the base address of the current stack. + * The stack is assumed to be STACK_SIZE bytes long. + * The stack must start on page boundary. + * + */ +NO_TRACE static inline uintptr_t get_stack_base(void) +{ + uintptr_t base; + + asm volatile ( + "and %[base], %%sp, %[mask]\n" + : [base] "=r" (base) + : [mask] "r" (~(STACK_SIZE - 1)) + ); + + return base; +} + +NO_TRACE static inline void cpu_sleep(void) +{ +} + +NO_TRACE static inline void pio_write_8(ioport8_t *port, uint8_t v) +{ + *port = v; +} + +NO_TRACE static inline void pio_write_16(ioport16_t *port, uint16_t v) +{ + *port = v; +} + +NO_TRACE static inline void pio_write_32(ioport32_t *port, uint32_t v) +{ + *port = v; +} + +NO_TRACE static inline uint8_t pio_read_8(ioport8_t *port) +{ + return *port; +} + +NO_TRACE static inline uint16_t pio_read_16(ioport16_t *port) +{ + return *port; +} + +NO_TRACE static inline uint32_t pio_read_32(ioport32_t *port) +{ + return *port; +} + +extern void cpu_halt(void) __attribute__((noreturn)); +extern void asm_delay_loop(uint32_t t); +extern void userspace_asm(uintptr_t uspace_uarg, uintptr_t stack, uintptr_t entry); + +#endif + +/** @} + */ Index: kernel/arch/ppc32/include/arch/asm/regname.h =================================================================== --- kernel/arch/ppc32/include/arch/asm/regname.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ppc32/include/arch/asm/regname.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,222 @@ +/* + * Copyright (c) 2005 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ppc32 + * @{ + */ +/** @file + */ + +#ifndef KERN_ppc32_REGNAME_H_ +#define KERN_ppc32_REGNAME_H_ + +/* Condition Register Bit Fields */ +#define cr0 0 +#define cr1 1 +#define cr2 2 +#define cr3 3 +#define cr4 4 +#define cr5 5 +#define cr6 6 +#define cr7 7 + +/* General Purpose Registers (GPRs) */ +#define r0 0 +#define r1 1 +#define r2 2 +#define r3 3 +#define r4 4 +#define r5 5 +#define r6 6 +#define r7 7 +#define r8 8 +#define r9 9 +#define r10 10 +#define r11 11 +#define r12 12 +#define r13 13 +#define r14 14 +#define r15 15 +#define r16 16 +#define r17 17 +#define r18 18 +#define r19 19 +#define r20 20 +#define r21 21 +#define r22 22 +#define r23 23 +#define r24 24 +#define r25 25 +#define r26 26 +#define r27 27 +#define r28 28 +#define r29 29 +#define r30 30 +#define r31 31 + +/* GPR Aliases */ +#define sp 1 + +/* Floating Point Registers (FPRs) */ +#define fr0 0 +#define fr1 1 +#define fr2 2 +#define fr3 3 +#define fr4 4 +#define fr5 5 +#define fr6 6 +#define fr7 7 +#define fr8 8 +#define fr9 9 +#define fr10 10 +#define fr11 11 +#define fr12 12 +#define fr13 13 +#define fr14 14 +#define fr15 15 +#define fr16 16 +#define fr17 17 +#define fr18 18 +#define fr19 19 +#define fr20 20 +#define fr21 21 +#define fr22 22 +#define fr23 23 +#define fr24 24 +#define fr25 25 +#define fr26 26 +#define fr27 27 +#define fr28 28 +#define fr29 29 +#define fr30 30 +#define fr31 31 + +#define vr0 0 +#define vr1 1 +#define vr2 2 +#define vr3 3 +#define vr4 4 +#define vr5 5 +#define vr6 6 +#define vr7 7 +#define vr8 8 +#define vr9 9 +#define vr10 10 +#define vr11 11 +#define vr12 12 +#define vr13 13 +#define vr14 14 +#define vr15 15 +#define vr16 16 +#define vr17 17 +#define vr18 18 +#define vr19 19 +#define vr20 20 +#define vr21 21 +#define vr22 22 +#define vr23 23 +#define vr24 24 +#define vr25 25 +#define vr26 26 +#define vr27 27 +#define vr28 28 +#define vr29 29 +#define vr30 30 +#define vr31 31 + +#define evr0 0 +#define evr1 1 +#define evr2 2 +#define evr3 3 +#define evr4 4 +#define evr5 5 +#define evr6 6 +#define evr7 7 +#define evr8 8 +#define evr9 9 +#define evr10 10 +#define evr11 11 +#define evr12 12 +#define evr13 13 +#define evr14 14 +#define evr15 15 +#define evr16 16 +#define evr17 17 +#define evr18 18 +#define evr19 19 +#define evr20 20 +#define evr21 21 +#define evr22 22 +#define evr23 23 +#define evr24 24 +#define evr25 25 +#define evr26 26 +#define evr27 27 +#define evr28 28 +#define evr29 29 +#define evr30 30 +#define evr31 31 + +/* Special Purpose Registers (SPRs) */ +#define xer 1 +#define lr 8 +#define ctr 9 +#define dec 22 +#define sdr1 25 +#define srr0 26 +#define srr1 27 +#define sprg0 272 +#define sprg1 273 +#define sprg2 274 +#define sprg3 275 +#define prv 287 +#define ibat0u 528 +#define ibat0l 529 +#define ibat1u 530 +#define ibat1l 531 +#define ibat2u 532 +#define ibat2l 533 +#define ibat3u 534 +#define ibat3l 535 +#define dbat0u 536 +#define dbat0l 537 +#define dbat1u 538 +#define dbat1l 539 +#define dbat2u 540 +#define dbat2l 541 +#define dbat3u 542 +#define dbat3l 543 +#define tlbmiss 980 +#define ptehi 981 +#define ptelo 982 +#define hid0 1008 + +#endif + +/** @} + */ Index: kernel/arch/ppc32/include/arch/atomic.h =================================================================== --- kernel/arch/ppc32/include/arch/atomic.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ppc32/include/arch/atomic.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,103 @@ +/* + * Copyright (c) 2005 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ppc32 + * @{ + */ +/** @file + */ + +#ifndef KERN_ppc32_ATOMIC_H_ +#define KERN_ppc32_ATOMIC_H_ + +#include + +NO_TRACE static inline void atomic_inc(atomic_t *val) +{ + atomic_count_t tmp; + + asm volatile ( + "1:\n" + " lwarx %[tmp], 0, %[count_ptr]\n" + " addic %[tmp], %[tmp], 1\n" + " stwcx. %[tmp], 0, %[count_ptr]\n" + " bne- 1b" + : [tmp] "=&r" (tmp), + "=m" (val->count) + : [count_ptr] "r" (&val->count), + "m" (val->count) + : "cc" + ); +} + +NO_TRACE static inline void atomic_dec(atomic_t *val) +{ + atomic_count_t tmp; + + asm volatile ( + "1:\n" + " lwarx %[tmp], 0, %[count_ptr]\n" + " addic %[tmp], %[tmp], -1\n" + " stwcx. %[tmp], 0, %[count_ptr]\n" + " bne- 1b" + : [tmp] "=&r" (tmp), + "=m" (val->count) + : [count_ptr] "r" (&val->count), + "m" (val->count) + : "cc" + ); +} + +NO_TRACE static inline atomic_count_t atomic_postinc(atomic_t *val) +{ + atomic_inc(val); + return val->count - 1; +} + +NO_TRACE static inline atomic_count_t atomic_postdec(atomic_t *val) +{ + atomic_dec(val); + return val->count + 1; +} + +NO_TRACE static inline atomic_count_t atomic_preinc(atomic_t *val) +{ + atomic_inc(val); + return val->count; +} + +NO_TRACE static inline atomic_count_t atomic_predec(atomic_t *val) +{ + atomic_dec(val); + return val->count; +} + +#endif + +/** @} + */ Index: kernel/arch/ppc32/include/arch/barrier.h =================================================================== --- kernel/arch/ppc32/include/arch/barrier.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ppc32/include/arch/barrier.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,98 @@ +/* + * Copyright (c) 2005 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ppc32 + * @{ + */ +/** @file + */ + +#ifndef KERN_ppc32_BARRIER_H_ +#define KERN_ppc32_BARRIER_H_ + +#include + +#define CS_ENTER_BARRIER() asm volatile ("" ::: "memory") +#define CS_LEAVE_BARRIER() asm volatile ("" ::: "memory") + +#define memory_barrier() asm volatile ("sync" ::: "memory") +#define read_barrier() asm volatile ("sync" ::: "memory") +#define write_barrier() asm volatile ("eieio" ::: "memory") + +#define instruction_barrier() \ + asm volatile ( \ + "sync\n" \ + "isync\n" \ + ) + +#define COHERENCE_INVAL_MIN 4 + +/* + * The IMB sequence used here is valid for all possible cache models + * on uniprocessor. SMP might require a different sequence. + * See PowerPC Programming Environment for 32-Bit Microprocessors, + * chapter 5.1.5.2 + */ + +NO_TRACE static inline void smc_coherence(void *addr) +{ + asm volatile ( + "dcbst 0, %[addr]\n" + "sync\n" + "icbi 0, %[addr]\n" + "sync\n" + "isync\n" + :: [addr] "r" (addr) + ); +} + +NO_TRACE static inline void smc_coherence_block(void *addr, unsigned int len) +{ + unsigned int i; + + for (i = 0; i < len; i += COHERENCE_INVAL_MIN) + asm volatile ( + "dcbst 0, %[addr]\n" + :: [addr] "r" (addr + i) + ); + + memory_barrier(); + + for (i = 0; i < len; i += COHERENCE_INVAL_MIN) + asm volatile ( + "icbi 0, %[addr]\n" + :: [addr] "r" (addr + i) + ); + + instruction_barrier(); +} + +#endif + +/** @} + */ Index: kernel/arch/ppc32/include/arch/boot/boot.h =================================================================== --- kernel/arch/ppc32/include/arch/boot/boot.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ppc32/include/arch/boot/boot.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,86 @@ +/* + * Copyright (c) 2006 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ppc32 + * @{ + */ +/** @file + */ + +#ifndef KERN_ppc32_BOOT_H_ +#define KERN_ppc32_BOOT_H_ + +#define BOOT_OFFSET 0x8000 + +#define TASKMAP_MAX_RECORDS 32 +#define MEMMAP_MAX_RECORDS 32 +#define BOOTINFO_TASK_NAME_BUFLEN 32 + +#ifndef __ASM__ + +#include +#include +#include + +typedef struct { + void *addr; + size_t size; + char name[BOOTINFO_TASK_NAME_BUFLEN]; +} utask_t; + +typedef struct { + size_t cnt; + utask_t tasks[TASKMAP_MAX_RECORDS]; +} taskmap_t; + +typedef struct { + void *start; + size_t size; +} memzone_t; + +typedef struct { + uint64_t total; + size_t cnt; + memzone_t zones[MEMMAP_MAX_RECORDS]; +} memmap_t; + +typedef struct { + memmap_t memmap; + taskmap_t taskmap; + ballocs_t ballocs; + ofw_tree_node_t *ofw_root; +} bootinfo_t; + +extern memmap_t memmap; + +#endif + +#endif + +/** @} + */ Index: kernel/arch/ppc32/include/arch/context.h =================================================================== --- kernel/arch/ppc32/include/arch/context.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ppc32/include/arch/context.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,78 @@ +/* + * Copyright (c) 2005 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ppc32 + * @{ + */ +/** @file + */ + +#ifndef KERN_ppc32_CONTEXT_H_ +#define KERN_ppc32_CONTEXT_H_ + +#include + +#define SP_DELTA 16 + +#define context_set(ctx, pc, stack, size) \ + context_set_generic(ctx, pc, stack, size) + +typedef struct { + uintptr_t sp; + uintptr_t pc; + + uint32_t r2; + uint32_t r13; + uint32_t r14; + uint32_t r15; + uint32_t r16; + uint32_t r17; + uint32_t r18; + uint32_t r19; + uint32_t r20; + uint32_t r21; + uint32_t r22; + uint32_t r23; + uint32_t r24; + uint32_t r25; + uint32_t r26; + uint32_t r27; + uint32_t r28; + uint32_t r29; + uint32_t r30; + uint32_t r31; + + uint32_t cr; + + ipl_t ipl; +} __attribute__((packed)) context_t; + +#endif + +/** @} + */ Index: kernel/arch/ppc32/include/arch/context_offset.h =================================================================== --- kernel/arch/ppc32/include/arch/context_offset.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ppc32/include/arch/context_offset.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,140 @@ +/* + * Copyright (c) 2005 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef KERN_ppc32_CONTEXT_OFFSET_H_ +#define KERN_ppc32_CONTEXT_OFFSET_H_ + +#define OFFSET_SP 0x0 +#define OFFSET_PC 0x4 +#define OFFSET_R2 0x8 +#define OFFSET_R13 0xc +#define OFFSET_R14 0x10 +#define OFFSET_R15 0x14 +#define OFFSET_R16 0x18 +#define OFFSET_R17 0x1c +#define OFFSET_R18 0x20 +#define OFFSET_R19 0x24 +#define OFFSET_R20 0x28 +#define OFFSET_R21 0x2c +#define OFFSET_R22 0x30 +#define OFFSET_R23 0x34 +#define OFFSET_R24 0x38 +#define OFFSET_R25 0x3c +#define OFFSET_R26 0x40 +#define OFFSET_R27 0x44 +#define OFFSET_R28 0x48 +#define OFFSET_R29 0x4c +#define OFFSET_R30 0x50 +#define OFFSET_R31 0x54 +#define OFFSET_CR 0x58 + +#define OFFSET_FR14 0x0 +#define OFFSET_FR15 0x8 +#define OFFSET_FR16 0x10 +#define OFFSET_FR17 0x18 +#define OFFSET_FR18 0x20 +#define OFFSET_FR19 0x28 +#define OFFSET_FR20 0x30 +#define OFFSET_FR21 0x38 +#define OFFSET_FR22 0x40 +#define OFFSET_FR23 0x48 +#define OFFSET_FR24 0x50 +#define OFFSET_FR25 0x58 +#define OFFSET_FR26 0x60 +#define OFFSET_FR27 0x68 +#define OFFSET_FR28 0x70 +#define OFFSET_FR29 0x78 +#define OFFSET_FR30 0x80 +#define OFFSET_FR31 0x88 +#define OFFSET_FPSCR 0x90 + +#ifdef __ASM__ + +#ifdef KERNEL + +#include + +#else /* KERNEL */ + +#include + +#endif /* KERNEL */ + +/* ctx: address of the structure with saved context */ +.macro CONTEXT_SAVE_ARCH_CORE ctx:req + stw sp, OFFSET_SP(\ctx) + stw r2, OFFSET_R2(\ctx) + stw r13, OFFSET_R13(\ctx) + stw r14, OFFSET_R14(\ctx) + stw r15, OFFSET_R15(\ctx) + stw r16, OFFSET_R16(\ctx) + stw r17, OFFSET_R17(\ctx) + stw r18, OFFSET_R18(\ctx) + stw r19, OFFSET_R19(\ctx) + stw r20, OFFSET_R20(\ctx) + stw r21, OFFSET_R21(\ctx) + stw r22, OFFSET_R22(\ctx) + stw r23, OFFSET_R23(\ctx) + stw r24, OFFSET_R24(\ctx) + stw r25, OFFSET_R25(\ctx) + stw r26, OFFSET_R26(\ctx) + stw r27, OFFSET_R27(\ctx) + stw r28, OFFSET_R28(\ctx) + stw r29, OFFSET_R29(\ctx) + stw r30, OFFSET_R30(\ctx) + stw r31, OFFSET_R31(\ctx) +.endm + +/* ctx: address of the structure with saved context */ +.macro CONTEXT_RESTORE_ARCH_CORE ctx:req + lwz sp, OFFSET_SP(\ctx) + lwz r2, OFFSET_R2(\ctx) + lwz r13, OFFSET_R13(\ctx) + lwz r14, OFFSET_R14(\ctx) + lwz r15, OFFSET_R15(\ctx) + lwz r16, OFFSET_R16(\ctx) + lwz r17, OFFSET_R17(\ctx) + lwz r18, OFFSET_R18(\ctx) + lwz r19, OFFSET_R19(\ctx) + lwz r20, OFFSET_R20(\ctx) + lwz r21, OFFSET_R21(\ctx) + lwz r22, OFFSET_R22(\ctx) + lwz r23, OFFSET_R23(\ctx) + lwz r24, OFFSET_R24(\ctx) + lwz r25, OFFSET_R25(\ctx) + lwz r26, OFFSET_R26(\ctx) + lwz r27, OFFSET_R27(\ctx) + lwz r28, OFFSET_R28(\ctx) + lwz r29, OFFSET_R29(\ctx) + lwz r30, OFFSET_R30(\ctx) + lwz r31, OFFSET_R31(\ctx) +.endm + +#endif /* __ASM__ */ + +#endif Index: kernel/arch/ppc32/include/arch/cpu.h =================================================================== --- kernel/arch/ppc32/include/arch/cpu.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ppc32/include/arch/cpu.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,57 @@ +/* + * Copyright (c) 2005 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ppc32 + * @{ + */ +/** @file + */ + +#ifndef KERN_ppc32_CPU_H_ +#define KERN_ppc32_CPU_H_ + +#include +#include + +typedef struct { + uint16_t version; + uint16_t revision; +} __attribute__ ((packed)) cpu_arch_t; + +NO_TRACE static inline void cpu_version(cpu_arch_t *info) +{ + asm volatile ( + "mfpvr %[cpu_info]\n" + : [cpu_info] "=r" (*info) + ); +} + +#endif + +/** @} + */ Index: kernel/arch/ppc32/include/arch/cycle.h =================================================================== --- kernel/arch/ppc32/include/arch/cycle.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ppc32/include/arch/cycle.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,63 @@ +/* + * Copyright (c) 2006 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ppc32 + * @{ + */ +/** @file + */ + +#ifndef KERN_ppc32_CYCLE_H_ +#define KERN_ppc32_CYCLE_H_ + +#include + +NO_TRACE static inline uint64_t get_cycle(void) +{ + uint32_t lower; + uint32_t upper; + uint32_t tmp; + + do { + asm volatile ( + "mftbu %[upper]\n" + "mftb %[lower]\n" + "mftbu %[tmp]\n" + : [upper] "=r" (upper), + [lower] "=r" (lower), + [tmp] "=r" (tmp) + ); + } while (upper != tmp); + + return ((uint64_t) upper << 32) + (uint64_t) lower; +} + +#endif + +/** @} + */ Index: kernel/arch/ppc32/include/arch/drivers/pic.h =================================================================== --- kernel/arch/ppc32/include/arch/drivers/pic.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ppc32/include/arch/drivers/pic.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,57 @@ +/* + * Copyright (c) 2006 Ondrej Palkovsky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ppc32 + * @{ + */ +/** @file + */ + +#ifndef KERN_ppc32_PIC_H_ +#define KERN_ppc32_PIC_H_ + +#include +#include + +#define PIC_PENDING_LOW 8 +#define PIC_PENDING_HIGH 4 +#define PIC_MASK_LOW 9 +#define PIC_MASK_HIGH 5 +#define PIC_ACK_LOW 10 +#define PIC_ACK_HIGH 6 + +extern void pic_init(uintptr_t, size_t, cir_t *, void **); +extern void pic_enable_interrupt(inr_t); +extern void pic_disable_interrupt(inr_t); +extern void pic_ack_interrupt(void *, inr_t); +extern uint8_t pic_get_pending(void); + +#endif + +/** @} + */ Index: kernel/arch/ppc32/include/arch/elf.h =================================================================== --- kernel/arch/ppc32/include/arch/elf.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ppc32/include/arch/elf.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2006 Sergey Bondari + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ppc32 + * @{ + */ +/** @file + */ + +#ifndef KERN_ppc32_ELF_H_ +#define KERN_ppc32_ELF_H_ + +#define ELF_MACHINE EM_PPC +#define ELF_DATA_ENCODING ELFDATA2MSB +#define ELF_CLASS ELFCLASS32 + +#endif + +/** @} + */ Index: kernel/arch/ppc32/include/arch/exception.h =================================================================== --- kernel/arch/ppc32/include/arch/exception.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ppc32/include/arch/exception.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,113 @@ +/* + * Copyright (c) 2006 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ppc32 + * @{ + */ +/** @file + */ + +#ifndef KERN_ppc32_EXCEPTION_H_ +#define KERN_ppc32_EXCEPTION_H_ + +#include +#include +#include + +typedef struct istate { + uint32_t r0; + uint32_t r2; + uint32_t r3; + uint32_t r4; + uint32_t r5; + uint32_t r6; + uint32_t r7; + uint32_t r8; + uint32_t r9; + uint32_t r10; + uint32_t r11; + uint32_t r13; + uint32_t r14; + uint32_t r15; + uint32_t r16; + uint32_t r17; + uint32_t r18; + uint32_t r19; + uint32_t r20; + uint32_t r21; + uint32_t r22; + uint32_t r23; + uint32_t r24; + uint32_t r25; + uint32_t r26; + uint32_t r27; + uint32_t r28; + uint32_t r29; + uint32_t r30; + uint32_t r31; + uint32_t cr; + uint32_t pc; + uint32_t srr1; + uint32_t lr; + uint32_t ctr; + uint32_t xer; + uint32_t dar; + uint32_t r12; + uint32_t sp; +} istate_t; + +NO_TRACE static inline void istate_set_retaddr(istate_t *istate, + uintptr_t retaddr) +{ + istate->pc = retaddr; +} + +/** Return true if exception happened while in userspace + * + * The contexts of MSR register was stored in SRR1. + * + */ +NO_TRACE static inline int istate_from_uspace(istate_t *istate) +{ + return (istate->srr1 & MSR_PR) != 0; +} + +NO_TRACE static inline sysarg_t istate_get_pc(istate_t *istate) +{ + return istate->pc; +} + +NO_TRACE static inline sysarg_t istate_get_fp(istate_t *istate) +{ + return istate->sp; +} + +#endif + +/** @} + */ Index: kernel/arch/ppc32/include/arch/faddr.h =================================================================== --- kernel/arch/ppc32/include/arch/faddr.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ppc32/include/arch/faddr.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2005 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ppc32 + * @{ + */ +/** @file + */ + +#ifndef KERN_ppc32_FADDR_H_ +#define KERN_ppc32_FADDR_H_ + +#include + +#define FADDR(fptr) ((uintptr_t) (fptr)) + +#endif + +/** @} + */ Index: kernel/arch/ppc32/include/arch/fpu_context.h =================================================================== --- kernel/arch/ppc32/include/arch/fpu_context.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ppc32/include/arch/fpu_context.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,65 @@ +/* + * Copyright (c) 2005 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ppc32 + * @{ + */ +/** @file + */ + +#ifndef KERN_ppc32_FPU_CONTEXT_H_ +#define KERN_ppc32_FPU_CONTEXT_H_ + +#include + +typedef struct { + uint64_t fr14; + uint64_t fr15; + uint64_t fr16; + uint64_t fr17; + uint64_t fr18; + uint64_t fr19; + uint64_t fr20; + uint64_t fr21; + uint64_t fr22; + uint64_t fr23; + uint64_t fr24; + uint64_t fr25; + uint64_t fr26; + uint64_t fr27; + uint64_t fr28; + uint64_t fr29; + uint64_t fr30; + uint64_t fr31; + uint32_t fpscr; +} __attribute__ ((packed)) fpu_context_t; + +#endif + +/** @} + */ Index: kernel/arch/ppc32/include/arch/interrupt.h =================================================================== --- kernel/arch/ppc32/include/arch/interrupt.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ppc32/include/arch/interrupt.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,58 @@ +/* + * Copyright (c) 2005 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ppc32interrupt + * @{ + */ +/** @file + */ + +#ifndef KERN_ppc32_INTERRUPT_H_ +#define KERN_ppc32_INTERRUPT_H_ + +#include + +#define IVT_ITEMS 16 +#define IVT_FIRST 0 + +#define VECTOR_DATA_STORAGE 2 +#define VECTOR_INSTRUCTION_STORAGE 3 +#define VECTOR_EXTERNAL 4 +#define VECTOR_DECREMENTER 8 +#define VECTOR_ITLB_MISS 13 +#define VECTOR_DTLB_MISS_LOAD 14 +#define VECTOR_DTLB_MISS_STORE 15 + +extern void start_decrementer(void); +extern void interrupt_init(void); +extern void extint_handler(unsigned int, istate_t *); + +#endif + +/** @} + */ Index: kernel/arch/ppc32/include/arch/istate.h =================================================================== --- kernel/arch/ppc32/include/arch/istate.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ppc32/include/arch/istate.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,119 @@ +/* + * Copyright (c) 2006 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ppc32 + * @{ + */ +/** @file + */ + +#ifndef KERN_ppc32_EXCEPTION_H_ +#define KERN_ppc32_EXCEPTION_H_ + +#include + +#ifdef KERNEL + +#include + +#else /* KERNEL */ + +#include + +#endif /* KERNEL */ + +typedef struct istate { + uint32_t r0; + uint32_t r2; + uint32_t r3; + uint32_t r4; + uint32_t r5; + uint32_t r6; + uint32_t r7; + uint32_t r8; + uint32_t r9; + uint32_t r10; + uint32_t r11; + uint32_t r13; + uint32_t r14; + uint32_t r15; + uint32_t r16; + uint32_t r17; + uint32_t r18; + uint32_t r19; + uint32_t r20; + uint32_t r21; + uint32_t r22; + uint32_t r23; + uint32_t r24; + uint32_t r25; + uint32_t r26; + uint32_t r27; + uint32_t r28; + uint32_t r29; + uint32_t r30; + uint32_t r31; + uint32_t cr; + uint32_t pc; + uint32_t msr; + uint32_t lr; + uint32_t ctr; + uint32_t xer; + uint32_t dar; + uint32_t r12; + uint32_t sp; +} istate_t; + +NO_TRACE static inline void istate_set_retaddr(istate_t *istate, + uintptr_t retaddr) +{ + istate->pc = retaddr; +} + +/** Return true if exception happened while in userspace + * + */ +NO_TRACE static inline int istate_from_uspace(istate_t *istate) +{ + return (istate->msr & MSR_PR) != 0; +} + +NO_TRACE static inline uintptr_t istate_get_pc(istate_t *istate) +{ + return istate->pc; +} + +NO_TRACE static inline uintptr_t istate_get_fp(istate_t *istate) +{ + return istate->sp; +} + +#endif + +/** @} + */ Index: kernel/arch/ppc32/include/arch/mm/as.h =================================================================== --- kernel/arch/ppc32/include/arch/mm/as.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ppc32/include/arch/mm/as.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,65 @@ +/* + * Copyright (c) 2005 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ppc32mm + * @{ + */ +/** @file + */ + +#ifndef KERN_ppc32_AS_H_ +#define KERN_ppc32_AS_H_ + +#include + +#define KERNEL_ADDRESS_SPACE_SHADOWED_ARCH 0 + +#define KERNEL_ADDRESS_SPACE_START_ARCH UINT32_C(0x80000000) +#define KERNEL_ADDRESS_SPACE_END_ARCH UINT32_C(0xffffffff) +#define USER_ADDRESS_SPACE_START_ARCH UINT32_C(0x00000000) +#define USER_ADDRESS_SPACE_END_ARCH UINT32_C(0x7fffffff) + +typedef struct { +} as_arch_t; + +#include + +#define as_constructor_arch(as, flags) (as != as) +#define as_destructor_arch(as) (as != as) +#define as_create_arch(as, flags) (as != as) +#define as_deinstall_arch(as) + +#define as_invalidate_translation_cache(as, page, cnt) \ + pht_invalidate((as), (page), (cnt)) + +extern void as_arch_init(void); + +#endif + +/** @} + */ Index: kernel/arch/ppc32/include/arch/mm/asid.h =================================================================== --- kernel/arch/ppc32/include/arch/mm/asid.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ppc32/include/arch/mm/asid.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,47 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ppc32mm + * @{ + */ +/** @file + */ + +#ifndef KERN_ppc32_ASID_H_ +#define KERN_ppc32_ASID_H_ + +#include + +#define ASID_MAX_ARCH 4096 + +typedef uint32_t asid_t; + +#endif + +/** @} + */ Index: kernel/arch/ppc32/include/arch/mm/frame.h =================================================================== --- kernel/arch/ppc32/include/arch/mm/frame.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ppc32/include/arch/mm/frame.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,67 @@ +/* + * Copyright (c) 2005 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ppc32mm + * @{ + */ +/** @file + */ + +#ifndef KERN_ppc32_FRAME_H_ +#define KERN_ppc32_FRAME_H_ + +#define FRAME_WIDTH 12 /* 4K */ +#define FRAME_SIZE (1 << FRAME_WIDTH) + +#ifndef __ASM__ + +#include +#include + +NO_TRACE static inline uint32_t physmem_top(void) +{ + uint32_t physmem; + + asm volatile ( + "mfsprg3 %[physmem]\n" + : [physmem] "=r" (physmem) + ); + + return physmem; +} + +extern void frame_low_arch_init(void); +extern void frame_high_arch_init(void); +extern void physmem_print(void); + +#endif /* __ASM__ */ + +#endif + +/** @} + */ Index: kernel/arch/ppc32/include/arch/mm/km.h =================================================================== --- kernel/arch/ppc32/include/arch/mm/km.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ppc32/include/arch/mm/km.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,53 @@ +/* + * Copyright (c) 2011 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ppc32mm + * @{ + */ +/** @file + */ + +#ifndef KERN_ppc32_KM_H_ +#define KERN_ppc32_KM_H_ + +#include + +#define KM_PPC32_IDENTITY_START UINT32_C(0x80000000) +#define KM_PPC32_IDENTITY_SIZE UINT32_C(0x40000000) + +#define KM_PPC32_NON_IDENTITY_START UINT32_C(0xc0000000) +#define KM_PPC32_NON_IDENTITY_SIZE UINT32_C(0x40000000) + +extern void km_identity_arch_init(void); +extern void km_non_identity_arch_init(void); +extern bool km_is_non_identity_arch(uintptr_t); + +#endif + +/** @} + */ Index: kernel/arch/ppc32/include/arch/mm/page.h =================================================================== --- kernel/arch/ppc32/include/arch/mm/page.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ppc32/include/arch/mm/page.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,201 @@ +/* + * Copyright (c) 2005 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ppc32mm + * @{ + */ +/** @file + */ + +#ifndef KERN_ppc32_PAGE_H_ +#define KERN_ppc32_PAGE_H_ + +#include +#include + +#define PAGE_WIDTH FRAME_WIDTH +#define PAGE_SIZE FRAME_SIZE + +#ifndef __ASM__ + #define KA2PA(x) (((uintptr_t) (x)) - 0x80000000) + #define PA2KA(x) (((uintptr_t) (x)) + 0x80000000) +#else + #define KA2PA(x) ((x) - 0x80000000) + #define PA2KA(x) ((x) + 0x80000000) +#endif + +/* + * Implementation of generic 4-level page table interface, + * the hardware Page Hash Table is used as cache. + * + * Page table layout: + * - 32-bit virtual addressess + * - Offset is 12 bits => pages are 4K long + * - PTL0 has 1024 entries (10 bits) + * - PTL1 is not used + * - PTL2 is not used + * - PLT3 has 1024 entries (10 bits) + */ + +/* Number of entries in each level. */ +#define PTL0_ENTRIES_ARCH 1024 +#define PTL1_ENTRIES_ARCH 0 +#define PTL2_ENTRIES_ARCH 0 +#define PTL3_ENTRIES_ARCH 1024 + +/* Page table sizes for each level. */ +#define PTL0_SIZE_ARCH ONE_FRAME +#define PTL1_SIZE_ARCH 0 +#define PTL2_SIZE_ARCH 0 +#define PTL3_SIZE_ARCH ONE_FRAME + +/* Macros calculating indices into page tables on each level. */ +#define PTL0_INDEX_ARCH(vaddr) (((vaddr) >> 22) & 0x3ff) +#define PTL1_INDEX_ARCH(vaddr) 0 +#define PTL2_INDEX_ARCH(vaddr) 0 +#define PTL3_INDEX_ARCH(vaddr) (((vaddr) >> 12) & 0x3ff) + +/* Get PTE address accessors for each level. */ +#define GET_PTL1_ADDRESS_ARCH(ptl0, i) \ + (((pte_t *) (ptl0))[(i)].pfn << 12) + +#define GET_PTL2_ADDRESS_ARCH(ptl1, i) \ + (ptl1) + +#define GET_PTL3_ADDRESS_ARCH(ptl2, i) \ + (ptl2) + +#define GET_FRAME_ADDRESS_ARCH(ptl3, i) \ + (((pte_t *) (ptl3))[(i)].pfn << 12) + +/* Set PTE address accessors for each level. */ +#define SET_PTL0_ADDRESS_ARCH(ptl0) + +#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) \ + (((pte_t *) (ptl0))[(i)].pfn = (a) >> 12) + +#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a) +#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a) + +#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) \ + (((pte_t *) (ptl3))[(i)].pfn = (a) >> 12) + +/* Get PTE flags accessors for each level. */ +#define GET_PTL1_FLAGS_ARCH(ptl0, i) \ + get_pt_flags((pte_t *) (ptl0), (size_t) (i)) + +#define GET_PTL2_FLAGS_ARCH(ptl1, i) \ + PAGE_PRESENT + +#define GET_PTL3_FLAGS_ARCH(ptl2, i) \ + PAGE_PRESENT + +#define GET_FRAME_FLAGS_ARCH(ptl3, i) \ + get_pt_flags((pte_t *) (ptl3), (size_t) (i)) + +/* Set PTE flags accessors for each level. */ +#define SET_PTL1_FLAGS_ARCH(ptl0, i, x) \ + set_pt_flags((pte_t *) (ptl0), (size_t) (i), (x)) + +#define SET_PTL2_FLAGS_ARCH(ptl1, i, x) +#define SET_PTL3_FLAGS_ARCH(ptl2, i, x) + +#define SET_FRAME_FLAGS_ARCH(ptl3, i, x) \ + set_pt_flags((pte_t *) (ptl3), (size_t) (i), (x)) + +/* Set PTE present accessors for each level. */ +#define SET_PTL1_PRESENT_ARCH(ptl0, i) \ + set_pt_present((pte_t *) (ptl0), (size_t) (i)) + +#define SET_PTL2_PRESENT_ARCH(ptl1, i) +#define SET_PTL3_PRESENT_ARCH(ptl2, i) + +#define SET_FRAME_PRESENT_ARCH(ptl3, i) \ + set_pt_present((pte_t *) (ptl3), (size_t) (i)) + +/* Macros for querying the last-level PTEs. */ +#define PTE_VALID_ARCH(pte) (*((uint32_t *) (pte)) != 0) +#define PTE_PRESENT_ARCH(pte) ((pte)->present != 0) +#define PTE_GET_FRAME_ARCH(pte) ((pte)->pfn << 12) +#define PTE_WRITABLE_ARCH(pte) 1 +#define PTE_EXECUTABLE_ARCH(pte) 1 + +#ifndef __ASM__ + +#include +#include + +/** Page Table Entry. */ +typedef struct { + unsigned int present : 1; /**< Present bit. */ + unsigned int page_write_through : 1; /**< Write thought caching. */ + unsigned int page_cache_disable : 1; /**< No caching. */ + unsigned int accessed : 1; /**< Accessed bit. */ + unsigned int global : 1; /**< Global bit. */ + unsigned int valid : 1; /**< Valid content even if not present. */ + unsigned int pfn : 20; /**< Physical frame number. */ +} pte_t; + +NO_TRACE static inline unsigned int get_pt_flags(pte_t *pt, size_t i) +{ + pte_t *entry = &pt[i]; + + return (((!entry->page_cache_disable) << PAGE_CACHEABLE_SHIFT) | + ((!entry->present) << PAGE_PRESENT_SHIFT) | + (1 << PAGE_USER_SHIFT) | + (1 << PAGE_READ_SHIFT) | + (1 << PAGE_WRITE_SHIFT) | + (1 << PAGE_EXEC_SHIFT) | + (entry->global << PAGE_GLOBAL_SHIFT)); +} + +NO_TRACE static inline void set_pt_flags(pte_t *pt, size_t i, int flags) +{ + pte_t *entry = &pt[i]; + + entry->page_cache_disable = !(flags & PAGE_CACHEABLE); + entry->present = !(flags & PAGE_NOT_PRESENT); + entry->global = (flags & PAGE_GLOBAL) != 0; + entry->valid = 1; +} + +NO_TRACE static inline void set_pt_present(pte_t *pt, size_t i) +{ + pte_t *entry = &pt[i]; + + entry->present = 1; +} + +extern void page_arch_init(void); + +#endif /* __ASM__ */ + +#endif + +/** @} + */ Index: kernel/arch/ppc32/include/arch/mm/pht.h =================================================================== --- kernel/arch/ppc32/include/arch/mm/pht.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ppc32/include/arch/mm/pht.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,51 @@ +/* + * Copyright (c) 2006 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ppc32mm + * @{ + */ +/** @file + */ + +#ifndef KERN_ppc32_PHT_H_ +#define KERN_ppc32_PHT_H_ + +#include +#include + +/* Forward declaration. */ +struct as; + +extern void pht_init(void); +extern void pht_refill(unsigned int, istate_t *); +extern void pht_invalidate(struct as *, uintptr_t, size_t); + +#endif + +/** @} + */ Index: kernel/arch/ppc32/include/arch/mm/tlb.h =================================================================== --- kernel/arch/ppc32/include/arch/mm/tlb.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ppc32/include/arch/mm/tlb.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,81 @@ +/* + * Copyright (c) 2006 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ppc32mm + * @{ + */ +/** @file + */ + +#ifndef KERN_ppc32_TLB_H_ +#define KERN_ppc32_TLB_H_ + +#include + +#define WIMG_GUARDED 0x01 +#define WIMG_COHERENT 0x02 +#define WIMG_NO_CACHE 0x04 +#define WIMG_WRITETHRU 0x08 + +typedef struct { + unsigned int v : 1; /**< Valid */ + unsigned int vsid : 24; /**< Virtual Segment ID */ + unsigned int h : 1; /**< Primary/secondary hash */ + unsigned int api : 6; /**< Abbreviated Page Index */ + unsigned int rpn : 20; /**< Real Page Number */ + unsigned int reserved0 : 3; + unsigned int r : 1; /**< Reference */ + unsigned int c : 1; /**< Change */ + unsigned int wimg : 4; /**< Access control */ + unsigned int reserved1 : 1; + unsigned int pp : 2; /**< Page protection */ +} phte_t; + +typedef struct { + unsigned int v : 1; + unsigned int vsid : 24; + unsigned int reserved0 : 1; + unsigned int api : 6; +} ptehi_t; + +typedef struct { + unsigned int rpn : 20; + unsigned int xpn : 3; + unsigned int reserved0 : 1; + unsigned int c : 1; + unsigned int wimg : 4; + unsigned int x : 1; + unsigned int pp : 2; +} ptelo_t; + +extern void tlb_refill(unsigned int, istate_t *); + +#endif + +/** @} + */ Index: kernel/arch/ppc32/include/arch/msr.h =================================================================== --- kernel/arch/ppc32/include/arch/msr.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ppc32/include/arch/msr.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,54 @@ +/* + * Copyright (c) 2005 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ppc32 + * @{ + */ +/** @file + */ + +#ifndef KERN_ppc32_MSR_H_ +#define KERN_ppc32_MSR_H_ + +/* MSR bits */ +#define MSR_DR (1 << 4) +#define MSR_IR (1 << 5) +#define MSR_PR (1 << 14) +#define MSR_EE (1 << 15) + +/* HID0 bits */ +#define HID0_STEN (1 << 24) +#define HID0_ICE (1 << 15) +#define HID0_DCE (1 << 14) +#define HID0_ICFI (1 << 11) +#define HID0_DCI (1 << 10) + +#endif + +/** @} + */ Index: kernel/arch/ppc32/include/arch/proc/task.h =================================================================== --- kernel/arch/ppc32/include/arch/proc/task.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ppc32/include/arch/proc/task.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,47 @@ +/* + * Copyright (c) 2006 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ppc32proc + * @{ + */ +/** @file + */ + +#ifndef KERN_ppc32_TASK_H_ +#define KERN_ppc32_TASK_H_ + +typedef struct { +} task_arch_t; + +#define task_create_arch(t) +#define task_destroy_arch(t) + +#endif + +/** @} + */ Index: kernel/arch/ppc32/include/arch/proc/thread.h =================================================================== --- kernel/arch/ppc32/include/arch/proc/thread.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ppc32/include/arch/proc/thread.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,48 @@ +/* + * Copyright (c) 2005 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ppc32proc + * @{ + */ +/** @file + */ + +#ifndef KERN_ppc32_THREAD_H_ +#define KERN_ppc32_THREAD_H_ + +typedef struct { +} thread_arch_t; + +#define thr_constructor_arch(t) +#define thr_destructor_arch(t) +#define thread_create_arch(t) + +#endif + +/** @} + */ Index: kernel/arch/ppc32/include/arch/types.h =================================================================== --- kernel/arch/ppc32/include/arch/types.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/ppc32/include/arch/types.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,64 @@ +/* + * Copyright (c) 2005 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ppc32 + * @{ + */ +/** @file + */ + +#ifndef KERN_ppc32_TYPES_H_ +#define KERN_ppc32_TYPES_H_ + +typedef uint32_t size_t; +typedef int32_t ssize_t; + +typedef uint32_t uintptr_t; +typedef uint32_t pfn_t; + +typedef uint32_t ipl_t; + +typedef uint32_t sysarg_t; +typedef int32_t native_t; +typedef uint32_t atomic_count_t; + +typedef struct { +} fncptr_t; + +#define INTN_C(c) INT32_C(c) +#define UINTN_C(c) UINT32_C(c) + +#define PRIdn PRId32 /**< Format for native_t. */ +#define PRIun PRIu32 /**< Format for sysarg_t. */ +#define PRIxn PRIx32 /**< Format for hexadecimal sysarg_t. */ +#define PRIua PRIu32 /**< Format for atomic_count_t. */ + +#endif + +/** @} + */ Index: kernel/arch/ppc32/include/asm.h =================================================================== --- kernel/arch/ppc32/include/asm.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,223 +1,0 @@ -/* - * Copyright (c) 2005 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ppc32 - * @{ - */ -/** @file - */ - -#ifndef KERN_ppc32_ASM_H_ -#define KERN_ppc32_ASM_H_ - -#include -#include -#include -#include -#include - -NO_TRACE static inline uint32_t msr_read(void) -{ - uint32_t msr; - - asm volatile ( - "mfmsr %[msr]\n" - : [msr] "=r" (msr) - ); - - return msr; -} - -NO_TRACE static inline void msr_write(uint32_t msr) -{ - asm volatile ( - "mtmsr %[msr]\n" - :: [msr] "r" (msr) - ); -} - -NO_TRACE static inline void sr_set(uint32_t flags, asid_t asid, uint32_t sr) -{ - asm volatile ( - "mtsrin %[value], %[sr]\n" - :: [value] "r" ((flags << 16) + (asid << 4) + sr), - [sr] "r" (sr << 28) - ); -} - -NO_TRACE static inline uint32_t sr_get(uint32_t vaddr) -{ - uint32_t vsid; - - asm volatile ( - "mfsrin %[vsid], %[vaddr]\n" - : [vsid] "=r" (vsid) - : [vaddr] "r" (vaddr) - ); - - return vsid; -} - -NO_TRACE static inline uint32_t sdr1_get(void) -{ - uint32_t sdr1; - - asm volatile ( - "mfsdr1 %[sdr1]\n" - : [sdr1] "=r" (sdr1) - ); - - return sdr1; -} - -/** Enable interrupts. - * - * Enable interrupts and return previous - * value of EE. - * - * @return Old interrupt priority level. - * - */ -NO_TRACE static inline ipl_t interrupts_enable(void) -{ - ipl_t ipl = msr_read(); - msr_write(ipl | MSR_EE); - return ipl; -} - -/** Disable interrupts. - * - * Disable interrupts and return previous - * value of EE. - * - * @return Old interrupt priority level. - * - */ -NO_TRACE static inline ipl_t interrupts_disable(void) -{ - ipl_t ipl = msr_read(); - msr_write(ipl & (~MSR_EE)); - return ipl; -} - -/** Restore interrupt priority level. - * - * Restore EE. - * - * @param ipl Saved interrupt priority level. - * - */ -NO_TRACE static inline void interrupts_restore(ipl_t ipl) -{ - msr_write((msr_read() & (~MSR_EE)) | (ipl & MSR_EE)); -} - -/** Return interrupt priority level. - * - * Return EE. - * - * @return Current interrupt priority level. - * - */ -NO_TRACE static inline ipl_t interrupts_read(void) -{ - return msr_read(); -} - -/** Check whether interrupts are disabled. - * - * @return True if interrupts are disabled. - * - */ -NO_TRACE static inline bool interrupts_disabled(void) -{ - return ((msr_read() & MSR_EE) == 0); -} - -/** Return base address of current stack. - * - * Return the base address of the current stack. - * The stack is assumed to be STACK_SIZE bytes long. - * The stack must start on page boundary. - * - */ -NO_TRACE static inline uintptr_t get_stack_base(void) -{ - uintptr_t base; - - asm volatile ( - "and %[base], %%sp, %[mask]\n" - : [base] "=r" (base) - : [mask] "r" (~(STACK_SIZE - 1)) - ); - - return base; -} - -NO_TRACE static inline void cpu_sleep(void) -{ -} - -NO_TRACE static inline void pio_write_8(ioport8_t *port, uint8_t v) -{ - *port = v; -} - -NO_TRACE static inline void pio_write_16(ioport16_t *port, uint16_t v) -{ - *port = v; -} - -NO_TRACE static inline void pio_write_32(ioport32_t *port, uint32_t v) -{ - *port = v; -} - -NO_TRACE static inline uint8_t pio_read_8(ioport8_t *port) -{ - return *port; -} - -NO_TRACE static inline uint16_t pio_read_16(ioport16_t *port) -{ - return *port; -} - -NO_TRACE static inline uint32_t pio_read_32(ioport32_t *port) -{ - return *port; -} - -extern void cpu_halt(void) __attribute__((noreturn)); -extern void asm_delay_loop(uint32_t t); -extern void userspace_asm(uintptr_t uspace_uarg, uintptr_t stack, uintptr_t entry); - -#endif - -/** @} - */ Index: kernel/arch/ppc32/include/asm/regname.h =================================================================== --- kernel/arch/ppc32/include/asm/regname.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,222 +1,0 @@ -/* - * Copyright (c) 2005 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ppc32 - * @{ - */ -/** @file - */ - -#ifndef KERN_ppc32_REGNAME_H_ -#define KERN_ppc32_REGNAME_H_ - -/* Condition Register Bit Fields */ -#define cr0 0 -#define cr1 1 -#define cr2 2 -#define cr3 3 -#define cr4 4 -#define cr5 5 -#define cr6 6 -#define cr7 7 - -/* General Purpose Registers (GPRs) */ -#define r0 0 -#define r1 1 -#define r2 2 -#define r3 3 -#define r4 4 -#define r5 5 -#define r6 6 -#define r7 7 -#define r8 8 -#define r9 9 -#define r10 10 -#define r11 11 -#define r12 12 -#define r13 13 -#define r14 14 -#define r15 15 -#define r16 16 -#define r17 17 -#define r18 18 -#define r19 19 -#define r20 20 -#define r21 21 -#define r22 22 -#define r23 23 -#define r24 24 -#define r25 25 -#define r26 26 -#define r27 27 -#define r28 28 -#define r29 29 -#define r30 30 -#define r31 31 - -/* GPR Aliases */ -#define sp 1 - -/* Floating Point Registers (FPRs) */ -#define fr0 0 -#define fr1 1 -#define fr2 2 -#define fr3 3 -#define fr4 4 -#define fr5 5 -#define fr6 6 -#define fr7 7 -#define fr8 8 -#define fr9 9 -#define fr10 10 -#define fr11 11 -#define fr12 12 -#define fr13 13 -#define fr14 14 -#define fr15 15 -#define fr16 16 -#define fr17 17 -#define fr18 18 -#define fr19 19 -#define fr20 20 -#define fr21 21 -#define fr22 22 -#define fr23 23 -#define fr24 24 -#define fr25 25 -#define fr26 26 -#define fr27 27 -#define fr28 28 -#define fr29 29 -#define fr30 30 -#define fr31 31 - -#define vr0 0 -#define vr1 1 -#define vr2 2 -#define vr3 3 -#define vr4 4 -#define vr5 5 -#define vr6 6 -#define vr7 7 -#define vr8 8 -#define vr9 9 -#define vr10 10 -#define vr11 11 -#define vr12 12 -#define vr13 13 -#define vr14 14 -#define vr15 15 -#define vr16 16 -#define vr17 17 -#define vr18 18 -#define vr19 19 -#define vr20 20 -#define vr21 21 -#define vr22 22 -#define vr23 23 -#define vr24 24 -#define vr25 25 -#define vr26 26 -#define vr27 27 -#define vr28 28 -#define vr29 29 -#define vr30 30 -#define vr31 31 - -#define evr0 0 -#define evr1 1 -#define evr2 2 -#define evr3 3 -#define evr4 4 -#define evr5 5 -#define evr6 6 -#define evr7 7 -#define evr8 8 -#define evr9 9 -#define evr10 10 -#define evr11 11 -#define evr12 12 -#define evr13 13 -#define evr14 14 -#define evr15 15 -#define evr16 16 -#define evr17 17 -#define evr18 18 -#define evr19 19 -#define evr20 20 -#define evr21 21 -#define evr22 22 -#define evr23 23 -#define evr24 24 -#define evr25 25 -#define evr26 26 -#define evr27 27 -#define evr28 28 -#define evr29 29 -#define evr30 30 -#define evr31 31 - -/* Special Purpose Registers (SPRs) */ -#define xer 1 -#define lr 8 -#define ctr 9 -#define dec 22 -#define sdr1 25 -#define srr0 26 -#define srr1 27 -#define sprg0 272 -#define sprg1 273 -#define sprg2 274 -#define sprg3 275 -#define prv 287 -#define ibat0u 528 -#define ibat0l 529 -#define ibat1u 530 -#define ibat1l 531 -#define ibat2u 532 -#define ibat2l 533 -#define ibat3u 534 -#define ibat3l 535 -#define dbat0u 536 -#define dbat0l 537 -#define dbat1u 538 -#define dbat1l 539 -#define dbat2u 540 -#define dbat2l 541 -#define dbat3u 542 -#define dbat3l 543 -#define tlbmiss 980 -#define ptehi 981 -#define ptelo 982 -#define hid0 1008 - -#endif - -/** @} - */ Index: kernel/arch/ppc32/include/atomic.h =================================================================== --- kernel/arch/ppc32/include/atomic.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,103 +1,0 @@ -/* - * Copyright (c) 2005 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ppc32 - * @{ - */ -/** @file - */ - -#ifndef KERN_ppc32_ATOMIC_H_ -#define KERN_ppc32_ATOMIC_H_ - -#include - -NO_TRACE static inline void atomic_inc(atomic_t *val) -{ - atomic_count_t tmp; - - asm volatile ( - "1:\n" - " lwarx %[tmp], 0, %[count_ptr]\n" - " addic %[tmp], %[tmp], 1\n" - " stwcx. %[tmp], 0, %[count_ptr]\n" - " bne- 1b" - : [tmp] "=&r" (tmp), - "=m" (val->count) - : [count_ptr] "r" (&val->count), - "m" (val->count) - : "cc" - ); -} - -NO_TRACE static inline void atomic_dec(atomic_t *val) -{ - atomic_count_t tmp; - - asm volatile ( - "1:\n" - " lwarx %[tmp], 0, %[count_ptr]\n" - " addic %[tmp], %[tmp], -1\n" - " stwcx. %[tmp], 0, %[count_ptr]\n" - " bne- 1b" - : [tmp] "=&r" (tmp), - "=m" (val->count) - : [count_ptr] "r" (&val->count), - "m" (val->count) - : "cc" - ); -} - -NO_TRACE static inline atomic_count_t atomic_postinc(atomic_t *val) -{ - atomic_inc(val); - return val->count - 1; -} - -NO_TRACE static inline atomic_count_t atomic_postdec(atomic_t *val) -{ - atomic_dec(val); - return val->count + 1; -} - -NO_TRACE static inline atomic_count_t atomic_preinc(atomic_t *val) -{ - atomic_inc(val); - return val->count; -} - -NO_TRACE static inline atomic_count_t atomic_predec(atomic_t *val) -{ - atomic_dec(val); - return val->count; -} - -#endif - -/** @} - */ Index: kernel/arch/ppc32/include/barrier.h =================================================================== --- kernel/arch/ppc32/include/barrier.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,98 +1,0 @@ -/* - * Copyright (c) 2005 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ppc32 - * @{ - */ -/** @file - */ - -#ifndef KERN_ppc32_BARRIER_H_ -#define KERN_ppc32_BARRIER_H_ - -#include - -#define CS_ENTER_BARRIER() asm volatile ("" ::: "memory") -#define CS_LEAVE_BARRIER() asm volatile ("" ::: "memory") - -#define memory_barrier() asm volatile ("sync" ::: "memory") -#define read_barrier() asm volatile ("sync" ::: "memory") -#define write_barrier() asm volatile ("eieio" ::: "memory") - -#define instruction_barrier() \ - asm volatile ( \ - "sync\n" \ - "isync\n" \ - ) - -#define COHERENCE_INVAL_MIN 4 - -/* - * The IMB sequence used here is valid for all possible cache models - * on uniprocessor. SMP might require a different sequence. - * See PowerPC Programming Environment for 32-Bit Microprocessors, - * chapter 5.1.5.2 - */ - -NO_TRACE static inline void smc_coherence(void *addr) -{ - asm volatile ( - "dcbst 0, %[addr]\n" - "sync\n" - "icbi 0, %[addr]\n" - "sync\n" - "isync\n" - :: [addr] "r" (addr) - ); -} - -NO_TRACE static inline void smc_coherence_block(void *addr, unsigned int len) -{ - unsigned int i; - - for (i = 0; i < len; i += COHERENCE_INVAL_MIN) - asm volatile ( - "dcbst 0, %[addr]\n" - :: [addr] "r" (addr + i) - ); - - memory_barrier(); - - for (i = 0; i < len; i += COHERENCE_INVAL_MIN) - asm volatile ( - "icbi 0, %[addr]\n" - :: [addr] "r" (addr + i) - ); - - instruction_barrier(); -} - -#endif - -/** @} - */ Index: kernel/arch/ppc32/include/boot/boot.h =================================================================== --- kernel/arch/ppc32/include/boot/boot.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,86 +1,0 @@ -/* - * Copyright (c) 2006 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ppc32 - * @{ - */ -/** @file - */ - -#ifndef KERN_ppc32_BOOT_H_ -#define KERN_ppc32_BOOT_H_ - -#define BOOT_OFFSET 0x8000 - -#define TASKMAP_MAX_RECORDS 32 -#define MEMMAP_MAX_RECORDS 32 -#define BOOTINFO_TASK_NAME_BUFLEN 32 - -#ifndef __ASM__ - -#include -#include -#include - -typedef struct { - void *addr; - size_t size; - char name[BOOTINFO_TASK_NAME_BUFLEN]; -} utask_t; - -typedef struct { - size_t cnt; - utask_t tasks[TASKMAP_MAX_RECORDS]; -} taskmap_t; - -typedef struct { - void *start; - size_t size; -} memzone_t; - -typedef struct { - uint64_t total; - size_t cnt; - memzone_t zones[MEMMAP_MAX_RECORDS]; -} memmap_t; - -typedef struct { - memmap_t memmap; - taskmap_t taskmap; - ballocs_t ballocs; - ofw_tree_node_t *ofw_root; -} bootinfo_t; - -extern memmap_t memmap; - -#endif - -#endif - -/** @} - */ Index: kernel/arch/ppc32/include/context.h =================================================================== --- kernel/arch/ppc32/include/context.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,78 +1,0 @@ -/* - * Copyright (c) 2005 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ppc32 - * @{ - */ -/** @file - */ - -#ifndef KERN_ppc32_CONTEXT_H_ -#define KERN_ppc32_CONTEXT_H_ - -#include - -#define SP_DELTA 16 - -#define context_set(ctx, pc, stack, size) \ - context_set_generic(ctx, pc, stack, size) - -typedef struct { - uintptr_t sp; - uintptr_t pc; - - uint32_t r2; - uint32_t r13; - uint32_t r14; - uint32_t r15; - uint32_t r16; - uint32_t r17; - uint32_t r18; - uint32_t r19; - uint32_t r20; - uint32_t r21; - uint32_t r22; - uint32_t r23; - uint32_t r24; - uint32_t r25; - uint32_t r26; - uint32_t r27; - uint32_t r28; - uint32_t r29; - uint32_t r30; - uint32_t r31; - - uint32_t cr; - - ipl_t ipl; -} __attribute__((packed)) context_t; - -#endif - -/** @} - */ Index: kernel/arch/ppc32/include/context_offset.h =================================================================== --- kernel/arch/ppc32/include/context_offset.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,140 +1,0 @@ -/* - * Copyright (c) 2005 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef KERN_ppc32_CONTEXT_OFFSET_H_ -#define KERN_ppc32_CONTEXT_OFFSET_H_ - -#define OFFSET_SP 0x0 -#define OFFSET_PC 0x4 -#define OFFSET_R2 0x8 -#define OFFSET_R13 0xc -#define OFFSET_R14 0x10 -#define OFFSET_R15 0x14 -#define OFFSET_R16 0x18 -#define OFFSET_R17 0x1c -#define OFFSET_R18 0x20 -#define OFFSET_R19 0x24 -#define OFFSET_R20 0x28 -#define OFFSET_R21 0x2c -#define OFFSET_R22 0x30 -#define OFFSET_R23 0x34 -#define OFFSET_R24 0x38 -#define OFFSET_R25 0x3c -#define OFFSET_R26 0x40 -#define OFFSET_R27 0x44 -#define OFFSET_R28 0x48 -#define OFFSET_R29 0x4c -#define OFFSET_R30 0x50 -#define OFFSET_R31 0x54 -#define OFFSET_CR 0x58 - -#define OFFSET_FR14 0x0 -#define OFFSET_FR15 0x8 -#define OFFSET_FR16 0x10 -#define OFFSET_FR17 0x18 -#define OFFSET_FR18 0x20 -#define OFFSET_FR19 0x28 -#define OFFSET_FR20 0x30 -#define OFFSET_FR21 0x38 -#define OFFSET_FR22 0x40 -#define OFFSET_FR23 0x48 -#define OFFSET_FR24 0x50 -#define OFFSET_FR25 0x58 -#define OFFSET_FR26 0x60 -#define OFFSET_FR27 0x68 -#define OFFSET_FR28 0x70 -#define OFFSET_FR29 0x78 -#define OFFSET_FR30 0x80 -#define OFFSET_FR31 0x88 -#define OFFSET_FPSCR 0x90 - -#ifdef __ASM__ - -#ifdef KERNEL - -#include - -#else /* KERNEL */ - -#include - -#endif /* KERNEL */ - -/* ctx: address of the structure with saved context */ -.macro CONTEXT_SAVE_ARCH_CORE ctx:req - stw sp, OFFSET_SP(\ctx) - stw r2, OFFSET_R2(\ctx) - stw r13, OFFSET_R13(\ctx) - stw r14, OFFSET_R14(\ctx) - stw r15, OFFSET_R15(\ctx) - stw r16, OFFSET_R16(\ctx) - stw r17, OFFSET_R17(\ctx) - stw r18, OFFSET_R18(\ctx) - stw r19, OFFSET_R19(\ctx) - stw r20, OFFSET_R20(\ctx) - stw r21, OFFSET_R21(\ctx) - stw r22, OFFSET_R22(\ctx) - stw r23, OFFSET_R23(\ctx) - stw r24, OFFSET_R24(\ctx) - stw r25, OFFSET_R25(\ctx) - stw r26, OFFSET_R26(\ctx) - stw r27, OFFSET_R27(\ctx) - stw r28, OFFSET_R28(\ctx) - stw r29, OFFSET_R29(\ctx) - stw r30, OFFSET_R30(\ctx) - stw r31, OFFSET_R31(\ctx) -.endm - -/* ctx: address of the structure with saved context */ -.macro CONTEXT_RESTORE_ARCH_CORE ctx:req - lwz sp, OFFSET_SP(\ctx) - lwz r2, OFFSET_R2(\ctx) - lwz r13, OFFSET_R13(\ctx) - lwz r14, OFFSET_R14(\ctx) - lwz r15, OFFSET_R15(\ctx) - lwz r16, OFFSET_R16(\ctx) - lwz r17, OFFSET_R17(\ctx) - lwz r18, OFFSET_R18(\ctx) - lwz r19, OFFSET_R19(\ctx) - lwz r20, OFFSET_R20(\ctx) - lwz r21, OFFSET_R21(\ctx) - lwz r22, OFFSET_R22(\ctx) - lwz r23, OFFSET_R23(\ctx) - lwz r24, OFFSET_R24(\ctx) - lwz r25, OFFSET_R25(\ctx) - lwz r26, OFFSET_R26(\ctx) - lwz r27, OFFSET_R27(\ctx) - lwz r28, OFFSET_R28(\ctx) - lwz r29, OFFSET_R29(\ctx) - lwz r30, OFFSET_R30(\ctx) - lwz r31, OFFSET_R31(\ctx) -.endm - -#endif /* __ASM__ */ - -#endif Index: kernel/arch/ppc32/include/cpu.h =================================================================== --- kernel/arch/ppc32/include/cpu.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,57 +1,0 @@ -/* - * Copyright (c) 2005 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ppc32 - * @{ - */ -/** @file - */ - -#ifndef KERN_ppc32_CPU_H_ -#define KERN_ppc32_CPU_H_ - -#include -#include - -typedef struct { - uint16_t version; - uint16_t revision; -} __attribute__ ((packed)) cpu_arch_t; - -NO_TRACE static inline void cpu_version(cpu_arch_t *info) -{ - asm volatile ( - "mfpvr %[cpu_info]\n" - : [cpu_info] "=r" (*info) - ); -} - -#endif - -/** @} - */ Index: kernel/arch/ppc32/include/cycle.h =================================================================== --- kernel/arch/ppc32/include/cycle.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,63 +1,0 @@ -/* - * Copyright (c) 2006 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ppc32 - * @{ - */ -/** @file - */ - -#ifndef KERN_ppc32_CYCLE_H_ -#define KERN_ppc32_CYCLE_H_ - -#include - -NO_TRACE static inline uint64_t get_cycle(void) -{ - uint32_t lower; - uint32_t upper; - uint32_t tmp; - - do { - asm volatile ( - "mftbu %[upper]\n" - "mftb %[lower]\n" - "mftbu %[tmp]\n" - : [upper] "=r" (upper), - [lower] "=r" (lower), - [tmp] "=r" (tmp) - ); - } while (upper != tmp); - - return ((uint64_t) upper << 32) + (uint64_t) lower; -} - -#endif - -/** @} - */ Index: kernel/arch/ppc32/include/drivers/pic.h =================================================================== --- kernel/arch/ppc32/include/drivers/pic.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,57 +1,0 @@ -/* - * Copyright (c) 2006 Ondrej Palkovsky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ppc32 - * @{ - */ -/** @file - */ - -#ifndef KERN_ppc32_PIC_H_ -#define KERN_ppc32_PIC_H_ - -#include -#include - -#define PIC_PENDING_LOW 8 -#define PIC_PENDING_HIGH 4 -#define PIC_MASK_LOW 9 -#define PIC_MASK_HIGH 5 -#define PIC_ACK_LOW 10 -#define PIC_ACK_HIGH 6 - -extern void pic_init(uintptr_t, size_t, cir_t *, void **); -extern void pic_enable_interrupt(inr_t); -extern void pic_disable_interrupt(inr_t); -extern void pic_ack_interrupt(void *, inr_t); -extern uint8_t pic_get_pending(void); - -#endif - -/** @} - */ Index: kernel/arch/ppc32/include/elf.h =================================================================== --- kernel/arch/ppc32/include/elf.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,45 +1,0 @@ -/* - * Copyright (c) 2006 Sergey Bondari - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ppc32 - * @{ - */ -/** @file - */ - -#ifndef KERN_ppc32_ELF_H_ -#define KERN_ppc32_ELF_H_ - -#define ELF_MACHINE EM_PPC -#define ELF_DATA_ENCODING ELFDATA2MSB -#define ELF_CLASS ELFCLASS32 - -#endif - -/** @} - */ Index: kernel/arch/ppc32/include/exception.h =================================================================== --- kernel/arch/ppc32/include/exception.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,113 +1,0 @@ -/* - * Copyright (c) 2006 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ppc32 - * @{ - */ -/** @file - */ - -#ifndef KERN_ppc32_EXCEPTION_H_ -#define KERN_ppc32_EXCEPTION_H_ - -#include -#include -#include - -typedef struct istate { - uint32_t r0; - uint32_t r2; - uint32_t r3; - uint32_t r4; - uint32_t r5; - uint32_t r6; - uint32_t r7; - uint32_t r8; - uint32_t r9; - uint32_t r10; - uint32_t r11; - uint32_t r13; - uint32_t r14; - uint32_t r15; - uint32_t r16; - uint32_t r17; - uint32_t r18; - uint32_t r19; - uint32_t r20; - uint32_t r21; - uint32_t r22; - uint32_t r23; - uint32_t r24; - uint32_t r25; - uint32_t r26; - uint32_t r27; - uint32_t r28; - uint32_t r29; - uint32_t r30; - uint32_t r31; - uint32_t cr; - uint32_t pc; - uint32_t srr1; - uint32_t lr; - uint32_t ctr; - uint32_t xer; - uint32_t dar; - uint32_t r12; - uint32_t sp; -} istate_t; - -NO_TRACE static inline void istate_set_retaddr(istate_t *istate, - uintptr_t retaddr) -{ - istate->pc = retaddr; -} - -/** Return true if exception happened while in userspace - * - * The contexts of MSR register was stored in SRR1. - * - */ -NO_TRACE static inline int istate_from_uspace(istate_t *istate) -{ - return (istate->srr1 & MSR_PR) != 0; -} - -NO_TRACE static inline sysarg_t istate_get_pc(istate_t *istate) -{ - return istate->pc; -} - -NO_TRACE static inline sysarg_t istate_get_fp(istate_t *istate) -{ - return istate->sp; -} - -#endif - -/** @} - */ Index: kernel/arch/ppc32/include/faddr.h =================================================================== --- kernel/arch/ppc32/include/faddr.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,45 +1,0 @@ -/* - * Copyright (c) 2005 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ppc32 - * @{ - */ -/** @file - */ - -#ifndef KERN_ppc32_FADDR_H_ -#define KERN_ppc32_FADDR_H_ - -#include - -#define FADDR(fptr) ((uintptr_t) (fptr)) - -#endif - -/** @} - */ Index: kernel/arch/ppc32/include/fpu_context.h =================================================================== --- kernel/arch/ppc32/include/fpu_context.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,65 +1,0 @@ -/* - * Copyright (c) 2005 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ppc32 - * @{ - */ -/** @file - */ - -#ifndef KERN_ppc32_FPU_CONTEXT_H_ -#define KERN_ppc32_FPU_CONTEXT_H_ - -#include - -typedef struct { - uint64_t fr14; - uint64_t fr15; - uint64_t fr16; - uint64_t fr17; - uint64_t fr18; - uint64_t fr19; - uint64_t fr20; - uint64_t fr21; - uint64_t fr22; - uint64_t fr23; - uint64_t fr24; - uint64_t fr25; - uint64_t fr26; - uint64_t fr27; - uint64_t fr28; - uint64_t fr29; - uint64_t fr30; - uint64_t fr31; - uint32_t fpscr; -} __attribute__ ((packed)) fpu_context_t; - -#endif - -/** @} - */ Index: kernel/arch/ppc32/include/interrupt.h =================================================================== --- kernel/arch/ppc32/include/interrupt.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,58 +1,0 @@ -/* - * Copyright (c) 2005 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ppc32interrupt - * @{ - */ -/** @file - */ - -#ifndef KERN_ppc32_INTERRUPT_H_ -#define KERN_ppc32_INTERRUPT_H_ - -#include - -#define IVT_ITEMS 16 -#define IVT_FIRST 0 - -#define VECTOR_DATA_STORAGE 2 -#define VECTOR_INSTRUCTION_STORAGE 3 -#define VECTOR_EXTERNAL 4 -#define VECTOR_DECREMENTER 8 -#define VECTOR_ITLB_MISS 13 -#define VECTOR_DTLB_MISS_LOAD 14 -#define VECTOR_DTLB_MISS_STORE 15 - -extern void start_decrementer(void); -extern void interrupt_init(void); -extern void extint_handler(unsigned int, istate_t *); - -#endif - -/** @} - */ Index: kernel/arch/ppc32/include/istate.h =================================================================== --- kernel/arch/ppc32/include/istate.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,119 +1,0 @@ -/* - * Copyright (c) 2006 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ppc32 - * @{ - */ -/** @file - */ - -#ifndef KERN_ppc32_EXCEPTION_H_ -#define KERN_ppc32_EXCEPTION_H_ - -#include - -#ifdef KERNEL - -#include - -#else /* KERNEL */ - -#include - -#endif /* KERNEL */ - -typedef struct istate { - uint32_t r0; - uint32_t r2; - uint32_t r3; - uint32_t r4; - uint32_t r5; - uint32_t r6; - uint32_t r7; - uint32_t r8; - uint32_t r9; - uint32_t r10; - uint32_t r11; - uint32_t r13; - uint32_t r14; - uint32_t r15; - uint32_t r16; - uint32_t r17; - uint32_t r18; - uint32_t r19; - uint32_t r20; - uint32_t r21; - uint32_t r22; - uint32_t r23; - uint32_t r24; - uint32_t r25; - uint32_t r26; - uint32_t r27; - uint32_t r28; - uint32_t r29; - uint32_t r30; - uint32_t r31; - uint32_t cr; - uint32_t pc; - uint32_t msr; - uint32_t lr; - uint32_t ctr; - uint32_t xer; - uint32_t dar; - uint32_t r12; - uint32_t sp; -} istate_t; - -NO_TRACE static inline void istate_set_retaddr(istate_t *istate, - uintptr_t retaddr) -{ - istate->pc = retaddr; -} - -/** Return true if exception happened while in userspace - * - */ -NO_TRACE static inline int istate_from_uspace(istate_t *istate) -{ - return (istate->msr & MSR_PR) != 0; -} - -NO_TRACE static inline uintptr_t istate_get_pc(istate_t *istate) -{ - return istate->pc; -} - -NO_TRACE static inline uintptr_t istate_get_fp(istate_t *istate) -{ - return istate->sp; -} - -#endif - -/** @} - */ Index: kernel/arch/ppc32/include/mm/as.h =================================================================== --- kernel/arch/ppc32/include/mm/as.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,65 +1,0 @@ -/* - * Copyright (c) 2005 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ppc32mm - * @{ - */ -/** @file - */ - -#ifndef KERN_ppc32_AS_H_ -#define KERN_ppc32_AS_H_ - -#include - -#define KERNEL_ADDRESS_SPACE_SHADOWED_ARCH 0 - -#define KERNEL_ADDRESS_SPACE_START_ARCH UINT32_C(0x80000000) -#define KERNEL_ADDRESS_SPACE_END_ARCH UINT32_C(0xffffffff) -#define USER_ADDRESS_SPACE_START_ARCH UINT32_C(0x00000000) -#define USER_ADDRESS_SPACE_END_ARCH UINT32_C(0x7fffffff) - -typedef struct { -} as_arch_t; - -#include - -#define as_constructor_arch(as, flags) (as != as) -#define as_destructor_arch(as) (as != as) -#define as_create_arch(as, flags) (as != as) -#define as_deinstall_arch(as) - -#define as_invalidate_translation_cache(as, page, cnt) \ - pht_invalidate((as), (page), (cnt)) - -extern void as_arch_init(void); - -#endif - -/** @} - */ Index: kernel/arch/ppc32/include/mm/asid.h =================================================================== --- kernel/arch/ppc32/include/mm/asid.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,47 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ppc32mm - * @{ - */ -/** @file - */ - -#ifndef KERN_ppc32_ASID_H_ -#define KERN_ppc32_ASID_H_ - -#include - -#define ASID_MAX_ARCH 4096 - -typedef uint32_t asid_t; - -#endif - -/** @} - */ Index: kernel/arch/ppc32/include/mm/frame.h =================================================================== --- kernel/arch/ppc32/include/mm/frame.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,67 +1,0 @@ -/* - * Copyright (c) 2005 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ppc32mm - * @{ - */ -/** @file - */ - -#ifndef KERN_ppc32_FRAME_H_ -#define KERN_ppc32_FRAME_H_ - -#define FRAME_WIDTH 12 /* 4K */ -#define FRAME_SIZE (1 << FRAME_WIDTH) - -#ifndef __ASM__ - -#include -#include - -NO_TRACE static inline uint32_t physmem_top(void) -{ - uint32_t physmem; - - asm volatile ( - "mfsprg3 %[physmem]\n" - : [physmem] "=r" (physmem) - ); - - return physmem; -} - -extern void frame_low_arch_init(void); -extern void frame_high_arch_init(void); -extern void physmem_print(void); - -#endif /* __ASM__ */ - -#endif - -/** @} - */ Index: kernel/arch/ppc32/include/mm/km.h =================================================================== --- kernel/arch/ppc32/include/mm/km.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,53 +1,0 @@ -/* - * Copyright (c) 2011 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ppc32mm - * @{ - */ -/** @file - */ - -#ifndef KERN_ppc32_KM_H_ -#define KERN_ppc32_KM_H_ - -#include - -#define KM_PPC32_IDENTITY_START UINT32_C(0x80000000) -#define KM_PPC32_IDENTITY_SIZE UINT32_C(0x40000000) - -#define KM_PPC32_NON_IDENTITY_START UINT32_C(0xc0000000) -#define KM_PPC32_NON_IDENTITY_SIZE UINT32_C(0x40000000) - -extern void km_identity_arch_init(void); -extern void km_non_identity_arch_init(void); -extern bool km_is_non_identity_arch(uintptr_t); - -#endif - -/** @} - */ Index: kernel/arch/ppc32/include/mm/page.h =================================================================== --- kernel/arch/ppc32/include/mm/page.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,201 +1,0 @@ -/* - * Copyright (c) 2005 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ppc32mm - * @{ - */ -/** @file - */ - -#ifndef KERN_ppc32_PAGE_H_ -#define KERN_ppc32_PAGE_H_ - -#include -#include - -#define PAGE_WIDTH FRAME_WIDTH -#define PAGE_SIZE FRAME_SIZE - -#ifndef __ASM__ - #define KA2PA(x) (((uintptr_t) (x)) - 0x80000000) - #define PA2KA(x) (((uintptr_t) (x)) + 0x80000000) -#else - #define KA2PA(x) ((x) - 0x80000000) - #define PA2KA(x) ((x) + 0x80000000) -#endif - -/* - * Implementation of generic 4-level page table interface, - * the hardware Page Hash Table is used as cache. - * - * Page table layout: - * - 32-bit virtual addressess - * - Offset is 12 bits => pages are 4K long - * - PTL0 has 1024 entries (10 bits) - * - PTL1 is not used - * - PTL2 is not used - * - PLT3 has 1024 entries (10 bits) - */ - -/* Number of entries in each level. */ -#define PTL0_ENTRIES_ARCH 1024 -#define PTL1_ENTRIES_ARCH 0 -#define PTL2_ENTRIES_ARCH 0 -#define PTL3_ENTRIES_ARCH 1024 - -/* Page table sizes for each level. */ -#define PTL0_SIZE_ARCH ONE_FRAME -#define PTL1_SIZE_ARCH 0 -#define PTL2_SIZE_ARCH 0 -#define PTL3_SIZE_ARCH ONE_FRAME - -/* Macros calculating indices into page tables on each level. */ -#define PTL0_INDEX_ARCH(vaddr) (((vaddr) >> 22) & 0x3ff) -#define PTL1_INDEX_ARCH(vaddr) 0 -#define PTL2_INDEX_ARCH(vaddr) 0 -#define PTL3_INDEX_ARCH(vaddr) (((vaddr) >> 12) & 0x3ff) - -/* Get PTE address accessors for each level. */ -#define GET_PTL1_ADDRESS_ARCH(ptl0, i) \ - (((pte_t *) (ptl0))[(i)].pfn << 12) - -#define GET_PTL2_ADDRESS_ARCH(ptl1, i) \ - (ptl1) - -#define GET_PTL3_ADDRESS_ARCH(ptl2, i) \ - (ptl2) - -#define GET_FRAME_ADDRESS_ARCH(ptl3, i) \ - (((pte_t *) (ptl3))[(i)].pfn << 12) - -/* Set PTE address accessors for each level. */ -#define SET_PTL0_ADDRESS_ARCH(ptl0) - -#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) \ - (((pte_t *) (ptl0))[(i)].pfn = (a) >> 12) - -#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a) -#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a) - -#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) \ - (((pte_t *) (ptl3))[(i)].pfn = (a) >> 12) - -/* Get PTE flags accessors for each level. */ -#define GET_PTL1_FLAGS_ARCH(ptl0, i) \ - get_pt_flags((pte_t *) (ptl0), (size_t) (i)) - -#define GET_PTL2_FLAGS_ARCH(ptl1, i) \ - PAGE_PRESENT - -#define GET_PTL3_FLAGS_ARCH(ptl2, i) \ - PAGE_PRESENT - -#define GET_FRAME_FLAGS_ARCH(ptl3, i) \ - get_pt_flags((pte_t *) (ptl3), (size_t) (i)) - -/* Set PTE flags accessors for each level. */ -#define SET_PTL1_FLAGS_ARCH(ptl0, i, x) \ - set_pt_flags((pte_t *) (ptl0), (size_t) (i), (x)) - -#define SET_PTL2_FLAGS_ARCH(ptl1, i, x) -#define SET_PTL3_FLAGS_ARCH(ptl2, i, x) - -#define SET_FRAME_FLAGS_ARCH(ptl3, i, x) \ - set_pt_flags((pte_t *) (ptl3), (size_t) (i), (x)) - -/* Set PTE present accessors for each level. */ -#define SET_PTL1_PRESENT_ARCH(ptl0, i) \ - set_pt_present((pte_t *) (ptl0), (size_t) (i)) - -#define SET_PTL2_PRESENT_ARCH(ptl1, i) -#define SET_PTL3_PRESENT_ARCH(ptl2, i) - -#define SET_FRAME_PRESENT_ARCH(ptl3, i) \ - set_pt_present((pte_t *) (ptl3), (size_t) (i)) - -/* Macros for querying the last-level PTEs. */ -#define PTE_VALID_ARCH(pte) (*((uint32_t *) (pte)) != 0) -#define PTE_PRESENT_ARCH(pte) ((pte)->present != 0) -#define PTE_GET_FRAME_ARCH(pte) ((pte)->pfn << 12) -#define PTE_WRITABLE_ARCH(pte) 1 -#define PTE_EXECUTABLE_ARCH(pte) 1 - -#ifndef __ASM__ - -#include -#include - -/** Page Table Entry. */ -typedef struct { - unsigned int present : 1; /**< Present bit. */ - unsigned int page_write_through : 1; /**< Write thought caching. */ - unsigned int page_cache_disable : 1; /**< No caching. */ - unsigned int accessed : 1; /**< Accessed bit. */ - unsigned int global : 1; /**< Global bit. */ - unsigned int valid : 1; /**< Valid content even if not present. */ - unsigned int pfn : 20; /**< Physical frame number. */ -} pte_t; - -NO_TRACE static inline unsigned int get_pt_flags(pte_t *pt, size_t i) -{ - pte_t *entry = &pt[i]; - - return (((!entry->page_cache_disable) << PAGE_CACHEABLE_SHIFT) | - ((!entry->present) << PAGE_PRESENT_SHIFT) | - (1 << PAGE_USER_SHIFT) | - (1 << PAGE_READ_SHIFT) | - (1 << PAGE_WRITE_SHIFT) | - (1 << PAGE_EXEC_SHIFT) | - (entry->global << PAGE_GLOBAL_SHIFT)); -} - -NO_TRACE static inline void set_pt_flags(pte_t *pt, size_t i, int flags) -{ - pte_t *entry = &pt[i]; - - entry->page_cache_disable = !(flags & PAGE_CACHEABLE); - entry->present = !(flags & PAGE_NOT_PRESENT); - entry->global = (flags & PAGE_GLOBAL) != 0; - entry->valid = 1; -} - -NO_TRACE static inline void set_pt_present(pte_t *pt, size_t i) -{ - pte_t *entry = &pt[i]; - - entry->present = 1; -} - -extern void page_arch_init(void); - -#endif /* __ASM__ */ - -#endif - -/** @} - */ Index: kernel/arch/ppc32/include/mm/pht.h =================================================================== --- kernel/arch/ppc32/include/mm/pht.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,51 +1,0 @@ -/* - * Copyright (c) 2006 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ppc32mm - * @{ - */ -/** @file - */ - -#ifndef KERN_ppc32_PHT_H_ -#define KERN_ppc32_PHT_H_ - -#include -#include - -/* Forward declaration. */ -struct as; - -extern void pht_init(void); -extern void pht_refill(unsigned int, istate_t *); -extern void pht_invalidate(struct as *, uintptr_t, size_t); - -#endif - -/** @} - */ Index: kernel/arch/ppc32/include/mm/tlb.h =================================================================== --- kernel/arch/ppc32/include/mm/tlb.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,81 +1,0 @@ -/* - * Copyright (c) 2006 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ppc32mm - * @{ - */ -/** @file - */ - -#ifndef KERN_ppc32_TLB_H_ -#define KERN_ppc32_TLB_H_ - -#include - -#define WIMG_GUARDED 0x01 -#define WIMG_COHERENT 0x02 -#define WIMG_NO_CACHE 0x04 -#define WIMG_WRITETHRU 0x08 - -typedef struct { - unsigned int v : 1; /**< Valid */ - unsigned int vsid : 24; /**< Virtual Segment ID */ - unsigned int h : 1; /**< Primary/secondary hash */ - unsigned int api : 6; /**< Abbreviated Page Index */ - unsigned int rpn : 20; /**< Real Page Number */ - unsigned int reserved0 : 3; - unsigned int r : 1; /**< Reference */ - unsigned int c : 1; /**< Change */ - unsigned int wimg : 4; /**< Access control */ - unsigned int reserved1 : 1; - unsigned int pp : 2; /**< Page protection */ -} phte_t; - -typedef struct { - unsigned int v : 1; - unsigned int vsid : 24; - unsigned int reserved0 : 1; - unsigned int api : 6; -} ptehi_t; - -typedef struct { - unsigned int rpn : 20; - unsigned int xpn : 3; - unsigned int reserved0 : 1; - unsigned int c : 1; - unsigned int wimg : 4; - unsigned int x : 1; - unsigned int pp : 2; -} ptelo_t; - -extern void tlb_refill(unsigned int, istate_t *); - -#endif - -/** @} - */ Index: kernel/arch/ppc32/include/msr.h =================================================================== --- kernel/arch/ppc32/include/msr.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,54 +1,0 @@ -/* - * Copyright (c) 2005 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ppc32 - * @{ - */ -/** @file - */ - -#ifndef KERN_ppc32_MSR_H_ -#define KERN_ppc32_MSR_H_ - -/* MSR bits */ -#define MSR_DR (1 << 4) -#define MSR_IR (1 << 5) -#define MSR_PR (1 << 14) -#define MSR_EE (1 << 15) - -/* HID0 bits */ -#define HID0_STEN (1 << 24) -#define HID0_ICE (1 << 15) -#define HID0_DCE (1 << 14) -#define HID0_ICFI (1 << 11) -#define HID0_DCI (1 << 10) - -#endif - -/** @} - */ Index: kernel/arch/ppc32/include/proc/task.h =================================================================== --- kernel/arch/ppc32/include/proc/task.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,47 +1,0 @@ -/* - * Copyright (c) 2006 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ppc32proc - * @{ - */ -/** @file - */ - -#ifndef KERN_ppc32_TASK_H_ -#define KERN_ppc32_TASK_H_ - -typedef struct { -} task_arch_t; - -#define task_create_arch(t) -#define task_destroy_arch(t) - -#endif - -/** @} - */ Index: kernel/arch/ppc32/include/proc/thread.h =================================================================== --- kernel/arch/ppc32/include/proc/thread.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,48 +1,0 @@ -/* - * Copyright (c) 2005 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ppc32proc - * @{ - */ -/** @file - */ - -#ifndef KERN_ppc32_THREAD_H_ -#define KERN_ppc32_THREAD_H_ - -typedef struct { -} thread_arch_t; - -#define thr_constructor_arch(t) -#define thr_destructor_arch(t) -#define thread_create_arch(t) - -#endif - -/** @} - */ Index: kernel/arch/ppc32/include/types.h =================================================================== --- kernel/arch/ppc32/include/types.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,64 +1,0 @@ -/* - * Copyright (c) 2005 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ppc32 - * @{ - */ -/** @file - */ - -#ifndef KERN_ppc32_TYPES_H_ -#define KERN_ppc32_TYPES_H_ - -typedef uint32_t size_t; -typedef int32_t ssize_t; - -typedef uint32_t uintptr_t; -typedef uint32_t pfn_t; - -typedef uint32_t ipl_t; - -typedef uint32_t sysarg_t; -typedef int32_t native_t; -typedef uint32_t atomic_count_t; - -typedef struct { -} fncptr_t; - -#define INTN_C(c) INT32_C(c) -#define UINTN_C(c) UINT32_C(c) - -#define PRIdn PRId32 /**< Format for native_t. */ -#define PRIun PRIu32 /**< Format for sysarg_t. */ -#define PRIxn PRIx32 /**< Format for hexadecimal sysarg_t. */ -#define PRIua PRIu32 /**< Format for atomic_count_t. */ - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/arch.h =================================================================== --- kernel/arch/sparc64/include/arch.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,62 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64 - * @{ - */ -/** - * @file - * @brief Various sparc64-specific macros. - */ - -#ifndef KERN_sparc64_ARCH_H_ -#define KERN_sparc64_ARCH_H_ - -#include - -#if defined (SUN4U) -#include -#elif defined (SUN4V) -#include -#endif - -#define ASI_AIUP 0x10 /** Access to primary context with user privileges. */ -#define ASI_AIUS 0x11 /** Access to secondary context with user privileges. */ - -#define NWINDOWS 8 /** Number of register window sets. */ - -#ifndef __ASM__ - -extern void arch_pre_main(bootinfo_t *); - -#endif /* __ASM__ */ - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/arch/arch.h =================================================================== --- kernel/arch/sparc64/include/arch/arch.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/arch.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,62 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64 + * @{ + */ +/** + * @file + * @brief Various sparc64-specific macros. + */ + +#ifndef KERN_sparc64_ARCH_H_ +#define KERN_sparc64_ARCH_H_ + +#include + +#if defined (SUN4U) +#include +#elif defined (SUN4V) +#include +#endif + +#define ASI_AIUP 0x10 /** Access to primary context with user privileges. */ +#define ASI_AIUS 0x11 /** Access to secondary context with user privileges. */ + +#define NWINDOWS 8 /** Number of register window sets. */ + +#ifndef __ASM__ + +extern void arch_pre_main(bootinfo_t *); + +#endif /* __ASM__ */ + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/asm.h =================================================================== --- kernel/arch/sparc64/include/arch/asm.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/asm.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,557 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64 + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc64_ASM_H_ +#define KERN_sparc64_ASM_H_ + +#include +#include +#include +#include +#include +#include +#include +#include + +NO_TRACE static inline void pio_write_8(ioport8_t *port, uint8_t v) +{ + *port = v; + memory_barrier(); +} + +NO_TRACE static inline void pio_write_16(ioport16_t *port, uint16_t v) +{ + *port = v; + memory_barrier(); +} + +NO_TRACE static inline void pio_write_32(ioport32_t *port, uint32_t v) +{ + *port = v; + memory_barrier(); +} + +NO_TRACE static inline uint8_t pio_read_8(ioport8_t *port) +{ + uint8_t rv = *port; + memory_barrier(); + return rv; +} + +NO_TRACE static inline uint16_t pio_read_16(ioport16_t *port) +{ + uint16_t rv = *port; + memory_barrier(); + return rv; +} + +NO_TRACE static inline uint32_t pio_read_32(ioport32_t *port) +{ + uint32_t rv = *port; + memory_barrier(); + return rv; +} + +/** Read Processor State register. + * + * @return Value of PSTATE register. + * + */ +NO_TRACE static inline uint64_t pstate_read(void) +{ + uint64_t v; + + asm volatile ( + "rdpr %%pstate, %[v]\n" + : [v] "=r" (v) + ); + + return v; +} + +/** Write Processor State register. + * + * @param v New value of PSTATE register. + * + */ +NO_TRACE static inline void pstate_write(uint64_t v) +{ + asm volatile ( + "wrpr %[v], %[zero], %%pstate\n" + :: [v] "r" (v), + [zero] "i" (0) + ); +} + +/** Read TICK_compare Register. + * + * @return Value of TICK_comapre register. + * + */ +NO_TRACE static inline uint64_t tick_compare_read(void) +{ + uint64_t v; + + asm volatile ( + "rd %%tick_cmpr, %[v]\n" + : [v] "=r" (v) + ); + + return v; +} + +/** Write TICK_compare Register. + * + * @param v New value of TICK_comapre register. + * + */ +NO_TRACE static inline void tick_compare_write(uint64_t v) +{ + asm volatile ( + "wr %[v], %[zero], %%tick_cmpr\n" + :: [v] "r" (v), + [zero] "i" (0) + ); +} + +/** Read STICK_compare Register. + * + * @return Value of STICK_compare register. + * + */ +NO_TRACE static inline uint64_t stick_compare_read(void) +{ + uint64_t v; + + asm volatile ( + "rd %%asr25, %[v]\n" + : [v] "=r" (v) + ); + + return v; +} + +/** Write STICK_compare Register. + * + * @param v New value of STICK_comapre register. + * + */ +NO_TRACE static inline void stick_compare_write(uint64_t v) +{ + asm volatile ( + "wr %[v], %[zero], %%asr25\n" + :: [v] "r" (v), + [zero] "i" (0) + ); +} + +/** Read TICK Register. + * + * @return Value of TICK register. + * + */ +NO_TRACE static inline uint64_t tick_read(void) +{ + uint64_t v; + + asm volatile ( + "rdpr %%tick, %[v]\n" + : [v] "=r" (v) + ); + + return v; +} + +/** Write TICK Register. + * + * @param v New value of TICK register. + * + */ +NO_TRACE static inline void tick_write(uint64_t v) +{ + asm volatile ( + "wrpr %[v], %[zero], %%tick\n" + :: [v] "r" (v), + [zero] "i" (0) + ); +} + +/** Read FPRS Register. + * + * @return Value of FPRS register. + * + */ +NO_TRACE static inline uint64_t fprs_read(void) +{ + uint64_t v; + + asm volatile ( + "rd %%fprs, %[v]\n" + : [v] "=r" (v) + ); + + return v; +} + +/** Write FPRS Register. + * + * @param v New value of FPRS register. + * + */ +NO_TRACE static inline void fprs_write(uint64_t v) +{ + asm volatile ( + "wr %[v], %[zero], %%fprs\n" + :: [v] "r" (v), + [zero] "i" (0) + ); +} + +/** Read SOFTINT Register. + * + * @return Value of SOFTINT register. + * + */ +NO_TRACE static inline uint64_t softint_read(void) +{ + uint64_t v; + + asm volatile ( + "rd %%softint, %[v]\n" + : [v] "=r" (v) + ); + + return v; +} + +/** Write SOFTINT Register. + * + * @param v New value of SOFTINT register. + * + */ +NO_TRACE static inline void softint_write(uint64_t v) +{ + asm volatile ( + "wr %[v], %[zero], %%softint\n" + :: [v] "r" (v), + [zero] "i" (0) + ); +} + +/** Write CLEAR_SOFTINT Register. + * + * Bits set in CLEAR_SOFTINT register will be cleared in SOFTINT register. + * + * @param v New value of CLEAR_SOFTINT register. + * + */ +NO_TRACE static inline void clear_softint_write(uint64_t v) +{ + asm volatile ( + "wr %[v], %[zero], %%clear_softint\n" + :: [v] "r" (v), + [zero] "i" (0) + ); +} + +/** Write SET_SOFTINT Register. + * + * Bits set in SET_SOFTINT register will be set in SOFTINT register. + * + * @param v New value of SET_SOFTINT register. + * + */ +NO_TRACE static inline void set_softint_write(uint64_t v) +{ + asm volatile ( + "wr %[v], %[zero], %%set_softint\n" + :: [v] "r" (v), + [zero] "i" (0) + ); +} + +/** Enable interrupts. + * + * Enable interrupts and return previous + * value of IPL. + * + * @return Old interrupt priority level. + * + */ +NO_TRACE static inline ipl_t interrupts_enable(void) { + pstate_reg_t pstate; + uint64_t value = pstate_read(); + + pstate.value = value; + pstate.ie = true; + pstate_write(pstate.value); + + return (ipl_t) value; +} + +/** Disable interrupts. + * + * Disable interrupts and return previous + * value of IPL. + * + * @return Old interrupt priority level. + * + */ +NO_TRACE static inline ipl_t interrupts_disable(void) { + pstate_reg_t pstate; + uint64_t value = pstate_read(); + + pstate.value = value; + pstate.ie = false; + pstate_write(pstate.value); + + return (ipl_t) value; +} + +/** Restore interrupt priority level. + * + * Restore IPL. + * + * @param ipl Saved interrupt priority level. + * + */ +NO_TRACE static inline void interrupts_restore(ipl_t ipl) { + pstate_reg_t pstate; + + pstate.value = pstate_read(); + pstate.ie = ((pstate_reg_t) ipl).ie; + pstate_write(pstate.value); +} + +/** Return interrupt priority level. + * + * Return IPL. + * + * @return Current interrupt priority level. + * + */ +NO_TRACE static inline ipl_t interrupts_read(void) { + return (ipl_t) pstate_read(); +} + +/** Check interrupts state. + * + * @return True if interrupts are disabled. + * + */ +NO_TRACE static inline bool interrupts_disabled(void) +{ + pstate_reg_t pstate; + + pstate.value = pstate_read(); + return !pstate.ie; +} + +/** Return base address of current stack. + * + * Return the base address of the current stack. + * The stack is assumed to be STACK_SIZE bytes long. + * The stack must start on page boundary. + * + */ +NO_TRACE static inline uintptr_t get_stack_base(void) +{ + uintptr_t unbiased_sp; + + asm volatile ( + "add %%sp, %[stack_bias], %[unbiased_sp]\n" + : [unbiased_sp] "=r" (unbiased_sp) + : [stack_bias] "i" (STACK_BIAS) + ); + + return ALIGN_DOWN(unbiased_sp, STACK_SIZE); +} + +/** Read Version Register. + * + * @return Value of VER register. + * + */ +NO_TRACE static inline uint64_t ver_read(void) +{ + uint64_t v; + + asm volatile ( + "rdpr %%ver, %[v]\n" + : [v] "=r" (v) + ); + + return v; +} + +/** Read Trap Program Counter register. + * + * @return Current value in TPC. + * + */ +NO_TRACE static inline uint64_t tpc_read(void) +{ + uint64_t v; + + asm volatile ( + "rdpr %%tpc, %[v]\n" + : [v] "=r" (v) + ); + + return v; +} + +/** Read Trap Level register. + * + * @return Current value in TL. + * + */ +NO_TRACE static inline uint64_t tl_read(void) +{ + uint64_t v; + + asm volatile ( + "rdpr %%tl, %[v]\n" + : [v] "=r" (v) + ); + + return v; +} + +/** Read Trap Base Address register. + * + * @return Current value in TBA. + * + */ +NO_TRACE static inline uint64_t tba_read(void) +{ + uint64_t v; + + asm volatile ( + "rdpr %%tba, %[v]\n" + : [v] "=r" (v) + ); + + return v; +} + +/** Write Trap Base Address register. + * + * @param v New value of TBA. + * + */ +NO_TRACE static inline void tba_write(uint64_t v) +{ + asm volatile ( + "wrpr %[v], %[zero], %%tba\n" + :: [v] "r" (v), + [zero] "i" (0) + ); +} + +/** Load uint64_t from alternate space. + * + * @param asi ASI determining the alternate space. + * @param va Virtual address within the ASI. + * + * @return Value read from the virtual address in + * the specified address space. + * + */ +NO_TRACE static inline uint64_t asi_u64_read(asi_t asi, uintptr_t va) +{ + uint64_t v; + + asm volatile ( + "ldxa [%[va]] %[asi], %[v]\n" + : [v] "=r" (v) + : [va] "r" (va), + [asi] "i" ((unsigned int) asi) + ); + + return v; +} + +/** Store uint64_t to alternate space. + * + * @param asi ASI determining the alternate space. + * @param va Virtual address within the ASI. + * @param v Value to be written. + * + */ +NO_TRACE static inline void asi_u64_write(asi_t asi, uintptr_t va, uint64_t v) +{ + asm volatile ( + "stxa %[v], [%[va]] %[asi]\n" + :: [v] "r" (v), + [va] "r" (va), + [asi] "i" ((unsigned int) asi) + : "memory" + ); +} + +/** Flush all valid register windows to memory. */ +NO_TRACE static inline void flushw(void) +{ + asm volatile ("flushw\n"); +} + +/** Switch to nucleus by setting TL to 1. */ +NO_TRACE static inline void nucleus_enter(void) +{ + asm volatile ("wrpr %g0, 1, %tl\n"); +} + +/** Switch from nucleus by setting TL to 0. */ +NO_TRACE static inline void nucleus_leave(void) +{ + asm volatile ("wrpr %g0, %g0, %tl\n"); +} + +extern void cpu_halt(void) __attribute__((noreturn)); +extern void cpu_sleep(void); +extern void asm_delay_loop(const uint32_t usec); + +extern uint64_t read_from_ag_g6(void); +extern uint64_t read_from_ag_g7(void); +extern void write_to_ag_g6(uint64_t val); +extern void write_to_ag_g7(uint64_t val); +extern void write_to_ig_g6(uint64_t val); + +extern void switch_to_userspace(uint64_t pc, uint64_t sp, uint64_t uarg); + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/atomic.h =================================================================== --- kernel/arch/sparc64/include/arch/atomic.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/atomic.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,156 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64 + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc64_ATOMIC_H_ +#define KERN_sparc64_ATOMIC_H_ + +#include +#include +#include +#include + +/** Atomic add operation. + * + * Use atomic compare and swap operation to atomically add signed value. + * + * @param val Atomic variable. + * @param i Signed value to be added. + * + * @return Value of the atomic variable as it existed before addition. + * + */ +NO_TRACE static inline atomic_count_t atomic_add(atomic_t *val, + atomic_count_t i) +{ + atomic_count_t a; + atomic_count_t b; + + do { + volatile uintptr_t ptr = (uintptr_t) &val->count; + + a = *((atomic_count_t *) ptr); + b = a + i; + + asm volatile ( + "casx %0, %2, %1\n" + : "+m" (*((atomic_count_t *) ptr)), + "+r" (b) + : "r" (a) + ); + } while (a != b); + + return a; +} + +NO_TRACE static inline atomic_count_t atomic_preinc(atomic_t *val) +{ + return atomic_add(val, 1) + 1; +} + +NO_TRACE static inline atomic_count_t atomic_postinc(atomic_t *val) +{ + return atomic_add(val, 1); +} + +NO_TRACE static inline atomic_count_t atomic_predec(atomic_t *val) +{ + return atomic_add(val, -1) - 1; +} + +NO_TRACE static inline atomic_count_t atomic_postdec(atomic_t *val) +{ + return atomic_add(val, -1); +} + +NO_TRACE static inline void atomic_inc(atomic_t *val) +{ + (void) atomic_add(val, 1); +} + +NO_TRACE static inline void atomic_dec(atomic_t *val) +{ + (void) atomic_add(val, -1); +} + +NO_TRACE static inline atomic_count_t test_and_set(atomic_t *val) +{ + atomic_count_t v = 1; + volatile uintptr_t ptr = (uintptr_t) &val->count; + + asm volatile ( + "casx %0, %2, %1\n" + : "+m" (*((atomic_count_t *) ptr)), + "+r" (v) + : "r" (0) + ); + + return v; +} + +NO_TRACE static inline void atomic_lock_arch(atomic_t *val) +{ + atomic_count_t tmp1 = 1; + atomic_count_t tmp2 = 0; + + volatile uintptr_t ptr = (uintptr_t) &val->count; + + preemption_disable(); + + asm volatile ( + "0:\n" + "casx %0, %3, %1\n" + "brz %1, 2f\n" + "nop\n" + "1:\n" + "ldx %0, %2\n" + "brz %2, 0b\n" + "nop\n" + "ba,a %%xcc, 1b\n" + "2:\n" + : "+m" (*((atomic_count_t *) ptr)), + "+r" (tmp1), + "+r" (tmp2) + : "r" (0) + ); + + /* + * Prevent critical section code from bleeding out this way up. + */ + CS_ENTER_BARRIER(); +} + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/barrier.h =================================================================== --- kernel/arch/sparc64/include/arch/barrier.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/barrier.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,150 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64 + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc64_BARRIER_H_ +#define KERN_sparc64_BARRIER_H_ + +#include + +/* + * Our critical section barriers are prepared for the weakest RMO memory model. + */ +#define CS_ENTER_BARRIER() \ + asm volatile ( \ + "membar #LoadLoad | #LoadStore\n" \ + ::: "memory" \ + ) + +#define CS_LEAVE_BARRIER() \ + asm volatile ( \ + "membar #StoreStore\n" \ + "membar #LoadStore\n" \ + ::: "memory" \ + ) + +#define memory_barrier() \ + asm volatile ( \ + "membar #LoadLoad | #StoreStore\n" \ + ::: "memory" \ + ) + +#define read_barrier() \ + asm volatile ( \ + "membar #LoadLoad\n" \ + ::: "memory" \ + ) + +#define write_barrier() \ + asm volatile ( \ + "membar #StoreStore\n" \ + ::: "memory" \ + ) + +#define flush(a) \ + asm volatile ( \ + "flush %[reg]\n" \ + :: [reg] "r" ((a)) \ + : "memory" \ + ) + +/** Flush Instruction pipeline. */ +NO_TRACE static inline void flush_pipeline(void) +{ + uint64_t pc; + + /* + * The FLUSH instruction takes address parameter. + * As such, it may trap if the address is not found in DTLB. + * + * The entire kernel text is mapped by a locked ITLB and + * DTLB entries. Therefore, when this function is called, + * the %pc register will always be in the range mapped by + * DTLB. + * + */ + + asm volatile ( + "rd %%pc, %[pc]\n" + "flush %[pc]\n" + : [pc] "=&r" (pc) + ); +} + +/** Memory Barrier instruction. */ +NO_TRACE static inline void membar(void) +{ + asm volatile ( + "membar #Sync\n" + ); +} + +#if defined (US) + +#define FLUSH_INVAL_MIN 4 + +#define smc_coherence(a) \ + do { \ + write_barrier(); \ + flush((a)); \ + } while (0) + +#define smc_coherence_block(a, l) \ + do { \ + unsigned long i; \ + write_barrier(); \ + \ + for (i = 0; i < (l); i += FLUSH_INVAL_MIN) \ + flush((void *)(a) + i); \ + } while (0) + +#elif defined (US3) + +#define smc_coherence(a) \ + do { \ + write_barrier(); \ + flush_pipeline(); \ + } while (0) + +#define smc_coherence_block(a, l) \ + do { \ + write_barrier(); \ + flush_pipeline(); \ + } while (0) + +#endif /* defined(US3) */ + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/boot/boot.h =================================================================== --- kernel/arch/sparc64/include/arch/boot/boot.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/boot/boot.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,96 @@ +/* + * Copyright (c) 2006 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64 + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc64_BOOT_H_ +#define KERN_sparc64_BOOT_H_ + +#define VMA 0x400000 +#define LMA VMA + +#ifndef __ASM__ +#ifndef __LINKER__ + +#include +#include +#include + +#define TASKMAP_MAX_RECORDS 32 +#define MEMMAP_MAX_RECORDS 32 + +#define BOOTINFO_TASK_NAME_BUFLEN 32 + +typedef struct { + void *addr; + size_t size; + char name[BOOTINFO_TASK_NAME_BUFLEN]; +} utask_t; + +typedef struct { + size_t cnt; + utask_t tasks[TASKMAP_MAX_RECORDS]; +} taskmap_t; + +typedef struct { + void *start; + size_t size; +} memzone_t; + +typedef struct { + uint64_t total; + size_t cnt; + memzone_t zones[MEMMAP_MAX_RECORDS]; +} memmap_t; + +/** Bootinfo structure. + * + * Must be in sync with bootinfo structure used by the boot loader. + * + */ +typedef struct { + uintptr_t physmem_start; + taskmap_t taskmap; + memmap_t memmap; + ballocs_t ballocs; + ofw_tree_node_t *ofw_root; +} bootinfo_t; + +extern memmap_t memmap; + +#endif +#endif + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/console.h =================================================================== --- kernel/arch/sparc64/include/arch/console.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/console.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,44 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64 + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc64_CONSOLE_H_ +#define KERN_sparc64_CONSOLE_H_ + +extern void kkbdpoll(void *arg); +extern void standalone_sparc64_console_init(void); + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/context.h =================================================================== --- kernel/arch/sparc64/include/arch/context.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/context.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,81 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64 + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc64_CONTEXT_H_ +#define KERN_sparc64_CONTEXT_H_ + +#include +#include +#include + +#define SP_DELTA (STACK_WINDOW_SAVE_AREA_SIZE + STACK_ARG_SAVE_AREA_SIZE) + +#define context_set(c, _pc, stack, size) \ + do { \ + (c)->pc = ((uintptr_t) _pc) - 8; \ + (c)->sp = ((uintptr_t) stack) + ALIGN_UP((size), \ + STACK_ALIGNMENT) - (STACK_BIAS + SP_DELTA); \ + (c)->fp = -STACK_BIAS; \ + } while (0) + +/* + * Save only registers that must be preserved across + * function calls. + */ +typedef struct { + uintptr_t sp; /* %o6 */ + uintptr_t pc; /* %o7 */ + uint64_t i0; + uint64_t i1; + uint64_t i2; + uint64_t i3; + uint64_t i4; + uint64_t i5; + uintptr_t fp; /* %i6 */ + uintptr_t i7; + uint64_t l0; + uint64_t l1; + uint64_t l2; + uint64_t l3; + uint64_t l4; + uint64_t l5; + uint64_t l6; + uint64_t l7; + ipl_t ipl; +} context_t; + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/context_offset.h =================================================================== --- kernel/arch/sparc64/include/arch/context_offset.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/context_offset.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,107 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef KERN_sparc64_CONTEXT_OFFSET_H_ +#define KERN_sparc64_CONTEXT_OFFSET_H_ + +#define OFFSET_SP 0x0 +#define OFFSET_PC 0x8 +#define OFFSET_I0 0x10 +#define OFFSET_I1 0x18 +#define OFFSET_I2 0x20 +#define OFFSET_I3 0x28 +#define OFFSET_I4 0x30 +#define OFFSET_I5 0x38 +#define OFFSET_FP 0x40 +#define OFFSET_I7 0x48 +#define OFFSET_L0 0x50 +#define OFFSET_L1 0x58 +#define OFFSET_L2 0x60 +#define OFFSET_L3 0x68 +#define OFFSET_L4 0x70 +#define OFFSET_L5 0x78 +#define OFFSET_L6 0x80 +#define OFFSET_L7 0x88 + +#ifndef KERNEL +# define OFFSET_TP 0x90 +#endif + +#ifdef __ASM__ + +.macro CONTEXT_SAVE_ARCH_CORE ctx:req + stx %sp, [\ctx + OFFSET_SP] + stx %o7, [\ctx + OFFSET_PC] + stx %i0, [\ctx + OFFSET_I0] + stx %i1, [\ctx + OFFSET_I1] + stx %i2, [\ctx + OFFSET_I2] + stx %i3, [\ctx + OFFSET_I3] + stx %i4, [\ctx + OFFSET_I4] + stx %i5, [\ctx + OFFSET_I5] + stx %fp, [\ctx + OFFSET_FP] + stx %i7, [\ctx + OFFSET_I7] + stx %l0, [\ctx + OFFSET_L0] + stx %l1, [\ctx + OFFSET_L1] + stx %l2, [\ctx + OFFSET_L2] + stx %l3, [\ctx + OFFSET_L3] + stx %l4, [\ctx + OFFSET_L4] + stx %l5, [\ctx + OFFSET_L5] + stx %l6, [\ctx + OFFSET_L6] + stx %l7, [\ctx + OFFSET_L7] +#ifndef KERNEL + stx %g7, [\ctx + OFFSET_TP] +#endif +.endm + +.macro CONTEXT_RESTORE_ARCH_CORE ctx:req + ldx [\ctx + OFFSET_SP], %sp + ldx [\ctx + OFFSET_PC], %o7 + ldx [\ctx + OFFSET_I0], %i0 + ldx [\ctx + OFFSET_I1], %i1 + ldx [\ctx + OFFSET_I2], %i2 + ldx [\ctx + OFFSET_I3], %i3 + ldx [\ctx + OFFSET_I4], %i4 + ldx [\ctx + OFFSET_I5], %i5 + ldx [\ctx + OFFSET_FP], %fp + ldx [\ctx + OFFSET_I7], %i7 + ldx [\ctx + OFFSET_L0], %l0 + ldx [\ctx + OFFSET_L1], %l1 + ldx [\ctx + OFFSET_L2], %l2 + ldx [\ctx + OFFSET_L3], %l3 + ldx [\ctx + OFFSET_L4], %l4 + ldx [\ctx + OFFSET_L5], %l5 + ldx [\ctx + OFFSET_L6], %l6 + ldx [\ctx + OFFSET_L7], %l7 +#ifndef KERNEL + ldx [\ctx + OFFSET_TP], %g7 +#endif +.endm + +#endif /* __ASM__ */ + +#endif Index: kernel/arch/sparc64/include/arch/cpu.h =================================================================== --- kernel/arch/sparc64/include/arch/cpu.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/cpu.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,73 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64 + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc64_CPU_H_ +#define KERN_sparc64_CPU_H_ + +#define MANUF_FUJITSU 0x04 +#define MANUF_ULTRASPARC 0x17 /**< UltraSPARC I, UltraSPARC II */ +#define MANUF_SUN 0x3e + +#define IMPL_ULTRASPARCI 0x10 +#define IMPL_ULTRASPARCII 0x11 +#define IMPL_ULTRASPARCII_I 0x12 +#define IMPL_ULTRASPARCII_E 0x13 +#define IMPL_ULTRASPARCIII 0x14 +#define IMPL_ULTRASPARCIII_PLUS 0x15 +#define IMPL_ULTRASPARCIII_I 0x16 +#define IMPL_ULTRASPARCIV 0x18 +#define IMPL_ULTRASPARCIV_PLUS 0x19 + +#define IMPL_SPARC64V 0x5 + +#ifndef __ASM__ + +#include +#include +#include +#include + +#if defined (SUN4U) +#include +#elif defined (SUN4V) +#include +#endif + + +#endif + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/cpu_family.h =================================================================== --- kernel/arch/sparc64/include/arch/cpu_family.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/cpu_family.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,83 @@ +/* + * Copyright (c) 2008 Pavel Rimsky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64 + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc64_CPU_FAMILY_H_ +#define KERN_sparc64_CPU_FAMILY_H_ + +#include +#include +#include +#include + +/** + * Find the processor (sub)family. + * + * @return true iff the CPU belongs to the US family + */ +static inline bool is_us(void) +{ + int impl = ((ver_reg_t) ver_read()).impl; + return (impl == IMPL_ULTRASPARCI) || (impl == IMPL_ULTRASPARCII) || + (impl == IMPL_ULTRASPARCII_I) || (impl == IMPL_ULTRASPARCII_E); +} + +/** + * Find the processor (sub)family. + * + * @return true iff the CPU belongs to the US-III subfamily + */ +static inline bool is_us_iii(void) +{ + int impl = ((ver_reg_t) ver_read()).impl; + return (impl == IMPL_ULTRASPARCIII) || + (impl == IMPL_ULTRASPARCIII_PLUS) || + (impl == IMPL_ULTRASPARCIII_I); +} + +/** + * Find the processor (sub)family. + * + * @return true iff the CPU belongs to the US-IV subfamily + */ +static inline bool is_us_iv(void) +{ + int impl = ((ver_reg_t) ver_read()).impl; + return (impl == IMPL_ULTRASPARCIV) || (impl == IMPL_ULTRASPARCIV_PLUS); +} + +#endif + +/** @} + */ + Index: kernel/arch/sparc64/include/arch/cpu_node.h =================================================================== --- kernel/arch/sparc64/include/arch/cpu_node.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/cpu_node.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,59 @@ +/* + * Copyright (c) 2005 Pavel Rimsky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64 + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc64_CPU_NODE_H_ +#define KERN_sparc64_CPU_NODE_H_ + +#include + + +/** Finds the parent node of all the CPU nodes (nodes named "cpu" or "cmp"). + * + * Depending on the machine type (and possibly the OFW version), CPUs can be + * at "/" or at "/ssm@0,0". + */ +static inline ofw_tree_node_t *cpus_parent(void) +{ + ofw_tree_node_t *parent; + parent = ofw_tree_find_child(ofw_tree_lookup("/"), "ssm@0,0"); + if (parent == NULL) + parent = ofw_tree_lookup("/"); + return parent; +} + +#endif + +/** @} + */ + Index: kernel/arch/sparc64/include/arch/cycle.h =================================================================== --- kernel/arch/sparc64/include/arch/cycle.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/cycle.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,49 @@ +/* + * Copyright (c) 2006 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64 + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc64_CYCLE_H_ +#define KERN_sparc64_CYCLE_H_ + +#include +#include + +NO_TRACE static inline uint64_t get_cycle(void) +{ + return tick_read(); +} + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/drivers/fb.h =================================================================== --- kernel/arch/sparc64/include/arch/drivers/fb.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/drivers/fb.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,41 @@ +/* + * Copyright (c) 2006 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64 + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc64_FB_H_ +#define KERN_sparc64_FB_H_ + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/drivers/kbd.h =================================================================== --- kernel/arch/sparc64/include/arch/drivers/kbd.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/drivers/kbd.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,46 @@ +/* + * Copyright (c) 2006 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64 + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc64_KBD_H_ +#define KERN_sparc64_KBD_H_ + +#include +#include + +extern void kbd_init(ofw_tree_node_t *node); + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/drivers/niagara.h =================================================================== --- kernel/arch/sparc64/include/arch/drivers/niagara.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/drivers/niagara.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,54 @@ +/* + * Copyright (c) 2008 Pavel Rimsky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64 + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc64_NIAGARA_H +#define KERN_sparc64_NIAGARA_H + +#include +#include + +typedef struct { + thread_t *thread; + indev_t *srlnin; +} niagara_instance_t; + +char niagara_getc(void); +void niagara_grab(void); +void niagara_release(void); +niagara_instance_t *niagarain_init(void); + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/drivers/pci.h =================================================================== --- kernel/arch/sparc64/include/arch/drivers/pci.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/drivers/pci.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,71 @@ +/* + * Copyright (c) 2006 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64 + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc64_PCI_H_ +#define KERN_sparc64_PCI_H_ + +#include +#include +#include +#include + +typedef enum pci_model pci_model_t; +typedef struct pci pci_t; +typedef struct pci_operations pci_operations_t; + +enum pci_model { + PCI_UNKNOWN, + PCI_SABRE, + PCI_PSYCHO +}; + +struct pci_operations { + void (* enable_interrupt)(pci_t *, int); + void (* clear_interrupt)(pci_t *, int); +}; + +struct pci { + pci_model_t model; + pci_operations_t *op; + volatile uint64_t *reg; /**< Registers including interrupt registers. */ +}; + +extern pci_t *pci_init(ofw_tree_node_t *); +extern void pci_enable_interrupt(pci_t *, int); +extern void pci_clear_interrupt(void *, int); + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/drivers/scr.h =================================================================== --- kernel/arch/sparc64/include/arch/drivers/scr.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/drivers/scr.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,57 @@ +/* + * Copyright (c) 2006 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64 + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc64_SCR_H_ +#define KERN_sparc64_SCR_H_ + +#include +#include + +typedef enum { + SCR_UNKNOWN, + SCR_ATYFB, + SCR_FFB, + SCR_CGSIX, + SCR_XVR, + SCR_QEMU_VGA +} scr_type_t; + +extern scr_type_t scr_type; + +extern void scr_init(ofw_tree_node_t *node); + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/drivers/tick.h =================================================================== --- kernel/arch/sparc64/include/arch/drivers/tick.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/drivers/tick.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,58 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64 + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc64_TICK_H_ +#define KERN_sparc64_TICK_H_ + +#include +#include + +/* mask of the "counter" field of the Tick register */ +#define TICK_COUNTER_MASK (~(1l << 63)) + +extern void tick_init(void); +extern void tick_interrupt(unsigned int, istate_t *); + +/** + * Reads the Tick register counter. + */ +static inline uint64_t tick_counter_read(void) +{ + return TICK_COUNTER_MASK & tick_read(); +} + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/elf.h =================================================================== --- kernel/arch/sparc64/include/arch/elf.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/elf.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2006 Sergey Bondari + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64 + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc64_ELF_H_ +#define KERN_sparc64_ELF_H_ + +#define ELF_MACHINE EM_SPARCV9 +#define ELF_DATA_ENCODING ELFDATA2MSB +#define ELF_CLASS ELFCLASS64 + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/faddr.h =================================================================== --- kernel/arch/sparc64/include/arch/faddr.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/faddr.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64 + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc64_FADDR_H_ +#define KERN_sparc64_FADDR_H_ + +#include + +#define FADDR(fptr) ((uintptr_t) (fptr)) + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/fpu_context.h =================================================================== --- kernel/arch/sparc64/include/arch/fpu_context.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/fpu_context.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,50 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64 + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc64_FPU_CONTEXT_H_ +#define KERN_sparc64_FPU_CONTEXT_H_ + +#include + +#define FPU_CONTEXT_ALIGN 8 + +typedef struct { + uint64_t d[32]; + uint64_t fsr; +} fpu_context_t; + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/interrupt.h =================================================================== --- kernel/arch/sparc64/include/arch/interrupt.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/interrupt.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,55 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64interrupt sparc64 + * @ingroup interrupt + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc64_INTERRUPT_H_ +#define KERN_sparc64_INTERRUPT_H_ + +#include +#include + +#define IVT_ITEMS 15 +#define IVT_FIRST 1 + +/* This needs to be defined for inter-architecture API portability. */ +#define VECTOR_TLB_SHOOTDOWN_IPI 0 + +enum { + IPI_TLB_SHOOTDOWN = VECTOR_TLB_SHOOTDOWN_IPI +}; + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/istate.h =================================================================== --- kernel/arch/sparc64/include/arch/istate.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/istate.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,82 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64interrupt sparc64 + * @ingroup interrupt + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc64_ISTATE_H_ +#define KERN_sparc64_ISTATE_H_ + +#include + +#ifdef KERNEL + +#include + +#else /* KERNEL */ + +#include + +#endif /* KERNEL */ + +typedef struct istate { + uint64_t tnpc; + uint64_t tpc; + uint64_t tstate; +} istate_t; + +NO_TRACE static inline void istate_set_retaddr(istate_t *istate, + uintptr_t retaddr) +{ + istate->tpc = retaddr; +} + +NO_TRACE static inline int istate_from_uspace(istate_t *istate) +{ + return !(istate->tstate & TSTATE_PRIV_BIT); +} + +NO_TRACE static inline uintptr_t istate_get_pc(istate_t *istate) +{ + return istate->tpc; +} + +NO_TRACE static inline uintptr_t istate_get_fp(istate_t *istate) +{ + /* TODO */ + return 0; +} + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/mm/as.h =================================================================== --- kernel/arch/sparc64/include/arch/mm/as.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/mm/as.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,51 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64mm + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc64_AS_H_ +#define KERN_sparc64_AS_H_ + +#if defined (SUN4U) + +#include + +#elif defined (SUN4V) + +#include + +#endif + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/mm/asid.h =================================================================== --- kernel/arch/sparc64/include/arch/mm/asid.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/mm/asid.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,50 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64mm + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc64_ASID_H_ +#define KERN_sparc64_ASID_H_ + +#include + +/* + * On SPARC, Context means the same thing as ASID trough out the kernel. + */ +typedef uint16_t asid_t; + +#define ASID_MAX_ARCH 8191 /* 2^13 - 1 */ + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/mm/cache_spec.h =================================================================== --- kernel/arch/sparc64/include/arch/mm/cache_spec.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/mm/cache_spec.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,60 @@ +/* + * Copyright (c) 2008 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64mm + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc64_CACHE_SPEC_H_ +#define KERN_sparc64_CACHE_SPEC_H_ + +/* + * The following macros are valid for the following processors: + * + * UltraSPARC, UltraSPARC II, UltraSPARC IIi, UltraSPARC III, + * UltraSPARC III+, UltraSPARC IV, UltraSPARC IV+ + * + * Should we support other UltraSPARC processors, we need to make sure that + * the macros are defined correctly for them. + */ + +#if defined (US) + #define DCACHE_SIZE (16 * 1024) +#elif defined (US3) + #define DCACHE_SIZE (64 * 1024) +#endif + +#define DCACHE_LINE_SIZE 32 +#define DCACHE_TAG_SHIFT 2 + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/mm/frame.h =================================================================== --- kernel/arch/sparc64/include/arch/mm/frame.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/mm/frame.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,51 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64mm + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc64_FRAME_H_ +#define KERN_sparc64_FRAME_H_ + +#if defined (SUN4U) + +#include + +#elif defined (SUN4V) + +#include + +#endif + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/mm/km.h =================================================================== --- kernel/arch/sparc64/include/arch/mm/km.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/mm/km.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,48 @@ +/* + * Copyright (c) 2011 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64mm + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc64_KM_H_ +#define KERN_sparc64_KM_H_ + +#if defined (SUN4U) +#include +#elif defined (SUN4V) +#include +#endif + + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/mm/mmu.h =================================================================== --- kernel/arch/sparc64/include/arch/mm/mmu.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/mm/mmu.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,48 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64mm + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc64_MMU_H_ +#define KERN_sparc64_MMU_H_ + +#if defined (SUN4U) +#include +#elif defined (SUN4V) +#include +#endif + + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/mm/page.h =================================================================== --- kernel/arch/sparc64/include/arch/mm/page.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/mm/page.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,80 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64mm + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc64_PAGE_H_ +#define KERN_sparc64_PAGE_H_ + +#include + +/* + * On the TLB and TSB level, we still use 8K pages, which are supported by the + * MMU. + */ +#define MMU_PAGE_WIDTH MMU_FRAME_WIDTH +#define MMU_PAGE_SIZE MMU_FRAME_SIZE + +/* + * On the page table level, we use 16K pages. 16K pages are not supported by + * the MMU but we emulate them with pairs of 8K pages. + */ +#define PAGE_WIDTH FRAME_WIDTH +#define PAGE_SIZE FRAME_SIZE + +#define MMU_PAGES_PER_PAGE (1 << (PAGE_WIDTH - MMU_PAGE_WIDTH)) + +#ifndef __ASM__ + +#include + +extern uintptr_t physmem_base; + +#define KA2PA(x) (((uintptr_t) (x)) + physmem_base) +#define PA2KA(x) (((uintptr_t) (x)) - physmem_base) + +typedef union { + uintptr_t address; + struct { + uint64_t vpn : 51; /**< Virtual Page Number. */ + unsigned offset : 13; /**< Offset. */ + } __attribute__ ((packed)); +} page_address_t; + +extern void page_arch_init(void); + +#endif /* !def __ASM__ */ + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/mm/pagesize.h =================================================================== --- kernel/arch/sparc64/include/arch/mm/pagesize.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/mm/pagesize.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * Copyright (c) 2008 Pavel Rimsky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64mm + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc64_PAGESIZE_H +#define KERN_sparc64_PAGESIZE_H + +/** Page sizes. */ +#define PAGESIZE_8K 0 +#define PAGESIZE_64K 1 +#define PAGESIZE_512K 2 +#define PAGESIZE_4M 3 + +#endif Index: kernel/arch/sparc64/include/arch/mm/sun4u/as.h =================================================================== --- kernel/arch/sparc64/include/arch/mm/sun4u/as.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/mm/sun4u/as.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,94 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64mm + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc64_sun4u_AS_H_ +#define KERN_sparc64_sun4u_AS_H_ + +#include + +#define KERNEL_ADDRESS_SPACE_SHADOWED_ARCH 1 + +#define KERNEL_ADDRESS_SPACE_START_ARCH UINT64_C(0x0000000000000000) +#define KERNEL_ADDRESS_SPACE_END_ARCH UINT64_C(0xffffffffffffffff) +#define USER_ADDRESS_SPACE_START_ARCH UINT64_C(0x0000000000000000) +#define USER_ADDRESS_SPACE_END_ARCH UINT64_C(0xffffffffffffffff) + +#ifdef CONFIG_TSB + +/** TSB Tag Target register. */ +typedef union tsb_tag_target { + uint64_t value; + struct { + unsigned invalid : 1; /**< Invalidated by software. */ + unsigned : 2; + unsigned context : 13; /**< Software ASID. */ + unsigned : 6; + uint64_t va_tag : 42; /**< Virtual address bits <63:22>. */ + } __attribute__ ((packed)); +} tsb_tag_target_t; + +/** TSB entry. */ +typedef struct tsb_entry { + tsb_tag_target_t tag; + tte_data_t data; +} __attribute__ ((packed)) tsb_entry_t; + +typedef struct { + tsb_entry_t *itsb; + tsb_entry_t *dtsb; +} as_arch_t; + +#else + +typedef struct { +} as_arch_t; + +#endif /* CONFIG_TSB */ + +#include + +#ifdef CONFIG_TSB +#include +#define as_invalidate_translation_cache(as, page, cnt) \ + tsb_invalidate((as), (page), (cnt)) +#else +#define as_invalidate_translation_cache(as, page, cnt) +#endif + +extern void as_arch_init(void); + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/mm/sun4u/frame.h =================================================================== --- kernel/arch/sparc64/include/arch/mm/sun4u/frame.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/mm/sun4u/frame.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,85 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64mm + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc64_SUN4U_FRAME_H_ +#define KERN_sparc64_SUN4U_FRAME_H_ + +/* + * Page size supported by the MMU. + * For 8K there is the nasty illegal virtual aliasing problem. + * Therefore, the kernel uses 8K only internally on the TLB and TSB levels. + */ +#define MMU_FRAME_WIDTH 13 /* 8K */ +#define MMU_FRAME_SIZE (1 << MMU_FRAME_WIDTH) + +/* + * Page size exported to the generic memory management subsystems. + * This page size is not directly supported by the MMU, but we can emulate + * each 16K page with a pair of adjacent 8K pages. + */ +#define FRAME_WIDTH 14 /* 16K */ +#define FRAME_SIZE (1 << FRAME_WIDTH) + +#ifndef __ASM__ + +#include + +union frame_address { + uintptr_t address; + struct { +#if defined (US) + unsigned : 23; + uint64_t pfn : 28; /**< Physical Frame Number. */ +#elif defined (US3) + unsigned : 21; + uint64_t pfn : 30; /**< Physical Frame Number. */ +#endif + unsigned offset : 13; /**< Offset. */ + } __attribute__ ((packed)); +}; + +typedef union frame_address frame_address_t; + +extern uintptr_t end_of_identity; + +extern void frame_low_arch_init(void); +extern void frame_high_arch_init(void); +#define physmem_print() + +#endif + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/mm/sun4u/km.h =================================================================== --- kernel/arch/sparc64/include/arch/mm/sun4u/km.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/mm/sun4u/km.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,62 @@ +/* + * Copyright (c) 2011 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64mm + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc64_sun4u_KM_H_ +#define KERN_sparc64_sun4u_KM_H_ + +#include + +/* + * Be conservative and assume the 44-bit virtual address width as found + * on the UltraSPARC CPU, even when running on a newer CPU, such as + * UltraSPARC III, which has the full 64-bit virtual address width. + * + * Do not use the 4 GiB area on either side of the VA hole to meet the + * limitations of the UltraSPARC CPU. + */ + +#define KM_SPARC64_US_IDENTITY_START UINT64_C(0x0000000000000000) +#define KM_SPARC64_US_IDENTITY_SIZE UINT64_C(0x000007ff00000000) + +#define KM_SPARC64_US_NON_IDENTITY_START UINT64_C(0xfffff80100000000) +#define KM_SPARC64_US_NON_IDENTITY_SIZE UINT64_C(0x000007ff00000000) + +extern void km_identity_arch_init(void); +extern void km_non_identity_arch_init(void); +extern bool km_is_non_identity_arch(uintptr_t); + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/mm/sun4u/mmu.h =================================================================== --- kernel/arch/sparc64/include/arch/mm/sun4u/mmu.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/mm/sun4u/mmu.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,123 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64mm + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc64_sun4u_MMU_H_ +#define KERN_sparc64_sun4u_MMU_H_ + +#if defined(US) +/* LSU Control Register ASI. */ +#define ASI_LSU_CONTROL_REG 0x45 /**< Load/Store Unit Control Register. */ +#endif + +/* I-MMU ASIs. */ +#define ASI_IMMU 0x50 +#define ASI_IMMU_TSB_8KB_PTR_REG 0x51 +#define ASI_IMMU_TSB_64KB_PTR_REG 0x52 +#define ASI_ITLB_DATA_IN_REG 0x54 +#define ASI_ITLB_DATA_ACCESS_REG 0x55 +#define ASI_ITLB_TAG_READ_REG 0x56 +#define ASI_IMMU_DEMAP 0x57 + +/* Virtual Addresses within ASI_IMMU. */ +#define VA_IMMU_TSB_TAG_TARGET 0x0 /**< IMMU TSB tag target register. */ +#define VA_IMMU_SFSR 0x18 /**< IMMU sync fault status register. */ +#define VA_IMMU_TSB_BASE 0x28 /**< IMMU TSB base register. */ +#define VA_IMMU_TAG_ACCESS 0x30 /**< IMMU TLB tag access register. */ +#if defined (US3) +#define VA_IMMU_PRIMARY_EXTENSION 0x48 /**< IMMU TSB primary extension register */ +#define VA_IMMU_NUCLEUS_EXTENSION 0x58 /**< IMMU TSB nucleus extension register */ +#endif + + +/* D-MMU ASIs. */ +#define ASI_DMMU 0x58 +#define ASI_DMMU_TSB_8KB_PTR_REG 0x59 +#define ASI_DMMU_TSB_64KB_PTR_REG 0x5a +#define ASI_DMMU_TSB_DIRECT_PTR_REG 0x5b +#define ASI_DTLB_DATA_IN_REG 0x5c +#define ASI_DTLB_DATA_ACCESS_REG 0x5d +#define ASI_DTLB_TAG_READ_REG 0x5e +#define ASI_DMMU_DEMAP 0x5f + +/* Virtual Addresses within ASI_DMMU. */ +#define VA_DMMU_TSB_TAG_TARGET 0x0 /**< DMMU TSB tag target register. */ +#define VA_PRIMARY_CONTEXT_REG 0x8 /**< DMMU primary context register. */ +#define VA_SECONDARY_CONTEXT_REG 0x10 /**< DMMU secondary context register. */ +#define VA_DMMU_SFSR 0x18 /**< DMMU sync fault status register. */ +#define VA_DMMU_SFAR 0x20 /**< DMMU sync fault address register. */ +#define VA_DMMU_TSB_BASE 0x28 /**< DMMU TSB base register. */ +#define VA_DMMU_TAG_ACCESS 0x30 /**< DMMU TLB tag access register. */ +#define VA_DMMU_VA_WATCHPOINT_REG 0x38 /**< DMMU VA data watchpoint register. */ +#define VA_DMMU_PA_WATCHPOINT_REG 0x40 /**< DMMU PA data watchpoint register. */ +#if defined (US3) +#define VA_DMMU_PRIMARY_EXTENSION 0x48 /**< DMMU TSB primary extension register */ +#define VA_DMMU_SECONDARY_EXTENSION 0x50 /**< DMMU TSB secondary extension register */ +#define VA_DMMU_NUCLEUS_EXTENSION 0x58 /**< DMMU TSB nucleus extension register */ +#endif + +#ifndef __ASM__ + +#include +#include +#include + +#if defined(US) +/** LSU Control Register. */ +typedef union { + uint64_t value; + struct { + unsigned : 23; + unsigned pm : 8; + unsigned vm : 8; + unsigned pr : 1; + unsigned pw : 1; + unsigned vr : 1; + unsigned vw : 1; + unsigned : 1; + unsigned fm : 16; + unsigned dm : 1; /**< D-MMU enable. */ + unsigned im : 1; /**< I-MMU enable. */ + unsigned dc : 1; /**< D-Cache enable. */ + unsigned ic : 1; /**< I-Cache enable. */ + + } __attribute__ ((packed)); +} lsu_cr_reg_t; +#endif /* US */ + +#endif /* !def __ASM__ */ + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/mm/sun4u/tlb.h =================================================================== --- kernel/arch/sparc64/include/arch/mm/sun4u/tlb.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/mm/sun4u/tlb.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,694 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64mm + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc64_TLB_sun4u_H_ +#define KERN_sparc64_TLB_sun4u_H_ + +#if defined (US) +#define ITLB_ENTRY_COUNT 64 +#define DTLB_ENTRY_COUNT 64 +#define DTLB_MAX_LOCKED_ENTRIES DTLB_ENTRY_COUNT +#endif + +/** TLB_DSMALL is the only of the three DMMUs that can hold locked entries. */ +#if defined (US3) +#define DTLB_MAX_LOCKED_ENTRIES 16 +#endif + +#define MEM_CONTEXT_KERNEL 0 +#define MEM_CONTEXT_TEMP 1 + +/** Page sizes. */ +#define PAGESIZE_8K 0 +#define PAGESIZE_64K 1 +#define PAGESIZE_512K 2 +#define PAGESIZE_4M 3 + +/** Bit width of the TLB-locked portion of kernel address space. */ +#define KERNEL_PAGE_WIDTH 22 /* 4M */ + +/* TLB Demap Operation types. */ +#define TLB_DEMAP_PAGE 0 +#define TLB_DEMAP_CONTEXT 1 +#if defined (US3) +#define TLB_DEMAP_ALL 2 +#endif + +#define TLB_DEMAP_TYPE_SHIFT 6 + +/* TLB Demap Operation Context register encodings. */ +#define TLB_DEMAP_PRIMARY 0 +#define TLB_DEMAP_SECONDARY 1 +#define TLB_DEMAP_NUCLEUS 2 + +/* There are more TLBs in one MMU in US3, their codes are defined here. */ +#if defined (US3) +/* D-MMU: one small (16-entry) TLB and two big (512-entry) TLBs */ +#define TLB_DSMALL 0 +#define TLB_DBIG_0 2 +#define TLB_DBIG_1 3 + +/* I-MMU: one small (16-entry) TLB and one big TLB */ +#define TLB_ISMALL 0 +#define TLB_IBIG 2 +#endif + +#define TLB_DEMAP_CONTEXT_SHIFT 4 + +/* TLB Tag Access shifts */ +#define TLB_TAG_ACCESS_CONTEXT_SHIFT 0 +#define TLB_TAG_ACCESS_CONTEXT_MASK ((1 << 13) - 1) +#define TLB_TAG_ACCESS_VPN_SHIFT 13 + +#ifndef __ASM__ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +union tlb_context_reg { + uint64_t v; + struct { + unsigned long : 51; + unsigned context : 13; /**< Context/ASID. */ + } __attribute__ ((packed)); +}; +typedef union tlb_context_reg tlb_context_reg_t; + +/** I-/D-TLB Data In/Access Register type. */ +typedef tte_data_t tlb_data_t; + +/** I-/D-TLB Data Access Address in Alternate Space. */ + +#if defined (US) + +union tlb_data_access_addr { + uint64_t value; + struct { + uint64_t : 55; + unsigned tlb_entry : 6; + unsigned : 3; + } __attribute__ ((packed)); +}; +typedef union tlb_data_access_addr dtlb_data_access_addr_t; +typedef union tlb_data_access_addr dtlb_tag_read_addr_t; +typedef union tlb_data_access_addr itlb_data_access_addr_t; +typedef union tlb_data_access_addr itlb_tag_read_addr_t; + +#elif defined (US3) + +/* + * In US3, I-MMU and D-MMU have different formats of the data + * access register virtual address. In the corresponding + * structures the member variable for the entry number is + * called "local_tlb_entry" - it contrasts with the "tlb_entry" + * for the US data access register VA structure. The rationale + * behind this is to prevent careless mistakes in the code + * caused by setting only the entry number and not the TLB + * number in the US3 code (when taking the code from US). + */ + +union dtlb_data_access_addr { + uint64_t value; + struct { + uint64_t : 45; + unsigned : 1; + unsigned tlb_number : 2; + unsigned : 4; + unsigned local_tlb_entry : 9; + unsigned : 3; + } __attribute__ ((packed)); +}; +typedef union dtlb_data_access_addr dtlb_data_access_addr_t; +typedef union dtlb_data_access_addr dtlb_tag_read_addr_t; + +union itlb_data_access_addr { + uint64_t value; + struct { + uint64_t : 45; + unsigned : 1; + unsigned tlb_number : 2; + unsigned : 6; + unsigned local_tlb_entry : 7; + unsigned : 3; + } __attribute__ ((packed)); +}; +typedef union itlb_data_access_addr itlb_data_access_addr_t; +typedef union itlb_data_access_addr itlb_tag_read_addr_t; + +#endif + +/** I-/D-TLB Tag Read Register. */ +union tlb_tag_read_reg { + uint64_t value; + struct { + uint64_t vpn : 51; /**< Virtual Address bits 63:13. */ + unsigned context : 13; /**< Context identifier. */ + } __attribute__ ((packed)); +}; +typedef union tlb_tag_read_reg tlb_tag_read_reg_t; +typedef union tlb_tag_read_reg tlb_tag_access_reg_t; + + +/** TLB Demap Operation Address. */ +union tlb_demap_addr { + uint64_t value; + struct { + uint64_t vpn: 51; /**< Virtual Address bits 63:13. */ +#if defined (US) + unsigned : 6; /**< Ignored. */ + unsigned type : 1; /**< The type of demap operation. */ +#elif defined (US3) + unsigned : 5; /**< Ignored. */ + unsigned type: 2; /**< The type of demap operation. */ +#endif + unsigned context : 2; /**< Context register selection. */ + unsigned : 4; /**< Zero. */ + } __attribute__ ((packed)); +}; +typedef union tlb_demap_addr tlb_demap_addr_t; + +/** TLB Synchronous Fault Status Register. */ +union tlb_sfsr_reg { + uint64_t value; + struct { +#if defined (US) + unsigned long : 40; /**< Implementation dependent. */ + unsigned asi : 8; /**< ASI. */ + unsigned : 2; + unsigned ft : 7; /**< Fault type. */ +#elif defined (US3) + unsigned long : 39; /**< Implementation dependent. */ + unsigned nf : 1; /**< Non-faulting load. */ + unsigned asi : 8; /**< ASI. */ + unsigned tm : 1; /**< I-TLB miss. */ + unsigned : 3; /**< Reserved. */ + unsigned ft : 5; /**< Fault type. */ +#endif + unsigned e : 1; /**< Side-effect bit. */ + unsigned ct : 2; /**< Context Register selection. */ + unsigned pr : 1; /**< Privilege bit. */ + unsigned w : 1; /**< Write bit. */ + unsigned ow : 1; /**< Overwrite bit. */ + unsigned fv : 1; /**< Fault Valid bit. */ + } __attribute__ ((packed)); +}; +typedef union tlb_sfsr_reg tlb_sfsr_reg_t; + +#if defined (US3) + +/* + * Functions for determining the number of entries in TLBs. They either return + * a constant value or a value based on the CPU autodetection. + */ + +/** + * Determine the number of entries in the DMMU's small TLB. + */ +NO_TRACE static inline uint16_t tlb_dsmall_size(void) +{ + return 16; +} + +/** + * Determine the number of entries in each DMMU's big TLB. + */ +NO_TRACE static inline uint16_t tlb_dbig_size(void) +{ + return 512; +} + +/** + * Determine the number of entries in the IMMU's small TLB. + */ +NO_TRACE static inline uint16_t tlb_ismall_size(void) +{ + return 16; +} + +/** + * Determine the number of entries in the IMMU's big TLB. + */ +NO_TRACE static inline uint16_t tlb_ibig_size(void) +{ + if (((ver_reg_t) ver_read()).impl == IMPL_ULTRASPARCIV_PLUS) + return 512; + else + return 128; +} + +#endif + +/** Read MMU Primary Context Register. + * + * @return Current value of Primary Context Register. + */ +NO_TRACE static inline uint64_t mmu_primary_context_read(void) +{ + return asi_u64_read(ASI_DMMU, VA_PRIMARY_CONTEXT_REG); +} + +/** Write MMU Primary Context Register. + * + * @param v New value of Primary Context Register. + */ +NO_TRACE static inline void mmu_primary_context_write(uint64_t v) +{ + asi_u64_write(ASI_DMMU, VA_PRIMARY_CONTEXT_REG, v); + flush_pipeline(); +} + +/** Read MMU Secondary Context Register. + * + * @return Current value of Secondary Context Register. + */ +NO_TRACE static inline uint64_t mmu_secondary_context_read(void) +{ + return asi_u64_read(ASI_DMMU, VA_SECONDARY_CONTEXT_REG); +} + +/** Write MMU Primary Context Register. + * + * @param v New value of Primary Context Register. + */ +NO_TRACE static inline void mmu_secondary_context_write(uint64_t v) +{ + asi_u64_write(ASI_DMMU, VA_SECONDARY_CONTEXT_REG, v); + flush_pipeline(); +} + +#if defined (US) + +/** Read IMMU TLB Data Access Register. + * + * @param entry TLB Entry index. + * + * @return Current value of specified IMMU TLB Data Access + * Register. + */ +NO_TRACE static inline uint64_t itlb_data_access_read(size_t entry) +{ + itlb_data_access_addr_t reg; + + reg.value = 0; + reg.tlb_entry = entry; + return asi_u64_read(ASI_ITLB_DATA_ACCESS_REG, reg.value); +} + +/** Write IMMU TLB Data Access Register. + * + * @param entry TLB Entry index. + * @param value Value to be written. + */ +NO_TRACE static inline void itlb_data_access_write(size_t entry, uint64_t value) +{ + itlb_data_access_addr_t reg; + + reg.value = 0; + reg.tlb_entry = entry; + asi_u64_write(ASI_ITLB_DATA_ACCESS_REG, reg.value, value); + flush_pipeline(); +} + +/** Read DMMU TLB Data Access Register. + * + * @param entry TLB Entry index. + * + * @return Current value of specified DMMU TLB Data Access + * Register. + */ +NO_TRACE static inline uint64_t dtlb_data_access_read(size_t entry) +{ + dtlb_data_access_addr_t reg; + + reg.value = 0; + reg.tlb_entry = entry; + return asi_u64_read(ASI_DTLB_DATA_ACCESS_REG, reg.value); +} + +/** Write DMMU TLB Data Access Register. + * + * @param entry TLB Entry index. + * @param value Value to be written. + */ +NO_TRACE static inline void dtlb_data_access_write(size_t entry, uint64_t value) +{ + dtlb_data_access_addr_t reg; + + reg.value = 0; + reg.tlb_entry = entry; + asi_u64_write(ASI_DTLB_DATA_ACCESS_REG, reg.value, value); + membar(); +} + +/** Read IMMU TLB Tag Read Register. + * + * @param entry TLB Entry index. + * + * @return Current value of specified IMMU TLB Tag Read Register. + */ +NO_TRACE static inline uint64_t itlb_tag_read_read(size_t entry) +{ + itlb_tag_read_addr_t tag; + + tag.value = 0; + tag.tlb_entry = entry; + return asi_u64_read(ASI_ITLB_TAG_READ_REG, tag.value); +} + +/** Read DMMU TLB Tag Read Register. + * + * @param entry TLB Entry index. + * + * @return Current value of specified DMMU TLB Tag Read Register. + */ +NO_TRACE static inline uint64_t dtlb_tag_read_read(size_t entry) +{ + dtlb_tag_read_addr_t tag; + + tag.value = 0; + tag.tlb_entry = entry; + return asi_u64_read(ASI_DTLB_TAG_READ_REG, tag.value); +} + +#elif defined (US3) + + +/** Read IMMU TLB Data Access Register. + * + * @param tlb TLB number (one of TLB_ISMALL or TLB_IBIG) + * @param entry TLB Entry index. + * + * @return Current value of specified IMMU TLB Data Access + * Register. + */ +NO_TRACE static inline uint64_t itlb_data_access_read(int tlb, size_t entry) +{ + itlb_data_access_addr_t reg; + + reg.value = 0; + reg.tlb_number = tlb; + reg.local_tlb_entry = entry; + return asi_u64_read(ASI_ITLB_DATA_ACCESS_REG, reg.value); +} + +/** Write IMMU TLB Data Access Register. + * @param tlb TLB number (one of TLB_ISMALL or TLB_IBIG) + * @param entry TLB Entry index. + * @param value Value to be written. + */ +NO_TRACE static inline void itlb_data_access_write(int tlb, size_t entry, + uint64_t value) +{ + itlb_data_access_addr_t reg; + + reg.value = 0; + reg.tlb_number = tlb; + reg.local_tlb_entry = entry; + asi_u64_write(ASI_ITLB_DATA_ACCESS_REG, reg.value, value); + flush_pipeline(); +} + +/** Read DMMU TLB Data Access Register. + * + * @param tlb TLB number (one of TLB_DSMALL, TLB_DBIG, TLB_DBIG) + * @param entry TLB Entry index. + * + * @return Current value of specified DMMU TLB Data Access + * Register. + */ +NO_TRACE static inline uint64_t dtlb_data_access_read(int tlb, size_t entry) +{ + dtlb_data_access_addr_t reg; + + reg.value = 0; + reg.tlb_number = tlb; + reg.local_tlb_entry = entry; + return asi_u64_read(ASI_DTLB_DATA_ACCESS_REG, reg.value); +} + +/** Write DMMU TLB Data Access Register. + * + * @param tlb TLB number (one of TLB_DSMALL, TLB_DBIG_0, TLB_DBIG_1) + * @param entry TLB Entry index. + * @param value Value to be written. + */ +NO_TRACE static inline void dtlb_data_access_write(int tlb, size_t entry, + uint64_t value) +{ + dtlb_data_access_addr_t reg; + + reg.value = 0; + reg.tlb_number = tlb; + reg.local_tlb_entry = entry; + asi_u64_write(ASI_DTLB_DATA_ACCESS_REG, reg.value, value); + membar(); +} + +/** Read IMMU TLB Tag Read Register. + * + * @param tlb TLB number (one of TLB_ISMALL or TLB_IBIG) + * @param entry TLB Entry index. + * + * @return Current value of specified IMMU TLB Tag Read Register. + */ +NO_TRACE static inline uint64_t itlb_tag_read_read(int tlb, size_t entry) +{ + itlb_tag_read_addr_t tag; + + tag.value = 0; + tag.tlb_number = tlb; + tag.local_tlb_entry = entry; + return asi_u64_read(ASI_ITLB_TAG_READ_REG, tag.value); +} + +/** Read DMMU TLB Tag Read Register. + * + * @param tlb TLB number (one of TLB_DSMALL, TLB_DBIG_0, TLB_DBIG_1) + * @param entry TLB Entry index. + * + * @return Current value of specified DMMU TLB Tag Read Register. + */ +NO_TRACE static inline uint64_t dtlb_tag_read_read(int tlb, size_t entry) +{ + dtlb_tag_read_addr_t tag; + + tag.value = 0; + tag.tlb_number = tlb; + tag.local_tlb_entry = entry; + return asi_u64_read(ASI_DTLB_TAG_READ_REG, tag.value); +} + +#endif + + +/** Write IMMU TLB Tag Access Register. + * + * @param v Value to be written. + */ +NO_TRACE static inline void itlb_tag_access_write(uint64_t v) +{ + asi_u64_write(ASI_IMMU, VA_IMMU_TAG_ACCESS, v); + flush_pipeline(); +} + +/** Read IMMU TLB Tag Access Register. + * + * @return Current value of IMMU TLB Tag Access Register. + */ +NO_TRACE static inline uint64_t itlb_tag_access_read(void) +{ + return asi_u64_read(ASI_IMMU, VA_IMMU_TAG_ACCESS); +} + +/** Write DMMU TLB Tag Access Register. + * + * @param v Value to be written. + */ +NO_TRACE static inline void dtlb_tag_access_write(uint64_t v) +{ + asi_u64_write(ASI_DMMU, VA_DMMU_TAG_ACCESS, v); + membar(); +} + +/** Read DMMU TLB Tag Access Register. + * + * @return Current value of DMMU TLB Tag Access Register. + */ +NO_TRACE static inline uint64_t dtlb_tag_access_read(void) +{ + return asi_u64_read(ASI_DMMU, VA_DMMU_TAG_ACCESS); +} + + +/** Write IMMU TLB Data in Register. + * + * @param v Value to be written. + */ +NO_TRACE static inline void itlb_data_in_write(uint64_t v) +{ + asi_u64_write(ASI_ITLB_DATA_IN_REG, 0, v); + flush_pipeline(); +} + +/** Write DMMU TLB Data in Register. + * + * @param v Value to be written. + */ +NO_TRACE static inline void dtlb_data_in_write(uint64_t v) +{ + asi_u64_write(ASI_DTLB_DATA_IN_REG, 0, v); + membar(); +} + +/** Read ITLB Synchronous Fault Status Register. + * + * @return Current content of I-SFSR register. + */ +NO_TRACE static inline uint64_t itlb_sfsr_read(void) +{ + return asi_u64_read(ASI_IMMU, VA_IMMU_SFSR); +} + +/** Write ITLB Synchronous Fault Status Register. + * + * @param v New value of I-SFSR register. + */ +NO_TRACE static inline void itlb_sfsr_write(uint64_t v) +{ + asi_u64_write(ASI_IMMU, VA_IMMU_SFSR, v); + flush_pipeline(); +} + +/** Read DTLB Synchronous Fault Status Register. + * + * @return Current content of D-SFSR register. + */ +NO_TRACE static inline uint64_t dtlb_sfsr_read(void) +{ + return asi_u64_read(ASI_DMMU, VA_DMMU_SFSR); +} + +/** Write DTLB Synchronous Fault Status Register. + * + * @param v New value of D-SFSR register. + */ +NO_TRACE static inline void dtlb_sfsr_write(uint64_t v) +{ + asi_u64_write(ASI_DMMU, VA_DMMU_SFSR, v); + membar(); +} + +/** Read DTLB Synchronous Fault Address Register. + * + * @return Current content of D-SFAR register. + */ +NO_TRACE static inline uint64_t dtlb_sfar_read(void) +{ + return asi_u64_read(ASI_DMMU, VA_DMMU_SFAR); +} + +/** Perform IMMU TLB Demap Operation. + * + * @param type Selects between context and page demap (and entire MMU + * demap on US3). + * @param context_encoding Specifies which Context register has Context ID for + * demap. + * @param page Address which is on the page to be demapped. + */ +NO_TRACE static inline void itlb_demap(int type, int context_encoding, uintptr_t page) +{ + tlb_demap_addr_t da; + page_address_t pg; + + da.value = 0; + pg.address = page; + + da.type = type; + da.context = context_encoding; + da.vpn = pg.vpn; + + /* da.value is the address within the ASI */ + asi_u64_write(ASI_IMMU_DEMAP, da.value, 0); + + flush_pipeline(); +} + +/** Perform DMMU TLB Demap Operation. + * + * @param type Selects between context and page demap (and entire MMU + * demap on US3). + * @param context_encoding Specifies which Context register has Context ID for + * demap. + * @param page Address which is on the page to be demapped. + */ +NO_TRACE static inline void dtlb_demap(int type, int context_encoding, uintptr_t page) +{ + tlb_demap_addr_t da; + page_address_t pg; + + da.value = 0; + pg.address = page; + + da.type = type; + da.context = context_encoding; + da.vpn = pg.vpn; + + /* da.value is the address within the ASI */ + asi_u64_write(ASI_DMMU_DEMAP, da.value, 0); + + membar(); +} + +extern void fast_instruction_access_mmu_miss(sysarg_t, istate_t *); +extern void fast_data_access_mmu_miss(tlb_tag_access_reg_t, istate_t *); +extern void fast_data_access_protection(tlb_tag_access_reg_t , istate_t *); + +extern void dtlb_insert_mapping(uintptr_t, uintptr_t, int, bool, bool); + +extern void dump_sfsr_and_sfar(void); +extern void describe_dmmu_fault(void); + +#endif /* !def __ASM__ */ + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/mm/sun4u/tsb.h =================================================================== --- kernel/arch/sparc64/include/arch/mm/sun4u/tsb.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/mm/sun4u/tsb.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,172 @@ +/* + * Copyright (c) 2006 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64mm + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc64_sun4u_TSB_H_ +#define KERN_sparc64_sun4u_TSB_H_ + +/* + * ITSB abd DTSB will claim 64K of memory, which + * is a nice number considered that it is one of + * the page sizes supported by hardware, which, + * again, is nice because TSBs need to be locked + * in TLBs - only one TLB entry will do. + */ +#define TSB_SIZE 2 /* when changing this, change + * as.c as well */ +#define ITSB_ENTRY_COUNT (512 * (1 << TSB_SIZE)) +#define DTSB_ENTRY_COUNT (512 * (1 << TSB_SIZE)) + +#define TSB_TAG_TARGET_CONTEXT_SHIFT 48 + +#ifndef __ASM__ + +#include +#include +#include + +/** TSB Base register. */ +typedef union tsb_base_reg { + uint64_t value; + struct { + uint64_t base : 51; /**< TSB base address, bits 63:13. */ + unsigned split : 1; /**< Split vs. common TSB for 8K and 64K + * pages. HelenOS uses only 8K pages + * for user mappings, so we always set + * this to 0. + */ + unsigned : 9; + unsigned size : 3; /**< TSB size. Number of entries is + * 512 * 2^size. */ + } __attribute__ ((packed)); +} tsb_base_reg_t; + +/** Read ITSB Base register. + * + * @return Content of the ITSB Base register. + */ +static inline uint64_t itsb_base_read(void) +{ + return asi_u64_read(ASI_IMMU, VA_IMMU_TSB_BASE); +} + +/** Read DTSB Base register. + * + * @return Content of the DTSB Base register. + */ +static inline uint64_t dtsb_base_read(void) +{ + return asi_u64_read(ASI_DMMU, VA_DMMU_TSB_BASE); +} + +/** Write ITSB Base register. + * + * @param v New content of the ITSB Base register. + */ +static inline void itsb_base_write(uint64_t v) +{ + asi_u64_write(ASI_IMMU, VA_IMMU_TSB_BASE, v); +} + +/** Write DTSB Base register. + * + * @param v New content of the DTSB Base register. + */ +static inline void dtsb_base_write(uint64_t v) +{ + asi_u64_write(ASI_DMMU, VA_DMMU_TSB_BASE, v); +} + +#if defined (US3) + +/** Write DTSB Primary Extension register. + * + * @param v New content of the DTSB Primary Extension register. + */ +static inline void dtsb_primary_extension_write(uint64_t v) +{ + asi_u64_write(ASI_DMMU, VA_DMMU_PRIMARY_EXTENSION, v); +} + +/** Write DTSB Secondary Extension register. + * + * @param v New content of the DTSB Secondary Extension register. + */ +static inline void dtsb_secondary_extension_write(uint64_t v) +{ + asi_u64_write(ASI_DMMU, VA_DMMU_SECONDARY_EXTENSION, v); +} + +/** Write DTSB Nucleus Extension register. + * + * @param v New content of the DTSB Nucleus Extension register. + */ +static inline void dtsb_nucleus_extension_write(uint64_t v) +{ + asi_u64_write(ASI_DMMU, VA_DMMU_NUCLEUS_EXTENSION, v); +} + +/** Write ITSB Primary Extension register. + * + * @param v New content of the ITSB Primary Extension register. + */ +static inline void itsb_primary_extension_write(uint64_t v) +{ + asi_u64_write(ASI_IMMU, VA_IMMU_PRIMARY_EXTENSION, v); +} + +/** Write ITSB Nucleus Extension register. + * + * @param v New content of the ITSB Nucleus Extension register. + */ +static inline void itsb_nucleus_extension_write(uint64_t v) +{ + asi_u64_write(ASI_IMMU, VA_IMMU_NUCLEUS_EXTENSION, v); +} + +#endif + +/* Forward declarations. */ +struct as; +struct pte; + +extern void tsb_invalidate(struct as *as, uintptr_t page, size_t pages); +extern void itsb_pte_copy(struct pte *t, size_t index); +extern void dtsb_pte_copy(struct pte *t, size_t index, bool ro); + +#endif /* !def __ASM__ */ + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/mm/sun4u/tte.h =================================================================== --- kernel/arch/sparc64/include/arch/mm/sun4u/tte.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/mm/sun4u/tte.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,104 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64mm + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc64_sun4u_TTE_H_ +#define KERN_sparc64_sun4u_TTE_H_ + +#define TTE_G (1 << 0) +#define TTE_W (1 << 1) +#define TTE_P (1 << 2) +#define TTE_E (1 << 3) +#define TTE_CV (1 << 4) +#define TTE_CP (1 << 5) +#define TTE_L (1 << 6) + +#define TTE_V_SHIFT 63 +#define TTE_SIZE_SHIFT 61 + +#ifndef __ASM__ + +#include + +/* TTE tag's VA_tag field contains bits <63:VA_TAG_PAGE_SHIFT> of the VA */ +#define VA_TAG_PAGE_SHIFT 22 + +/** Translation Table Entry - Tag. */ +union tte_tag { + uint64_t value; + struct { + unsigned g : 1; /**< Global. */ + unsigned : 2; /**< Reserved. */ + unsigned context : 13; /**< Context identifier. */ + unsigned : 6; /**< Reserved. */ + uint64_t va_tag : 42; /**< Virtual Address Tag, bits 63:22. */ + } __attribute__ ((packed)); +}; + +typedef union tte_tag tte_tag_t; + +/** Translation Table Entry - Data. */ +union tte_data { + uint64_t value; + struct { + unsigned v : 1; /**< Valid. */ + unsigned size : 2; /**< Page size of this entry. */ + unsigned nfo : 1; /**< No-Fault-Only. */ + unsigned ie : 1; /**< Invert Endianness. */ + unsigned soft2 : 9; /**< Software defined field. */ +#if defined (US) + unsigned diag : 9; /**< Diagnostic data. */ + unsigned pfn : 28; /**< Physical Address bits, bits 40:13. */ +#elif defined (US3) + unsigned : 7; /**< Reserved. */ + unsigned pfn : 30; /**< Physical Address bits, bits 42:13 */ +#endif + unsigned soft : 6; /**< Software defined field. */ + unsigned l : 1; /**< Lock. */ + unsigned cp : 1; /**< Cacheable in physically indexed cache. */ + unsigned cv : 1; /**< Cacheable in virtually indexed cache. */ + unsigned e : 1; /**< Side-effect. */ + unsigned p : 1; /**< Privileged. */ + unsigned w : 1; /**< Writable. */ + unsigned g : 1; /**< Global. */ + } __attribute__ ((packed)); +}; + +typedef union tte_data tte_data_t; + +#endif /* !def __ASM__ */ + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/mm/sun4v/as.h =================================================================== --- kernel/arch/sparc64/include/arch/mm/sun4v/as.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/mm/sun4v/as.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,100 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * Copyright (c) 2009 Pavel Rimsky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64mm + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc64_sun4v_AS_H_ +#define KERN_sparc64_sun4v_AS_H_ + +#include +#include + +#define KERNEL_ADDRESS_SPACE_SHADOWED_ARCH 1 + +#define KERNEL_ADDRESS_SPACE_START_ARCH UINT64_C(0x0000000000000000) +#define KERNEL_ADDRESS_SPACE_END_ARCH UINT64_C(0xffffffffffffffff) +#define USER_ADDRESS_SPACE_START_ARCH UINT64_C(0x0000000000000000) +#define USER_ADDRESS_SPACE_END_ARCH UINT64_C(0xffffffffffffffff) + +#ifdef CONFIG_TSB + +/** + * TTE Tag. + * + * Even though for sun4v the format of the TSB Tag states that the context + * field has 16 bits, the T1 CPU still only supports 13-bit contexts and the + * three most significant bits are always zero. + */ +typedef union tte_tag { + uint64_t value; + struct { + unsigned : 3; + unsigned context : 13; /**< Software ASID. */ + unsigned : 6; + uint64_t va_tag : 42; /**< Virtual address bits <63:22>. */ + } __attribute__ ((packed)); +} tte_tag_t; + +/** TSB entry. */ +typedef struct tsb_entry { + tte_tag_t tag; + tte_data_t data; +} __attribute__ ((packed)) tsb_entry_t; + +typedef struct { + tsb_descr_t tsb_description; +} as_arch_t; + +#else + +typedef struct { +} as_arch_t; + +#endif /* CONFIG_TSB */ + +#include + +#ifdef CONFIG_TSB +#include +#define as_invalidate_translation_cache(as, page, cnt) \ + tsb_invalidate((as), (page), (cnt)) +#else +#define as_invalidate_translation_cache(as, page, cnt) +#endif + +extern void as_arch_init(void); + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/mm/sun4v/frame.h =================================================================== --- kernel/arch/sparc64/include/arch/mm/sun4v/frame.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/mm/sun4v/frame.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,57 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64mm + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc64_sun4v_FRAME_H_ +#define KERN_sparc64_sun4v_FRAME_H_ + +#define MMU_FRAME_WIDTH 13 /* 8K */ +#define MMU_FRAME_SIZE (1 << MMU_FRAME_WIDTH) + +#define FRAME_WIDTH 13 +#define FRAME_SIZE (1 << FRAME_WIDTH) + +#ifndef __ASM__ + +#include + +extern void frame_low_arch_init(void); +extern void frame_high_arch_init(void); +#define physmem_print() + +#endif + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/mm/sun4v/km.h =================================================================== --- kernel/arch/sparc64/include/arch/mm/sun4v/km.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/mm/sun4v/km.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,58 @@ +/* + * Copyright (c) 2011 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64mm + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc64_sun4v_KM_H_ +#define KERN_sparc64_sun4v_KM_H_ + +#include + +/* + * Do not use the 4 GiB area on either side of the VA hole to meet the + * limitations of the UltraSPARC T1 CPU. + */ + +#define KM_SPARC64_T1_IDENTITY_START UINT64_C(0x0000000000000000) +#define KM_SPARC64_T1_IDENTITY_SIZE UINT64_C(0x00007fff00000000) + +#define KM_SPARC64_T1_NON_IDENTITY_START UINT64_C(0xffff800100000000) +#define KM_SPARC64_T1_NON_IDENTITY_SIZE UINT64_C(0x00007fff00000000) + +extern void km_identity_arch_init(void); +extern void km_non_identity_arch_init(void); +extern bool km_is_non_identity_arch(uintptr_t); + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/mm/sun4v/mmu.h =================================================================== --- kernel/arch/sparc64/include/arch/mm/sun4v/mmu.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/mm/sun4v/mmu.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,50 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * Copyright (c) 2008 Pavel Rimsky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64mm + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc64_sun4v_MMU_H_ +#define KERN_sparc64_sun4v_MMU_H_ + +#define ASI_REAL 0x14 /**< MMU bypass ASI */ + +#define VA_PRIMARY_CONTEXT_REG 0x8 /**< primary context register VA. */ +#define ASI_PRIMARY_CONTEXT_REG 0x21 /**< primary context register ASI. */ + +#define VA_SECONDARY_CONTEXT_REG 0x10 /**< secondary context register VA. */ +#define ASI_SECONDARY_CONTEXT_REG 0x21 /**< secondary context register ASI. */ + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/mm/sun4v/page.h =================================================================== --- kernel/arch/sparc64/include/arch/mm/sun4v/page.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/mm/sun4v/page.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,72 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64mm + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc64_sun4v_PAGE_H_ +#define KERN_sparc64_sun4v_PAGE_H_ + +#include + +#define MMU_PAGE_WIDTH MMU_FRAME_WIDTH +#define MMU_PAGE_SIZE MMU_FRAME_SIZE + +#define PAGE_WIDTH FRAME_WIDTH +#define PAGE_SIZE FRAME_SIZE + +#define MMU_PAGES_PER_PAGE (1 << (PAGE_WIDTH - MMU_PAGE_WIDTH)) + +#ifndef __ASM__ + +#include + +extern uintptr_t physmem_base; + +#define KA2PA(x) (((uintptr_t) (x)) + physmem_base) +#define PA2KA(x) (((uintptr_t) (x)) - physmem_base) + +typedef union { + uintptr_t address; + struct { + uint64_t vpn : 51; /**< Virtual Page Number. */ + unsigned offset : 13; /**< Offset. */ + } __attribute__ ((packed)); +} page_address_t; + +extern void page_arch_init(void); + +#endif /* !def __ASM__ */ + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/mm/sun4v/tlb.h =================================================================== --- kernel/arch/sparc64/include/arch/mm/sun4v/tlb.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/mm/sun4v/tlb.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,156 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * Copyright (c) 2008 Pavel Rimsky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64mm + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc64_sun4v_TLB_H_ +#define KERN_sparc64_sun4v_TLB_H_ + +#define MMU_FSA_ALIGNMENT 64 +#define MMU_FSA_SIZE 128 + +#ifndef __ASM__ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/** + * Structure filled by hypervisor (or directly CPU, if implemented so) when + * a MMU fault occurs. The structure describes the exact condition which + * has caused the fault. + */ +typedef struct mmu_fault_status_area { + uint64_t ift; /**< Instruction fault type (IFT) */ + uint64_t ifa; /**< Instruction fault address (IFA) */ + uint64_t ifc; /**< Instruction fault context (IFC) */ + uint8_t reserved1[0x28]; + + uint64_t dft; /**< Data fault type (DFT) */ + uint64_t dfa; /**< Data fault address (DFA) */ + uint64_t dfc; /**< Data fault context (DFC) */ + uint8_t reserved2[0x28]; +} __attribute__ ((packed)) mmu_fault_status_area_t; + +#define DTLB_MAX_LOCKED_ENTRIES 8 + +/** Bit width of the TLB-locked portion of kernel address space. */ +#define KERNEL_PAGE_WIDTH 22 /* 4M */ + +/* + * Reading and writing context registers. + * + * Note that UltraSPARC Architecture-compatible processors do not require + * a MEMBAR #Sync, FLUSH, DONE, or RETRY instruction after a store to an + * MMU register for proper operation. + * + */ + +/** Read MMU Primary Context Register. + * + * @return Current value of Primary Context Register. + */ +NO_TRACE static inline uint64_t mmu_primary_context_read(void) +{ + return asi_u64_read(ASI_PRIMARY_CONTEXT_REG, VA_PRIMARY_CONTEXT_REG); +} + +/** Write MMU Primary Context Register. + * + * @param v New value of Primary Context Register. + */ +NO_TRACE static inline void mmu_primary_context_write(uint64_t v) +{ + asi_u64_write(ASI_PRIMARY_CONTEXT_REG, VA_PRIMARY_CONTEXT_REG, v); +} + +/** Read MMU Secondary Context Register. + * + * @return Current value of Secondary Context Register. + */ +NO_TRACE static inline uint64_t mmu_secondary_context_read(void) +{ + return asi_u64_read(ASI_SECONDARY_CONTEXT_REG, VA_SECONDARY_CONTEXT_REG); +} + +/** Write MMU Secondary Context Register. + * + * @param v New value of Secondary Context Register. + */ +NO_TRACE static inline void mmu_secondary_context_write(uint64_t v) +{ + asi_u64_write(ASI_SECONDARY_CONTEXT_REG, VA_SECONDARY_CONTEXT_REG, v); +} + +/** + * Demaps all mappings in a context. + * + * @param context number of the context + * @param mmu_flag MMU_FLAG_DTLB, MMU_FLAG_ITLB or a combination of both + */ +NO_TRACE static inline void mmu_demap_ctx(int context, int mmu_flag) { + __hypercall_fast4(MMU_DEMAP_CTX, 0, 0, context, mmu_flag); +} + +/** + * Demaps given page. + * + * @param vaddr VA of the page to be demapped + * @param context number of the context + * @param mmu_flag MMU_FLAG_DTLB, MMU_FLAG_ITLB or a combination of both + */ +NO_TRACE static inline void mmu_demap_page(uintptr_t vaddr, int context, int mmu_flag) { + __hypercall_fast5(MMU_DEMAP_PAGE, 0, 0, vaddr, context, mmu_flag); +} + +extern void fast_instruction_access_mmu_miss(sysarg_t, istate_t *); +extern void fast_data_access_mmu_miss(sysarg_t, istate_t *); +extern void fast_data_access_protection(sysarg_t, istate_t *); + +extern void dtlb_insert_mapping(uintptr_t, uintptr_t, int, bool, bool); + +extern void describe_dmmu_fault(void); + +#endif /* !def __ASM__ */ + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/mm/sun4v/tsb.h =================================================================== --- kernel/arch/sparc64/include/arch/mm/sun4v/tsb.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/mm/sun4v/tsb.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,81 @@ +/* + * Copyright (c) 2006 Jakub Jermar + * Copyright (c) 2009 Pavel Rimsky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64mm + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc64_sun4v_TSB_H_ +#define KERN_sparc64_sun4v_TSB_H_ + +/* + * TSB will claim 64K of memory, which + * is a nice number considered that it is one of + * the page sizes supported by hardware, which, + * again, is nice because TSBs need to be locked + * in TLBs - only one TLB entry will do. + */ +#define TSB_SIZE 3 /* when changing this, change + * as.c as well */ +#define TSB_ENTRY_COUNT (512 * (1 << TSB_SIZE)) + +#ifndef __ASM__ + +#include +#include +#include + +/** TSB description, used in hypercalls */ +typedef struct tsb_descr { + uint16_t page_size; /**< Page size (0 = 8K, 1 = 64K,...). */ + uint16_t associativity; /**< TSB associativity (will be 1). */ + uint32_t num_ttes; /**< Number of TTEs. */ + uint32_t context; /**< Context number. */ + uint32_t pgsize_mask; /**< Equals "1 << page_size". */ + uint64_t tsb_base; /**< Real address of TSB base. */ + uint64_t reserved; +} __attribute__ ((packed)) tsb_descr_t; + + +/* Forward declarations. */ +struct as; +struct pte; + +extern void tsb_invalidate(struct as *as, uintptr_t page, uint64_t pages); +extern void itsb_pte_copy(struct pte *t); +extern void dtsb_pte_copy(struct pte *t, bool ro); + +#endif /* !def __ASM__ */ + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/mm/sun4v/tte.h =================================================================== --- kernel/arch/sparc64/include/arch/mm/sun4v/tte.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/mm/sun4v/tte.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,83 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64mm + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc64_sun4v_TTE_H_ +#define KERN_sparc64_sun4v_TTE_H_ + +#define TTE_V_SHIFT 63 /**< valid */ +#define TTE_TADDR_SHIFT 13 /**< target address */ +#define TTE_CP_SHIFT 10 /**< cacheable physically */ +#define TTE_CV_SHIFT 9 /**< caheable virtually */ +#define TTE_P_SHIFT 8 /**< privileged */ +#define TTE_EP_SHIFT 7 /**< execute permission */ +#define TTE_W_SHIFT 6 /**< writable */ +#define TTE_SZ_SHIFT 0 /**< size */ + +#define MMU_FLAG_ITLB 2 /**< operation applies to ITLB */ +#define MMU_FLAG_DTLB 1 /**< operation applies to DTLB */ + +#ifndef __ASM__ + +#include + +/** Translation Table Entry - Data. */ +union tte_data { + uint64_t value; + struct { + unsigned v : 1; /**< Valid. */ + unsigned nfo : 1; /**< No-Fault-Only. */ + unsigned soft : 6; /**< Software defined field. */ + unsigned long ra : 43; /**< Real address. */ + unsigned ie : 1; /**< Invert endianess. */ + unsigned e : 1; /**< Side-effect. */ + unsigned cp : 1; /**< Cacheable in physically indexed cache. */ + unsigned cv : 1; /**< Cacheable in virtually indexed cache. */ + unsigned p : 1; /**< Privileged. */ + unsigned x : 1; /**< Executable. */ + unsigned w : 1; /**< Writable. */ + unsigned soft2 : 2; /**< Software defined field. */ + unsigned size : 4; /**< Page size. */ + } __attribute__ ((packed)); +}; + +typedef union tte_data tte_data_t; + +#define VA_TAG_PAGE_SHIFT 22 + +#endif /* !def __ASM__ */ + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/mm/tlb.h =================================================================== --- kernel/arch/sparc64/include/arch/mm/tlb.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/mm/tlb.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,51 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64mm + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc64_TLB_H_ +#define KERN_sparc64_TLB_H_ + +#if defined (SUN4U) + +#include + +#elif defined (SUN4V) + +#include + +#endif + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/mm/tsb.h =================================================================== --- kernel/arch/sparc64/include/arch/mm/tsb.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/mm/tsb.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,47 @@ +/* + * Copyright (c) 2006 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64mm + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc64_TSB_H_ +#define KERN_sparc64_TSB_H_ + +#if defined (SUN4U) +#include +#elif defined (SUN4V) +#include +#endif + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/mm/tte.h =================================================================== --- kernel/arch/sparc64/include/arch/mm/tte.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/mm/tte.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,47 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64mm + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc64_TTE_H_ +#define KERN_sparc64_TTE_H_ + +#if defined (SUN4U) +#include +#elif defined (SUN4V) +#include +#endif + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/proc/task.h =================================================================== --- kernel/arch/sparc64/include/arch/proc/task.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/proc/task.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,47 @@ +/* + * Copyright (c) 2006 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64proc + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc64_TASK_H_ +#define KERN_sparc64_TASK_H_ + +typedef struct { +} task_arch_t; + +#define task_create_arch(t) +#define task_destroy_arch(t) + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/proc/thread.h =================================================================== --- kernel/arch/sparc64/include/arch/proc/thread.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/proc/thread.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,49 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64proc + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc64_THREAD_H_ +#define KERN_sparc64_THREAD_H_ + +#include +#include + +typedef struct { + /** Buffer for register windows with userspace content. */ + uint8_t *uspace_window_buffer; +} thread_arch_t; + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/regdef.h =================================================================== --- kernel/arch/sparc64/include/arch/regdef.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/regdef.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,67 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64 + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc64_REGDEF_H_ +#define KERN_sparc64_REGDEF_H_ + +#define PSTATE_IE_BIT (1 << 1) +#define PSTATE_AM_BIT (1 << 3) + +#define PSTATE_AG_BIT (1 << 0) +#define PSTATE_IG_BIT (1 << 11) +#define PSTATE_MG_BIT (1 << 10) + +#define PSTATE_PRIV_BIT (1 << 2) +#define PSTATE_PEF_BIT (1 << 4) + +#define TSTATE_PSTATE_SHIFT 8 +#define TSTATE_PRIV_BIT (PSTATE_PRIV_BIT << TSTATE_PSTATE_SHIFT) +#define TSTATE_IE_BIT (PSTATE_IE_BIT << TSTATE_PSTATE_SHIFT) +#define TSTATE_PEF_BIT (PSTATE_PEF_BIT << TSTATE_PSTATE_SHIFT) + +#define TSTATE_CWP_MASK 0x1f + +#define WSTATE_NORMAL(n) (n) +#define WSTATE_OTHER(n) ((n) << 3) + +/* + * The following definitions concern the UPA_CONFIG register on US and the + * FIREPLANE_CONFIG register on US3. + */ +#define ICBUS_CONFIG_MID_SHIFT 17 + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/register.h =================================================================== --- kernel/arch/sparc64/include/arch/register.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/register.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,123 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64 + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc64_REGISTER_H_ +#define KERN_sparc64_REGISTER_H_ + +#include +#include + +/** Version Register. */ +union ver_reg { + uint64_t value; + struct { + uint16_t manuf; /**< Manufacturer code. */ + uint16_t impl; /**< Implementation code. */ + uint8_t mask; /**< Mask set revision. */ + unsigned : 8; + uint8_t maxtl; + unsigned : 3; + unsigned maxwin : 5; + } __attribute__ ((packed)); +}; +typedef union ver_reg ver_reg_t; + +/** Processor State Register. */ +union pstate_reg { + uint64_t value; + struct { + uint64_t : 52; + unsigned ig : 1; /**< Interrupt Globals. */ + unsigned mg : 1; /**< MMU Globals. */ + unsigned cle : 1; /**< Current Little Endian. */ + unsigned tle : 1; /**< Trap Little Endian. */ + unsigned mm : 2; /**< Memory Model. */ + unsigned red : 1; /**< RED state. */ + unsigned pef : 1; /**< Enable floating-point. */ + unsigned am : 1; /**< 32-bit Address Mask. */ + unsigned priv : 1; /**< Privileged Mode. */ + unsigned ie : 1; /**< Interrupt Enable. */ + unsigned ag : 1; /**< Alternate Globals*/ + } __attribute__ ((packed)); +}; +typedef union pstate_reg pstate_reg_t; + +/** TICK Register. */ +union tick_reg { + uint64_t value; + struct { + unsigned npt : 1; /**< Non-privileged Trap enable. */ + uint64_t counter : 63; /**< Elapsed CPU clck cycle counter. */ + } __attribute__ ((packed)); +}; +typedef union tick_reg tick_reg_t; + +/** TICK_compare Register. */ +union tick_compare_reg { + uint64_t value; + struct { + unsigned int_dis : 1; /**< TICK_INT interrupt disabled flag. */ + uint64_t tick_cmpr : 63; /**< Compare value for TICK interrupts. */ + } __attribute__ ((packed)); +}; +typedef union tick_compare_reg tick_compare_reg_t; + +/** SOFTINT Register. */ +union softint_reg { + uint64_t value; + struct { + uint64_t : 47; + unsigned stick_int : 1; + unsigned int_level : 15; + unsigned tick_int : 1; + } __attribute__ ((packed)); +}; +typedef union softint_reg softint_reg_t; + +/** Floating-point Registers State Register. */ +union fprs_reg { + uint64_t value; + struct { + uint64_t : 61; + unsigned fef : 1; + unsigned du : 1; + unsigned dl : 1; + } __attribute__ ((packed)); +}; +typedef union fprs_reg fprs_reg_t; + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/smp/sun4v/smp.h =================================================================== --- kernel/arch/sparc64/include/arch/smp/sun4v/smp.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/smp/sun4v/smp.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,48 @@ +/* + * Copyright (c) 2009 Pavel Rimsky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64 + * @{ + */ +/** + * @file + * @brief sun4v smp functions + */ + +#ifndef KERN_sparc64_sun4v_SMP_H_ +#define KERN_sparc64_sun4v_SMP_H_ + +#include +#include + +extern bool calculate_optimal_nrdy(exec_unit_t *); + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/sparc64.h =================================================================== --- kernel/arch/sparc64/include/arch/sparc64.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/sparc64.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64 + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc64_SPARC64_H_ +#define KERN_sparc64_SPARC64_H_ + +#include + +extern void interrupt_register(unsigned int, const char *, iroutine_t); + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/stack.h =================================================================== --- kernel/arch/sparc64/include/arch/stack.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/stack.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,72 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64 + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc64_STACK_H_ +#define KERN_sparc64_STACK_H_ + +#define STACK_ITEM_SIZE 8 + +/** According to SPARC Compliance Definition, every stack frame is 16-byte aligned. */ +#define STACK_ALIGNMENT 16 + +/** + * 16-extended-word save area for %i[0-7] and %l[0-7] registers. + */ +#define STACK_WINDOW_SAVE_AREA_SIZE (16 * STACK_ITEM_SIZE) + +/** + * Six extended words for first six arguments. + */ +#define STACK_ARG_SAVE_AREA_SIZE (6 * STACK_ITEM_SIZE) + +/** + * By convention, the actual top of the stack is %sp + STACK_BIAS. + */ +#define STACK_BIAS 2047 + +/* + * Offsets of arguments on stack. + */ +#define STACK_ARG0 0 +#define STACK_ARG1 8 +#define STACK_ARG2 16 +#define STACK_ARG3 24 +#define STACK_ARG4 32 +#define STACK_ARG5 40 +#define STACK_ARG6 48 + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/sun4u/arch.h =================================================================== --- kernel/arch/sparc64/include/arch/sun4u/arch.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/sun4u/arch.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,47 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64 + * @{ + */ +/** + * @file + * @brief Various sun4u-specific macros. + */ + +#ifndef KERN_sparc64_sun4u_ARCH_H_ +#define KERN_sparc64_sun4u_ARCH_H_ + +#define ASI_NUCLEUS_QUAD_LDD 0x24 /** ASI for 16-byte atomic loads. */ +#define ASI_DCACHE_TAG 0x47 /** ASI D-Cache Tag. */ +#define ASI_ICBUS_CONFIG 0x4a /** ASI of the UPA_CONFIG/FIREPLANE_CONFIG register. */ + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/sun4u/asm.h =================================================================== --- kernel/arch/sparc64/include/arch/sun4u/asm.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/sun4u/asm.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,65 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64 + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc64_sun4u_ASM_H_ +#define KERN_sparc64_sun4u_ASM_H_ + +#include + +/** Read Version Register. + * + * @return Value of VER register. + * + */ +NO_TRACE static inline uint64_t ver_read(void) +{ + uint64_t v; + + asm volatile ( + "rdpr %%ver, %[v]\n" + : [v] "=r" (v) + ); + + return v; +} + +extern uint64_t read_from_ag_g7(void); +extern void write_to_ag_g6(uint64_t); +extern void write_to_ag_g7(uint64_t); +extern void write_to_ig_g6(uint64_t); + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/sun4u/cpu.h =================================================================== --- kernel/arch/sparc64/include/arch/sun4u/cpu.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/sun4u/cpu.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,95 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64 + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc64_sun4u_CPU_H_ +#define KERN_sparc64_sun4u_CPU_H_ + +#define MANUF_FUJITSU 0x04 +#define MANUF_ULTRASPARC 0x17 /**< UltraSPARC I, UltraSPARC II */ +#define MANUF_SUN 0x3e + +#define IMPL_ULTRASPARCI 0x10 +#define IMPL_ULTRASPARCII 0x11 +#define IMPL_ULTRASPARCII_I 0x12 +#define IMPL_ULTRASPARCII_E 0x13 +#define IMPL_ULTRASPARCIII 0x14 +#define IMPL_ULTRASPARCIII_PLUS 0x15 +#define IMPL_ULTRASPARCIII_I 0x16 +#define IMPL_ULTRASPARCIV 0x18 +#define IMPL_ULTRASPARCIV_PLUS 0x19 + +#define IMPL_SPARC64V 0x5 + +#ifndef __ASM__ + +#include +#include +#include +#include +#include + +typedef struct { + uint32_t mid; /**< Processor ID as read from + UPA_CONFIG/FIREPLANE_CONFIG. */ + ver_reg_t ver; + uint32_t clock_frequency; /**< Processor frequency in Hz. */ + uint64_t next_tick_cmpr; /**< Next clock interrupt should be + generated when the TICK register + matches this value. */ +} cpu_arch_t; + +/** Read the module ID (agent ID/CPUID) of the current CPU. + * + */ +NO_TRACE static inline uint32_t read_mid(void) +{ + uint64_t icbus_config = asi_u64_read(ASI_ICBUS_CONFIG, 0); + icbus_config = icbus_config >> ICBUS_CONFIG_MID_SHIFT; + +#if defined (US) + return icbus_config & 0x1f; +#elif defined (US3) + if (((ver_reg_t) ver_read()).impl == IMPL_ULTRASPARCIII_I) + return icbus_config & 0x1f; + else + return icbus_config & 0x3ff; +#endif +} + +#endif + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/sun4v/arch.h =================================================================== --- kernel/arch/sparc64/include/arch/sun4v/arch.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/sun4v/arch.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,63 @@ +/* + * Copyright (c) 2009 Pavel Rimsky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64 + * @{ + */ +/** + * @file + * @brief Various sun4v-specific macros. + */ + +#ifndef KERN_sparc64_sun4v_ARCH_H_ +#define KERN_sparc64_sun4v_ARCH_H_ + +/* scratch pad registers ASI */ +#define ASI_SCRATCHPAD 0x20 + +/* + * Assignment of scratchpad register virtual addresses. The same convention is + * used by both Linux and Solaris. + */ + +/* register where the address of the MMU fault status area will be stored */ +#define SCRATCHPAD_MMU_FSA 0x00 + +/* register where the CPUID will be stored */ +#define SCRATCHPAD_CPUID 0x08 + +/* register where the kernel stack address will be stored */ +#define SCRATCHPAD_KSTACK 0x10 + +/* register where the userspace window buffer address will be stored */ +#define SCRATCHPAD_WBUF 0x18 + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/sun4v/asm.h =================================================================== --- kernel/arch/sparc64/include/arch/sun4v/asm.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/sun4v/asm.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,41 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64 + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc64_sun4v_ASM_H_ +#define KERN_sparc64_sun4v_ASM_H_ + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/sun4v/cpu.h =================================================================== --- kernel/arch/sparc64/include/arch/sun4v/cpu.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/sun4v/cpu.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,76 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64 + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc64_sun4v_CPU_H_ +#define KERN_sparc64_sun4v_CPU_H_ + +/** Maximum number of virtual processors. */ +#define MAX_NUM_STRANDS 64 + +/** Maximum number of logical processors in a processor core */ +#define MAX_CORE_STRANDS 8 + +#ifndef __ASM__ + +#include +#include + +struct cpu; + +typedef struct { + uint64_t exec_unit_id; + uint8_t strand_count; + uint64_t cpuids[MAX_CORE_STRANDS]; + struct cpu *cpus[MAX_CORE_STRANDS]; + atomic_t nrdy; + SPINLOCK_DECLARE(proposed_nrdy_lock); +} exec_unit_t; + +typedef struct cpu_arch { + uint64_t id; /**< virtual processor ID */ + uint32_t clock_frequency; /**< Processor frequency in Hz. */ + uint64_t next_tick_cmpr; /**< Next clock interrupt should be + generated when the TICK register + matches this value. */ + exec_unit_t *exec_unit; /**< Physical core. */ + unsigned long proposed_nrdy; /**< Proposed No. of ready threads + so that cores are equally balanced. */ +} cpu_arch_t; + +#endif + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/sun4v/hypercall.h =================================================================== --- kernel/arch/sparc64/include/arch/sun4v/hypercall.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/sun4v/hypercall.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,250 @@ +/* + * Copyright (c) 2008 Pavel Rimsky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64 + * @{ + */ +/** + * @file + * @brief Macros, constants and functions needed to perform a call to the + * hypervisor API. For details and terminology see this document: + * UltraSPARC Virtual Machine Specification (The Hypervisor API + * specification for Logical Domains). + * + */ + +#ifndef KERN_sparc64_sun4v_HYPERCALL_H_ +#define KERN_sparc64_sun4v_HYPERCALL_H_ + +/* SW trap numbers for hyperfast traps */ +#define FAST_TRAP 0x80 +#define MMU_MAP_ADDR 0x83 +#define MMU_UNMAP_ADDR 0x84 + +/* function codes for fast traps */ +#define MACH_DESC 0x01 +#define CPU_START 0x10 +#define CPU_STOP 0x11 +#define CPU_YIELD 0x12 +#define CPU_QCONF 0x14 +#define CPU_MYID 0x16 +#define CPU_STATE 0x17 +#define CPU_SET_RTBA 0x18 +#define CPU_GET_RTBA 0x19 +#define MMU_TSB_CTX0 0x20 +#define MMU_TSB_CTXNON0 0x21 +#define MMU_DEMAP_PAGE 0x22 +#define MMU_DEMAP_CTX 0x23 +#define MMU_DEMAP_ALL 0x24 +#define MMU_MAP_PERM_ADDR 0x25 +#define MMU_FAULT_AREA_CONF 0x26 +#define MMU_ENABLE 0x27 +#define MMU_UNMAP_PERM_ADDR 0x28 +#define MMU_TSB_CTX0_INFO 0x29 +#define MMU_TSB_CTXNON0_INFO 0x2a +#define MMU_FAULT_AREA_INFO 0x2b +#define CPU_MONDO_SEND 0x42 +#define CONS_GETCHAR 0x60 +#define CONS_PUTCHAR 0x61 + + +/* return codes */ +#define HV_EOK 0 /**< Successful return */ +#define HV_ENOCPU 1 /**< Invalid CPU id */ +#define HV_ENORADDR 2 /**< Invalid real address */ +#define HV_ENOINTR 3 /**< Invalid interrupt id */ +#define HV_EBADPGSZ 4 /**< Invalid pagesize encoding */ +#define HV_EBADTSB 5 /**< Invalid TSB description */ +#define HV_EINVAL 6 /**< Invalid argument */ +#define HV_EBADTRAP 7 /**< Invalid function number */ +#define HV_EBADALIGN 8 /**< Invalid address alignment */ +#define HV_EWOULDBLOCK 9 /**< Cannot complete operation without blocking */ +#define HV_ENOACCESS 10 /**< No access to specified resource */ +#define HV_EIO 11 /**< I/O Error */ +#define HV_ECPUERROR 12 /**< CPU is in error state */ +#define HV_ENOTSUPPORTED 13 /**< Function not supported */ +#define HV_ENOMAP 14 /**< No mapping found */ +#define HV_ETOOMANY 15 /**< Too many items specified / limit reached */ +#define HV_ECHANNEL 16 /**< Invalid LDC channel */ +#define HV_EBUSY 17 /**< Operation failed as resource is otherwise busy */ + + +/** + * Performs a hyperfast hypervisor API call from the assembly language code. + * Expects the registers %o1-%o4 are properly filled with the arguments of the + * call. + * + * @param function_number hyperfast call function number + */ +#define __HYPERCALL_FAST(function_number) \ + set function_number, %o5; \ + ta FAST_TRAP; + +/** + * Performs a fast hypervisor API call from the assembly language code. + * Expects the registers %o1-%o4 are properly filled with the arguments of the + * call. + * + * @param sw_trap_number software trap number + */ +#define __HYPERCALL_HYPERFAST(sw_trap_number) \ + ta (sw_trap_number); + + +#ifndef __ASM__ + +#include + +/* + * Macros to be used from the C-language code; __hypercall_fastN performs + * a fast hypervisor API call taking exactly N arguments. + */ + +#define __hypercall_fast0(function_number) \ + __hypercall_fast(0, 0, 0, 0, 0, function_number) +#define __hypercall_fast1(function_number, p1) \ + __hypercall_fast(p1, 0, 0, 0, 0, function_number) +#define __hypercall_fast2(function_number, p1, p2) \ + __hypercall_fast(p1, p2, 0, 0, 0, function_number) +#define __hypercall_fast3(function_number, p1, p2, p3) \ + __hypercall_fast(p1, p2, p3, 0, 0, function_number) +#define __hypercall_fast4(function_number, p1, p2, p3, p4) \ + __hypercall_fast(p1, p2, p3, p4, 0, function_number) +#define __hypercall_fast5(function_number, p1, p2, p3, p4, p5) \ + __hypercall_fast(p1, p2, p3, p4, p5, function_number) + +/** + * Performs a fast hypervisor API call which returns no value except for the + * error status. + * + * @param p1 the 1st argument of the hypervisor API call + * @param p2 the 2nd argument of the hypervisor API call + * @param p3 the 3rd argument of the hypervisor API call + * @param p4 the 4th argument of the hypervisor API call + * @param p5 the 5th argument of the hypervisor API call + * @param function_number function number of the call + * @return error status + */ +static inline uint64_t +__hypercall_fast(const uint64_t p1, const uint64_t p2, const uint64_t p3, + const uint64_t p4, const uint64_t p5, const uint64_t function_number) +{ + register uint64_t a6 asm("o5") = function_number; + register uint64_t a1 asm("o0") = p1; + register uint64_t a2 asm("o1") = p2; + register uint64_t a3 asm("o2") = p3; + register uint64_t a4 asm("o3") = p4; + register uint64_t a5 asm("o4") = p5; + + asm volatile ( + "ta %7\n" + : "=r" (a1) + : "r" (a1), "r" (a2), "r" (a3), "r" (a4), "r" (a5), "r" (a6), + "i" (FAST_TRAP) + : "memory" + ); + + return a1; +} + +/** + * Performs a fast hypervisor API call which can return a value. + * + * @param p1 the 1st argument of the hypervisor API call + * @param p2 the 2nd argument of the hypervisor API call + * @param p3 the 3rd argument of the hypervisor API call + * @param p4 the 4th argument of the hypervisor API call + * @param p5 the 5th argument of the hypervisor API call + * @param function_number function number of the call + * @param ret1 pointer to an address where the return value + * of the hypercall should be saved, or NULL + * @return error status + */ +static inline uint64_t +__hypercall_fast_ret1(const uint64_t p1, const uint64_t p2, const uint64_t p3, + const uint64_t p4, const uint64_t p5, const uint64_t function_number, + uint64_t *ret1) +{ + register uint64_t a6 asm("o5") = function_number; + register uint64_t a1 asm("o0") = p1; + register uint64_t a2 asm("o1") = p2; + register uint64_t a3 asm("o2") = p3; + register uint64_t a4 asm("o3") = p4; + register uint64_t a5 asm("o4") = p5; + + asm volatile ( + "ta %8\n" + : "=r" (a1), "=r" (a2) + : "r" (a1), "r" (a2), "r" (a3), "r" (a4), "r" (a5), "r" (a6), + "i" (FAST_TRAP) + : "memory" + ); + + if (ret1) + *ret1 = a2; + + return a1; +} + +/** + * Performs a hyperfast hypervisor API call. + * + * @param p1 the 1st argument of the hypervisor API call + * @param p2 the 2nd argument of the hypervisor API call + * @param p3 the 3rd argument of the hypervisor API call + * @param p4 the 4th argument of the hypervisor API call + * @param p5 the 5th argument of the hypervisor API call + * @param sw_trap_number software trap number + */ +static inline uint64_t +__hypercall_hyperfast(const uint64_t p1, const uint64_t p2, const uint64_t p3, + const uint64_t p4, const uint64_t p5, const uint64_t sw_trap_number) +{ + register uint64_t a1 asm("o0") = p1; + register uint64_t a2 asm("o1") = p2; + register uint64_t a3 asm("o2") = p3; + register uint64_t a4 asm("o3") = p4; + register uint64_t a5 asm("o4") = p5; + + asm volatile ( + "ta %6\n" + : "=r" (a1) + : "r" (a1), "r" (a2), "r" (a3), "r" (a4), "r" (a5), + "i" (sw_trap_number) + : "memory" + ); + + return a1; +} + +#endif /* ASM */ + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/sun4v/ipi.h =================================================================== --- kernel/arch/sparc64/include/arch/sun4v/ipi.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/sun4v/ipi.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,48 @@ +/* + * Copyright (c) 2009 Pavel Rimsky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64 + * @{ + */ +/** + * @file + * @brief sun4v-specific IPI functions + */ + +#ifndef KERN_sparc64_sun4v_IPI_H_ +#define KERN_sparc64_sun4v_IPI_H_ + +#include + +extern uint64_t ipi_brodcast_to(void (*)(void), uint16_t cpu_list[], uint64_t); +extern uint64_t ipi_unicast_to(void (*)(void), uint16_t); + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/sun4v/md.h =================================================================== --- kernel/arch/sparc64/include/arch/sun4v/md.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/sun4v/md.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,65 @@ +/* + * Copyright (c) 2009 Pavel Rimsky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64 + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc64_sun4v_MD_H_ +#define KERN_sparc64_sun4v_MD_H_ + +#include + +/** + * Data type used to iterate through MD nodes. Internally represented as + * an index to the first element of the node. + */ +typedef unsigned int md_node_t; + +/** used to iterate over children of a given node */ +typedef unsigned int md_child_iter_t; + +md_node_t md_get_root(void); +md_node_t md_get_child(md_node_t node, char *name); +md_child_iter_t md_get_child_iterator(md_node_t node); +bool md_next_child(md_child_iter_t *it); +md_node_t md_get_child_node(md_child_iter_t it); +const char *md_get_node_name(md_node_t node); +bool md_get_integer_property(md_node_t node, const char *key, + uint64_t *result); +bool md_get_string_property(md_node_t node, const char *key, + const char **result); +bool md_next_node(md_node_t *node, const char *name); +void md_init(void); + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/sun4v/regdef.h =================================================================== --- kernel/arch/sparc64/include/arch/sun4v/regdef.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/sun4v/regdef.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,47 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * Copyright (c) 2008 Pavel Rimsky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64 + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc64_sun4v_REGDEF_H_ +#define KERN_sparc64_sun4v_REGDEF_H_ + +#define TSTATE_CWP_MASK 0x1f + +#define WSTATE_NORMAL(n) (n) +#define WSTATE_OTHER(n) ((n) << 3) + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/sun4v/register.h =================================================================== --- kernel/arch/sparc64/include/arch/sun4v/register.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/sun4v/register.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,62 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64 + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc64_sun4v_REGISTER_H_ +#define KERN_sparc64_sun4v_REGISTER_H_ + +#include +#include + +/** Processor State Register. */ +union pstate_reg { + uint64_t value; + struct { + uint64_t : 54; + unsigned cle : 1; /**< Current Little Endian. */ + unsigned tle : 1; /**< Trap Little Endian. */ + unsigned mm : 2; /**< Memory Model. */ + unsigned : 1; /**< RED state. */ + unsigned pef : 1; /**< Enable floating-point. */ + unsigned am : 1; /**< 32-bit Address Mask. */ + unsigned priv : 1; /**< Privileged Mode. */ + unsigned ie : 1; /**< Interrupt Enable. */ + unsigned : 1; + } __attribute__ ((packed)); +}; +typedef union pstate_reg pstate_reg_t; + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/trap/exception.h =================================================================== --- kernel/arch/sparc64/include/arch/trap/exception.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/trap/exception.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,98 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64interrupt + * @{ + */ +/** + * @file + */ + +#ifndef KERN_sparc64_EXCEPTION_H_ +#define KERN_sparc64_EXCEPTION_H_ + +#define TT_INSTRUCTION_ACCESS_EXCEPTION 0x08 +#define TT_INSTRUCTION_ACCESS_MMU_MISS 0x09 +#define TT_INSTRUCTION_ACCESS_ERROR 0x0a +#define TT_IAE_UNAUTH_ACCESS 0x0b +#define TT_IAE_NFO_PAGE 0x0c +#define TT_ILLEGAL_INSTRUCTION 0x10 +#define TT_PRIVILEGED_OPCODE 0x11 +#define TT_UNIMPLEMENTED_LDD 0x12 +#define TT_UNIMPLEMENTED_STD 0x13 +#define TT_DAE_INVALID_ASI 0x14 +#define TT_DAE_PRIVILEGE_VIOLATION 0x15 +#define TT_DAE_NC_PAGE 0x16 +#define TT_DAE_NFO_PAGE 0x17 +#define TT_FP_DISABLED 0x20 +#define TT_FP_EXCEPTION_IEEE_754 0x21 +#define TT_FP_EXCEPTION_OTHER 0x22 +#define TT_TAG_OVERFLOW 0x23 +#define TT_DIVISION_BY_ZERO 0x28 +#define TT_DATA_ACCESS_EXCEPTION 0x30 +#define TT_DATA_ACCESS_MMU_MISS 0x31 +#define TT_DATA_ACCESS_ERROR 0x32 +#define TT_MEM_ADDRESS_NOT_ALIGNED 0x34 +#define TT_LDDF_MEM_ADDRESS_NOT_ALIGNED 0x35 +#define TT_STDF_MEM_ADDRESS_NOT_ALIGNED 0x36 +#define TT_PRIVILEGED_ACTION 0x37 +#define TT_LDQF_MEM_ADDRESS_NOT_ALIGNED 0x38 +#define TT_STQF_MEM_ADDRESS_NOT_ALIGNED 0x39 + +#ifndef __ASM__ + +#include + +extern void dump_istate(istate_t *istate); + +extern void instruction_access_exception(int n, istate_t *istate); +extern void instruction_access_error(int n, istate_t *istate); +extern void illegal_instruction(int n, istate_t *istate); +extern void privileged_opcode(int n, istate_t *istate); +extern void unimplemented_LDD(int n, istate_t *istate); +extern void unimplemented_STD(int n, istate_t *istate); +extern void fp_disabled(int n, istate_t *istate); +extern void fp_exception_ieee_754(int n, istate_t *istate); +extern void fp_exception_other(int n, istate_t *istate); +extern void tag_overflow(int n, istate_t *istate); +extern void division_by_zero(int n, istate_t *istate); +extern void data_access_exception(int n, istate_t *istate); +extern void data_access_error(int n, istate_t *istate); +extern void mem_address_not_aligned(int n, istate_t *istate); +extern void LDDF_mem_address_not_aligned(int n, istate_t *istate); +extern void STDF_mem_address_not_aligned(int n, istate_t *istate); +extern void privileged_action(int n, istate_t *istate); +extern void LDQF_mem_address_not_aligned(int n, istate_t *istate); +extern void STQF_mem_address_not_aligned(int n, istate_t *istate); + +#endif /* !__ASM__ */ + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/trap/interrupt.h =================================================================== --- kernel/arch/sparc64/include/arch/trap/interrupt.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/trap/interrupt.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,90 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64interrupt + * @{ + */ +/** + * @file + * @brief This file contains level N interrupt and inter-processor interrupt + * trap handler. + */ +#ifndef KERN_sparc64_INTERRUPT_TRAP_H_ +#define KERN_sparc64_INTERRUPT_TRAP_H_ + +#define TT_INTERRUPT_LEVEL_1 0x41 +#define TT_INTERRUPT_LEVEL_2 0x42 +#define TT_INTERRUPT_LEVEL_3 0x43 +#define TT_INTERRUPT_LEVEL_4 0x44 +#define TT_INTERRUPT_LEVEL_5 0x45 +#define TT_INTERRUPT_LEVEL_6 0x46 +#define TT_INTERRUPT_LEVEL_7 0x47 +#define TT_INTERRUPT_LEVEL_8 0x48 +#define TT_INTERRUPT_LEVEL_9 0x49 +#define TT_INTERRUPT_LEVEL_10 0x4a +#define TT_INTERRUPT_LEVEL_11 0x4b +#define TT_INTERRUPT_LEVEL_12 0x4c +#define TT_INTERRUPT_LEVEL_13 0x4d +#define TT_INTERRUPT_LEVEL_14 0x4e +#define TT_INTERRUPT_LEVEL_15 0x4f + +#define INTERRUPT_LEVEL_N_HANDLER_SIZE TRAP_TABLE_ENTRY_SIZE + +/* IMAP register bits */ +#define IGN_MASK 0x7c0 +#define INO_MASK 0x1f +#define IMAP_V_MASK (1ULL << 31) + +#define IGN_SHIFT 6 + + +#ifdef __ASM__ +.macro INTERRUPT_LEVEL_N_HANDLER n + mov \n - 1, %g2 + PREEMPTIBLE_HANDLER exc_dispatch +.endm +#endif + +#ifndef __ASM__ + +#include + +extern void interrupt(int n, istate_t *istate); +#endif /* !def __ASM__ */ + + +#if defined (SUN4U) +#include +#elif defined (SUN4V) +#include +#endif + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/trap/mmu.h =================================================================== --- kernel/arch/sparc64/include/arch/trap/mmu.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/trap/mmu.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,49 @@ +/* + * Copyright (c) 2006 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64interrupt + * @{ + */ +/** + * @file + * @brief This file contains fast MMU trap handlers. + */ + +#ifndef KERN_sparc64_MMU_TRAP_H_ +#define KERN_sparc64_MMU_TRAP_H_ + +#if defined (SUN4U) +#include +#elif defined (SUN4V) +#include +#endif + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/trap/regwin.h =================================================================== --- kernel/arch/sparc64/include/arch/trap/regwin.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/trap/regwin.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,216 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64interrupt + * @{ + */ +/** + * @file + * @brief This file contains register window trap handlers. + */ + +#ifndef KERN_sparc64_REGWIN_H_ +#define KERN_sparc64_REGWIN_H_ + +#include +#include +#include + +#define TT_CLEAN_WINDOW 0x24 +#define TT_SPILL_0_NORMAL 0x80 /* kernel spills */ +#define TT_SPILL_1_NORMAL 0x84 /* userspace spills */ +#define TT_SPILL_2_NORMAL 0x88 /* spills to userspace window buffer */ +#define TT_SPILL_0_OTHER 0xa0 /* spills to userspace window buffer */ +#define TT_FILL_0_NORMAL 0xc0 /* kernel fills */ +#define TT_FILL_1_NORMAL 0xc4 /* userspace fills */ + +#define REGWIN_HANDLER_SIZE 128 + +#define CLEAN_WINDOW_HANDLER_SIZE REGWIN_HANDLER_SIZE +#define SPILL_HANDLER_SIZE REGWIN_HANDLER_SIZE +#define FILL_HANDLER_SIZE REGWIN_HANDLER_SIZE + +/* Window Save Area offsets. */ +#define L0_OFFSET 0 +#define L1_OFFSET 8 +#define L2_OFFSET 16 +#define L3_OFFSET 24 +#define L4_OFFSET 32 +#define L5_OFFSET 40 +#define L6_OFFSET 48 +#define L7_OFFSET 56 +#define I0_OFFSET 64 +#define I1_OFFSET 72 +#define I2_OFFSET 80 +#define I3_OFFSET 88 +#define I4_OFFSET 96 +#define I5_OFFSET 104 +#define I6_OFFSET 112 +#define I7_OFFSET 120 + +/* Uspace Window Buffer constants. */ +#define UWB_SIZE ((NWINDOWS - 1) * STACK_WINDOW_SAVE_AREA_SIZE) +#define UWB_ALIGNMENT 1024 +#define UWB_ASIZE ALIGN_UP(UWB_SIZE, UWB_ALIGNMENT) + +#ifdef __ASM__ + +/* + * Macro used by the nucleus and the primary context 0 during normal and other spills. + */ +.macro SPILL_NORMAL_HANDLER_KERNEL + stx %l0, [%sp + STACK_BIAS + L0_OFFSET] + stx %l1, [%sp + STACK_BIAS + L1_OFFSET] + stx %l2, [%sp + STACK_BIAS + L2_OFFSET] + stx %l3, [%sp + STACK_BIAS + L3_OFFSET] + stx %l4, [%sp + STACK_BIAS + L4_OFFSET] + stx %l5, [%sp + STACK_BIAS + L5_OFFSET] + stx %l6, [%sp + STACK_BIAS + L6_OFFSET] + stx %l7, [%sp + STACK_BIAS + L7_OFFSET] + stx %i0, [%sp + STACK_BIAS + I0_OFFSET] + stx %i1, [%sp + STACK_BIAS + I1_OFFSET] + stx %i2, [%sp + STACK_BIAS + I2_OFFSET] + stx %i3, [%sp + STACK_BIAS + I3_OFFSET] + stx %i4, [%sp + STACK_BIAS + I4_OFFSET] + stx %i5, [%sp + STACK_BIAS + I5_OFFSET] + stx %i6, [%sp + STACK_BIAS + I6_OFFSET] + stx %i7, [%sp + STACK_BIAS + I7_OFFSET] + saved + retry +.endm + +/* + * Macro used by the userspace during normal spills. + */ +.macro SPILL_NORMAL_HANDLER_USERSPACE + wr %g0, ASI_AIUP, %asi + stxa %l0, [%sp + STACK_BIAS + L0_OFFSET] %asi + stxa %l1, [%sp + STACK_BIAS + L1_OFFSET] %asi + stxa %l2, [%sp + STACK_BIAS + L2_OFFSET] %asi + stxa %l3, [%sp + STACK_BIAS + L3_OFFSET] %asi + stxa %l4, [%sp + STACK_BIAS + L4_OFFSET] %asi + stxa %l5, [%sp + STACK_BIAS + L5_OFFSET] %asi + stxa %l6, [%sp + STACK_BIAS + L6_OFFSET] %asi + stxa %l7, [%sp + STACK_BIAS + L7_OFFSET] %asi + stxa %i0, [%sp + STACK_BIAS + I0_OFFSET] %asi + stxa %i1, [%sp + STACK_BIAS + I1_OFFSET] %asi + stxa %i2, [%sp + STACK_BIAS + I2_OFFSET] %asi + stxa %i3, [%sp + STACK_BIAS + I3_OFFSET] %asi + stxa %i4, [%sp + STACK_BIAS + I4_OFFSET] %asi + stxa %i5, [%sp + STACK_BIAS + I5_OFFSET] %asi + stxa %i6, [%sp + STACK_BIAS + I6_OFFSET] %asi + stxa %i7, [%sp + STACK_BIAS + I7_OFFSET] %asi + saved + retry +.endm + +/* + * Macro used by the nucleus and the primary context 0 during normal fills. + */ +.macro FILL_NORMAL_HANDLER_KERNEL + ldx [%sp + STACK_BIAS + L0_OFFSET], %l0 + ldx [%sp + STACK_BIAS + L1_OFFSET], %l1 + ldx [%sp + STACK_BIAS + L2_OFFSET], %l2 + ldx [%sp + STACK_BIAS + L3_OFFSET], %l3 + ldx [%sp + STACK_BIAS + L4_OFFSET], %l4 + ldx [%sp + STACK_BIAS + L5_OFFSET], %l5 + ldx [%sp + STACK_BIAS + L6_OFFSET], %l6 + ldx [%sp + STACK_BIAS + L7_OFFSET], %l7 + ldx [%sp + STACK_BIAS + I0_OFFSET], %i0 + ldx [%sp + STACK_BIAS + I1_OFFSET], %i1 + ldx [%sp + STACK_BIAS + I2_OFFSET], %i2 + ldx [%sp + STACK_BIAS + I3_OFFSET], %i3 + ldx [%sp + STACK_BIAS + I4_OFFSET], %i4 + ldx [%sp + STACK_BIAS + I5_OFFSET], %i5 + ldx [%sp + STACK_BIAS + I6_OFFSET], %i6 + ldx [%sp + STACK_BIAS + I7_OFFSET], %i7 + restored + retry +.endm + +/* + * Macro used by the userspace during normal fills. + */ +.macro FILL_NORMAL_HANDLER_USERSPACE + wr %g0, ASI_AIUP, %asi + ldxa [%sp + STACK_BIAS + L0_OFFSET] %asi, %l0 + ldxa [%sp + STACK_BIAS + L1_OFFSET] %asi, %l1 + ldxa [%sp + STACK_BIAS + L2_OFFSET] %asi, %l2 + ldxa [%sp + STACK_BIAS + L3_OFFSET] %asi, %l3 + ldxa [%sp + STACK_BIAS + L4_OFFSET] %asi, %l4 + ldxa [%sp + STACK_BIAS + L5_OFFSET] %asi, %l5 + ldxa [%sp + STACK_BIAS + L6_OFFSET] %asi, %l6 + ldxa [%sp + STACK_BIAS + L7_OFFSET] %asi, %l7 + ldxa [%sp + STACK_BIAS + I0_OFFSET] %asi, %i0 + ldxa [%sp + STACK_BIAS + I1_OFFSET] %asi, %i1 + ldxa [%sp + STACK_BIAS + I2_OFFSET] %asi, %i2 + ldxa [%sp + STACK_BIAS + I3_OFFSET] %asi, %i3 + ldxa [%sp + STACK_BIAS + I4_OFFSET] %asi, %i4 + ldxa [%sp + STACK_BIAS + I5_OFFSET] %asi, %i5 + ldxa [%sp + STACK_BIAS + I6_OFFSET] %asi, %i6 + ldxa [%sp + STACK_BIAS + I7_OFFSET] %asi, %i7 + restored + retry +.endm + +.macro CLEAN_WINDOW_HANDLER + rdpr %cleanwin, %l0 + add %l0, 1, %l0 + wrpr %l0, 0, %cleanwin +#if defined(SUN4U) + mov %r0, %l0 + mov %r0, %l1 + mov %r0, %l2 + mov %r0, %l3 + mov %r0, %l4 + mov %r0, %l5 + mov %r0, %l6 + mov %r0, %l7 + mov %r0, %o0 + mov %r0, %o1 + mov %r0, %o2 + mov %r0, %o3 + mov %r0, %o4 + mov %r0, %o5 + mov %r0, %o6 + mov %r0, %o7 +#endif + retry +.endm +#endif /* __ASM__ */ + +#if defined(SUN4U) +#include +#elif defined(SUN4V) +#include +#endif + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/trap/sun4u/interrupt.h =================================================================== --- kernel/arch/sparc64/include/arch/trap/sun4u/interrupt.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/trap/sun4u/interrupt.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,104 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64interrupt + * @{ + */ +/** + * @file + * @brief This file contains interrupt vector trap handler. + */ + +#ifndef KERN_sparc64_TRAP_SUN4U_INTERRUPT_H_ +#define KERN_sparc64_TRAP_SUN4U_INTERRUPT_H_ + +#include +#include + + +/* Interrupt ASI registers. */ +#define ASI_INTR_W 0x77 +#define ASI_INTR_DISPATCH_STATUS 0x48 +#define ASI_INTR_R 0x7f +#define ASI_INTR_RECEIVE 0x49 + +/* VA's used with ASI_INTR_W register. */ +#if defined (US) +#define ASI_UDB_INTR_W_DATA_0 0x40 +#define ASI_UDB_INTR_W_DATA_1 0x50 +#define ASI_UDB_INTR_W_DATA_2 0x60 +#elif defined (US3) +#define VA_INTR_W_DATA_0 0x40 +#define VA_INTR_W_DATA_1 0x48 +#define VA_INTR_W_DATA_2 0x50 +#define VA_INTR_W_DATA_3 0x58 +#define VA_INTR_W_DATA_4 0x60 +#define VA_INTR_W_DATA_5 0x68 +#define VA_INTR_W_DATA_6 0x80 +#define VA_INTR_W_DATA_7 0x88 +#endif +#define VA_INTR_W_DISPATCH 0x70 + +/* VA's used with ASI_INTR_R register. */ +#if defined(US) +#define ASI_UDB_INTR_R_DATA_0 0x40 +#define ASI_UDB_INTR_R_DATA_1 0x50 +#define ASI_UDB_INTR_R_DATA_2 0x60 +#elif defined (US3) +#define VA_INTR_R_DATA_0 0x40 +#define VA_INTR_R_DATA_1 0x48 +#define VA_INTR_R_DATA_2 0x50 +#define VA_INTR_R_DATA_3 0x58 +#define VA_INTR_R_DATA_4 0x60 +#define VA_INTR_R_DATA_5 0x68 +#define VA_INTR_R_DATA_6 0x80 +#define VA_INTR_R_DATA_7 0x88 +#endif + +/* Shifts in the Interrupt Vector Dispatch virtual address. */ +#define INTR_VEC_DISPATCH_MID_SHIFT 14 + +/* Bits in the Interrupt Dispatch Status register. */ +#define INTR_DISPATCH_STATUS_NACK 0x2 +#define INTR_DISPATCH_STATUS_BUSY 0x1 + +#define TT_INTERRUPT_VECTOR_TRAP 0x60 + +#define INTERRUPT_VECTOR_TRAP_HANDLER_SIZE TRAP_TABLE_ENTRY_SIZE + +#ifdef __ASM__ +.macro INTERRUPT_VECTOR_TRAP_HANDLER + PREEMPTIBLE_HANDLER interrupt +.endm +#endif /* __ASM__ */ + + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/trap/sun4u/mmu.h =================================================================== --- kernel/arch/sparc64/include/arch/trap/sun4u/mmu.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/trap/sun4u/mmu.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,184 @@ +/* + * Copyright (c) 2006 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64interrupt + * @{ + */ +/** + * @file + * @brief This file contains fast MMU trap handlers. + */ + +#ifndef KERN_sparc64_SUN4U_MMU_TRAP_H_ +#define KERN_sparc64_SUN4U_MMU_TRAP_H_ + +#include +#include +#include +#include +#include +#include + +#ifdef CONFIG_TSB +#include +#endif + +#define TT_FAST_INSTRUCTION_ACCESS_MMU_MISS 0x64 +#define TT_FAST_DATA_ACCESS_MMU_MISS 0x68 +#define TT_FAST_DATA_ACCESS_PROTECTION 0x6c + +#define FAST_MMU_HANDLER_SIZE 128 + +#ifdef __ASM__ + +.macro FAST_INSTRUCTION_ACCESS_MMU_MISS_HANDLER + /* + * First, try to refill TLB from TSB. + */ +#ifdef CONFIG_TSB + ldxa [%g0] ASI_IMMU, %g1 ! read TSB Tag Target Register + ldxa [%g0] ASI_IMMU_TSB_8KB_PTR_REG, %g2 ! read TSB 8K Pointer + ldda [%g2] ASI_NUCLEUS_QUAD_LDD, %g4 ! 16-byte atomic load into %g4 and %g5 + cmp %g1, %g4 ! is this the entry we are looking for? + bne,pn %xcc, 0f + nop + stxa %g5, [%g0] ASI_ITLB_DATA_IN_REG ! copy mapping from ITSB to ITLB + retry +#endif + +0: + wrpr %g0, PSTATE_PRIV_BIT | PSTATE_AG_BIT, %pstate + PREEMPTIBLE_HANDLER fast_instruction_access_mmu_miss +.endm + +.macro FAST_DATA_ACCESS_MMU_MISS_HANDLER tl + /* + * First, try to refill TLB from TSB. + */ + +#ifdef CONFIG_TSB + ldxa [%g0] ASI_DMMU, %g1 ! read TSB Tag Target Register + srlx %g1, TSB_TAG_TARGET_CONTEXT_SHIFT, %g2 ! is this a kernel miss? + brz,pn %g2, 0f + ldxa [%g0] ASI_DMMU_TSB_8KB_PTR_REG, %g3 ! read TSB 8K Pointer + ldda [%g3] ASI_NUCLEUS_QUAD_LDD, %g4 ! 16-byte atomic load into %g4 and %g5 + cmp %g1, %g4 ! is this the entry we are looking for? + bne,pn %xcc, 0f + nop + stxa %g5, [%g0] ASI_DTLB_DATA_IN_REG ! copy mapping from DTSB to DTLB + retry +#endif + + /* + * Second, test if it is the portion of the kernel address space + * which is faulting. If that is the case, immediately create + * identity mapping for that page in DTLB. VPN 0 is excluded from + * this treatment. + * + * Note that branch-delay slots are used in order to save space. + */ +0: + sethi %hi(fast_data_access_mmu_miss_data_hi), %g7 + wr %g0, ASI_DMMU, %asi + ldxa [VA_DMMU_TAG_ACCESS] %asi, %g1 ! read the faulting Context and VPN + set TLB_TAG_ACCESS_CONTEXT_MASK, %g2 + andcc %g1, %g2, %g3 ! get Context + bnz %xcc, 0f ! Context is non-zero + andncc %g1, %g2, %g3 ! get page address into %g3 + bz %xcc, 0f ! page address is zero + ldx [%g7 + %lo(end_of_identity)], %g4 + cmp %g3, %g4 + bgeu %xcc, 0f + + ldx [%g7 + %lo(kernel_8k_tlb_data_template)], %g2 + add %g3, %g2, %g2 + stxa %g2, [%g0] ASI_DTLB_DATA_IN_REG ! identity map the kernel page + retry + + /* + * Third, catch and handle special cases when the trap is caused by + * the userspace register window spill or fill handler. In case + * one of these two traps caused this trap, we just lower the trap + * level and service the DTLB miss. In the end, we restart + * the offending SAVE or RESTORE. + */ +0: +.if (\tl > 0) + wrpr %g0, 1, %tl +.endif + + /* + * Switch from the MM globals. + */ + wrpr %g0, PSTATE_PRIV_BIT | PSTATE_AG_BIT, %pstate + + /* + * Read the Tag Access register for the higher-level handler. + * This is necessary to survive nested DTLB misses. + */ + ldxa [VA_DMMU_TAG_ACCESS] %asi, %g2 + + /* + * g2 will be passed as an argument to fast_data_access_mmu_miss(). + */ + PREEMPTIBLE_HANDLER fast_data_access_mmu_miss +.endm + +.macro FAST_DATA_ACCESS_PROTECTION_HANDLER tl + /* + * The same special case as in FAST_DATA_ACCESS_MMU_MISS_HANDLER. + */ + +.if (\tl > 0) + wrpr %g0, 1, %tl +.endif + + /* + * Switch from the MM globals. + */ + wrpr %g0, PSTATE_PRIV_BIT | PSTATE_AG_BIT, %pstate + + /* + * Read the Tag Access register for the higher-level handler. + * This is necessary to survive nested DTLB misses. + */ + mov VA_DMMU_TAG_ACCESS, %g2 + ldxa [%g2] ASI_DMMU, %g2 + + /* + * g2 will be passed as an argument to fast_data_access_mmu_miss(). + */ + PREEMPTIBLE_HANDLER fast_data_access_protection +.endm + +#endif /* __ASM__ */ + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/trap/sun4u/regwin.h =================================================================== --- kernel/arch/sparc64/include/arch/trap/sun4u/regwin.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/trap/sun4u/regwin.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,70 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64interrupt + * @{ + */ +#ifndef KERN_sparc64_sun4u_REGWIN_H_ +#define KERN_sparc64_sun4u_REGWIN_H_ + +#ifdef __ASM__ + +/* + * Macro used to spill userspace window to userspace window buffer. + * It can be either triggered from preemptible_handler doing SAVE + * at (TL=1) or from normal kernel code doing SAVE when OTHERWIN>0 + * at (TL=0). + */ +.macro SPILL_TO_USPACE_WINDOW_BUFFER + stx %l0, [%g7 + L0_OFFSET] + stx %l1, [%g7 + L1_OFFSET] + stx %l2, [%g7 + L2_OFFSET] + stx %l3, [%g7 + L3_OFFSET] + stx %l4, [%g7 + L4_OFFSET] + stx %l5, [%g7 + L5_OFFSET] + stx %l6, [%g7 + L6_OFFSET] + stx %l7, [%g7 + L7_OFFSET] + stx %i0, [%g7 + I0_OFFSET] + stx %i1, [%g7 + I1_OFFSET] + stx %i2, [%g7 + I2_OFFSET] + stx %i3, [%g7 + I3_OFFSET] + stx %i4, [%g7 + I4_OFFSET] + stx %i5, [%g7 + I5_OFFSET] + stx %i6, [%g7 + I6_OFFSET] + stx %i7, [%g7 + I7_OFFSET] + add %g7, STACK_WINDOW_SAVE_AREA_SIZE, %g7 + saved + retry +.endm + +#endif + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/trap/sun4v/interrupt.h =================================================================== --- kernel/arch/sparc64/include/arch/trap/sun4v/interrupt.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/trap/sun4v/interrupt.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,50 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64interrupt + * @{ + */ +/** + * @file + * @brief This file contains interrupt vector trap handler. + */ + +#ifndef KERN_sparc64_TRAP_SUN4V_INTERRUPT_H_ +#define KERN_sparc64_TRAP_SUN4V_INTERRUPT_H_ + +#ifndef __ASM__ + +extern void sun4v_ipi_init(void); +extern void cpu_mondo(void); + +#endif + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/trap/sun4v/mmu.h =================================================================== --- kernel/arch/sparc64/include/arch/trap/sun4v/mmu.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/trap/sun4v/mmu.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,175 @@ +/* + * Copyright (c) 2006 Jakub Jermar + * Copyright (c) 2008 Pavel Rimsky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64interrupt + * @{ + */ +/** + * @file + * @brief This file contains fast MMU trap handlers. + */ + +#ifndef KERN_sparc64_sun4v_MMU_TRAP_H_ +#define KERN_sparc64_sun4v_MMU_TRAP_H_ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#ifdef CONFIG_TSB +#include +#endif + +#define TT_FAST_INSTRUCTION_ACCESS_MMU_MISS 0x64 +#define TT_FAST_DATA_ACCESS_MMU_MISS 0x68 +#define TT_FAST_DATA_ACCESS_PROTECTION 0x6c +#define TT_CPU_MONDO 0x7c + +#define FAST_MMU_HANDLER_SIZE 128 + +#ifdef __ASM__ + +/* MMU fault status area data fault offset */ +#define FSA_DFA_OFFSET 0x48 + +/* MMU fault status area data context */ +#define FSA_DFC_OFFSET 0x50 + +/* offset of the target address within the TTE Data entry */ +#define TTE_DATA_TADDR_OFFSET 13 + +.macro FAST_INSTRUCTION_ACCESS_MMU_MISS_HANDLER + PREEMPTIBLE_HANDLER fast_instruction_access_mmu_miss +.endm + +/* + * Handler of the Fast Data Access MMU Miss trap. If the trap occurred in the kernel + * (context 0), an identity mapping (with displacement) is installed. Otherwise + * a higher level service routine is called. + */ +.macro FAST_DATA_ACCESS_MMU_MISS_HANDLER tl + mov SCRATCHPAD_MMU_FSA, %g1 + ldxa [%g1] ASI_SCRATCHPAD, %g1 ! g1 <= RA of MMU fault status area + + /* read faulting context */ + add %g1, FSA_DFC_OFFSET, %g2 ! g2 <= RA of data fault context + ldxa [%g2] ASI_REAL, %g3 ! read the fault context + + /* read the faulting address */ + add %g1, FSA_DFA_OFFSET, %g2 ! g2 <= RA of data fault address + ldxa [%g2] ASI_REAL, %g1 ! read the fault address + srlx %g1, TTE_DATA_TADDR_OFFSET, %g1 ! truncate it to page boundary + sllx %g1, TTE_DATA_TADDR_OFFSET, %g1 + + /* service by higher-level routine when context != 0 */ + brnz %g3, 0f + nop + /* exclude page number 0 from installing the identity mapping */ + brz %g1, 0f + nop + + /* + * Installing the identity does not fit into 32 instructions, call + * a separate routine. The routine performs RETRY, hence the call never + * returns. + */ + ba,a %xcc, install_identity_mapping + +0: + + /* + * One of the scenarios in which this trap can occur is when the + * register window spill/fill handler accesses a memory which is not + * mapped. In such a case, this handler will be called from TL = 1. + * We handle the situation by pretending that the MMU miss occurred + * on TL = 0. Once the MMU miss trap is services, the instruction which + * caused the spill/fill trap is restarted, the spill/fill trap occurs, + * but this time its handler accesse memory which IS mapped. + */ + .if (\tl > 0) + wrpr %g0, 1, %tl + .endif + + /* + * Save the faulting virtual page and faulting context to the %g2 + * register. The most significant 51 bits of the %g2 register will + * contain the virtual address which caused the fault truncated to the + * page boundary. The least significant 13 bits of the %g2 register + * will contain the number of the context in which the fault occurred. + * The value of the %g2 register will be passed as a parameter to the + * higher level service routine. + */ + or %g1, %g3, %g2 + + PREEMPTIBLE_HANDLER fast_data_access_mmu_miss +.endm + +/* + * Handler of the Fast Data MMU Protection trap. Finds the trapping address + * and context and calls higher level service routine. + */ +.macro FAST_DATA_ACCESS_PROTECTION_HANDLER tl + /* + * The same special case as in FAST_DATA_ACCESS_MMU_MISS_HANDLER. + */ + .if (\tl > 0) + wrpr %g0, 1, %tl + .endif + + mov SCRATCHPAD_MMU_FSA, %g1 + ldxa [%g1] ASI_SCRATCHPAD, %g1 ! g1 <= RA of MMU fault status area + + /* read faulting context */ + add %g1, FSA_DFC_OFFSET, %g2 ! g2 <= RA of data fault context + ldxa [%g2] ASI_REAL, %g3 ! read the fault context + + /* read the faulting address */ + add %g1, FSA_DFA_OFFSET, %g2 ! g2 <= RA of data fault address + ldxa [%g2] ASI_REAL, %g1 ! read the fault address + srlx %g1, TTE_DATA_TADDR_OFFSET, %g1 ! truncate it to page boundary + sllx %g1, TTE_DATA_TADDR_OFFSET, %g1 + + /* the same as for FAST_DATA_ACCESS_MMU_MISS_HANDLER */ + or %g1, %g3, %g2 + + PREEMPTIBLE_HANDLER fast_data_access_protection +.endm +#endif /* __ASM__ */ + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/trap/sun4v/regwin.h =================================================================== --- kernel/arch/sparc64/include/arch/trap/sun4v/regwin.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/trap/sun4v/regwin.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,86 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * Copyright (c) 2009 Pavel Rimsky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64interrupt + * @{ + */ +#ifndef KERN_sparc64_sun4v_REGWIN_H_ +#define KERN_sparc64_sun4v_REGWIN_H_ + +#ifdef __ASM__ + +/* + * Saves the contents of the current window to the userspace window buffer. + * Does not modify any register window registers, but updates pointer to the + * top of the userspace window buffer. + * + * Parameters: + * \tmpreg1 global register to be used for scratching purposes + * \tmpreg2 global register to be used for scratching purposes + */ +.macro SAVE_TO_USPACE_WBUF tmpreg1, tmpreg2 + set SCRATCHPAD_WBUF, \tmpreg2 + ldxa [\tmpreg2] ASI_SCRATCHPAD, \tmpreg1 + stx %l0, [\tmpreg1 + L0_OFFSET] + stx %l1, [\tmpreg1 + L1_OFFSET] + stx %l2, [\tmpreg1 + L2_OFFSET] + stx %l3, [\tmpreg1 + L3_OFFSET] + stx %l4, [\tmpreg1 + L4_OFFSET] + stx %l5, [\tmpreg1 + L5_OFFSET] + stx %l6, [\tmpreg1 + L6_OFFSET] + stx %l7, [\tmpreg1 + L7_OFFSET] + stx %i0, [\tmpreg1 + I0_OFFSET] + stx %i1, [\tmpreg1 + I1_OFFSET] + stx %i2, [\tmpreg1 + I2_OFFSET] + stx %i3, [\tmpreg1 + I3_OFFSET] + stx %i4, [\tmpreg1 + I4_OFFSET] + stx %i5, [\tmpreg1 + I5_OFFSET] + stx %i6, [\tmpreg1 + I6_OFFSET] + stx %i7, [\tmpreg1 + I7_OFFSET] + add \tmpreg1, STACK_WINDOW_SAVE_AREA_SIZE, \tmpreg1 + stxa \tmpreg1, [\tmpreg2] ASI_SCRATCHPAD +.endm + +/* + * Macro used to spill userspace window to userspace window buffer. + * It is triggered from normal kernel code doing SAVE when + * OTHERWIN>0 at (TL=0). + */ +.macro SPILL_TO_USPACE_WINDOW_BUFFER + SAVE_TO_USPACE_WBUF %g7, %g4 + saved + retry +.endm + +#endif + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/trap/syscall.h =================================================================== --- kernel/arch/sparc64/include/arch/trap/syscall.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/trap/syscall.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2006 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64interrupt + * @{ + */ +/** + * @file + * @brief + */ + +#ifndef KERN_sparc64_SYSCALL_TRAP_H_ +#define KERN_sparc64_SYSCALL_TRAP_H_ + +#define TT_TRAP_INSTRUCTION_0 0x100 + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/trap/trap.h =================================================================== --- kernel/arch/sparc64/include/arch/trap/trap.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/trap/trap.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,44 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64interrupt + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc64_TRAP_H_ +#define KERN_sparc64_TRAP_H_ + +extern void trap_init(void); + +#endif + +/** @} + */ + Index: kernel/arch/sparc64/include/arch/trap/trap_table.h =================================================================== --- kernel/arch/sparc64/include/arch/trap/trap_table.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/trap/trap_table.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,112 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64interrupt + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc64_TRAP_TABLE_H_ +#define KERN_sparc64_TRAP_TABLE_H_ + +#include + +#define TRAP_TABLE_ENTRY_COUNT 1024 +#define TRAP_TABLE_ENTRY_SIZE 32 +#define TRAP_TABLE_SIZE (TRAP_TABLE_ENTRY_COUNT * TRAP_TABLE_ENTRY_SIZE) + +/* + * The following needs to be in sync with the definition of the istate + * structure. The one STACK_ITEM_SIZE is counted for space holding the 7th + * argument to syscall_handler (i.e. syscall number) and the other + * STACK_ITEM_SIZE is counted because of the required alignment. + */ +#define PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE \ + (STACK_WINDOW_SAVE_AREA_SIZE + STACK_ARG_SAVE_AREA_SIZE + \ + (2 * STACK_ITEM_SIZE) + (12 * 8)) +#define SAVED_TSTATE -(1 * 8) +#define SAVED_TPC -(2 * 8) +#define SAVED_TNPC -(3 * 8) /* <-- istate_t begins here */ +#define SAVED_Y -(4 * 8) +#define SAVED_I0 -(5 * 8) +#define SAVED_I1 -(6 * 8) +#define SAVED_I2 -(7 * 8) +#define SAVED_I3 -(8 * 8) +#define SAVED_I4 -(9 * 8) +#define SAVED_I5 -(10 * 8) +#define SAVED_I6 -(11 * 8) +#define SAVED_I7 -(12 * 8) + +#ifndef __ASM__ + +#include + +struct trap_table_entry { + uint8_t octets[TRAP_TABLE_ENTRY_SIZE]; +} __attribute__ ((packed)); + +typedef struct trap_table_entry trap_table_entry_t; + +extern trap_table_entry_t trap_table[TRAP_TABLE_ENTRY_COUNT]; +extern trap_table_entry_t trap_table_save[TRAP_TABLE_ENTRY_COUNT]; +#endif /* !__ASM__ */ + +#ifdef __ASM__ +.macro SAVE_GLOBALS + mov %g1, %l1 + mov %g2, %l2 + mov %g3, %l3 + mov %g4, %l4 + mov %g5, %l5 + mov %g6, %l6 + mov %g7, %l7 +.endm + +.macro RESTORE_GLOBALS + mov %l1, %g1 + mov %l2, %g2 + mov %l3, %g3 + mov %l4, %g4 + mov %l5, %g5 + mov %l6, %g6 + mov %l7, %g7 +.endm + +.macro PREEMPTIBLE_HANDLER f + sethi %hi(\f), %g1 + ba %xcc, preemptible_handler + or %g1, %lo(\f), %g1 +.endm + +#endif /* __ASM__ */ + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/arch/types.h =================================================================== --- kernel/arch/sparc64/include/arch/types.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) +++ kernel/arch/sparc64/include/arch/types.h (revision 39ba6d5abac01f0fd9490e8e76f1846d4cf88f36) @@ -0,0 +1,66 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64 + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc64_TYPES_H_ +#define KERN_sparc64_TYPES_H_ + +typedef uint64_t size_t; +typedef int64_t ssize_t; + +typedef uint64_t uintptr_t; +typedef uint64_t pfn_t; + +typedef uint64_t ipl_t; + +typedef uint64_t sysarg_t; +typedef int64_t native_t; +typedef uint64_t atomic_count_t; + +typedef struct { +} fncptr_t; + +typedef uint8_t asi_t; + +#define INTN_C(c) INT64_C(c) +#define UINTN_C(c) UINT64_C(c) + +#define PRIdn PRId64 /**< Format for native_t. */ +#define PRIun PRIu64 /**< Format for sysarg_t. */ +#define PRIxn PRIx64 /**< Format for hexadecimal sysarg_t. */ +#define PRIua PRIu64 /**< Format for atomic_count_t. */ + +#endif + +/** @} + */ Index: kernel/arch/sparc64/include/asm.h =================================================================== --- kernel/arch/sparc64/include/asm.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,557 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64 - * @{ - */ -/** @file - */ - -#ifndef KERN_sparc64_ASM_H_ -#define KERN_sparc64_ASM_H_ - -#include -#include -#include -#include -#include -#include -#include -#include - -NO_TRACE static inline void pio_write_8(ioport8_t *port, uint8_t v) -{ - *port = v; - memory_barrier(); -} - -NO_TRACE static inline void pio_write_16(ioport16_t *port, uint16_t v) -{ - *port = v; - memory_barrier(); -} - -NO_TRACE static inline void pio_write_32(ioport32_t *port, uint32_t v) -{ - *port = v; - memory_barrier(); -} - -NO_TRACE static inline uint8_t pio_read_8(ioport8_t *port) -{ - uint8_t rv = *port; - memory_barrier(); - return rv; -} - -NO_TRACE static inline uint16_t pio_read_16(ioport16_t *port) -{ - uint16_t rv = *port; - memory_barrier(); - return rv; -} - -NO_TRACE static inline uint32_t pio_read_32(ioport32_t *port) -{ - uint32_t rv = *port; - memory_barrier(); - return rv; -} - -/** Read Processor State register. - * - * @return Value of PSTATE register. - * - */ -NO_TRACE static inline uint64_t pstate_read(void) -{ - uint64_t v; - - asm volatile ( - "rdpr %%pstate, %[v]\n" - : [v] "=r" (v) - ); - - return v; -} - -/** Write Processor State register. - * - * @param v New value of PSTATE register. - * - */ -NO_TRACE static inline void pstate_write(uint64_t v) -{ - asm volatile ( - "wrpr %[v], %[zero], %%pstate\n" - :: [v] "r" (v), - [zero] "i" (0) - ); -} - -/** Read TICK_compare Register. - * - * @return Value of TICK_comapre register. - * - */ -NO_TRACE static inline uint64_t tick_compare_read(void) -{ - uint64_t v; - - asm volatile ( - "rd %%tick_cmpr, %[v]\n" - : [v] "=r" (v) - ); - - return v; -} - -/** Write TICK_compare Register. - * - * @param v New value of TICK_comapre register. - * - */ -NO_TRACE static inline void tick_compare_write(uint64_t v) -{ - asm volatile ( - "wr %[v], %[zero], %%tick_cmpr\n" - :: [v] "r" (v), - [zero] "i" (0) - ); -} - -/** Read STICK_compare Register. - * - * @return Value of STICK_compare register. - * - */ -NO_TRACE static inline uint64_t stick_compare_read(void) -{ - uint64_t v; - - asm volatile ( - "rd %%asr25, %[v]\n" - : [v] "=r" (v) - ); - - return v; -} - -/** Write STICK_compare Register. - * - * @param v New value of STICK_comapre register. - * - */ -NO_TRACE static inline void stick_compare_write(uint64_t v) -{ - asm volatile ( - "wr %[v], %[zero], %%asr25\n" - :: [v] "r" (v), - [zero] "i" (0) - ); -} - -/** Read TICK Register. - * - * @return Value of TICK register. - * - */ -NO_TRACE static inline uint64_t tick_read(void) -{ - uint64_t v; - - asm volatile ( - "rdpr %%tick, %[v]\n" - : [v] "=r" (v) - ); - - return v; -} - -/** Write TICK Register. - * - * @param v New value of TICK register. - * - */ -NO_TRACE static inline void tick_write(uint64_t v) -{ - asm volatile ( - "wrpr %[v], %[zero], %%tick\n" - :: [v] "r" (v), - [zero] "i" (0) - ); -} - -/** Read FPRS Register. - * - * @return Value of FPRS register. - * - */ -NO_TRACE static inline uint64_t fprs_read(void) -{ - uint64_t v; - - asm volatile ( - "rd %%fprs, %[v]\n" - : [v] "=r" (v) - ); - - return v; -} - -/** Write FPRS Register. - * - * @param v New value of FPRS register. - * - */ -NO_TRACE static inline void fprs_write(uint64_t v) -{ - asm volatile ( - "wr %[v], %[zero], %%fprs\n" - :: [v] "r" (v), - [zero] "i" (0) - ); -} - -/** Read SOFTINT Register. - * - * @return Value of SOFTINT register. - * - */ -NO_TRACE static inline uint64_t softint_read(void) -{ - uint64_t v; - - asm volatile ( - "rd %%softint, %[v]\n" - : [v] "=r" (v) - ); - - return v; -} - -/** Write SOFTINT Register. - * - * @param v New value of SOFTINT register. - * - */ -NO_TRACE static inline void softint_write(uint64_t v) -{ - asm volatile ( - "wr %[v], %[zero], %%softint\n" - :: [v] "r" (v), - [zero] "i" (0) - ); -} - -/** Write CLEAR_SOFTINT Register. - * - * Bits set in CLEAR_SOFTINT register will be cleared in SOFTINT register. - * - * @param v New value of CLEAR_SOFTINT register. - * - */ -NO_TRACE static inline void clear_softint_write(uint64_t v) -{ - asm volatile ( - "wr %[v], %[zero], %%clear_softint\n" - :: [v] "r" (v), - [zero] "i" (0) - ); -} - -/** Write SET_SOFTINT Register. - * - * Bits set in SET_SOFTINT register will be set in SOFTINT register. - * - * @param v New value of SET_SOFTINT register. - * - */ -NO_TRACE static inline void set_softint_write(uint64_t v) -{ - asm volatile ( - "wr %[v], %[zero], %%set_softint\n" - :: [v] "r" (v), - [zero] "i" (0) - ); -} - -/** Enable interrupts. - * - * Enable interrupts and return previous - * value of IPL. - * - * @return Old interrupt priority level. - * - */ -NO_TRACE static inline ipl_t interrupts_enable(void) { - pstate_reg_t pstate; - uint64_t value = pstate_read(); - - pstate.value = value; - pstate.ie = true; - pstate_write(pstate.value); - - return (ipl_t) value; -} - -/** Disable interrupts. - * - * Disable interrupts and return previous - * value of IPL. - * - * @return Old interrupt priority level. - * - */ -NO_TRACE static inline ipl_t interrupts_disable(void) { - pstate_reg_t pstate; - uint64_t value = pstate_read(); - - pstate.value = value; - pstate.ie = false; - pstate_write(pstate.value); - - return (ipl_t) value; -} - -/** Restore interrupt priority level. - * - * Restore IPL. - * - * @param ipl Saved interrupt priority level. - * - */ -NO_TRACE static inline void interrupts_restore(ipl_t ipl) { - pstate_reg_t pstate; - - pstate.value = pstate_read(); - pstate.ie = ((pstate_reg_t) ipl).ie; - pstate_write(pstate.value); -} - -/** Return interrupt priority level. - * - * Return IPL. - * - * @return Current interrupt priority level. - * - */ -NO_TRACE static inline ipl_t interrupts_read(void) { - return (ipl_t) pstate_read(); -} - -/** Check interrupts state. - * - * @return True if interrupts are disabled. - * - */ -NO_TRACE static inline bool interrupts_disabled(void) -{ - pstate_reg_t pstate; - - pstate.value = pstate_read(); - return !pstate.ie; -} - -/** Return base address of current stack. - * - * Return the base address of the current stack. - * The stack is assumed to be STACK_SIZE bytes long. - * The stack must start on page boundary. - * - */ -NO_TRACE static inline uintptr_t get_stack_base(void) -{ - uintptr_t unbiased_sp; - - asm volatile ( - "add %%sp, %[stack_bias], %[unbiased_sp]\n" - : [unbiased_sp] "=r" (unbiased_sp) - : [stack_bias] "i" (STACK_BIAS) - ); - - return ALIGN_DOWN(unbiased_sp, STACK_SIZE); -} - -/** Read Version Register. - * - * @return Value of VER register. - * - */ -NO_TRACE static inline uint64_t ver_read(void) -{ - uint64_t v; - - asm volatile ( - "rdpr %%ver, %[v]\n" - : [v] "=r" (v) - ); - - return v; -} - -/** Read Trap Program Counter register. - * - * @return Current value in TPC. - * - */ -NO_TRACE static inline uint64_t tpc_read(void) -{ - uint64_t v; - - asm volatile ( - "rdpr %%tpc, %[v]\n" - : [v] "=r" (v) - ); - - return v; -} - -/** Read Trap Level register. - * - * @return Current value in TL. - * - */ -NO_TRACE static inline uint64_t tl_read(void) -{ - uint64_t v; - - asm volatile ( - "rdpr %%tl, %[v]\n" - : [v] "=r" (v) - ); - - return v; -} - -/** Read Trap Base Address register. - * - * @return Current value in TBA. - * - */ -NO_TRACE static inline uint64_t tba_read(void) -{ - uint64_t v; - - asm volatile ( - "rdpr %%tba, %[v]\n" - : [v] "=r" (v) - ); - - return v; -} - -/** Write Trap Base Address register. - * - * @param v New value of TBA. - * - */ -NO_TRACE static inline void tba_write(uint64_t v) -{ - asm volatile ( - "wrpr %[v], %[zero], %%tba\n" - :: [v] "r" (v), - [zero] "i" (0) - ); -} - -/** Load uint64_t from alternate space. - * - * @param asi ASI determining the alternate space. - * @param va Virtual address within the ASI. - * - * @return Value read from the virtual address in - * the specified address space. - * - */ -NO_TRACE static inline uint64_t asi_u64_read(asi_t asi, uintptr_t va) -{ - uint64_t v; - - asm volatile ( - "ldxa [%[va]] %[asi], %[v]\n" - : [v] "=r" (v) - : [va] "r" (va), - [asi] "i" ((unsigned int) asi) - ); - - return v; -} - -/** Store uint64_t to alternate space. - * - * @param asi ASI determining the alternate space. - * @param va Virtual address within the ASI. - * @param v Value to be written. - * - */ -NO_TRACE static inline void asi_u64_write(asi_t asi, uintptr_t va, uint64_t v) -{ - asm volatile ( - "stxa %[v], [%[va]] %[asi]\n" - :: [v] "r" (v), - [va] "r" (va), - [asi] "i" ((unsigned int) asi) - : "memory" - ); -} - -/** Flush all valid register windows to memory. */ -NO_TRACE static inline void flushw(void) -{ - asm volatile ("flushw\n"); -} - -/** Switch to nucleus by setting TL to 1. */ -NO_TRACE static inline void nucleus_enter(void) -{ - asm volatile ("wrpr %g0, 1, %tl\n"); -} - -/** Switch from nucleus by setting TL to 0. */ -NO_TRACE static inline void nucleus_leave(void) -{ - asm volatile ("wrpr %g0, %g0, %tl\n"); -} - -extern void cpu_halt(void) __attribute__((noreturn)); -extern void cpu_sleep(void); -extern void asm_delay_loop(const uint32_t usec); - -extern uint64_t read_from_ag_g6(void); -extern uint64_t read_from_ag_g7(void); -extern void write_to_ag_g6(uint64_t val); -extern void write_to_ag_g7(uint64_t val); -extern void write_to_ig_g6(uint64_t val); - -extern void switch_to_userspace(uint64_t pc, uint64_t sp, uint64_t uarg); - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/atomic.h =================================================================== --- kernel/arch/sparc64/include/atomic.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,156 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64 - * @{ - */ -/** @file - */ - -#ifndef KERN_sparc64_ATOMIC_H_ -#define KERN_sparc64_ATOMIC_H_ - -#include -#include -#include -#include - -/** Atomic add operation. - * - * Use atomic compare and swap operation to atomically add signed value. - * - * @param val Atomic variable. - * @param i Signed value to be added. - * - * @return Value of the atomic variable as it existed before addition. - * - */ -NO_TRACE static inline atomic_count_t atomic_add(atomic_t *val, - atomic_count_t i) -{ - atomic_count_t a; - atomic_count_t b; - - do { - volatile uintptr_t ptr = (uintptr_t) &val->count; - - a = *((atomic_count_t *) ptr); - b = a + i; - - asm volatile ( - "casx %0, %2, %1\n" - : "+m" (*((atomic_count_t *) ptr)), - "+r" (b) - : "r" (a) - ); - } while (a != b); - - return a; -} - -NO_TRACE static inline atomic_count_t atomic_preinc(atomic_t *val) -{ - return atomic_add(val, 1) + 1; -} - -NO_TRACE static inline atomic_count_t atomic_postinc(atomic_t *val) -{ - return atomic_add(val, 1); -} - -NO_TRACE static inline atomic_count_t atomic_predec(atomic_t *val) -{ - return atomic_add(val, -1) - 1; -} - -NO_TRACE static inline atomic_count_t atomic_postdec(atomic_t *val) -{ - return atomic_add(val, -1); -} - -NO_TRACE static inline void atomic_inc(atomic_t *val) -{ - (void) atomic_add(val, 1); -} - -NO_TRACE static inline void atomic_dec(atomic_t *val) -{ - (void) atomic_add(val, -1); -} - -NO_TRACE static inline atomic_count_t test_and_set(atomic_t *val) -{ - atomic_count_t v = 1; - volatile uintptr_t ptr = (uintptr_t) &val->count; - - asm volatile ( - "casx %0, %2, %1\n" - : "+m" (*((atomic_count_t *) ptr)), - "+r" (v) - : "r" (0) - ); - - return v; -} - -NO_TRACE static inline void atomic_lock_arch(atomic_t *val) -{ - atomic_count_t tmp1 = 1; - atomic_count_t tmp2 = 0; - - volatile uintptr_t ptr = (uintptr_t) &val->count; - - preemption_disable(); - - asm volatile ( - "0:\n" - "casx %0, %3, %1\n" - "brz %1, 2f\n" - "nop\n" - "1:\n" - "ldx %0, %2\n" - "brz %2, 0b\n" - "nop\n" - "ba,a %%xcc, 1b\n" - "2:\n" - : "+m" (*((atomic_count_t *) ptr)), - "+r" (tmp1), - "+r" (tmp2) - : "r" (0) - ); - - /* - * Prevent critical section code from bleeding out this way up. - */ - CS_ENTER_BARRIER(); -} - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/barrier.h =================================================================== --- kernel/arch/sparc64/include/barrier.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,150 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64 - * @{ - */ -/** @file - */ - -#ifndef KERN_sparc64_BARRIER_H_ -#define KERN_sparc64_BARRIER_H_ - -#include - -/* - * Our critical section barriers are prepared for the weakest RMO memory model. - */ -#define CS_ENTER_BARRIER() \ - asm volatile ( \ - "membar #LoadLoad | #LoadStore\n" \ - ::: "memory" \ - ) - -#define CS_LEAVE_BARRIER() \ - asm volatile ( \ - "membar #StoreStore\n" \ - "membar #LoadStore\n" \ - ::: "memory" \ - ) - -#define memory_barrier() \ - asm volatile ( \ - "membar #LoadLoad | #StoreStore\n" \ - ::: "memory" \ - ) - -#define read_barrier() \ - asm volatile ( \ - "membar #LoadLoad\n" \ - ::: "memory" \ - ) - -#define write_barrier() \ - asm volatile ( \ - "membar #StoreStore\n" \ - ::: "memory" \ - ) - -#define flush(a) \ - asm volatile ( \ - "flush %[reg]\n" \ - :: [reg] "r" ((a)) \ - : "memory" \ - ) - -/** Flush Instruction pipeline. */ -NO_TRACE static inline void flush_pipeline(void) -{ - uint64_t pc; - - /* - * The FLUSH instruction takes address parameter. - * As such, it may trap if the address is not found in DTLB. - * - * The entire kernel text is mapped by a locked ITLB and - * DTLB entries. Therefore, when this function is called, - * the %pc register will always be in the range mapped by - * DTLB. - * - */ - - asm volatile ( - "rd %%pc, %[pc]\n" - "flush %[pc]\n" - : [pc] "=&r" (pc) - ); -} - -/** Memory Barrier instruction. */ -NO_TRACE static inline void membar(void) -{ - asm volatile ( - "membar #Sync\n" - ); -} - -#if defined (US) - -#define FLUSH_INVAL_MIN 4 - -#define smc_coherence(a) \ - do { \ - write_barrier(); \ - flush((a)); \ - } while (0) - -#define smc_coherence_block(a, l) \ - do { \ - unsigned long i; \ - write_barrier(); \ - \ - for (i = 0; i < (l); i += FLUSH_INVAL_MIN) \ - flush((void *)(a) + i); \ - } while (0) - -#elif defined (US3) - -#define smc_coherence(a) \ - do { \ - write_barrier(); \ - flush_pipeline(); \ - } while (0) - -#define smc_coherence_block(a, l) \ - do { \ - write_barrier(); \ - flush_pipeline(); \ - } while (0) - -#endif /* defined(US3) */ - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/boot/boot.h =================================================================== --- kernel/arch/sparc64/include/boot/boot.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,96 +1,0 @@ -/* - * Copyright (c) 2006 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64 - * @{ - */ -/** @file - */ - -#ifndef KERN_sparc64_BOOT_H_ -#define KERN_sparc64_BOOT_H_ - -#define VMA 0x400000 -#define LMA VMA - -#ifndef __ASM__ -#ifndef __LINKER__ - -#include -#include -#include - -#define TASKMAP_MAX_RECORDS 32 -#define MEMMAP_MAX_RECORDS 32 - -#define BOOTINFO_TASK_NAME_BUFLEN 32 - -typedef struct { - void *addr; - size_t size; - char name[BOOTINFO_TASK_NAME_BUFLEN]; -} utask_t; - -typedef struct { - size_t cnt; - utask_t tasks[TASKMAP_MAX_RECORDS]; -} taskmap_t; - -typedef struct { - void *start; - size_t size; -} memzone_t; - -typedef struct { - uint64_t total; - size_t cnt; - memzone_t zones[MEMMAP_MAX_RECORDS]; -} memmap_t; - -/** Bootinfo structure. - * - * Must be in sync with bootinfo structure used by the boot loader. - * - */ -typedef struct { - uintptr_t physmem_start; - taskmap_t taskmap; - memmap_t memmap; - ballocs_t ballocs; - ofw_tree_node_t *ofw_root; -} bootinfo_t; - -extern memmap_t memmap; - -#endif -#endif - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/console.h =================================================================== --- kernel/arch/sparc64/include/console.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,44 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64 - * @{ - */ -/** @file - */ - -#ifndef KERN_sparc64_CONSOLE_H_ -#define KERN_sparc64_CONSOLE_H_ - -extern void kkbdpoll(void *arg); -extern void standalone_sparc64_console_init(void); - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/context.h =================================================================== --- kernel/arch/sparc64/include/context.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,81 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64 - * @{ - */ -/** @file - */ - -#ifndef KERN_sparc64_CONTEXT_H_ -#define KERN_sparc64_CONTEXT_H_ - -#include -#include -#include - -#define SP_DELTA (STACK_WINDOW_SAVE_AREA_SIZE + STACK_ARG_SAVE_AREA_SIZE) - -#define context_set(c, _pc, stack, size) \ - do { \ - (c)->pc = ((uintptr_t) _pc) - 8; \ - (c)->sp = ((uintptr_t) stack) + ALIGN_UP((size), \ - STACK_ALIGNMENT) - (STACK_BIAS + SP_DELTA); \ - (c)->fp = -STACK_BIAS; \ - } while (0) - -/* - * Save only registers that must be preserved across - * function calls. - */ -typedef struct { - uintptr_t sp; /* %o6 */ - uintptr_t pc; /* %o7 */ - uint64_t i0; - uint64_t i1; - uint64_t i2; - uint64_t i3; - uint64_t i4; - uint64_t i5; - uintptr_t fp; /* %i6 */ - uintptr_t i7; - uint64_t l0; - uint64_t l1; - uint64_t l2; - uint64_t l3; - uint64_t l4; - uint64_t l5; - uint64_t l6; - uint64_t l7; - ipl_t ipl; -} context_t; - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/context_offset.h =================================================================== --- kernel/arch/sparc64/include/context_offset.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,107 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef KERN_sparc64_CONTEXT_OFFSET_H_ -#define KERN_sparc64_CONTEXT_OFFSET_H_ - -#define OFFSET_SP 0x0 -#define OFFSET_PC 0x8 -#define OFFSET_I0 0x10 -#define OFFSET_I1 0x18 -#define OFFSET_I2 0x20 -#define OFFSET_I3 0x28 -#define OFFSET_I4 0x30 -#define OFFSET_I5 0x38 -#define OFFSET_FP 0x40 -#define OFFSET_I7 0x48 -#define OFFSET_L0 0x50 -#define OFFSET_L1 0x58 -#define OFFSET_L2 0x60 -#define OFFSET_L3 0x68 -#define OFFSET_L4 0x70 -#define OFFSET_L5 0x78 -#define OFFSET_L6 0x80 -#define OFFSET_L7 0x88 - -#ifndef KERNEL -# define OFFSET_TP 0x90 -#endif - -#ifdef __ASM__ - -.macro CONTEXT_SAVE_ARCH_CORE ctx:req - stx %sp, [\ctx + OFFSET_SP] - stx %o7, [\ctx + OFFSET_PC] - stx %i0, [\ctx + OFFSET_I0] - stx %i1, [\ctx + OFFSET_I1] - stx %i2, [\ctx + OFFSET_I2] - stx %i3, [\ctx + OFFSET_I3] - stx %i4, [\ctx + OFFSET_I4] - stx %i5, [\ctx + OFFSET_I5] - stx %fp, [\ctx + OFFSET_FP] - stx %i7, [\ctx + OFFSET_I7] - stx %l0, [\ctx + OFFSET_L0] - stx %l1, [\ctx + OFFSET_L1] - stx %l2, [\ctx + OFFSET_L2] - stx %l3, [\ctx + OFFSET_L3] - stx %l4, [\ctx + OFFSET_L4] - stx %l5, [\ctx + OFFSET_L5] - stx %l6, [\ctx + OFFSET_L6] - stx %l7, [\ctx + OFFSET_L7] -#ifndef KERNEL - stx %g7, [\ctx + OFFSET_TP] -#endif -.endm - -.macro CONTEXT_RESTORE_ARCH_CORE ctx:req - ldx [\ctx + OFFSET_SP], %sp - ldx [\ctx + OFFSET_PC], %o7 - ldx [\ctx + OFFSET_I0], %i0 - ldx [\ctx + OFFSET_I1], %i1 - ldx [\ctx + OFFSET_I2], %i2 - ldx [\ctx + OFFSET_I3], %i3 - ldx [\ctx + OFFSET_I4], %i4 - ldx [\ctx + OFFSET_I5], %i5 - ldx [\ctx + OFFSET_FP], %fp - ldx [\ctx + OFFSET_I7], %i7 - ldx [\ctx + OFFSET_L0], %l0 - ldx [\ctx + OFFSET_L1], %l1 - ldx [\ctx + OFFSET_L2], %l2 - ldx [\ctx + OFFSET_L3], %l3 - ldx [\ctx + OFFSET_L4], %l4 - ldx [\ctx + OFFSET_L5], %l5 - ldx [\ctx + OFFSET_L6], %l6 - ldx [\ctx + OFFSET_L7], %l7 -#ifndef KERNEL - ldx [\ctx + OFFSET_TP], %g7 -#endif -.endm - -#endif /* __ASM__ */ - -#endif Index: kernel/arch/sparc64/include/cpu.h =================================================================== --- kernel/arch/sparc64/include/cpu.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,73 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64 - * @{ - */ -/** @file - */ - -#ifndef KERN_sparc64_CPU_H_ -#define KERN_sparc64_CPU_H_ - -#define MANUF_FUJITSU 0x04 -#define MANUF_ULTRASPARC 0x17 /**< UltraSPARC I, UltraSPARC II */ -#define MANUF_SUN 0x3e - -#define IMPL_ULTRASPARCI 0x10 -#define IMPL_ULTRASPARCII 0x11 -#define IMPL_ULTRASPARCII_I 0x12 -#define IMPL_ULTRASPARCII_E 0x13 -#define IMPL_ULTRASPARCIII 0x14 -#define IMPL_ULTRASPARCIII_PLUS 0x15 -#define IMPL_ULTRASPARCIII_I 0x16 -#define IMPL_ULTRASPARCIV 0x18 -#define IMPL_ULTRASPARCIV_PLUS 0x19 - -#define IMPL_SPARC64V 0x5 - -#ifndef __ASM__ - -#include -#include -#include -#include - -#if defined (SUN4U) -#include -#elif defined (SUN4V) -#include -#endif - - -#endif - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/cpu_family.h =================================================================== --- kernel/arch/sparc64/include/cpu_family.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,83 +1,0 @@ -/* - * Copyright (c) 2008 Pavel Rimsky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64 - * @{ - */ -/** @file - */ - -#ifndef KERN_sparc64_CPU_FAMILY_H_ -#define KERN_sparc64_CPU_FAMILY_H_ - -#include -#include -#include -#include - -/** - * Find the processor (sub)family. - * - * @return true iff the CPU belongs to the US family - */ -static inline bool is_us(void) -{ - int impl = ((ver_reg_t) ver_read()).impl; - return (impl == IMPL_ULTRASPARCI) || (impl == IMPL_ULTRASPARCII) || - (impl == IMPL_ULTRASPARCII_I) || (impl == IMPL_ULTRASPARCII_E); -} - -/** - * Find the processor (sub)family. - * - * @return true iff the CPU belongs to the US-III subfamily - */ -static inline bool is_us_iii(void) -{ - int impl = ((ver_reg_t) ver_read()).impl; - return (impl == IMPL_ULTRASPARCIII) || - (impl == IMPL_ULTRASPARCIII_PLUS) || - (impl == IMPL_ULTRASPARCIII_I); -} - -/** - * Find the processor (sub)family. - * - * @return true iff the CPU belongs to the US-IV subfamily - */ -static inline bool is_us_iv(void) -{ - int impl = ((ver_reg_t) ver_read()).impl; - return (impl == IMPL_ULTRASPARCIV) || (impl == IMPL_ULTRASPARCIV_PLUS); -} - -#endif - -/** @} - */ - Index: kernel/arch/sparc64/include/cpu_node.h =================================================================== --- kernel/arch/sparc64/include/cpu_node.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,59 +1,0 @@ -/* - * Copyright (c) 2005 Pavel Rimsky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64 - * @{ - */ -/** @file - */ - -#ifndef KERN_sparc64_CPU_NODE_H_ -#define KERN_sparc64_CPU_NODE_H_ - -#include - - -/** Finds the parent node of all the CPU nodes (nodes named "cpu" or "cmp"). - * - * Depending on the machine type (and possibly the OFW version), CPUs can be - * at "/" or at "/ssm@0,0". - */ -static inline ofw_tree_node_t *cpus_parent(void) -{ - ofw_tree_node_t *parent; - parent = ofw_tree_find_child(ofw_tree_lookup("/"), "ssm@0,0"); - if (parent == NULL) - parent = ofw_tree_lookup("/"); - return parent; -} - -#endif - -/** @} - */ - Index: kernel/arch/sparc64/include/cycle.h =================================================================== --- kernel/arch/sparc64/include/cycle.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,49 +1,0 @@ -/* - * Copyright (c) 2006 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64 - * @{ - */ -/** @file - */ - -#ifndef KERN_sparc64_CYCLE_H_ -#define KERN_sparc64_CYCLE_H_ - -#include -#include - -NO_TRACE static inline uint64_t get_cycle(void) -{ - return tick_read(); -} - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/drivers/fb.h =================================================================== --- kernel/arch/sparc64/include/drivers/fb.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,41 +1,0 @@ -/* - * Copyright (c) 2006 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64 - * @{ - */ -/** @file - */ - -#ifndef KERN_sparc64_FB_H_ -#define KERN_sparc64_FB_H_ - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/drivers/kbd.h =================================================================== --- kernel/arch/sparc64/include/drivers/kbd.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,46 +1,0 @@ -/* - * Copyright (c) 2006 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64 - * @{ - */ -/** @file - */ - -#ifndef KERN_sparc64_KBD_H_ -#define KERN_sparc64_KBD_H_ - -#include -#include - -extern void kbd_init(ofw_tree_node_t *node); - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/drivers/niagara.h =================================================================== --- kernel/arch/sparc64/include/drivers/niagara.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,54 +1,0 @@ -/* - * Copyright (c) 2008 Pavel Rimsky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64 - * @{ - */ -/** @file - */ - -#ifndef KERN_sparc64_NIAGARA_H -#define KERN_sparc64_NIAGARA_H - -#include -#include - -typedef struct { - thread_t *thread; - indev_t *srlnin; -} niagara_instance_t; - -char niagara_getc(void); -void niagara_grab(void); -void niagara_release(void); -niagara_instance_t *niagarain_init(void); - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/drivers/pci.h =================================================================== --- kernel/arch/sparc64/include/drivers/pci.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,71 +1,0 @@ -/* - * Copyright (c) 2006 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64 - * @{ - */ -/** @file - */ - -#ifndef KERN_sparc64_PCI_H_ -#define KERN_sparc64_PCI_H_ - -#include -#include -#include -#include - -typedef enum pci_model pci_model_t; -typedef struct pci pci_t; -typedef struct pci_operations pci_operations_t; - -enum pci_model { - PCI_UNKNOWN, - PCI_SABRE, - PCI_PSYCHO -}; - -struct pci_operations { - void (* enable_interrupt)(pci_t *, int); - void (* clear_interrupt)(pci_t *, int); -}; - -struct pci { - pci_model_t model; - pci_operations_t *op; - volatile uint64_t *reg; /**< Registers including interrupt registers. */ -}; - -extern pci_t *pci_init(ofw_tree_node_t *); -extern void pci_enable_interrupt(pci_t *, int); -extern void pci_clear_interrupt(void *, int); - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/drivers/scr.h =================================================================== --- kernel/arch/sparc64/include/drivers/scr.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,57 +1,0 @@ -/* - * Copyright (c) 2006 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64 - * @{ - */ -/** @file - */ - -#ifndef KERN_sparc64_SCR_H_ -#define KERN_sparc64_SCR_H_ - -#include -#include - -typedef enum { - SCR_UNKNOWN, - SCR_ATYFB, - SCR_FFB, - SCR_CGSIX, - SCR_XVR, - SCR_QEMU_VGA -} scr_type_t; - -extern scr_type_t scr_type; - -extern void scr_init(ofw_tree_node_t *node); - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/drivers/tick.h =================================================================== --- kernel/arch/sparc64/include/drivers/tick.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,58 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64 - * @{ - */ -/** @file - */ - -#ifndef KERN_sparc64_TICK_H_ -#define KERN_sparc64_TICK_H_ - -#include -#include - -/* mask of the "counter" field of the Tick register */ -#define TICK_COUNTER_MASK (~(1l << 63)) - -extern void tick_init(void); -extern void tick_interrupt(unsigned int, istate_t *); - -/** - * Reads the Tick register counter. - */ -static inline uint64_t tick_counter_read(void) -{ - return TICK_COUNTER_MASK & tick_read(); -} - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/elf.h =================================================================== --- kernel/arch/sparc64/include/elf.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,45 +1,0 @@ -/* - * Copyright (c) 2006 Sergey Bondari - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64 - * @{ - */ -/** @file - */ - -#ifndef KERN_sparc64_ELF_H_ -#define KERN_sparc64_ELF_H_ - -#define ELF_MACHINE EM_SPARCV9 -#define ELF_DATA_ENCODING ELFDATA2MSB -#define ELF_CLASS ELFCLASS64 - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/faddr.h =================================================================== --- kernel/arch/sparc64/include/faddr.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,45 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64 - * @{ - */ -/** @file - */ - -#ifndef KERN_sparc64_FADDR_H_ -#define KERN_sparc64_FADDR_H_ - -#include - -#define FADDR(fptr) ((uintptr_t) (fptr)) - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/fpu_context.h =================================================================== --- kernel/arch/sparc64/include/fpu_context.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,50 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64 - * @{ - */ -/** @file - */ - -#ifndef KERN_sparc64_FPU_CONTEXT_H_ -#define KERN_sparc64_FPU_CONTEXT_H_ - -#include - -#define FPU_CONTEXT_ALIGN 8 - -typedef struct { - uint64_t d[32]; - uint64_t fsr; -} fpu_context_t; - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/interrupt.h =================================================================== --- kernel/arch/sparc64/include/interrupt.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,55 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64interrupt sparc64 - * @ingroup interrupt - * @{ - */ -/** @file - */ - -#ifndef KERN_sparc64_INTERRUPT_H_ -#define KERN_sparc64_INTERRUPT_H_ - -#include -#include - -#define IVT_ITEMS 15 -#define IVT_FIRST 1 - -/* This needs to be defined for inter-architecture API portability. */ -#define VECTOR_TLB_SHOOTDOWN_IPI 0 - -enum { - IPI_TLB_SHOOTDOWN = VECTOR_TLB_SHOOTDOWN_IPI -}; - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/istate.h =================================================================== --- kernel/arch/sparc64/include/istate.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,82 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64interrupt sparc64 - * @ingroup interrupt - * @{ - */ -/** @file - */ - -#ifndef KERN_sparc64_ISTATE_H_ -#define KERN_sparc64_ISTATE_H_ - -#include - -#ifdef KERNEL - -#include - -#else /* KERNEL */ - -#include - -#endif /* KERNEL */ - -typedef struct istate { - uint64_t tnpc; - uint64_t tpc; - uint64_t tstate; -} istate_t; - -NO_TRACE static inline void istate_set_retaddr(istate_t *istate, - uintptr_t retaddr) -{ - istate->tpc = retaddr; -} - -NO_TRACE static inline int istate_from_uspace(istate_t *istate) -{ - return !(istate->tstate & TSTATE_PRIV_BIT); -} - -NO_TRACE static inline uintptr_t istate_get_pc(istate_t *istate) -{ - return istate->tpc; -} - -NO_TRACE static inline uintptr_t istate_get_fp(istate_t *istate) -{ - /* TODO */ - return 0; -} - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/mm/as.h =================================================================== --- kernel/arch/sparc64/include/mm/as.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,51 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64mm - * @{ - */ -/** @file - */ - -#ifndef KERN_sparc64_AS_H_ -#define KERN_sparc64_AS_H_ - -#if defined (SUN4U) - -#include - -#elif defined (SUN4V) - -#include - -#endif - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/mm/asid.h =================================================================== --- kernel/arch/sparc64/include/mm/asid.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,50 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64mm - * @{ - */ -/** @file - */ - -#ifndef KERN_sparc64_ASID_H_ -#define KERN_sparc64_ASID_H_ - -#include - -/* - * On SPARC, Context means the same thing as ASID trough out the kernel. - */ -typedef uint16_t asid_t; - -#define ASID_MAX_ARCH 8191 /* 2^13 - 1 */ - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/mm/cache_spec.h =================================================================== --- kernel/arch/sparc64/include/mm/cache_spec.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,60 +1,0 @@ -/* - * Copyright (c) 2008 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64mm - * @{ - */ -/** @file - */ - -#ifndef KERN_sparc64_CACHE_SPEC_H_ -#define KERN_sparc64_CACHE_SPEC_H_ - -/* - * The following macros are valid for the following processors: - * - * UltraSPARC, UltraSPARC II, UltraSPARC IIi, UltraSPARC III, - * UltraSPARC III+, UltraSPARC IV, UltraSPARC IV+ - * - * Should we support other UltraSPARC processors, we need to make sure that - * the macros are defined correctly for them. - */ - -#if defined (US) - #define DCACHE_SIZE (16 * 1024) -#elif defined (US3) - #define DCACHE_SIZE (64 * 1024) -#endif - -#define DCACHE_LINE_SIZE 32 -#define DCACHE_TAG_SHIFT 2 - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/mm/frame.h =================================================================== --- kernel/arch/sparc64/include/mm/frame.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,51 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64mm - * @{ - */ -/** @file - */ - -#ifndef KERN_sparc64_FRAME_H_ -#define KERN_sparc64_FRAME_H_ - -#if defined (SUN4U) - -#include - -#elif defined (SUN4V) - -#include - -#endif - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/mm/km.h =================================================================== --- kernel/arch/sparc64/include/mm/km.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,48 +1,0 @@ -/* - * Copyright (c) 2011 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64mm - * @{ - */ -/** @file - */ - -#ifndef KERN_sparc64_KM_H_ -#define KERN_sparc64_KM_H_ - -#if defined (SUN4U) -#include -#elif defined (SUN4V) -#include -#endif - - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/mm/mmu.h =================================================================== --- kernel/arch/sparc64/include/mm/mmu.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,48 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64mm - * @{ - */ -/** @file - */ - -#ifndef KERN_sparc64_MMU_H_ -#define KERN_sparc64_MMU_H_ - -#if defined (SUN4U) -#include -#elif defined (SUN4V) -#include -#endif - - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/mm/page.h =================================================================== --- kernel/arch/sparc64/include/mm/page.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,80 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64mm - * @{ - */ -/** @file - */ - -#ifndef KERN_sparc64_PAGE_H_ -#define KERN_sparc64_PAGE_H_ - -#include - -/* - * On the TLB and TSB level, we still use 8K pages, which are supported by the - * MMU. - */ -#define MMU_PAGE_WIDTH MMU_FRAME_WIDTH -#define MMU_PAGE_SIZE MMU_FRAME_SIZE - -/* - * On the page table level, we use 16K pages. 16K pages are not supported by - * the MMU but we emulate them with pairs of 8K pages. - */ -#define PAGE_WIDTH FRAME_WIDTH -#define PAGE_SIZE FRAME_SIZE - -#define MMU_PAGES_PER_PAGE (1 << (PAGE_WIDTH - MMU_PAGE_WIDTH)) - -#ifndef __ASM__ - -#include - -extern uintptr_t physmem_base; - -#define KA2PA(x) (((uintptr_t) (x)) + physmem_base) -#define PA2KA(x) (((uintptr_t) (x)) - physmem_base) - -typedef union { - uintptr_t address; - struct { - uint64_t vpn : 51; /**< Virtual Page Number. */ - unsigned offset : 13; /**< Offset. */ - } __attribute__ ((packed)); -} page_address_t; - -extern void page_arch_init(void); - -#endif /* !def __ASM__ */ - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/mm/pagesize.h =================================================================== --- kernel/arch/sparc64/include/mm/pagesize.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,45 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * Copyright (c) 2008 Pavel Rimsky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64mm - * @{ - */ -/** @file - */ - -#ifndef KERN_sparc64_PAGESIZE_H -#define KERN_sparc64_PAGESIZE_H - -/** Page sizes. */ -#define PAGESIZE_8K 0 -#define PAGESIZE_64K 1 -#define PAGESIZE_512K 2 -#define PAGESIZE_4M 3 - -#endif Index: kernel/arch/sparc64/include/mm/sun4u/as.h =================================================================== --- kernel/arch/sparc64/include/mm/sun4u/as.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,94 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64mm - * @{ - */ -/** @file - */ - -#ifndef KERN_sparc64_sun4u_AS_H_ -#define KERN_sparc64_sun4u_AS_H_ - -#include - -#define KERNEL_ADDRESS_SPACE_SHADOWED_ARCH 1 - -#define KERNEL_ADDRESS_SPACE_START_ARCH UINT64_C(0x0000000000000000) -#define KERNEL_ADDRESS_SPACE_END_ARCH UINT64_C(0xffffffffffffffff) -#define USER_ADDRESS_SPACE_START_ARCH UINT64_C(0x0000000000000000) -#define USER_ADDRESS_SPACE_END_ARCH UINT64_C(0xffffffffffffffff) - -#ifdef CONFIG_TSB - -/** TSB Tag Target register. */ -typedef union tsb_tag_target { - uint64_t value; - struct { - unsigned invalid : 1; /**< Invalidated by software. */ - unsigned : 2; - unsigned context : 13; /**< Software ASID. */ - unsigned : 6; - uint64_t va_tag : 42; /**< Virtual address bits <63:22>. */ - } __attribute__ ((packed)); -} tsb_tag_target_t; - -/** TSB entry. */ -typedef struct tsb_entry { - tsb_tag_target_t tag; - tte_data_t data; -} __attribute__ ((packed)) tsb_entry_t; - -typedef struct { - tsb_entry_t *itsb; - tsb_entry_t *dtsb; -} as_arch_t; - -#else - -typedef struct { -} as_arch_t; - -#endif /* CONFIG_TSB */ - -#include - -#ifdef CONFIG_TSB -#include -#define as_invalidate_translation_cache(as, page, cnt) \ - tsb_invalidate((as), (page), (cnt)) -#else -#define as_invalidate_translation_cache(as, page, cnt) -#endif - -extern void as_arch_init(void); - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/mm/sun4u/frame.h =================================================================== --- kernel/arch/sparc64/include/mm/sun4u/frame.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,85 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64mm - * @{ - */ -/** @file - */ - -#ifndef KERN_sparc64_SUN4U_FRAME_H_ -#define KERN_sparc64_SUN4U_FRAME_H_ - -/* - * Page size supported by the MMU. - * For 8K there is the nasty illegal virtual aliasing problem. - * Therefore, the kernel uses 8K only internally on the TLB and TSB levels. - */ -#define MMU_FRAME_WIDTH 13 /* 8K */ -#define MMU_FRAME_SIZE (1 << MMU_FRAME_WIDTH) - -/* - * Page size exported to the generic memory management subsystems. - * This page size is not directly supported by the MMU, but we can emulate - * each 16K page with a pair of adjacent 8K pages. - */ -#define FRAME_WIDTH 14 /* 16K */ -#define FRAME_SIZE (1 << FRAME_WIDTH) - -#ifndef __ASM__ - -#include - -union frame_address { - uintptr_t address; - struct { -#if defined (US) - unsigned : 23; - uint64_t pfn : 28; /**< Physical Frame Number. */ -#elif defined (US3) - unsigned : 21; - uint64_t pfn : 30; /**< Physical Frame Number. */ -#endif - unsigned offset : 13; /**< Offset. */ - } __attribute__ ((packed)); -}; - -typedef union frame_address frame_address_t; - -extern uintptr_t end_of_identity; - -extern void frame_low_arch_init(void); -extern void frame_high_arch_init(void); -#define physmem_print() - -#endif - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/mm/sun4u/km.h =================================================================== --- kernel/arch/sparc64/include/mm/sun4u/km.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,62 +1,0 @@ -/* - * Copyright (c) 2011 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64mm - * @{ - */ -/** @file - */ - -#ifndef KERN_sparc64_sun4u_KM_H_ -#define KERN_sparc64_sun4u_KM_H_ - -#include - -/* - * Be conservative and assume the 44-bit virtual address width as found - * on the UltraSPARC CPU, even when running on a newer CPU, such as - * UltraSPARC III, which has the full 64-bit virtual address width. - * - * Do not use the 4 GiB area on either side of the VA hole to meet the - * limitations of the UltraSPARC CPU. - */ - -#define KM_SPARC64_US_IDENTITY_START UINT64_C(0x0000000000000000) -#define KM_SPARC64_US_IDENTITY_SIZE UINT64_C(0x000007ff00000000) - -#define KM_SPARC64_US_NON_IDENTITY_START UINT64_C(0xfffff80100000000) -#define KM_SPARC64_US_NON_IDENTITY_SIZE UINT64_C(0x000007ff00000000) - -extern void km_identity_arch_init(void); -extern void km_non_identity_arch_init(void); -extern bool km_is_non_identity_arch(uintptr_t); - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/mm/sun4u/mmu.h =================================================================== --- kernel/arch/sparc64/include/mm/sun4u/mmu.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,123 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64mm - * @{ - */ -/** @file - */ - -#ifndef KERN_sparc64_sun4u_MMU_H_ -#define KERN_sparc64_sun4u_MMU_H_ - -#if defined(US) -/* LSU Control Register ASI. */ -#define ASI_LSU_CONTROL_REG 0x45 /**< Load/Store Unit Control Register. */ -#endif - -/* I-MMU ASIs. */ -#define ASI_IMMU 0x50 -#define ASI_IMMU_TSB_8KB_PTR_REG 0x51 -#define ASI_IMMU_TSB_64KB_PTR_REG 0x52 -#define ASI_ITLB_DATA_IN_REG 0x54 -#define ASI_ITLB_DATA_ACCESS_REG 0x55 -#define ASI_ITLB_TAG_READ_REG 0x56 -#define ASI_IMMU_DEMAP 0x57 - -/* Virtual Addresses within ASI_IMMU. */ -#define VA_IMMU_TSB_TAG_TARGET 0x0 /**< IMMU TSB tag target register. */ -#define VA_IMMU_SFSR 0x18 /**< IMMU sync fault status register. */ -#define VA_IMMU_TSB_BASE 0x28 /**< IMMU TSB base register. */ -#define VA_IMMU_TAG_ACCESS 0x30 /**< IMMU TLB tag access register. */ -#if defined (US3) -#define VA_IMMU_PRIMARY_EXTENSION 0x48 /**< IMMU TSB primary extension register */ -#define VA_IMMU_NUCLEUS_EXTENSION 0x58 /**< IMMU TSB nucleus extension register */ -#endif - - -/* D-MMU ASIs. */ -#define ASI_DMMU 0x58 -#define ASI_DMMU_TSB_8KB_PTR_REG 0x59 -#define ASI_DMMU_TSB_64KB_PTR_REG 0x5a -#define ASI_DMMU_TSB_DIRECT_PTR_REG 0x5b -#define ASI_DTLB_DATA_IN_REG 0x5c -#define ASI_DTLB_DATA_ACCESS_REG 0x5d -#define ASI_DTLB_TAG_READ_REG 0x5e -#define ASI_DMMU_DEMAP 0x5f - -/* Virtual Addresses within ASI_DMMU. */ -#define VA_DMMU_TSB_TAG_TARGET 0x0 /**< DMMU TSB tag target register. */ -#define VA_PRIMARY_CONTEXT_REG 0x8 /**< DMMU primary context register. */ -#define VA_SECONDARY_CONTEXT_REG 0x10 /**< DMMU secondary context register. */ -#define VA_DMMU_SFSR 0x18 /**< DMMU sync fault status register. */ -#define VA_DMMU_SFAR 0x20 /**< DMMU sync fault address register. */ -#define VA_DMMU_TSB_BASE 0x28 /**< DMMU TSB base register. */ -#define VA_DMMU_TAG_ACCESS 0x30 /**< DMMU TLB tag access register. */ -#define VA_DMMU_VA_WATCHPOINT_REG 0x38 /**< DMMU VA data watchpoint register. */ -#define VA_DMMU_PA_WATCHPOINT_REG 0x40 /**< DMMU PA data watchpoint register. */ -#if defined (US3) -#define VA_DMMU_PRIMARY_EXTENSION 0x48 /**< DMMU TSB primary extension register */ -#define VA_DMMU_SECONDARY_EXTENSION 0x50 /**< DMMU TSB secondary extension register */ -#define VA_DMMU_NUCLEUS_EXTENSION 0x58 /**< DMMU TSB nucleus extension register */ -#endif - -#ifndef __ASM__ - -#include -#include -#include - -#if defined(US) -/** LSU Control Register. */ -typedef union { - uint64_t value; - struct { - unsigned : 23; - unsigned pm : 8; - unsigned vm : 8; - unsigned pr : 1; - unsigned pw : 1; - unsigned vr : 1; - unsigned vw : 1; - unsigned : 1; - unsigned fm : 16; - unsigned dm : 1; /**< D-MMU enable. */ - unsigned im : 1; /**< I-MMU enable. */ - unsigned dc : 1; /**< D-Cache enable. */ - unsigned ic : 1; /**< I-Cache enable. */ - - } __attribute__ ((packed)); -} lsu_cr_reg_t; -#endif /* US */ - -#endif /* !def __ASM__ */ - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/mm/sun4u/tlb.h =================================================================== --- kernel/arch/sparc64/include/mm/sun4u/tlb.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,694 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64mm - * @{ - */ -/** @file - */ - -#ifndef KERN_sparc64_TLB_sun4u_H_ -#define KERN_sparc64_TLB_sun4u_H_ - -#if defined (US) -#define ITLB_ENTRY_COUNT 64 -#define DTLB_ENTRY_COUNT 64 -#define DTLB_MAX_LOCKED_ENTRIES DTLB_ENTRY_COUNT -#endif - -/** TLB_DSMALL is the only of the three DMMUs that can hold locked entries. */ -#if defined (US3) -#define DTLB_MAX_LOCKED_ENTRIES 16 -#endif - -#define MEM_CONTEXT_KERNEL 0 -#define MEM_CONTEXT_TEMP 1 - -/** Page sizes. */ -#define PAGESIZE_8K 0 -#define PAGESIZE_64K 1 -#define PAGESIZE_512K 2 -#define PAGESIZE_4M 3 - -/** Bit width of the TLB-locked portion of kernel address space. */ -#define KERNEL_PAGE_WIDTH 22 /* 4M */ - -/* TLB Demap Operation types. */ -#define TLB_DEMAP_PAGE 0 -#define TLB_DEMAP_CONTEXT 1 -#if defined (US3) -#define TLB_DEMAP_ALL 2 -#endif - -#define TLB_DEMAP_TYPE_SHIFT 6 - -/* TLB Demap Operation Context register encodings. */ -#define TLB_DEMAP_PRIMARY 0 -#define TLB_DEMAP_SECONDARY 1 -#define TLB_DEMAP_NUCLEUS 2 - -/* There are more TLBs in one MMU in US3, their codes are defined here. */ -#if defined (US3) -/* D-MMU: one small (16-entry) TLB and two big (512-entry) TLBs */ -#define TLB_DSMALL 0 -#define TLB_DBIG_0 2 -#define TLB_DBIG_1 3 - -/* I-MMU: one small (16-entry) TLB and one big TLB */ -#define TLB_ISMALL 0 -#define TLB_IBIG 2 -#endif - -#define TLB_DEMAP_CONTEXT_SHIFT 4 - -/* TLB Tag Access shifts */ -#define TLB_TAG_ACCESS_CONTEXT_SHIFT 0 -#define TLB_TAG_ACCESS_CONTEXT_MASK ((1 << 13) - 1) -#define TLB_TAG_ACCESS_VPN_SHIFT 13 - -#ifndef __ASM__ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -union tlb_context_reg { - uint64_t v; - struct { - unsigned long : 51; - unsigned context : 13; /**< Context/ASID. */ - } __attribute__ ((packed)); -}; -typedef union tlb_context_reg tlb_context_reg_t; - -/** I-/D-TLB Data In/Access Register type. */ -typedef tte_data_t tlb_data_t; - -/** I-/D-TLB Data Access Address in Alternate Space. */ - -#if defined (US) - -union tlb_data_access_addr { - uint64_t value; - struct { - uint64_t : 55; - unsigned tlb_entry : 6; - unsigned : 3; - } __attribute__ ((packed)); -}; -typedef union tlb_data_access_addr dtlb_data_access_addr_t; -typedef union tlb_data_access_addr dtlb_tag_read_addr_t; -typedef union tlb_data_access_addr itlb_data_access_addr_t; -typedef union tlb_data_access_addr itlb_tag_read_addr_t; - -#elif defined (US3) - -/* - * In US3, I-MMU and D-MMU have different formats of the data - * access register virtual address. In the corresponding - * structures the member variable for the entry number is - * called "local_tlb_entry" - it contrasts with the "tlb_entry" - * for the US data access register VA structure. The rationale - * behind this is to prevent careless mistakes in the code - * caused by setting only the entry number and not the TLB - * number in the US3 code (when taking the code from US). - */ - -union dtlb_data_access_addr { - uint64_t value; - struct { - uint64_t : 45; - unsigned : 1; - unsigned tlb_number : 2; - unsigned : 4; - unsigned local_tlb_entry : 9; - unsigned : 3; - } __attribute__ ((packed)); -}; -typedef union dtlb_data_access_addr dtlb_data_access_addr_t; -typedef union dtlb_data_access_addr dtlb_tag_read_addr_t; - -union itlb_data_access_addr { - uint64_t value; - struct { - uint64_t : 45; - unsigned : 1; - unsigned tlb_number : 2; - unsigned : 6; - unsigned local_tlb_entry : 7; - unsigned : 3; - } __attribute__ ((packed)); -}; -typedef union itlb_data_access_addr itlb_data_access_addr_t; -typedef union itlb_data_access_addr itlb_tag_read_addr_t; - -#endif - -/** I-/D-TLB Tag Read Register. */ -union tlb_tag_read_reg { - uint64_t value; - struct { - uint64_t vpn : 51; /**< Virtual Address bits 63:13. */ - unsigned context : 13; /**< Context identifier. */ - } __attribute__ ((packed)); -}; -typedef union tlb_tag_read_reg tlb_tag_read_reg_t; -typedef union tlb_tag_read_reg tlb_tag_access_reg_t; - - -/** TLB Demap Operation Address. */ -union tlb_demap_addr { - uint64_t value; - struct { - uint64_t vpn: 51; /**< Virtual Address bits 63:13. */ -#if defined (US) - unsigned : 6; /**< Ignored. */ - unsigned type : 1; /**< The type of demap operation. */ -#elif defined (US3) - unsigned : 5; /**< Ignored. */ - unsigned type: 2; /**< The type of demap operation. */ -#endif - unsigned context : 2; /**< Context register selection. */ - unsigned : 4; /**< Zero. */ - } __attribute__ ((packed)); -}; -typedef union tlb_demap_addr tlb_demap_addr_t; - -/** TLB Synchronous Fault Status Register. */ -union tlb_sfsr_reg { - uint64_t value; - struct { -#if defined (US) - unsigned long : 40; /**< Implementation dependent. */ - unsigned asi : 8; /**< ASI. */ - unsigned : 2; - unsigned ft : 7; /**< Fault type. */ -#elif defined (US3) - unsigned long : 39; /**< Implementation dependent. */ - unsigned nf : 1; /**< Non-faulting load. */ - unsigned asi : 8; /**< ASI. */ - unsigned tm : 1; /**< I-TLB miss. */ - unsigned : 3; /**< Reserved. */ - unsigned ft : 5; /**< Fault type. */ -#endif - unsigned e : 1; /**< Side-effect bit. */ - unsigned ct : 2; /**< Context Register selection. */ - unsigned pr : 1; /**< Privilege bit. */ - unsigned w : 1; /**< Write bit. */ - unsigned ow : 1; /**< Overwrite bit. */ - unsigned fv : 1; /**< Fault Valid bit. */ - } __attribute__ ((packed)); -}; -typedef union tlb_sfsr_reg tlb_sfsr_reg_t; - -#if defined (US3) - -/* - * Functions for determining the number of entries in TLBs. They either return - * a constant value or a value based on the CPU autodetection. - */ - -/** - * Determine the number of entries in the DMMU's small TLB. - */ -NO_TRACE static inline uint16_t tlb_dsmall_size(void) -{ - return 16; -} - -/** - * Determine the number of entries in each DMMU's big TLB. - */ -NO_TRACE static inline uint16_t tlb_dbig_size(void) -{ - return 512; -} - -/** - * Determine the number of entries in the IMMU's small TLB. - */ -NO_TRACE static inline uint16_t tlb_ismall_size(void) -{ - return 16; -} - -/** - * Determine the number of entries in the IMMU's big TLB. - */ -NO_TRACE static inline uint16_t tlb_ibig_size(void) -{ - if (((ver_reg_t) ver_read()).impl == IMPL_ULTRASPARCIV_PLUS) - return 512; - else - return 128; -} - -#endif - -/** Read MMU Primary Context Register. - * - * @return Current value of Primary Context Register. - */ -NO_TRACE static inline uint64_t mmu_primary_context_read(void) -{ - return asi_u64_read(ASI_DMMU, VA_PRIMARY_CONTEXT_REG); -} - -/** Write MMU Primary Context Register. - * - * @param v New value of Primary Context Register. - */ -NO_TRACE static inline void mmu_primary_context_write(uint64_t v) -{ - asi_u64_write(ASI_DMMU, VA_PRIMARY_CONTEXT_REG, v); - flush_pipeline(); -} - -/** Read MMU Secondary Context Register. - * - * @return Current value of Secondary Context Register. - */ -NO_TRACE static inline uint64_t mmu_secondary_context_read(void) -{ - return asi_u64_read(ASI_DMMU, VA_SECONDARY_CONTEXT_REG); -} - -/** Write MMU Primary Context Register. - * - * @param v New value of Primary Context Register. - */ -NO_TRACE static inline void mmu_secondary_context_write(uint64_t v) -{ - asi_u64_write(ASI_DMMU, VA_SECONDARY_CONTEXT_REG, v); - flush_pipeline(); -} - -#if defined (US) - -/** Read IMMU TLB Data Access Register. - * - * @param entry TLB Entry index. - * - * @return Current value of specified IMMU TLB Data Access - * Register. - */ -NO_TRACE static inline uint64_t itlb_data_access_read(size_t entry) -{ - itlb_data_access_addr_t reg; - - reg.value = 0; - reg.tlb_entry = entry; - return asi_u64_read(ASI_ITLB_DATA_ACCESS_REG, reg.value); -} - -/** Write IMMU TLB Data Access Register. - * - * @param entry TLB Entry index. - * @param value Value to be written. - */ -NO_TRACE static inline void itlb_data_access_write(size_t entry, uint64_t value) -{ - itlb_data_access_addr_t reg; - - reg.value = 0; - reg.tlb_entry = entry; - asi_u64_write(ASI_ITLB_DATA_ACCESS_REG, reg.value, value); - flush_pipeline(); -} - -/** Read DMMU TLB Data Access Register. - * - * @param entry TLB Entry index. - * - * @return Current value of specified DMMU TLB Data Access - * Register. - */ -NO_TRACE static inline uint64_t dtlb_data_access_read(size_t entry) -{ - dtlb_data_access_addr_t reg; - - reg.value = 0; - reg.tlb_entry = entry; - return asi_u64_read(ASI_DTLB_DATA_ACCESS_REG, reg.value); -} - -/** Write DMMU TLB Data Access Register. - * - * @param entry TLB Entry index. - * @param value Value to be written. - */ -NO_TRACE static inline void dtlb_data_access_write(size_t entry, uint64_t value) -{ - dtlb_data_access_addr_t reg; - - reg.value = 0; - reg.tlb_entry = entry; - asi_u64_write(ASI_DTLB_DATA_ACCESS_REG, reg.value, value); - membar(); -} - -/** Read IMMU TLB Tag Read Register. - * - * @param entry TLB Entry index. - * - * @return Current value of specified IMMU TLB Tag Read Register. - */ -NO_TRACE static inline uint64_t itlb_tag_read_read(size_t entry) -{ - itlb_tag_read_addr_t tag; - - tag.value = 0; - tag.tlb_entry = entry; - return asi_u64_read(ASI_ITLB_TAG_READ_REG, tag.value); -} - -/** Read DMMU TLB Tag Read Register. - * - * @param entry TLB Entry index. - * - * @return Current value of specified DMMU TLB Tag Read Register. - */ -NO_TRACE static inline uint64_t dtlb_tag_read_read(size_t entry) -{ - dtlb_tag_read_addr_t tag; - - tag.value = 0; - tag.tlb_entry = entry; - return asi_u64_read(ASI_DTLB_TAG_READ_REG, tag.value); -} - -#elif defined (US3) - - -/** Read IMMU TLB Data Access Register. - * - * @param tlb TLB number (one of TLB_ISMALL or TLB_IBIG) - * @param entry TLB Entry index. - * - * @return Current value of specified IMMU TLB Data Access - * Register. - */ -NO_TRACE static inline uint64_t itlb_data_access_read(int tlb, size_t entry) -{ - itlb_data_access_addr_t reg; - - reg.value = 0; - reg.tlb_number = tlb; - reg.local_tlb_entry = entry; - return asi_u64_read(ASI_ITLB_DATA_ACCESS_REG, reg.value); -} - -/** Write IMMU TLB Data Access Register. - * @param tlb TLB number (one of TLB_ISMALL or TLB_IBIG) - * @param entry TLB Entry index. - * @param value Value to be written. - */ -NO_TRACE static inline void itlb_data_access_write(int tlb, size_t entry, - uint64_t value) -{ - itlb_data_access_addr_t reg; - - reg.value = 0; - reg.tlb_number = tlb; - reg.local_tlb_entry = entry; - asi_u64_write(ASI_ITLB_DATA_ACCESS_REG, reg.value, value); - flush_pipeline(); -} - -/** Read DMMU TLB Data Access Register. - * - * @param tlb TLB number (one of TLB_DSMALL, TLB_DBIG, TLB_DBIG) - * @param entry TLB Entry index. - * - * @return Current value of specified DMMU TLB Data Access - * Register. - */ -NO_TRACE static inline uint64_t dtlb_data_access_read(int tlb, size_t entry) -{ - dtlb_data_access_addr_t reg; - - reg.value = 0; - reg.tlb_number = tlb; - reg.local_tlb_entry = entry; - return asi_u64_read(ASI_DTLB_DATA_ACCESS_REG, reg.value); -} - -/** Write DMMU TLB Data Access Register. - * - * @param tlb TLB number (one of TLB_DSMALL, TLB_DBIG_0, TLB_DBIG_1) - * @param entry TLB Entry index. - * @param value Value to be written. - */ -NO_TRACE static inline void dtlb_data_access_write(int tlb, size_t entry, - uint64_t value) -{ - dtlb_data_access_addr_t reg; - - reg.value = 0; - reg.tlb_number = tlb; - reg.local_tlb_entry = entry; - asi_u64_write(ASI_DTLB_DATA_ACCESS_REG, reg.value, value); - membar(); -} - -/** Read IMMU TLB Tag Read Register. - * - * @param tlb TLB number (one of TLB_ISMALL or TLB_IBIG) - * @param entry TLB Entry index. - * - * @return Current value of specified IMMU TLB Tag Read Register. - */ -NO_TRACE static inline uint64_t itlb_tag_read_read(int tlb, size_t entry) -{ - itlb_tag_read_addr_t tag; - - tag.value = 0; - tag.tlb_number = tlb; - tag.local_tlb_entry = entry; - return asi_u64_read(ASI_ITLB_TAG_READ_REG, tag.value); -} - -/** Read DMMU TLB Tag Read Register. - * - * @param tlb TLB number (one of TLB_DSMALL, TLB_DBIG_0, TLB_DBIG_1) - * @param entry TLB Entry index. - * - * @return Current value of specified DMMU TLB Tag Read Register. - */ -NO_TRACE static inline uint64_t dtlb_tag_read_read(int tlb, size_t entry) -{ - dtlb_tag_read_addr_t tag; - - tag.value = 0; - tag.tlb_number = tlb; - tag.local_tlb_entry = entry; - return asi_u64_read(ASI_DTLB_TAG_READ_REG, tag.value); -} - -#endif - - -/** Write IMMU TLB Tag Access Register. - * - * @param v Value to be written. - */ -NO_TRACE static inline void itlb_tag_access_write(uint64_t v) -{ - asi_u64_write(ASI_IMMU, VA_IMMU_TAG_ACCESS, v); - flush_pipeline(); -} - -/** Read IMMU TLB Tag Access Register. - * - * @return Current value of IMMU TLB Tag Access Register. - */ -NO_TRACE static inline uint64_t itlb_tag_access_read(void) -{ - return asi_u64_read(ASI_IMMU, VA_IMMU_TAG_ACCESS); -} - -/** Write DMMU TLB Tag Access Register. - * - * @param v Value to be written. - */ -NO_TRACE static inline void dtlb_tag_access_write(uint64_t v) -{ - asi_u64_write(ASI_DMMU, VA_DMMU_TAG_ACCESS, v); - membar(); -} - -/** Read DMMU TLB Tag Access Register. - * - * @return Current value of DMMU TLB Tag Access Register. - */ -NO_TRACE static inline uint64_t dtlb_tag_access_read(void) -{ - return asi_u64_read(ASI_DMMU, VA_DMMU_TAG_ACCESS); -} - - -/** Write IMMU TLB Data in Register. - * - * @param v Value to be written. - */ -NO_TRACE static inline void itlb_data_in_write(uint64_t v) -{ - asi_u64_write(ASI_ITLB_DATA_IN_REG, 0, v); - flush_pipeline(); -} - -/** Write DMMU TLB Data in Register. - * - * @param v Value to be written. - */ -NO_TRACE static inline void dtlb_data_in_write(uint64_t v) -{ - asi_u64_write(ASI_DTLB_DATA_IN_REG, 0, v); - membar(); -} - -/** Read ITLB Synchronous Fault Status Register. - * - * @return Current content of I-SFSR register. - */ -NO_TRACE static inline uint64_t itlb_sfsr_read(void) -{ - return asi_u64_read(ASI_IMMU, VA_IMMU_SFSR); -} - -/** Write ITLB Synchronous Fault Status Register. - * - * @param v New value of I-SFSR register. - */ -NO_TRACE static inline void itlb_sfsr_write(uint64_t v) -{ - asi_u64_write(ASI_IMMU, VA_IMMU_SFSR, v); - flush_pipeline(); -} - -/** Read DTLB Synchronous Fault Status Register. - * - * @return Current content of D-SFSR register. - */ -NO_TRACE static inline uint64_t dtlb_sfsr_read(void) -{ - return asi_u64_read(ASI_DMMU, VA_DMMU_SFSR); -} - -/** Write DTLB Synchronous Fault Status Register. - * - * @param v New value of D-SFSR register. - */ -NO_TRACE static inline void dtlb_sfsr_write(uint64_t v) -{ - asi_u64_write(ASI_DMMU, VA_DMMU_SFSR, v); - membar(); -} - -/** Read DTLB Synchronous Fault Address Register. - * - * @return Current content of D-SFAR register. - */ -NO_TRACE static inline uint64_t dtlb_sfar_read(void) -{ - return asi_u64_read(ASI_DMMU, VA_DMMU_SFAR); -} - -/** Perform IMMU TLB Demap Operation. - * - * @param type Selects between context and page demap (and entire MMU - * demap on US3). - * @param context_encoding Specifies which Context register has Context ID for - * demap. - * @param page Address which is on the page to be demapped. - */ -NO_TRACE static inline void itlb_demap(int type, int context_encoding, uintptr_t page) -{ - tlb_demap_addr_t da; - page_address_t pg; - - da.value = 0; - pg.address = page; - - da.type = type; - da.context = context_encoding; - da.vpn = pg.vpn; - - /* da.value is the address within the ASI */ - asi_u64_write(ASI_IMMU_DEMAP, da.value, 0); - - flush_pipeline(); -} - -/** Perform DMMU TLB Demap Operation. - * - * @param type Selects between context and page demap (and entire MMU - * demap on US3). - * @param context_encoding Specifies which Context register has Context ID for - * demap. - * @param page Address which is on the page to be demapped. - */ -NO_TRACE static inline void dtlb_demap(int type, int context_encoding, uintptr_t page) -{ - tlb_demap_addr_t da; - page_address_t pg; - - da.value = 0; - pg.address = page; - - da.type = type; - da.context = context_encoding; - da.vpn = pg.vpn; - - /* da.value is the address within the ASI */ - asi_u64_write(ASI_DMMU_DEMAP, da.value, 0); - - membar(); -} - -extern void fast_instruction_access_mmu_miss(sysarg_t, istate_t *); -extern void fast_data_access_mmu_miss(tlb_tag_access_reg_t, istate_t *); -extern void fast_data_access_protection(tlb_tag_access_reg_t , istate_t *); - -extern void dtlb_insert_mapping(uintptr_t, uintptr_t, int, bool, bool); - -extern void dump_sfsr_and_sfar(void); -extern void describe_dmmu_fault(void); - -#endif /* !def __ASM__ */ - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/mm/sun4u/tsb.h =================================================================== --- kernel/arch/sparc64/include/mm/sun4u/tsb.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,172 +1,0 @@ -/* - * Copyright (c) 2006 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64mm - * @{ - */ -/** @file - */ - -#ifndef KERN_sparc64_sun4u_TSB_H_ -#define KERN_sparc64_sun4u_TSB_H_ - -/* - * ITSB abd DTSB will claim 64K of memory, which - * is a nice number considered that it is one of - * the page sizes supported by hardware, which, - * again, is nice because TSBs need to be locked - * in TLBs - only one TLB entry will do. - */ -#define TSB_SIZE 2 /* when changing this, change - * as.c as well */ -#define ITSB_ENTRY_COUNT (512 * (1 << TSB_SIZE)) -#define DTSB_ENTRY_COUNT (512 * (1 << TSB_SIZE)) - -#define TSB_TAG_TARGET_CONTEXT_SHIFT 48 - -#ifndef __ASM__ - -#include -#include -#include - -/** TSB Base register. */ -typedef union tsb_base_reg { - uint64_t value; - struct { - uint64_t base : 51; /**< TSB base address, bits 63:13. */ - unsigned split : 1; /**< Split vs. common TSB for 8K and 64K - * pages. HelenOS uses only 8K pages - * for user mappings, so we always set - * this to 0. - */ - unsigned : 9; - unsigned size : 3; /**< TSB size. Number of entries is - * 512 * 2^size. */ - } __attribute__ ((packed)); -} tsb_base_reg_t; - -/** Read ITSB Base register. - * - * @return Content of the ITSB Base register. - */ -static inline uint64_t itsb_base_read(void) -{ - return asi_u64_read(ASI_IMMU, VA_IMMU_TSB_BASE); -} - -/** Read DTSB Base register. - * - * @return Content of the DTSB Base register. - */ -static inline uint64_t dtsb_base_read(void) -{ - return asi_u64_read(ASI_DMMU, VA_DMMU_TSB_BASE); -} - -/** Write ITSB Base register. - * - * @param v New content of the ITSB Base register. - */ -static inline void itsb_base_write(uint64_t v) -{ - asi_u64_write(ASI_IMMU, VA_IMMU_TSB_BASE, v); -} - -/** Write DTSB Base register. - * - * @param v New content of the DTSB Base register. - */ -static inline void dtsb_base_write(uint64_t v) -{ - asi_u64_write(ASI_DMMU, VA_DMMU_TSB_BASE, v); -} - -#if defined (US3) - -/** Write DTSB Primary Extension register. - * - * @param v New content of the DTSB Primary Extension register. - */ -static inline void dtsb_primary_extension_write(uint64_t v) -{ - asi_u64_write(ASI_DMMU, VA_DMMU_PRIMARY_EXTENSION, v); -} - -/** Write DTSB Secondary Extension register. - * - * @param v New content of the DTSB Secondary Extension register. - */ -static inline void dtsb_secondary_extension_write(uint64_t v) -{ - asi_u64_write(ASI_DMMU, VA_DMMU_SECONDARY_EXTENSION, v); -} - -/** Write DTSB Nucleus Extension register. - * - * @param v New content of the DTSB Nucleus Extension register. - */ -static inline void dtsb_nucleus_extension_write(uint64_t v) -{ - asi_u64_write(ASI_DMMU, VA_DMMU_NUCLEUS_EXTENSION, v); -} - -/** Write ITSB Primary Extension register. - * - * @param v New content of the ITSB Primary Extension register. - */ -static inline void itsb_primary_extension_write(uint64_t v) -{ - asi_u64_write(ASI_IMMU, VA_IMMU_PRIMARY_EXTENSION, v); -} - -/** Write ITSB Nucleus Extension register. - * - * @param v New content of the ITSB Nucleus Extension register. - */ -static inline void itsb_nucleus_extension_write(uint64_t v) -{ - asi_u64_write(ASI_IMMU, VA_IMMU_NUCLEUS_EXTENSION, v); -} - -#endif - -/* Forward declarations. */ -struct as; -struct pte; - -extern void tsb_invalidate(struct as *as, uintptr_t page, size_t pages); -extern void itsb_pte_copy(struct pte *t, size_t index); -extern void dtsb_pte_copy(struct pte *t, size_t index, bool ro); - -#endif /* !def __ASM__ */ - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/mm/sun4u/tte.h =================================================================== --- kernel/arch/sparc64/include/mm/sun4u/tte.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,104 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64mm - * @{ - */ -/** @file - */ - -#ifndef KERN_sparc64_sun4u_TTE_H_ -#define KERN_sparc64_sun4u_TTE_H_ - -#define TTE_G (1 << 0) -#define TTE_W (1 << 1) -#define TTE_P (1 << 2) -#define TTE_E (1 << 3) -#define TTE_CV (1 << 4) -#define TTE_CP (1 << 5) -#define TTE_L (1 << 6) - -#define TTE_V_SHIFT 63 -#define TTE_SIZE_SHIFT 61 - -#ifndef __ASM__ - -#include - -/* TTE tag's VA_tag field contains bits <63:VA_TAG_PAGE_SHIFT> of the VA */ -#define VA_TAG_PAGE_SHIFT 22 - -/** Translation Table Entry - Tag. */ -union tte_tag { - uint64_t value; - struct { - unsigned g : 1; /**< Global. */ - unsigned : 2; /**< Reserved. */ - unsigned context : 13; /**< Context identifier. */ - unsigned : 6; /**< Reserved. */ - uint64_t va_tag : 42; /**< Virtual Address Tag, bits 63:22. */ - } __attribute__ ((packed)); -}; - -typedef union tte_tag tte_tag_t; - -/** Translation Table Entry - Data. */ -union tte_data { - uint64_t value; - struct { - unsigned v : 1; /**< Valid. */ - unsigned size : 2; /**< Page size of this entry. */ - unsigned nfo : 1; /**< No-Fault-Only. */ - unsigned ie : 1; /**< Invert Endianness. */ - unsigned soft2 : 9; /**< Software defined field. */ -#if defined (US) - unsigned diag : 9; /**< Diagnostic data. */ - unsigned pfn : 28; /**< Physical Address bits, bits 40:13. */ -#elif defined (US3) - unsigned : 7; /**< Reserved. */ - unsigned pfn : 30; /**< Physical Address bits, bits 42:13 */ -#endif - unsigned soft : 6; /**< Software defined field. */ - unsigned l : 1; /**< Lock. */ - unsigned cp : 1; /**< Cacheable in physically indexed cache. */ - unsigned cv : 1; /**< Cacheable in virtually indexed cache. */ - unsigned e : 1; /**< Side-effect. */ - unsigned p : 1; /**< Privileged. */ - unsigned w : 1; /**< Writable. */ - unsigned g : 1; /**< Global. */ - } __attribute__ ((packed)); -}; - -typedef union tte_data tte_data_t; - -#endif /* !def __ASM__ */ - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/mm/sun4v/as.h =================================================================== --- kernel/arch/sparc64/include/mm/sun4v/as.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,100 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * Copyright (c) 2009 Pavel Rimsky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64mm - * @{ - */ -/** @file - */ - -#ifndef KERN_sparc64_sun4v_AS_H_ -#define KERN_sparc64_sun4v_AS_H_ - -#include -#include - -#define KERNEL_ADDRESS_SPACE_SHADOWED_ARCH 1 - -#define KERNEL_ADDRESS_SPACE_START_ARCH UINT64_C(0x0000000000000000) -#define KERNEL_ADDRESS_SPACE_END_ARCH UINT64_C(0xffffffffffffffff) -#define USER_ADDRESS_SPACE_START_ARCH UINT64_C(0x0000000000000000) -#define USER_ADDRESS_SPACE_END_ARCH UINT64_C(0xffffffffffffffff) - -#ifdef CONFIG_TSB - -/** - * TTE Tag. - * - * Even though for sun4v the format of the TSB Tag states that the context - * field has 16 bits, the T1 CPU still only supports 13-bit contexts and the - * three most significant bits are always zero. - */ -typedef union tte_tag { - uint64_t value; - struct { - unsigned : 3; - unsigned context : 13; /**< Software ASID. */ - unsigned : 6; - uint64_t va_tag : 42; /**< Virtual address bits <63:22>. */ - } __attribute__ ((packed)); -} tte_tag_t; - -/** TSB entry. */ -typedef struct tsb_entry { - tte_tag_t tag; - tte_data_t data; -} __attribute__ ((packed)) tsb_entry_t; - -typedef struct { - tsb_descr_t tsb_description; -} as_arch_t; - -#else - -typedef struct { -} as_arch_t; - -#endif /* CONFIG_TSB */ - -#include - -#ifdef CONFIG_TSB -#include -#define as_invalidate_translation_cache(as, page, cnt) \ - tsb_invalidate((as), (page), (cnt)) -#else -#define as_invalidate_translation_cache(as, page, cnt) -#endif - -extern void as_arch_init(void); - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/mm/sun4v/frame.h =================================================================== --- kernel/arch/sparc64/include/mm/sun4v/frame.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,57 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64mm - * @{ - */ -/** @file - */ - -#ifndef KERN_sparc64_sun4v_FRAME_H_ -#define KERN_sparc64_sun4v_FRAME_H_ - -#define MMU_FRAME_WIDTH 13 /* 8K */ -#define MMU_FRAME_SIZE (1 << MMU_FRAME_WIDTH) - -#define FRAME_WIDTH 13 -#define FRAME_SIZE (1 << FRAME_WIDTH) - -#ifndef __ASM__ - -#include - -extern void frame_low_arch_init(void); -extern void frame_high_arch_init(void); -#define physmem_print() - -#endif - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/mm/sun4v/km.h =================================================================== --- kernel/arch/sparc64/include/mm/sun4v/km.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,58 +1,0 @@ -/* - * Copyright (c) 2011 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64mm - * @{ - */ -/** @file - */ - -#ifndef KERN_sparc64_sun4v_KM_H_ -#define KERN_sparc64_sun4v_KM_H_ - -#include - -/* - * Do not use the 4 GiB area on either side of the VA hole to meet the - * limitations of the UltraSPARC T1 CPU. - */ - -#define KM_SPARC64_T1_IDENTITY_START UINT64_C(0x0000000000000000) -#define KM_SPARC64_T1_IDENTITY_SIZE UINT64_C(0x00007fff00000000) - -#define KM_SPARC64_T1_NON_IDENTITY_START UINT64_C(0xffff800100000000) -#define KM_SPARC64_T1_NON_IDENTITY_SIZE UINT64_C(0x00007fff00000000) - -extern void km_identity_arch_init(void); -extern void km_non_identity_arch_init(void); -extern bool km_is_non_identity_arch(uintptr_t); - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/mm/sun4v/mmu.h =================================================================== --- kernel/arch/sparc64/include/mm/sun4v/mmu.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,50 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * Copyright (c) 2008 Pavel Rimsky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64mm - * @{ - */ -/** @file - */ - -#ifndef KERN_sparc64_sun4v_MMU_H_ -#define KERN_sparc64_sun4v_MMU_H_ - -#define ASI_REAL 0x14 /**< MMU bypass ASI */ - -#define VA_PRIMARY_CONTEXT_REG 0x8 /**< primary context register VA. */ -#define ASI_PRIMARY_CONTEXT_REG 0x21 /**< primary context register ASI. */ - -#define VA_SECONDARY_CONTEXT_REG 0x10 /**< secondary context register VA. */ -#define ASI_SECONDARY_CONTEXT_REG 0x21 /**< secondary context register ASI. */ - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/mm/sun4v/page.h =================================================================== --- kernel/arch/sparc64/include/mm/sun4v/page.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,72 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64mm - * @{ - */ -/** @file - */ - -#ifndef KERN_sparc64_sun4v_PAGE_H_ -#define KERN_sparc64_sun4v_PAGE_H_ - -#include - -#define MMU_PAGE_WIDTH MMU_FRAME_WIDTH -#define MMU_PAGE_SIZE MMU_FRAME_SIZE - -#define PAGE_WIDTH FRAME_WIDTH -#define PAGE_SIZE FRAME_SIZE - -#define MMU_PAGES_PER_PAGE (1 << (PAGE_WIDTH - MMU_PAGE_WIDTH)) - -#ifndef __ASM__ - -#include - -extern uintptr_t physmem_base; - -#define KA2PA(x) (((uintptr_t) (x)) + physmem_base) -#define PA2KA(x) (((uintptr_t) (x)) - physmem_base) - -typedef union { - uintptr_t address; - struct { - uint64_t vpn : 51; /**< Virtual Page Number. */ - unsigned offset : 13; /**< Offset. */ - } __attribute__ ((packed)); -} page_address_t; - -extern void page_arch_init(void); - -#endif /* !def __ASM__ */ - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/mm/sun4v/tlb.h =================================================================== --- kernel/arch/sparc64/include/mm/sun4v/tlb.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,156 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * Copyright (c) 2008 Pavel Rimsky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64mm - * @{ - */ -/** @file - */ - -#ifndef KERN_sparc64_sun4v_TLB_H_ -#define KERN_sparc64_sun4v_TLB_H_ - -#define MMU_FSA_ALIGNMENT 64 -#define MMU_FSA_SIZE 128 - -#ifndef __ASM__ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -/** - * Structure filled by hypervisor (or directly CPU, if implemented so) when - * a MMU fault occurs. The structure describes the exact condition which - * has caused the fault. - */ -typedef struct mmu_fault_status_area { - uint64_t ift; /**< Instruction fault type (IFT) */ - uint64_t ifa; /**< Instruction fault address (IFA) */ - uint64_t ifc; /**< Instruction fault context (IFC) */ - uint8_t reserved1[0x28]; - - uint64_t dft; /**< Data fault type (DFT) */ - uint64_t dfa; /**< Data fault address (DFA) */ - uint64_t dfc; /**< Data fault context (DFC) */ - uint8_t reserved2[0x28]; -} __attribute__ ((packed)) mmu_fault_status_area_t; - -#define DTLB_MAX_LOCKED_ENTRIES 8 - -/** Bit width of the TLB-locked portion of kernel address space. */ -#define KERNEL_PAGE_WIDTH 22 /* 4M */ - -/* - * Reading and writing context registers. - * - * Note that UltraSPARC Architecture-compatible processors do not require - * a MEMBAR #Sync, FLUSH, DONE, or RETRY instruction after a store to an - * MMU register for proper operation. - * - */ - -/** Read MMU Primary Context Register. - * - * @return Current value of Primary Context Register. - */ -NO_TRACE static inline uint64_t mmu_primary_context_read(void) -{ - return asi_u64_read(ASI_PRIMARY_CONTEXT_REG, VA_PRIMARY_CONTEXT_REG); -} - -/** Write MMU Primary Context Register. - * - * @param v New value of Primary Context Register. - */ -NO_TRACE static inline void mmu_primary_context_write(uint64_t v) -{ - asi_u64_write(ASI_PRIMARY_CONTEXT_REG, VA_PRIMARY_CONTEXT_REG, v); -} - -/** Read MMU Secondary Context Register. - * - * @return Current value of Secondary Context Register. - */ -NO_TRACE static inline uint64_t mmu_secondary_context_read(void) -{ - return asi_u64_read(ASI_SECONDARY_CONTEXT_REG, VA_SECONDARY_CONTEXT_REG); -} - -/** Write MMU Secondary Context Register. - * - * @param v New value of Secondary Context Register. - */ -NO_TRACE static inline void mmu_secondary_context_write(uint64_t v) -{ - asi_u64_write(ASI_SECONDARY_CONTEXT_REG, VA_SECONDARY_CONTEXT_REG, v); -} - -/** - * Demaps all mappings in a context. - * - * @param context number of the context - * @param mmu_flag MMU_FLAG_DTLB, MMU_FLAG_ITLB or a combination of both - */ -NO_TRACE static inline void mmu_demap_ctx(int context, int mmu_flag) { - __hypercall_fast4(MMU_DEMAP_CTX, 0, 0, context, mmu_flag); -} - -/** - * Demaps given page. - * - * @param vaddr VA of the page to be demapped - * @param context number of the context - * @param mmu_flag MMU_FLAG_DTLB, MMU_FLAG_ITLB or a combination of both - */ -NO_TRACE static inline void mmu_demap_page(uintptr_t vaddr, int context, int mmu_flag) { - __hypercall_fast5(MMU_DEMAP_PAGE, 0, 0, vaddr, context, mmu_flag); -} - -extern void fast_instruction_access_mmu_miss(sysarg_t, istate_t *); -extern void fast_data_access_mmu_miss(sysarg_t, istate_t *); -extern void fast_data_access_protection(sysarg_t, istate_t *); - -extern void dtlb_insert_mapping(uintptr_t, uintptr_t, int, bool, bool); - -extern void describe_dmmu_fault(void); - -#endif /* !def __ASM__ */ - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/mm/sun4v/tsb.h =================================================================== --- kernel/arch/sparc64/include/mm/sun4v/tsb.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,81 +1,0 @@ -/* - * Copyright (c) 2006 Jakub Jermar - * Copyright (c) 2009 Pavel Rimsky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64mm - * @{ - */ -/** @file - */ - -#ifndef KERN_sparc64_sun4v_TSB_H_ -#define KERN_sparc64_sun4v_TSB_H_ - -/* - * TSB will claim 64K of memory, which - * is a nice number considered that it is one of - * the page sizes supported by hardware, which, - * again, is nice because TSBs need to be locked - * in TLBs - only one TLB entry will do. - */ -#define TSB_SIZE 3 /* when changing this, change - * as.c as well */ -#define TSB_ENTRY_COUNT (512 * (1 << TSB_SIZE)) - -#ifndef __ASM__ - -#include -#include -#include - -/** TSB description, used in hypercalls */ -typedef struct tsb_descr { - uint16_t page_size; /**< Page size (0 = 8K, 1 = 64K,...). */ - uint16_t associativity; /**< TSB associativity (will be 1). */ - uint32_t num_ttes; /**< Number of TTEs. */ - uint32_t context; /**< Context number. */ - uint32_t pgsize_mask; /**< Equals "1 << page_size". */ - uint64_t tsb_base; /**< Real address of TSB base. */ - uint64_t reserved; -} __attribute__ ((packed)) tsb_descr_t; - - -/* Forward declarations. */ -struct as; -struct pte; - -extern void tsb_invalidate(struct as *as, uintptr_t page, uint64_t pages); -extern void itsb_pte_copy(struct pte *t); -extern void dtsb_pte_copy(struct pte *t, bool ro); - -#endif /* !def __ASM__ */ - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/mm/sun4v/tte.h =================================================================== --- kernel/arch/sparc64/include/mm/sun4v/tte.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,83 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64mm - * @{ - */ -/** @file - */ - -#ifndef KERN_sparc64_sun4v_TTE_H_ -#define KERN_sparc64_sun4v_TTE_H_ - -#define TTE_V_SHIFT 63 /**< valid */ -#define TTE_TADDR_SHIFT 13 /**< target address */ -#define TTE_CP_SHIFT 10 /**< cacheable physically */ -#define TTE_CV_SHIFT 9 /**< caheable virtually */ -#define TTE_P_SHIFT 8 /**< privileged */ -#define TTE_EP_SHIFT 7 /**< execute permission */ -#define TTE_W_SHIFT 6 /**< writable */ -#define TTE_SZ_SHIFT 0 /**< size */ - -#define MMU_FLAG_ITLB 2 /**< operation applies to ITLB */ -#define MMU_FLAG_DTLB 1 /**< operation applies to DTLB */ - -#ifndef __ASM__ - -#include - -/** Translation Table Entry - Data. */ -union tte_data { - uint64_t value; - struct { - unsigned v : 1; /**< Valid. */ - unsigned nfo : 1; /**< No-Fault-Only. */ - unsigned soft : 6; /**< Software defined field. */ - unsigned long ra : 43; /**< Real address. */ - unsigned ie : 1; /**< Invert endianess. */ - unsigned e : 1; /**< Side-effect. */ - unsigned cp : 1; /**< Cacheable in physically indexed cache. */ - unsigned cv : 1; /**< Cacheable in virtually indexed cache. */ - unsigned p : 1; /**< Privileged. */ - unsigned x : 1; /**< Executable. */ - unsigned w : 1; /**< Writable. */ - unsigned soft2 : 2; /**< Software defined field. */ - unsigned size : 4; /**< Page size. */ - } __attribute__ ((packed)); -}; - -typedef union tte_data tte_data_t; - -#define VA_TAG_PAGE_SHIFT 22 - -#endif /* !def __ASM__ */ - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/mm/tlb.h =================================================================== --- kernel/arch/sparc64/include/mm/tlb.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,51 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64mm - * @{ - */ -/** @file - */ - -#ifndef KERN_sparc64_TLB_H_ -#define KERN_sparc64_TLB_H_ - -#if defined (SUN4U) - -#include - -#elif defined (SUN4V) - -#include - -#endif - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/mm/tsb.h =================================================================== --- kernel/arch/sparc64/include/mm/tsb.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,47 +1,0 @@ -/* - * Copyright (c) 2006 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64mm - * @{ - */ -/** @file - */ - -#ifndef KERN_sparc64_TSB_H_ -#define KERN_sparc64_TSB_H_ - -#if defined (SUN4U) -#include -#elif defined (SUN4V) -#include -#endif - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/mm/tte.h =================================================================== --- kernel/arch/sparc64/include/mm/tte.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,47 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64mm - * @{ - */ -/** @file - */ - -#ifndef KERN_sparc64_TTE_H_ -#define KERN_sparc64_TTE_H_ - -#if defined (SUN4U) -#include -#elif defined (SUN4V) -#include -#endif - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/proc/task.h =================================================================== --- kernel/arch/sparc64/include/proc/task.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,47 +1,0 @@ -/* - * Copyright (c) 2006 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64proc - * @{ - */ -/** @file - */ - -#ifndef KERN_sparc64_TASK_H_ -#define KERN_sparc64_TASK_H_ - -typedef struct { -} task_arch_t; - -#define task_create_arch(t) -#define task_destroy_arch(t) - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/proc/thread.h =================================================================== --- kernel/arch/sparc64/include/proc/thread.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,49 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64proc - * @{ - */ -/** @file - */ - -#ifndef KERN_sparc64_THREAD_H_ -#define KERN_sparc64_THREAD_H_ - -#include -#include - -typedef struct { - /** Buffer for register windows with userspace content. */ - uint8_t *uspace_window_buffer; -} thread_arch_t; - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/regdef.h =================================================================== --- kernel/arch/sparc64/include/regdef.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,67 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64 - * @{ - */ -/** @file - */ - -#ifndef KERN_sparc64_REGDEF_H_ -#define KERN_sparc64_REGDEF_H_ - -#define PSTATE_IE_BIT (1 << 1) -#define PSTATE_AM_BIT (1 << 3) - -#define PSTATE_AG_BIT (1 << 0) -#define PSTATE_IG_BIT (1 << 11) -#define PSTATE_MG_BIT (1 << 10) - -#define PSTATE_PRIV_BIT (1 << 2) -#define PSTATE_PEF_BIT (1 << 4) - -#define TSTATE_PSTATE_SHIFT 8 -#define TSTATE_PRIV_BIT (PSTATE_PRIV_BIT << TSTATE_PSTATE_SHIFT) -#define TSTATE_IE_BIT (PSTATE_IE_BIT << TSTATE_PSTATE_SHIFT) -#define TSTATE_PEF_BIT (PSTATE_PEF_BIT << TSTATE_PSTATE_SHIFT) - -#define TSTATE_CWP_MASK 0x1f - -#define WSTATE_NORMAL(n) (n) -#define WSTATE_OTHER(n) ((n) << 3) - -/* - * The following definitions concern the UPA_CONFIG register on US and the - * FIREPLANE_CONFIG register on US3. - */ -#define ICBUS_CONFIG_MID_SHIFT 17 - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/register.h =================================================================== --- kernel/arch/sparc64/include/register.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,123 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64 - * @{ - */ -/** @file - */ - -#ifndef KERN_sparc64_REGISTER_H_ -#define KERN_sparc64_REGISTER_H_ - -#include -#include - -/** Version Register. */ -union ver_reg { - uint64_t value; - struct { - uint16_t manuf; /**< Manufacturer code. */ - uint16_t impl; /**< Implementation code. */ - uint8_t mask; /**< Mask set revision. */ - unsigned : 8; - uint8_t maxtl; - unsigned : 3; - unsigned maxwin : 5; - } __attribute__ ((packed)); -}; -typedef union ver_reg ver_reg_t; - -/** Processor State Register. */ -union pstate_reg { - uint64_t value; - struct { - uint64_t : 52; - unsigned ig : 1; /**< Interrupt Globals. */ - unsigned mg : 1; /**< MMU Globals. */ - unsigned cle : 1; /**< Current Little Endian. */ - unsigned tle : 1; /**< Trap Little Endian. */ - unsigned mm : 2; /**< Memory Model. */ - unsigned red : 1; /**< RED state. */ - unsigned pef : 1; /**< Enable floating-point. */ - unsigned am : 1; /**< 32-bit Address Mask. */ - unsigned priv : 1; /**< Privileged Mode. */ - unsigned ie : 1; /**< Interrupt Enable. */ - unsigned ag : 1; /**< Alternate Globals*/ - } __attribute__ ((packed)); -}; -typedef union pstate_reg pstate_reg_t; - -/** TICK Register. */ -union tick_reg { - uint64_t value; - struct { - unsigned npt : 1; /**< Non-privileged Trap enable. */ - uint64_t counter : 63; /**< Elapsed CPU clck cycle counter. */ - } __attribute__ ((packed)); -}; -typedef union tick_reg tick_reg_t; - -/** TICK_compare Register. */ -union tick_compare_reg { - uint64_t value; - struct { - unsigned int_dis : 1; /**< TICK_INT interrupt disabled flag. */ - uint64_t tick_cmpr : 63; /**< Compare value for TICK interrupts. */ - } __attribute__ ((packed)); -}; -typedef union tick_compare_reg tick_compare_reg_t; - -/** SOFTINT Register. */ -union softint_reg { - uint64_t value; - struct { - uint64_t : 47; - unsigned stick_int : 1; - unsigned int_level : 15; - unsigned tick_int : 1; - } __attribute__ ((packed)); -}; -typedef union softint_reg softint_reg_t; - -/** Floating-point Registers State Register. */ -union fprs_reg { - uint64_t value; - struct { - uint64_t : 61; - unsigned fef : 1; - unsigned du : 1; - unsigned dl : 1; - } __attribute__ ((packed)); -}; -typedef union fprs_reg fprs_reg_t; - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/smp/sun4v/smp.h =================================================================== --- kernel/arch/sparc64/include/smp/sun4v/smp.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,48 +1,0 @@ -/* - * Copyright (c) 2009 Pavel Rimsky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64 - * @{ - */ -/** - * @file - * @brief sun4v smp functions - */ - -#ifndef KERN_sparc64_sun4v_SMP_H_ -#define KERN_sparc64_sun4v_SMP_H_ - -#include -#include - -extern bool calculate_optimal_nrdy(exec_unit_t *); - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/sparc64.h =================================================================== --- kernel/arch/sparc64/include/sparc64.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,45 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64 - * @{ - */ -/** @file - */ - -#ifndef KERN_sparc64_SPARC64_H_ -#define KERN_sparc64_SPARC64_H_ - -#include - -extern void interrupt_register(unsigned int, const char *, iroutine_t); - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/stack.h =================================================================== --- kernel/arch/sparc64/include/stack.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,72 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64 - * @{ - */ -/** @file - */ - -#ifndef KERN_sparc64_STACK_H_ -#define KERN_sparc64_STACK_H_ - -#define STACK_ITEM_SIZE 8 - -/** According to SPARC Compliance Definition, every stack frame is 16-byte aligned. */ -#define STACK_ALIGNMENT 16 - -/** - * 16-extended-word save area for %i[0-7] and %l[0-7] registers. - */ -#define STACK_WINDOW_SAVE_AREA_SIZE (16 * STACK_ITEM_SIZE) - -/** - * Six extended words for first six arguments. - */ -#define STACK_ARG_SAVE_AREA_SIZE (6 * STACK_ITEM_SIZE) - -/** - * By convention, the actual top of the stack is %sp + STACK_BIAS. - */ -#define STACK_BIAS 2047 - -/* - * Offsets of arguments on stack. - */ -#define STACK_ARG0 0 -#define STACK_ARG1 8 -#define STACK_ARG2 16 -#define STACK_ARG3 24 -#define STACK_ARG4 32 -#define STACK_ARG5 40 -#define STACK_ARG6 48 - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/sun4u/arch.h =================================================================== --- kernel/arch/sparc64/include/sun4u/arch.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,47 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64 - * @{ - */ -/** - * @file - * @brief Various sun4u-specific macros. - */ - -#ifndef KERN_sparc64_sun4u_ARCH_H_ -#define KERN_sparc64_sun4u_ARCH_H_ - -#define ASI_NUCLEUS_QUAD_LDD 0x24 /** ASI for 16-byte atomic loads. */ -#define ASI_DCACHE_TAG 0x47 /** ASI D-Cache Tag. */ -#define ASI_ICBUS_CONFIG 0x4a /** ASI of the UPA_CONFIG/FIREPLANE_CONFIG register. */ - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/sun4u/asm.h =================================================================== --- kernel/arch/sparc64/include/sun4u/asm.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,65 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64 - * @{ - */ -/** @file - */ - -#ifndef KERN_sparc64_sun4u_ASM_H_ -#define KERN_sparc64_sun4u_ASM_H_ - -#include - -/** Read Version Register. - * - * @return Value of VER register. - * - */ -NO_TRACE static inline uint64_t ver_read(void) -{ - uint64_t v; - - asm volatile ( - "rdpr %%ver, %[v]\n" - : [v] "=r" (v) - ); - - return v; -} - -extern uint64_t read_from_ag_g7(void); -extern void write_to_ag_g6(uint64_t); -extern void write_to_ag_g7(uint64_t); -extern void write_to_ig_g6(uint64_t); - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/sun4u/cpu.h =================================================================== --- kernel/arch/sparc64/include/sun4u/cpu.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,95 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64 - * @{ - */ -/** @file - */ - -#ifndef KERN_sparc64_sun4u_CPU_H_ -#define KERN_sparc64_sun4u_CPU_H_ - -#define MANUF_FUJITSU 0x04 -#define MANUF_ULTRASPARC 0x17 /**< UltraSPARC I, UltraSPARC II */ -#define MANUF_SUN 0x3e - -#define IMPL_ULTRASPARCI 0x10 -#define IMPL_ULTRASPARCII 0x11 -#define IMPL_ULTRASPARCII_I 0x12 -#define IMPL_ULTRASPARCII_E 0x13 -#define IMPL_ULTRASPARCIII 0x14 -#define IMPL_ULTRASPARCIII_PLUS 0x15 -#define IMPL_ULTRASPARCIII_I 0x16 -#define IMPL_ULTRASPARCIV 0x18 -#define IMPL_ULTRASPARCIV_PLUS 0x19 - -#define IMPL_SPARC64V 0x5 - -#ifndef __ASM__ - -#include -#include -#include -#include -#include - -typedef struct { - uint32_t mid; /**< Processor ID as read from - UPA_CONFIG/FIREPLANE_CONFIG. */ - ver_reg_t ver; - uint32_t clock_frequency; /**< Processor frequency in Hz. */ - uint64_t next_tick_cmpr; /**< Next clock interrupt should be - generated when the TICK register - matches this value. */ -} cpu_arch_t; - -/** Read the module ID (agent ID/CPUID) of the current CPU. - * - */ -NO_TRACE static inline uint32_t read_mid(void) -{ - uint64_t icbus_config = asi_u64_read(ASI_ICBUS_CONFIG, 0); - icbus_config = icbus_config >> ICBUS_CONFIG_MID_SHIFT; - -#if defined (US) - return icbus_config & 0x1f; -#elif defined (US3) - if (((ver_reg_t) ver_read()).impl == IMPL_ULTRASPARCIII_I) - return icbus_config & 0x1f; - else - return icbus_config & 0x3ff; -#endif -} - -#endif - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/sun4v/arch.h =================================================================== --- kernel/arch/sparc64/include/sun4v/arch.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,63 +1,0 @@ -/* - * Copyright (c) 2009 Pavel Rimsky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64 - * @{ - */ -/** - * @file - * @brief Various sun4v-specific macros. - */ - -#ifndef KERN_sparc64_sun4v_ARCH_H_ -#define KERN_sparc64_sun4v_ARCH_H_ - -/* scratch pad registers ASI */ -#define ASI_SCRATCHPAD 0x20 - -/* - * Assignment of scratchpad register virtual addresses. The same convention is - * used by both Linux and Solaris. - */ - -/* register where the address of the MMU fault status area will be stored */ -#define SCRATCHPAD_MMU_FSA 0x00 - -/* register where the CPUID will be stored */ -#define SCRATCHPAD_CPUID 0x08 - -/* register where the kernel stack address will be stored */ -#define SCRATCHPAD_KSTACK 0x10 - -/* register where the userspace window buffer address will be stored */ -#define SCRATCHPAD_WBUF 0x18 - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/sun4v/asm.h =================================================================== --- kernel/arch/sparc64/include/sun4v/asm.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,41 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64 - * @{ - */ -/** @file - */ - -#ifndef KERN_sparc64_sun4v_ASM_H_ -#define KERN_sparc64_sun4v_ASM_H_ - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/sun4v/cpu.h =================================================================== --- kernel/arch/sparc64/include/sun4v/cpu.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,76 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64 - * @{ - */ -/** @file - */ - -#ifndef KERN_sparc64_sun4v_CPU_H_ -#define KERN_sparc64_sun4v_CPU_H_ - -/** Maximum number of virtual processors. */ -#define MAX_NUM_STRANDS 64 - -/** Maximum number of logical processors in a processor core */ -#define MAX_CORE_STRANDS 8 - -#ifndef __ASM__ - -#include -#include - -struct cpu; - -typedef struct { - uint64_t exec_unit_id; - uint8_t strand_count; - uint64_t cpuids[MAX_CORE_STRANDS]; - struct cpu *cpus[MAX_CORE_STRANDS]; - atomic_t nrdy; - SPINLOCK_DECLARE(proposed_nrdy_lock); -} exec_unit_t; - -typedef struct cpu_arch { - uint64_t id; /**< virtual processor ID */ - uint32_t clock_frequency; /**< Processor frequency in Hz. */ - uint64_t next_tick_cmpr; /**< Next clock interrupt should be - generated when the TICK register - matches this value. */ - exec_unit_t *exec_unit; /**< Physical core. */ - unsigned long proposed_nrdy; /**< Proposed No. of ready threads - so that cores are equally balanced. */ -} cpu_arch_t; - -#endif - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/sun4v/hypercall.h =================================================================== --- kernel/arch/sparc64/include/sun4v/hypercall.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,250 +1,0 @@ -/* - * Copyright (c) 2008 Pavel Rimsky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64 - * @{ - */ -/** - * @file - * @brief Macros, constants and functions needed to perform a call to the - * hypervisor API. For details and terminology see this document: - * UltraSPARC Virtual Machine Specification (The Hypervisor API - * specification for Logical Domains). - * - */ - -#ifndef KERN_sparc64_sun4v_HYPERCALL_H_ -#define KERN_sparc64_sun4v_HYPERCALL_H_ - -/* SW trap numbers for hyperfast traps */ -#define FAST_TRAP 0x80 -#define MMU_MAP_ADDR 0x83 -#define MMU_UNMAP_ADDR 0x84 - -/* function codes for fast traps */ -#define MACH_DESC 0x01 -#define CPU_START 0x10 -#define CPU_STOP 0x11 -#define CPU_YIELD 0x12 -#define CPU_QCONF 0x14 -#define CPU_MYID 0x16 -#define CPU_STATE 0x17 -#define CPU_SET_RTBA 0x18 -#define CPU_GET_RTBA 0x19 -#define MMU_TSB_CTX0 0x20 -#define MMU_TSB_CTXNON0 0x21 -#define MMU_DEMAP_PAGE 0x22 -#define MMU_DEMAP_CTX 0x23 -#define MMU_DEMAP_ALL 0x24 -#define MMU_MAP_PERM_ADDR 0x25 -#define MMU_FAULT_AREA_CONF 0x26 -#define MMU_ENABLE 0x27 -#define MMU_UNMAP_PERM_ADDR 0x28 -#define MMU_TSB_CTX0_INFO 0x29 -#define MMU_TSB_CTXNON0_INFO 0x2a -#define MMU_FAULT_AREA_INFO 0x2b -#define CPU_MONDO_SEND 0x42 -#define CONS_GETCHAR 0x60 -#define CONS_PUTCHAR 0x61 - - -/* return codes */ -#define HV_EOK 0 /**< Successful return */ -#define HV_ENOCPU 1 /**< Invalid CPU id */ -#define HV_ENORADDR 2 /**< Invalid real address */ -#define HV_ENOINTR 3 /**< Invalid interrupt id */ -#define HV_EBADPGSZ 4 /**< Invalid pagesize encoding */ -#define HV_EBADTSB 5 /**< Invalid TSB description */ -#define HV_EINVAL 6 /**< Invalid argument */ -#define HV_EBADTRAP 7 /**< Invalid function number */ -#define HV_EBADALIGN 8 /**< Invalid address alignment */ -#define HV_EWOULDBLOCK 9 /**< Cannot complete operation without blocking */ -#define HV_ENOACCESS 10 /**< No access to specified resource */ -#define HV_EIO 11 /**< I/O Error */ -#define HV_ECPUERROR 12 /**< CPU is in error state */ -#define HV_ENOTSUPPORTED 13 /**< Function not supported */ -#define HV_ENOMAP 14 /**< No mapping found */ -#define HV_ETOOMANY 15 /**< Too many items specified / limit reached */ -#define HV_ECHANNEL 16 /**< Invalid LDC channel */ -#define HV_EBUSY 17 /**< Operation failed as resource is otherwise busy */ - - -/** - * Performs a hyperfast hypervisor API call from the assembly language code. - * Expects the registers %o1-%o4 are properly filled with the arguments of the - * call. - * - * @param function_number hyperfast call function number - */ -#define __HYPERCALL_FAST(function_number) \ - set function_number, %o5; \ - ta FAST_TRAP; - -/** - * Performs a fast hypervisor API call from the assembly language code. - * Expects the registers %o1-%o4 are properly filled with the arguments of the - * call. - * - * @param sw_trap_number software trap number - */ -#define __HYPERCALL_HYPERFAST(sw_trap_number) \ - ta (sw_trap_number); - - -#ifndef __ASM__ - -#include - -/* - * Macros to be used from the C-language code; __hypercall_fastN performs - * a fast hypervisor API call taking exactly N arguments. - */ - -#define __hypercall_fast0(function_number) \ - __hypercall_fast(0, 0, 0, 0, 0, function_number) -#define __hypercall_fast1(function_number, p1) \ - __hypercall_fast(p1, 0, 0, 0, 0, function_number) -#define __hypercall_fast2(function_number, p1, p2) \ - __hypercall_fast(p1, p2, 0, 0, 0, function_number) -#define __hypercall_fast3(function_number, p1, p2, p3) \ - __hypercall_fast(p1, p2, p3, 0, 0, function_number) -#define __hypercall_fast4(function_number, p1, p2, p3, p4) \ - __hypercall_fast(p1, p2, p3, p4, 0, function_number) -#define __hypercall_fast5(function_number, p1, p2, p3, p4, p5) \ - __hypercall_fast(p1, p2, p3, p4, p5, function_number) - -/** - * Performs a fast hypervisor API call which returns no value except for the - * error status. - * - * @param p1 the 1st argument of the hypervisor API call - * @param p2 the 2nd argument of the hypervisor API call - * @param p3 the 3rd argument of the hypervisor API call - * @param p4 the 4th argument of the hypervisor API call - * @param p5 the 5th argument of the hypervisor API call - * @param function_number function number of the call - * @return error status - */ -static inline uint64_t -__hypercall_fast(const uint64_t p1, const uint64_t p2, const uint64_t p3, - const uint64_t p4, const uint64_t p5, const uint64_t function_number) -{ - register uint64_t a6 asm("o5") = function_number; - register uint64_t a1 asm("o0") = p1; - register uint64_t a2 asm("o1") = p2; - register uint64_t a3 asm("o2") = p3; - register uint64_t a4 asm("o3") = p4; - register uint64_t a5 asm("o4") = p5; - - asm volatile ( - "ta %7\n" - : "=r" (a1) - : "r" (a1), "r" (a2), "r" (a3), "r" (a4), "r" (a5), "r" (a6), - "i" (FAST_TRAP) - : "memory" - ); - - return a1; -} - -/** - * Performs a fast hypervisor API call which can return a value. - * - * @param p1 the 1st argument of the hypervisor API call - * @param p2 the 2nd argument of the hypervisor API call - * @param p3 the 3rd argument of the hypervisor API call - * @param p4 the 4th argument of the hypervisor API call - * @param p5 the 5th argument of the hypervisor API call - * @param function_number function number of the call - * @param ret1 pointer to an address where the return value - * of the hypercall should be saved, or NULL - * @return error status - */ -static inline uint64_t -__hypercall_fast_ret1(const uint64_t p1, const uint64_t p2, const uint64_t p3, - const uint64_t p4, const uint64_t p5, const uint64_t function_number, - uint64_t *ret1) -{ - register uint64_t a6 asm("o5") = function_number; - register uint64_t a1 asm("o0") = p1; - register uint64_t a2 asm("o1") = p2; - register uint64_t a3 asm("o2") = p3; - register uint64_t a4 asm("o3") = p4; - register uint64_t a5 asm("o4") = p5; - - asm volatile ( - "ta %8\n" - : "=r" (a1), "=r" (a2) - : "r" (a1), "r" (a2), "r" (a3), "r" (a4), "r" (a5), "r" (a6), - "i" (FAST_TRAP) - : "memory" - ); - - if (ret1) - *ret1 = a2; - - return a1; -} - -/** - * Performs a hyperfast hypervisor API call. - * - * @param p1 the 1st argument of the hypervisor API call - * @param p2 the 2nd argument of the hypervisor API call - * @param p3 the 3rd argument of the hypervisor API call - * @param p4 the 4th argument of the hypervisor API call - * @param p5 the 5th argument of the hypervisor API call - * @param sw_trap_number software trap number - */ -static inline uint64_t -__hypercall_hyperfast(const uint64_t p1, const uint64_t p2, const uint64_t p3, - const uint64_t p4, const uint64_t p5, const uint64_t sw_trap_number) -{ - register uint64_t a1 asm("o0") = p1; - register uint64_t a2 asm("o1") = p2; - register uint64_t a3 asm("o2") = p3; - register uint64_t a4 asm("o3") = p4; - register uint64_t a5 asm("o4") = p5; - - asm volatile ( - "ta %6\n" - : "=r" (a1) - : "r" (a1), "r" (a2), "r" (a3), "r" (a4), "r" (a5), - "i" (sw_trap_number) - : "memory" - ); - - return a1; -} - -#endif /* ASM */ - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/sun4v/ipi.h =================================================================== --- kernel/arch/sparc64/include/sun4v/ipi.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,48 +1,0 @@ -/* - * Copyright (c) 2009 Pavel Rimsky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64 - * @{ - */ -/** - * @file - * @brief sun4v-specific IPI functions - */ - -#ifndef KERN_sparc64_sun4v_IPI_H_ -#define KERN_sparc64_sun4v_IPI_H_ - -#include - -extern uint64_t ipi_brodcast_to(void (*)(void), uint16_t cpu_list[], uint64_t); -extern uint64_t ipi_unicast_to(void (*)(void), uint16_t); - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/sun4v/md.h =================================================================== --- kernel/arch/sparc64/include/sun4v/md.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,65 +1,0 @@ -/* - * Copyright (c) 2009 Pavel Rimsky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64 - * @{ - */ -/** @file - */ - -#ifndef KERN_sparc64_sun4v_MD_H_ -#define KERN_sparc64_sun4v_MD_H_ - -#include - -/** - * Data type used to iterate through MD nodes. Internally represented as - * an index to the first element of the node. - */ -typedef unsigned int md_node_t; - -/** used to iterate over children of a given node */ -typedef unsigned int md_child_iter_t; - -md_node_t md_get_root(void); -md_node_t md_get_child(md_node_t node, char *name); -md_child_iter_t md_get_child_iterator(md_node_t node); -bool md_next_child(md_child_iter_t *it); -md_node_t md_get_child_node(md_child_iter_t it); -const char *md_get_node_name(md_node_t node); -bool md_get_integer_property(md_node_t node, const char *key, - uint64_t *result); -bool md_get_string_property(md_node_t node, const char *key, - const char **result); -bool md_next_node(md_node_t *node, const char *name); -void md_init(void); - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/sun4v/regdef.h =================================================================== --- kernel/arch/sparc64/include/sun4v/regdef.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,47 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * Copyright (c) 2008 Pavel Rimsky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64 - * @{ - */ -/** @file - */ - -#ifndef KERN_sparc64_sun4v_REGDEF_H_ -#define KERN_sparc64_sun4v_REGDEF_H_ - -#define TSTATE_CWP_MASK 0x1f - -#define WSTATE_NORMAL(n) (n) -#define WSTATE_OTHER(n) ((n) << 3) - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/sun4v/register.h =================================================================== --- kernel/arch/sparc64/include/sun4v/register.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,62 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64 - * @{ - */ -/** @file - */ - -#ifndef KERN_sparc64_sun4v_REGISTER_H_ -#define KERN_sparc64_sun4v_REGISTER_H_ - -#include -#include - -/** Processor State Register. */ -union pstate_reg { - uint64_t value; - struct { - uint64_t : 54; - unsigned cle : 1; /**< Current Little Endian. */ - unsigned tle : 1; /**< Trap Little Endian. */ - unsigned mm : 2; /**< Memory Model. */ - unsigned : 1; /**< RED state. */ - unsigned pef : 1; /**< Enable floating-point. */ - unsigned am : 1; /**< 32-bit Address Mask. */ - unsigned priv : 1; /**< Privileged Mode. */ - unsigned ie : 1; /**< Interrupt Enable. */ - unsigned : 1; - } __attribute__ ((packed)); -}; -typedef union pstate_reg pstate_reg_t; - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/trap/exception.h =================================================================== --- kernel/arch/sparc64/include/trap/exception.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,98 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64interrupt - * @{ - */ -/** - * @file - */ - -#ifndef KERN_sparc64_EXCEPTION_H_ -#define KERN_sparc64_EXCEPTION_H_ - -#define TT_INSTRUCTION_ACCESS_EXCEPTION 0x08 -#define TT_INSTRUCTION_ACCESS_MMU_MISS 0x09 -#define TT_INSTRUCTION_ACCESS_ERROR 0x0a -#define TT_IAE_UNAUTH_ACCESS 0x0b -#define TT_IAE_NFO_PAGE 0x0c -#define TT_ILLEGAL_INSTRUCTION 0x10 -#define TT_PRIVILEGED_OPCODE 0x11 -#define TT_UNIMPLEMENTED_LDD 0x12 -#define TT_UNIMPLEMENTED_STD 0x13 -#define TT_DAE_INVALID_ASI 0x14 -#define TT_DAE_PRIVILEGE_VIOLATION 0x15 -#define TT_DAE_NC_PAGE 0x16 -#define TT_DAE_NFO_PAGE 0x17 -#define TT_FP_DISABLED 0x20 -#define TT_FP_EXCEPTION_IEEE_754 0x21 -#define TT_FP_EXCEPTION_OTHER 0x22 -#define TT_TAG_OVERFLOW 0x23 -#define TT_DIVISION_BY_ZERO 0x28 -#define TT_DATA_ACCESS_EXCEPTION 0x30 -#define TT_DATA_ACCESS_MMU_MISS 0x31 -#define TT_DATA_ACCESS_ERROR 0x32 -#define TT_MEM_ADDRESS_NOT_ALIGNED 0x34 -#define TT_LDDF_MEM_ADDRESS_NOT_ALIGNED 0x35 -#define TT_STDF_MEM_ADDRESS_NOT_ALIGNED 0x36 -#define TT_PRIVILEGED_ACTION 0x37 -#define TT_LDQF_MEM_ADDRESS_NOT_ALIGNED 0x38 -#define TT_STQF_MEM_ADDRESS_NOT_ALIGNED 0x39 - -#ifndef __ASM__ - -#include - -extern void dump_istate(istate_t *istate); - -extern void instruction_access_exception(int n, istate_t *istate); -extern void instruction_access_error(int n, istate_t *istate); -extern void illegal_instruction(int n, istate_t *istate); -extern void privileged_opcode(int n, istate_t *istate); -extern void unimplemented_LDD(int n, istate_t *istate); -extern void unimplemented_STD(int n, istate_t *istate); -extern void fp_disabled(int n, istate_t *istate); -extern void fp_exception_ieee_754(int n, istate_t *istate); -extern void fp_exception_other(int n, istate_t *istate); -extern void tag_overflow(int n, istate_t *istate); -extern void division_by_zero(int n, istate_t *istate); -extern void data_access_exception(int n, istate_t *istate); -extern void data_access_error(int n, istate_t *istate); -extern void mem_address_not_aligned(int n, istate_t *istate); -extern void LDDF_mem_address_not_aligned(int n, istate_t *istate); -extern void STDF_mem_address_not_aligned(int n, istate_t *istate); -extern void privileged_action(int n, istate_t *istate); -extern void LDQF_mem_address_not_aligned(int n, istate_t *istate); -extern void STQF_mem_address_not_aligned(int n, istate_t *istate); - -#endif /* !__ASM__ */ - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/trap/interrupt.h =================================================================== --- kernel/arch/sparc64/include/trap/interrupt.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,90 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64interrupt - * @{ - */ -/** - * @file - * @brief This file contains level N interrupt and inter-processor interrupt - * trap handler. - */ -#ifndef KERN_sparc64_INTERRUPT_TRAP_H_ -#define KERN_sparc64_INTERRUPT_TRAP_H_ - -#define TT_INTERRUPT_LEVEL_1 0x41 -#define TT_INTERRUPT_LEVEL_2 0x42 -#define TT_INTERRUPT_LEVEL_3 0x43 -#define TT_INTERRUPT_LEVEL_4 0x44 -#define TT_INTERRUPT_LEVEL_5 0x45 -#define TT_INTERRUPT_LEVEL_6 0x46 -#define TT_INTERRUPT_LEVEL_7 0x47 -#define TT_INTERRUPT_LEVEL_8 0x48 -#define TT_INTERRUPT_LEVEL_9 0x49 -#define TT_INTERRUPT_LEVEL_10 0x4a -#define TT_INTERRUPT_LEVEL_11 0x4b -#define TT_INTERRUPT_LEVEL_12 0x4c -#define TT_INTERRUPT_LEVEL_13 0x4d -#define TT_INTERRUPT_LEVEL_14 0x4e -#define TT_INTERRUPT_LEVEL_15 0x4f - -#define INTERRUPT_LEVEL_N_HANDLER_SIZE TRAP_TABLE_ENTRY_SIZE - -/* IMAP register bits */ -#define IGN_MASK 0x7c0 -#define INO_MASK 0x1f -#define IMAP_V_MASK (1ULL << 31) - -#define IGN_SHIFT 6 - - -#ifdef __ASM__ -.macro INTERRUPT_LEVEL_N_HANDLER n - mov \n - 1, %g2 - PREEMPTIBLE_HANDLER exc_dispatch -.endm -#endif - -#ifndef __ASM__ - -#include - -extern void interrupt(int n, istate_t *istate); -#endif /* !def __ASM__ */ - - -#if defined (SUN4U) -#include -#elif defined (SUN4V) -#include -#endif - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/trap/mmu.h =================================================================== --- kernel/arch/sparc64/include/trap/mmu.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,49 +1,0 @@ -/* - * Copyright (c) 2006 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64interrupt - * @{ - */ -/** - * @file - * @brief This file contains fast MMU trap handlers. - */ - -#ifndef KERN_sparc64_MMU_TRAP_H_ -#define KERN_sparc64_MMU_TRAP_H_ - -#if defined (SUN4U) -#include -#elif defined (SUN4V) -#include -#endif - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/trap/regwin.h =================================================================== --- kernel/arch/sparc64/include/trap/regwin.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,216 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64interrupt - * @{ - */ -/** - * @file - * @brief This file contains register window trap handlers. - */ - -#ifndef KERN_sparc64_REGWIN_H_ -#define KERN_sparc64_REGWIN_H_ - -#include -#include -#include - -#define TT_CLEAN_WINDOW 0x24 -#define TT_SPILL_0_NORMAL 0x80 /* kernel spills */ -#define TT_SPILL_1_NORMAL 0x84 /* userspace spills */ -#define TT_SPILL_2_NORMAL 0x88 /* spills to userspace window buffer */ -#define TT_SPILL_0_OTHER 0xa0 /* spills to userspace window buffer */ -#define TT_FILL_0_NORMAL 0xc0 /* kernel fills */ -#define TT_FILL_1_NORMAL 0xc4 /* userspace fills */ - -#define REGWIN_HANDLER_SIZE 128 - -#define CLEAN_WINDOW_HANDLER_SIZE REGWIN_HANDLER_SIZE -#define SPILL_HANDLER_SIZE REGWIN_HANDLER_SIZE -#define FILL_HANDLER_SIZE REGWIN_HANDLER_SIZE - -/* Window Save Area offsets. */ -#define L0_OFFSET 0 -#define L1_OFFSET 8 -#define L2_OFFSET 16 -#define L3_OFFSET 24 -#define L4_OFFSET 32 -#define L5_OFFSET 40 -#define L6_OFFSET 48 -#define L7_OFFSET 56 -#define I0_OFFSET 64 -#define I1_OFFSET 72 -#define I2_OFFSET 80 -#define I3_OFFSET 88 -#define I4_OFFSET 96 -#define I5_OFFSET 104 -#define I6_OFFSET 112 -#define I7_OFFSET 120 - -/* Uspace Window Buffer constants. */ -#define UWB_SIZE ((NWINDOWS - 1) * STACK_WINDOW_SAVE_AREA_SIZE) -#define UWB_ALIGNMENT 1024 -#define UWB_ASIZE ALIGN_UP(UWB_SIZE, UWB_ALIGNMENT) - -#ifdef __ASM__ - -/* - * Macro used by the nucleus and the primary context 0 during normal and other spills. - */ -.macro SPILL_NORMAL_HANDLER_KERNEL - stx %l0, [%sp + STACK_BIAS + L0_OFFSET] - stx %l1, [%sp + STACK_BIAS + L1_OFFSET] - stx %l2, [%sp + STACK_BIAS + L2_OFFSET] - stx %l3, [%sp + STACK_BIAS + L3_OFFSET] - stx %l4, [%sp + STACK_BIAS + L4_OFFSET] - stx %l5, [%sp + STACK_BIAS + L5_OFFSET] - stx %l6, [%sp + STACK_BIAS + L6_OFFSET] - stx %l7, [%sp + STACK_BIAS + L7_OFFSET] - stx %i0, [%sp + STACK_BIAS + I0_OFFSET] - stx %i1, [%sp + STACK_BIAS + I1_OFFSET] - stx %i2, [%sp + STACK_BIAS + I2_OFFSET] - stx %i3, [%sp + STACK_BIAS + I3_OFFSET] - stx %i4, [%sp + STACK_BIAS + I4_OFFSET] - stx %i5, [%sp + STACK_BIAS + I5_OFFSET] - stx %i6, [%sp + STACK_BIAS + I6_OFFSET] - stx %i7, [%sp + STACK_BIAS + I7_OFFSET] - saved - retry -.endm - -/* - * Macro used by the userspace during normal spills. - */ -.macro SPILL_NORMAL_HANDLER_USERSPACE - wr %g0, ASI_AIUP, %asi - stxa %l0, [%sp + STACK_BIAS + L0_OFFSET] %asi - stxa %l1, [%sp + STACK_BIAS + L1_OFFSET] %asi - stxa %l2, [%sp + STACK_BIAS + L2_OFFSET] %asi - stxa %l3, [%sp + STACK_BIAS + L3_OFFSET] %asi - stxa %l4, [%sp + STACK_BIAS + L4_OFFSET] %asi - stxa %l5, [%sp + STACK_BIAS + L5_OFFSET] %asi - stxa %l6, [%sp + STACK_BIAS + L6_OFFSET] %asi - stxa %l7, [%sp + STACK_BIAS + L7_OFFSET] %asi - stxa %i0, [%sp + STACK_BIAS + I0_OFFSET] %asi - stxa %i1, [%sp + STACK_BIAS + I1_OFFSET] %asi - stxa %i2, [%sp + STACK_BIAS + I2_OFFSET] %asi - stxa %i3, [%sp + STACK_BIAS + I3_OFFSET] %asi - stxa %i4, [%sp + STACK_BIAS + I4_OFFSET] %asi - stxa %i5, [%sp + STACK_BIAS + I5_OFFSET] %asi - stxa %i6, [%sp + STACK_BIAS + I6_OFFSET] %asi - stxa %i7, [%sp + STACK_BIAS + I7_OFFSET] %asi - saved - retry -.endm - -/* - * Macro used by the nucleus and the primary context 0 during normal fills. - */ -.macro FILL_NORMAL_HANDLER_KERNEL - ldx [%sp + STACK_BIAS + L0_OFFSET], %l0 - ldx [%sp + STACK_BIAS + L1_OFFSET], %l1 - ldx [%sp + STACK_BIAS + L2_OFFSET], %l2 - ldx [%sp + STACK_BIAS + L3_OFFSET], %l3 - ldx [%sp + STACK_BIAS + L4_OFFSET], %l4 - ldx [%sp + STACK_BIAS + L5_OFFSET], %l5 - ldx [%sp + STACK_BIAS + L6_OFFSET], %l6 - ldx [%sp + STACK_BIAS + L7_OFFSET], %l7 - ldx [%sp + STACK_BIAS + I0_OFFSET], %i0 - ldx [%sp + STACK_BIAS + I1_OFFSET], %i1 - ldx [%sp + STACK_BIAS + I2_OFFSET], %i2 - ldx [%sp + STACK_BIAS + I3_OFFSET], %i3 - ldx [%sp + STACK_BIAS + I4_OFFSET], %i4 - ldx [%sp + STACK_BIAS + I5_OFFSET], %i5 - ldx [%sp + STACK_BIAS + I6_OFFSET], %i6 - ldx [%sp + STACK_BIAS + I7_OFFSET], %i7 - restored - retry -.endm - -/* - * Macro used by the userspace during normal fills. - */ -.macro FILL_NORMAL_HANDLER_USERSPACE - wr %g0, ASI_AIUP, %asi - ldxa [%sp + STACK_BIAS + L0_OFFSET] %asi, %l0 - ldxa [%sp + STACK_BIAS + L1_OFFSET] %asi, %l1 - ldxa [%sp + STACK_BIAS + L2_OFFSET] %asi, %l2 - ldxa [%sp + STACK_BIAS + L3_OFFSET] %asi, %l3 - ldxa [%sp + STACK_BIAS + L4_OFFSET] %asi, %l4 - ldxa [%sp + STACK_BIAS + L5_OFFSET] %asi, %l5 - ldxa [%sp + STACK_BIAS + L6_OFFSET] %asi, %l6 - ldxa [%sp + STACK_BIAS + L7_OFFSET] %asi, %l7 - ldxa [%sp + STACK_BIAS + I0_OFFSET] %asi, %i0 - ldxa [%sp + STACK_BIAS + I1_OFFSET] %asi, %i1 - ldxa [%sp + STACK_BIAS + I2_OFFSET] %asi, %i2 - ldxa [%sp + STACK_BIAS + I3_OFFSET] %asi, %i3 - ldxa [%sp + STACK_BIAS + I4_OFFSET] %asi, %i4 - ldxa [%sp + STACK_BIAS + I5_OFFSET] %asi, %i5 - ldxa [%sp + STACK_BIAS + I6_OFFSET] %asi, %i6 - ldxa [%sp + STACK_BIAS + I7_OFFSET] %asi, %i7 - restored - retry -.endm - -.macro CLEAN_WINDOW_HANDLER - rdpr %cleanwin, %l0 - add %l0, 1, %l0 - wrpr %l0, 0, %cleanwin -#if defined(SUN4U) - mov %r0, %l0 - mov %r0, %l1 - mov %r0, %l2 - mov %r0, %l3 - mov %r0, %l4 - mov %r0, %l5 - mov %r0, %l6 - mov %r0, %l7 - mov %r0, %o0 - mov %r0, %o1 - mov %r0, %o2 - mov %r0, %o3 - mov %r0, %o4 - mov %r0, %o5 - mov %r0, %o6 - mov %r0, %o7 -#endif - retry -.endm -#endif /* __ASM__ */ - -#if defined(SUN4U) -#include -#elif defined(SUN4V) -#include -#endif - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/trap/sun4u/interrupt.h =================================================================== --- kernel/arch/sparc64/include/trap/sun4u/interrupt.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,104 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64interrupt - * @{ - */ -/** - * @file - * @brief This file contains interrupt vector trap handler. - */ - -#ifndef KERN_sparc64_TRAP_SUN4U_INTERRUPT_H_ -#define KERN_sparc64_TRAP_SUN4U_INTERRUPT_H_ - -#include -#include - - -/* Interrupt ASI registers. */ -#define ASI_INTR_W 0x77 -#define ASI_INTR_DISPATCH_STATUS 0x48 -#define ASI_INTR_R 0x7f -#define ASI_INTR_RECEIVE 0x49 - -/* VA's used with ASI_INTR_W register. */ -#if defined (US) -#define ASI_UDB_INTR_W_DATA_0 0x40 -#define ASI_UDB_INTR_W_DATA_1 0x50 -#define ASI_UDB_INTR_W_DATA_2 0x60 -#elif defined (US3) -#define VA_INTR_W_DATA_0 0x40 -#define VA_INTR_W_DATA_1 0x48 -#define VA_INTR_W_DATA_2 0x50 -#define VA_INTR_W_DATA_3 0x58 -#define VA_INTR_W_DATA_4 0x60 -#define VA_INTR_W_DATA_5 0x68 -#define VA_INTR_W_DATA_6 0x80 -#define VA_INTR_W_DATA_7 0x88 -#endif -#define VA_INTR_W_DISPATCH 0x70 - -/* VA's used with ASI_INTR_R register. */ -#if defined(US) -#define ASI_UDB_INTR_R_DATA_0 0x40 -#define ASI_UDB_INTR_R_DATA_1 0x50 -#define ASI_UDB_INTR_R_DATA_2 0x60 -#elif defined (US3) -#define VA_INTR_R_DATA_0 0x40 -#define VA_INTR_R_DATA_1 0x48 -#define VA_INTR_R_DATA_2 0x50 -#define VA_INTR_R_DATA_3 0x58 -#define VA_INTR_R_DATA_4 0x60 -#define VA_INTR_R_DATA_5 0x68 -#define VA_INTR_R_DATA_6 0x80 -#define VA_INTR_R_DATA_7 0x88 -#endif - -/* Shifts in the Interrupt Vector Dispatch virtual address. */ -#define INTR_VEC_DISPATCH_MID_SHIFT 14 - -/* Bits in the Interrupt Dispatch Status register. */ -#define INTR_DISPATCH_STATUS_NACK 0x2 -#define INTR_DISPATCH_STATUS_BUSY 0x1 - -#define TT_INTERRUPT_VECTOR_TRAP 0x60 - -#define INTERRUPT_VECTOR_TRAP_HANDLER_SIZE TRAP_TABLE_ENTRY_SIZE - -#ifdef __ASM__ -.macro INTERRUPT_VECTOR_TRAP_HANDLER - PREEMPTIBLE_HANDLER interrupt -.endm -#endif /* __ASM__ */ - - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/trap/sun4u/mmu.h =================================================================== --- kernel/arch/sparc64/include/trap/sun4u/mmu.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,184 +1,0 @@ -/* - * Copyright (c) 2006 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64interrupt - * @{ - */ -/** - * @file - * @brief This file contains fast MMU trap handlers. - */ - -#ifndef KERN_sparc64_SUN4U_MMU_TRAP_H_ -#define KERN_sparc64_SUN4U_MMU_TRAP_H_ - -#include -#include -#include -#include -#include -#include - -#ifdef CONFIG_TSB -#include -#endif - -#define TT_FAST_INSTRUCTION_ACCESS_MMU_MISS 0x64 -#define TT_FAST_DATA_ACCESS_MMU_MISS 0x68 -#define TT_FAST_DATA_ACCESS_PROTECTION 0x6c - -#define FAST_MMU_HANDLER_SIZE 128 - -#ifdef __ASM__ - -.macro FAST_INSTRUCTION_ACCESS_MMU_MISS_HANDLER - /* - * First, try to refill TLB from TSB. - */ -#ifdef CONFIG_TSB - ldxa [%g0] ASI_IMMU, %g1 ! read TSB Tag Target Register - ldxa [%g0] ASI_IMMU_TSB_8KB_PTR_REG, %g2 ! read TSB 8K Pointer - ldda [%g2] ASI_NUCLEUS_QUAD_LDD, %g4 ! 16-byte atomic load into %g4 and %g5 - cmp %g1, %g4 ! is this the entry we are looking for? - bne,pn %xcc, 0f - nop - stxa %g5, [%g0] ASI_ITLB_DATA_IN_REG ! copy mapping from ITSB to ITLB - retry -#endif - -0: - wrpr %g0, PSTATE_PRIV_BIT | PSTATE_AG_BIT, %pstate - PREEMPTIBLE_HANDLER fast_instruction_access_mmu_miss -.endm - -.macro FAST_DATA_ACCESS_MMU_MISS_HANDLER tl - /* - * First, try to refill TLB from TSB. - */ - -#ifdef CONFIG_TSB - ldxa [%g0] ASI_DMMU, %g1 ! read TSB Tag Target Register - srlx %g1, TSB_TAG_TARGET_CONTEXT_SHIFT, %g2 ! is this a kernel miss? - brz,pn %g2, 0f - ldxa [%g0] ASI_DMMU_TSB_8KB_PTR_REG, %g3 ! read TSB 8K Pointer - ldda [%g3] ASI_NUCLEUS_QUAD_LDD, %g4 ! 16-byte atomic load into %g4 and %g5 - cmp %g1, %g4 ! is this the entry we are looking for? - bne,pn %xcc, 0f - nop - stxa %g5, [%g0] ASI_DTLB_DATA_IN_REG ! copy mapping from DTSB to DTLB - retry -#endif - - /* - * Second, test if it is the portion of the kernel address space - * which is faulting. If that is the case, immediately create - * identity mapping for that page in DTLB. VPN 0 is excluded from - * this treatment. - * - * Note that branch-delay slots are used in order to save space. - */ -0: - sethi %hi(fast_data_access_mmu_miss_data_hi), %g7 - wr %g0, ASI_DMMU, %asi - ldxa [VA_DMMU_TAG_ACCESS] %asi, %g1 ! read the faulting Context and VPN - set TLB_TAG_ACCESS_CONTEXT_MASK, %g2 - andcc %g1, %g2, %g3 ! get Context - bnz %xcc, 0f ! Context is non-zero - andncc %g1, %g2, %g3 ! get page address into %g3 - bz %xcc, 0f ! page address is zero - ldx [%g7 + %lo(end_of_identity)], %g4 - cmp %g3, %g4 - bgeu %xcc, 0f - - ldx [%g7 + %lo(kernel_8k_tlb_data_template)], %g2 - add %g3, %g2, %g2 - stxa %g2, [%g0] ASI_DTLB_DATA_IN_REG ! identity map the kernel page - retry - - /* - * Third, catch and handle special cases when the trap is caused by - * the userspace register window spill or fill handler. In case - * one of these two traps caused this trap, we just lower the trap - * level and service the DTLB miss. In the end, we restart - * the offending SAVE or RESTORE. - */ -0: -.if (\tl > 0) - wrpr %g0, 1, %tl -.endif - - /* - * Switch from the MM globals. - */ - wrpr %g0, PSTATE_PRIV_BIT | PSTATE_AG_BIT, %pstate - - /* - * Read the Tag Access register for the higher-level handler. - * This is necessary to survive nested DTLB misses. - */ - ldxa [VA_DMMU_TAG_ACCESS] %asi, %g2 - - /* - * g2 will be passed as an argument to fast_data_access_mmu_miss(). - */ - PREEMPTIBLE_HANDLER fast_data_access_mmu_miss -.endm - -.macro FAST_DATA_ACCESS_PROTECTION_HANDLER tl - /* - * The same special case as in FAST_DATA_ACCESS_MMU_MISS_HANDLER. - */ - -.if (\tl > 0) - wrpr %g0, 1, %tl -.endif - - /* - * Switch from the MM globals. - */ - wrpr %g0, PSTATE_PRIV_BIT | PSTATE_AG_BIT, %pstate - - /* - * Read the Tag Access register for the higher-level handler. - * This is necessary to survive nested DTLB misses. - */ - mov VA_DMMU_TAG_ACCESS, %g2 - ldxa [%g2] ASI_DMMU, %g2 - - /* - * g2 will be passed as an argument to fast_data_access_mmu_miss(). - */ - PREEMPTIBLE_HANDLER fast_data_access_protection -.endm - -#endif /* __ASM__ */ - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/trap/sun4u/regwin.h =================================================================== --- kernel/arch/sparc64/include/trap/sun4u/regwin.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,70 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64interrupt - * @{ - */ -#ifndef KERN_sparc64_sun4u_REGWIN_H_ -#define KERN_sparc64_sun4u_REGWIN_H_ - -#ifdef __ASM__ - -/* - * Macro used to spill userspace window to userspace window buffer. - * It can be either triggered from preemptible_handler doing SAVE - * at (TL=1) or from normal kernel code doing SAVE when OTHERWIN>0 - * at (TL=0). - */ -.macro SPILL_TO_USPACE_WINDOW_BUFFER - stx %l0, [%g7 + L0_OFFSET] - stx %l1, [%g7 + L1_OFFSET] - stx %l2, [%g7 + L2_OFFSET] - stx %l3, [%g7 + L3_OFFSET] - stx %l4, [%g7 + L4_OFFSET] - stx %l5, [%g7 + L5_OFFSET] - stx %l6, [%g7 + L6_OFFSET] - stx %l7, [%g7 + L7_OFFSET] - stx %i0, [%g7 + I0_OFFSET] - stx %i1, [%g7 + I1_OFFSET] - stx %i2, [%g7 + I2_OFFSET] - stx %i3, [%g7 + I3_OFFSET] - stx %i4, [%g7 + I4_OFFSET] - stx %i5, [%g7 + I5_OFFSET] - stx %i6, [%g7 + I6_OFFSET] - stx %i7, [%g7 + I7_OFFSET] - add %g7, STACK_WINDOW_SAVE_AREA_SIZE, %g7 - saved - retry -.endm - -#endif - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/trap/sun4v/interrupt.h =================================================================== --- kernel/arch/sparc64/include/trap/sun4v/interrupt.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,50 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64interrupt - * @{ - */ -/** - * @file - * @brief This file contains interrupt vector trap handler. - */ - -#ifndef KERN_sparc64_TRAP_SUN4V_INTERRUPT_H_ -#define KERN_sparc64_TRAP_SUN4V_INTERRUPT_H_ - -#ifndef __ASM__ - -extern void sun4v_ipi_init(void); -extern void cpu_mondo(void); - -#endif - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/trap/sun4v/mmu.h =================================================================== --- kernel/arch/sparc64/include/trap/sun4v/mmu.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,175 +1,0 @@ -/* - * Copyright (c) 2006 Jakub Jermar - * Copyright (c) 2008 Pavel Rimsky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64interrupt - * @{ - */ -/** - * @file - * @brief This file contains fast MMU trap handlers. - */ - -#ifndef KERN_sparc64_sun4v_MMU_TRAP_H_ -#define KERN_sparc64_sun4v_MMU_TRAP_H_ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#ifdef CONFIG_TSB -#include -#endif - -#define TT_FAST_INSTRUCTION_ACCESS_MMU_MISS 0x64 -#define TT_FAST_DATA_ACCESS_MMU_MISS 0x68 -#define TT_FAST_DATA_ACCESS_PROTECTION 0x6c -#define TT_CPU_MONDO 0x7c - -#define FAST_MMU_HANDLER_SIZE 128 - -#ifdef __ASM__ - -/* MMU fault status area data fault offset */ -#define FSA_DFA_OFFSET 0x48 - -/* MMU fault status area data context */ -#define FSA_DFC_OFFSET 0x50 - -/* offset of the target address within the TTE Data entry */ -#define TTE_DATA_TADDR_OFFSET 13 - -.macro FAST_INSTRUCTION_ACCESS_MMU_MISS_HANDLER - PREEMPTIBLE_HANDLER fast_instruction_access_mmu_miss -.endm - -/* - * Handler of the Fast Data Access MMU Miss trap. If the trap occurred in the kernel - * (context 0), an identity mapping (with displacement) is installed. Otherwise - * a higher level service routine is called. - */ -.macro FAST_DATA_ACCESS_MMU_MISS_HANDLER tl - mov SCRATCHPAD_MMU_FSA, %g1 - ldxa [%g1] ASI_SCRATCHPAD, %g1 ! g1 <= RA of MMU fault status area - - /* read faulting context */ - add %g1, FSA_DFC_OFFSET, %g2 ! g2 <= RA of data fault context - ldxa [%g2] ASI_REAL, %g3 ! read the fault context - - /* read the faulting address */ - add %g1, FSA_DFA_OFFSET, %g2 ! g2 <= RA of data fault address - ldxa [%g2] ASI_REAL, %g1 ! read the fault address - srlx %g1, TTE_DATA_TADDR_OFFSET, %g1 ! truncate it to page boundary - sllx %g1, TTE_DATA_TADDR_OFFSET, %g1 - - /* service by higher-level routine when context != 0 */ - brnz %g3, 0f - nop - /* exclude page number 0 from installing the identity mapping */ - brz %g1, 0f - nop - - /* - * Installing the identity does not fit into 32 instructions, call - * a separate routine. The routine performs RETRY, hence the call never - * returns. - */ - ba,a %xcc, install_identity_mapping - -0: - - /* - * One of the scenarios in which this trap can occur is when the - * register window spill/fill handler accesses a memory which is not - * mapped. In such a case, this handler will be called from TL = 1. - * We handle the situation by pretending that the MMU miss occurred - * on TL = 0. Once the MMU miss trap is services, the instruction which - * caused the spill/fill trap is restarted, the spill/fill trap occurs, - * but this time its handler accesse memory which IS mapped. - */ - .if (\tl > 0) - wrpr %g0, 1, %tl - .endif - - /* - * Save the faulting virtual page and faulting context to the %g2 - * register. The most significant 51 bits of the %g2 register will - * contain the virtual address which caused the fault truncated to the - * page boundary. The least significant 13 bits of the %g2 register - * will contain the number of the context in which the fault occurred. - * The value of the %g2 register will be passed as a parameter to the - * higher level service routine. - */ - or %g1, %g3, %g2 - - PREEMPTIBLE_HANDLER fast_data_access_mmu_miss -.endm - -/* - * Handler of the Fast Data MMU Protection trap. Finds the trapping address - * and context and calls higher level service routine. - */ -.macro FAST_DATA_ACCESS_PROTECTION_HANDLER tl - /* - * The same special case as in FAST_DATA_ACCESS_MMU_MISS_HANDLER. - */ - .if (\tl > 0) - wrpr %g0, 1, %tl - .endif - - mov SCRATCHPAD_MMU_FSA, %g1 - ldxa [%g1] ASI_SCRATCHPAD, %g1 ! g1 <= RA of MMU fault status area - - /* read faulting context */ - add %g1, FSA_DFC_OFFSET, %g2 ! g2 <= RA of data fault context - ldxa [%g2] ASI_REAL, %g3 ! read the fault context - - /* read the faulting address */ - add %g1, FSA_DFA_OFFSET, %g2 ! g2 <= RA of data fault address - ldxa [%g2] ASI_REAL, %g1 ! read the fault address - srlx %g1, TTE_DATA_TADDR_OFFSET, %g1 ! truncate it to page boundary - sllx %g1, TTE_DATA_TADDR_OFFSET, %g1 - - /* the same as for FAST_DATA_ACCESS_MMU_MISS_HANDLER */ - or %g1, %g3, %g2 - - PREEMPTIBLE_HANDLER fast_data_access_protection -.endm -#endif /* __ASM__ */ - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/trap/sun4v/regwin.h =================================================================== --- kernel/arch/sparc64/include/trap/sun4v/regwin.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,86 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * Copyright (c) 2009 Pavel Rimsky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64interrupt - * @{ - */ -#ifndef KERN_sparc64_sun4v_REGWIN_H_ -#define KERN_sparc64_sun4v_REGWIN_H_ - -#ifdef __ASM__ - -/* - * Saves the contents of the current window to the userspace window buffer. - * Does not modify any register window registers, but updates pointer to the - * top of the userspace window buffer. - * - * Parameters: - * \tmpreg1 global register to be used for scratching purposes - * \tmpreg2 global register to be used for scratching purposes - */ -.macro SAVE_TO_USPACE_WBUF tmpreg1, tmpreg2 - set SCRATCHPAD_WBUF, \tmpreg2 - ldxa [\tmpreg2] ASI_SCRATCHPAD, \tmpreg1 - stx %l0, [\tmpreg1 + L0_OFFSET] - stx %l1, [\tmpreg1 + L1_OFFSET] - stx %l2, [\tmpreg1 + L2_OFFSET] - stx %l3, [\tmpreg1 + L3_OFFSET] - stx %l4, [\tmpreg1 + L4_OFFSET] - stx %l5, [\tmpreg1 + L5_OFFSET] - stx %l6, [\tmpreg1 + L6_OFFSET] - stx %l7, [\tmpreg1 + L7_OFFSET] - stx %i0, [\tmpreg1 + I0_OFFSET] - stx %i1, [\tmpreg1 + I1_OFFSET] - stx %i2, [\tmpreg1 + I2_OFFSET] - stx %i3, [\tmpreg1 + I3_OFFSET] - stx %i4, [\tmpreg1 + I4_OFFSET] - stx %i5, [\tmpreg1 + I5_OFFSET] - stx %i6, [\tmpreg1 + I6_OFFSET] - stx %i7, [\tmpreg1 + I7_OFFSET] - add \tmpreg1, STACK_WINDOW_SAVE_AREA_SIZE, \tmpreg1 - stxa \tmpreg1, [\tmpreg2] ASI_SCRATCHPAD -.endm - -/* - * Macro used to spill userspace window to userspace window buffer. - * It is triggered from normal kernel code doing SAVE when - * OTHERWIN>0 at (TL=0). - */ -.macro SPILL_TO_USPACE_WINDOW_BUFFER - SAVE_TO_USPACE_WBUF %g7, %g4 - saved - retry -.endm - -#endif - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/trap/syscall.h =================================================================== --- kernel/arch/sparc64/include/trap/syscall.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,45 +1,0 @@ -/* - * Copyright (c) 2006 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64interrupt - * @{ - */ -/** - * @file - * @brief - */ - -#ifndef KERN_sparc64_SYSCALL_TRAP_H_ -#define KERN_sparc64_SYSCALL_TRAP_H_ - -#define TT_TRAP_INSTRUCTION_0 0x100 - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/trap/trap.h =================================================================== --- kernel/arch/sparc64/include/trap/trap.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,44 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64interrupt - * @{ - */ -/** @file - */ - -#ifndef KERN_sparc64_TRAP_H_ -#define KERN_sparc64_TRAP_H_ - -extern void trap_init(void); - -#endif - -/** @} - */ - Index: kernel/arch/sparc64/include/trap/trap_table.h =================================================================== --- kernel/arch/sparc64/include/trap/trap_table.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,112 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64interrupt - * @{ - */ -/** @file - */ - -#ifndef KERN_sparc64_TRAP_TABLE_H_ -#define KERN_sparc64_TRAP_TABLE_H_ - -#include - -#define TRAP_TABLE_ENTRY_COUNT 1024 -#define TRAP_TABLE_ENTRY_SIZE 32 -#define TRAP_TABLE_SIZE (TRAP_TABLE_ENTRY_COUNT * TRAP_TABLE_ENTRY_SIZE) - -/* - * The following needs to be in sync with the definition of the istate - * structure. The one STACK_ITEM_SIZE is counted for space holding the 7th - * argument to syscall_handler (i.e. syscall number) and the other - * STACK_ITEM_SIZE is counted because of the required alignment. - */ -#define PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE \ - (STACK_WINDOW_SAVE_AREA_SIZE + STACK_ARG_SAVE_AREA_SIZE + \ - (2 * STACK_ITEM_SIZE) + (12 * 8)) -#define SAVED_TSTATE -(1 * 8) -#define SAVED_TPC -(2 * 8) -#define SAVED_TNPC -(3 * 8) /* <-- istate_t begins here */ -#define SAVED_Y -(4 * 8) -#define SAVED_I0 -(5 * 8) -#define SAVED_I1 -(6 * 8) -#define SAVED_I2 -(7 * 8) -#define SAVED_I3 -(8 * 8) -#define SAVED_I4 -(9 * 8) -#define SAVED_I5 -(10 * 8) -#define SAVED_I6 -(11 * 8) -#define SAVED_I7 -(12 * 8) - -#ifndef __ASM__ - -#include - -struct trap_table_entry { - uint8_t octets[TRAP_TABLE_ENTRY_SIZE]; -} __attribute__ ((packed)); - -typedef struct trap_table_entry trap_table_entry_t; - -extern trap_table_entry_t trap_table[TRAP_TABLE_ENTRY_COUNT]; -extern trap_table_entry_t trap_table_save[TRAP_TABLE_ENTRY_COUNT]; -#endif /* !__ASM__ */ - -#ifdef __ASM__ -.macro SAVE_GLOBALS - mov %g1, %l1 - mov %g2, %l2 - mov %g3, %l3 - mov %g4, %l4 - mov %g5, %l5 - mov %g6, %l6 - mov %g7, %l7 -.endm - -.macro RESTORE_GLOBALS - mov %l1, %g1 - mov %l2, %g2 - mov %l3, %g3 - mov %l4, %g4 - mov %l5, %g5 - mov %l6, %g6 - mov %l7, %g7 -.endm - -.macro PREEMPTIBLE_HANDLER f - sethi %hi(\f), %g1 - ba %xcc, preemptible_handler - or %g1, %lo(\f), %g1 -.endm - -#endif /* __ASM__ */ - -#endif - -/** @} - */ Index: kernel/arch/sparc64/include/types.h =================================================================== --- kernel/arch/sparc64/include/types.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,66 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64 - * @{ - */ -/** @file - */ - -#ifndef KERN_sparc64_TYPES_H_ -#define KERN_sparc64_TYPES_H_ - -typedef uint64_t size_t; -typedef int64_t ssize_t; - -typedef uint64_t uintptr_t; -typedef uint64_t pfn_t; - -typedef uint64_t ipl_t; - -typedef uint64_t sysarg_t; -typedef int64_t native_t; -typedef uint64_t atomic_count_t; - -typedef struct { -} fncptr_t; - -typedef uint8_t asi_t; - -#define INTN_C(c) INT64_C(c) -#define UINTN_C(c) UINT64_C(c) - -#define PRIdn PRId64 /**< Format for native_t. */ -#define PRIun PRIu64 /**< Format for sysarg_t. */ -#define PRIxn PRIx64 /**< Format for hexadecimal sysarg_t. */ -#define PRIua PRIu64 /**< Format for atomic_count_t. */ - -#endif - -/** @} - */