Index: contrib/conf/SPMIPS.simics =================================================================== --- contrib/conf/SPMIPS.simics (revision 38de8a54725cd7608700bfd9591eab3fc416d848) +++ contrib/conf/SPMIPS.simics (revision 38de8a54725cd7608700bfd9591eab3fc416d848) @@ -0,0 +1,14 @@ +run-python-file ../scripts/extrapath.py + +add-directory ../../import/mips +read-configuration spmips.conf + +set-pc (cpu0.load-binary ../../../SPARTAN/src/kernel.bin) + +# Setup uart to use 8 bits +@conf.tty0.lcr = 0xf; + +# Set date +rtc0.set-date-time 2001 01 01 01 01 01 +@century = 20 +@ignore=SIM_set_attribute_idx(conf.rtc0, "nvram", 0x32, century) Index: contrib/conf/spmips.conf =================================================================== --- contrib/conf/spmips.conf (revision 38de8a54725cd7608700bfd9591eab3fc416d848) +++ contrib/conf/spmips.conf (revision 38de8a54725cd7608700bfd9591eab3fc416d848) @@ -0,0 +1,252 @@ +OBJECT cpu0 TYPE mips-4kc { + freq-mhz: 10 + queue: cpu0 + physical-memory: phys-mem0 +} + +OBJECT phys-mem0 TYPE memory-space { + map: ((0x18000020, pic0, 0, 0x20, 1), + (0x18000021, pic0, 0, 0x21, 1), + (0x180000a0, pic0, 0, 0xa0, 1), + (0x180000a1, pic0, 0, 0xa1, 1), + (0x180004d0, pic0, 0, 0x4d0, 1), + (0x180004d1, pic0, 0, 0x4d1, 1), + (0x18000070, rtc0, 0, 0, 1), + (0x18000071, rtc0, 0, 1, 1), + (0x180003f8, tty0, 0, 0, 1), + (0x180003f9, tty0, 0, 1, 1), + (0x180003fa, tty0, 0, 2, 1), + (0x180003fb, tty0, 0, 3, 1), + (0x180003fc, tty0, 0, 4, 1), + (0x180003fd, tty0, 0, 5, 1), + (0x180003fe, tty0, 0, 6, 1), + (0x180003ff, tty0, 0, 7, 1), + (0x1c000000, hfs0, 0, 0, 16)) +} + +OBJECT cbus-space TYPE memory-space { + map: ((0x1f000000, malta0, 0, 0, 0xc00000), + (0x1fc00000, rom0, 0, 0, 0x400000)) +} + +OBJECT memory0 TYPE ram { + image: memory0-image +} +OBJECT memory0-image TYPE image { + queue: cpu0 + size: 0x08000000 +} +OBJECT rom0 TYPE rom { + image: rom0-image +} +OBJECT rom0-image TYPE image { + queue: cpu0 + size: 0x00400000 +} + +OBJECT tty0 TYPE NS16550 { + irq-dev: pic0 + irq-level: 4 + queue: cpu0 + console: con0 + recorder: rec0 +} + +OBJECT pic0 TYPE i8259x2 { + queue: cpu0 + irq-dev: gt64120-0 + # It seems like Linux expects the master 8259 to have VBA 0. + # Maybe that would be set up by YAMON? + vba: (0, 1) +} + +OBJECT con0 TYPE xterm-console { + title: "mips32-test-machine" + bg-color: "black" + fg-color: "green" + queue: cpu0 + device: tty0 + output-timeout: 120 +} + +OBJECT rtc0 TYPE DS12887 { + irq-dev: pic0 + irq-level: 8 + queue: cpu0 +} + +OBJECT malta0 TYPE malta { + console: display0 +} + +OBJECT display0 TYPE xterm-console { + title: "MALTA Display" + bg-color: "black" + fg-color: "red" + width: 8 + height: 1 + scrollbar: 0 + x11-font: "-*-*-*-r-*-*-*-240-*-*-m-*-*-*" + win32-font: "Lucida Console:Bold:48" + queue: cpu0 + output-timeout: 120 +} + +# PCI buses +OBJECT pci-bus0 TYPE pci-bus { + queue: cpu0 + bridge: gt64120-0-pci-0-0 + interrupt: gt64120-0-pci-0-0 + conf-space: pci-bus0-conf-space + memory-space: pci-bus0-memory-space + io-space: pci-bus0-io-space + + pci-devices: ((0, 0, gt64120-0-pci-0-0), + (0, 1, gt64120-0-pci-0-1)) +} + +OBJECT pci-bus0-conf-space TYPE memory-space { + queue: cpu0 +} + +OBJECT pci-bus1-conf-space TYPE memory-space { + queue: cpu0 +} + +OBJECT pci-bus0-memory-space TYPE memory-space { + queue: cpu0 +} + +OBJECT pci-bus1 TYPE pci-bus { + queue: cpu0 + bridge: gt64120-0-pci-1-0 + interrupt: gt64120-0-pci-1-0 + conf-space: pci-bus1-conf-space + memory-space: pci-bus1-memory-space + io-space: pci-bus1-io-space + + pci-devices: ((0, 0, gt64120-0-pci-1-0), + (0, 1, gt64120-0-pci-1-1)) +} + +OBJECT pci-bus1-memory-space TYPE memory-space { + queue: cpu0 +} + +OBJECT pci-bus0-io-space TYPE memory-space { + queue: cpu0 +} + +OBJECT pci-bus1-io-space TYPE memory-space { + queue: cpu0 +} + +# GT64120 chipset +OBJECT gt64120-0 TYPE GT64120 { + queue: cpu0 + cpu-mem: phys-mem0 + + pci-0-0: gt64120-0-pci-0-0 + pci-0-1: gt64120-0-pci-0-1 + pci-1-0: gt64120-0-pci-1-0 + pci-1-1: gt64120-0-pci-1-1 + + scs0: memory0 + cs3: cbus-space + bootcs: cbus-space + pci-0-conf: pci-bus0-conf-space + pci-0-io: pci-bus0-io-space + pci-0-memory: pci-bus0-memory-space + pci-1-conf: pci-bus1-conf-space + pci-1-io: pci-bus1-io-space + pci-1-memory: pci-bus1-memory-space + + irq-dev: cpu0 + irq-level: 2 + + # Little endian + cpu_interface_configuration: 0x00041000 + + # Map 128MB RAM. + scs10-high-decode-address: 0x40 + scs0-low-decode-address: 0x0 + scs0-high-decode-address: 0x7f + + # Map the internal registers at 0x1be00000. + internal-space-decode: 0xdf + + # Disable host-PCI mappings + pci-0-io-high-decode-address: 0 + pci-0-io-low-decode-address: 1 + pci-0-io-remap: 1 + pci-0-memory-0-high-decode-address: 0 + pci-0-memory-0-low-decode-address: 1 + pci-0-memory-0-remap: 1 + pci-0-memory-1-high-decode-address: 0 + pci-0-memory-1-low-decode-address: 1 + pci-0-memory-1-remap: 1 + pci-1-io-high-decode-address: 0 + pci-1-io-low-decode-address: 1 + pci-1-io-remap: 1 + pci-1-memory-0-high-decode-address: 0 + pci-1-memory-0-low-decode-address: 1 + pci-1-memory-0-remap: 1 + pci-1-memory-1-high-decode-address: 0 + pci-1-memory-1-low-decode-address: 1 + pci-1-memory-1-remap: 1 + + # Disable PCI-host mappings + pci-0-base-address-registers-enable: 0x1ff + pci-1-base-address-registers-enable: 0x1ff +} + +OBJECT gt64120-0-pci-0-0 TYPE GT64120-pci { + queue: cpu0 + + gt64120: gt64120-0 + bridge-num: 0 + function-num: 0 + + pci-bus: pci-bus0 +} + +OBJECT gt64120-0-pci-0-1 TYPE GT64120-pci { + queue: cpu0 + + gt64120: gt64120-0 + bridge-num: 0 + function-num: 1 + + pci-bus: pci-bus0 +} + +OBJECT gt64120-0-pci-1-0 TYPE GT64120-pci { + queue: cpu0 + + gt64120: gt64120-0 + bridge-num: 1 + function-num: 0 + + pci-bus: pci-bus1 +} + +OBJECT gt64120-0-pci-1-1 TYPE GT64120-pci { + queue: cpu0 + + gt64120: gt64120-0 + bridge-num: 1 + function-num: 1 + + pci-bus: pci-bus1 +} + +# Various +OBJECT rec0 TYPE recorder { +} + +OBJECT hfs0 TYPE hostfs { +} + +OBJECT sim TYPE sim { + handle-outside-memory: 1 +}