Index: kernel/arch/mips32/src/mm/tlb.c
===================================================================
--- kernel/arch/mips32/src/mm/tlb.c	(revision b2fa1204c76e1eaec329888181d281aac04ed61e)
+++ kernel/arch/mips32/src/mm/tlb.c	(revision 38dc82d20695b43a799be28d4fd2b2cd2c5bb785)
@@ -97,17 +97,17 @@
 	entry_lo_t lo;
 	uintptr_t badvaddr;
-	pte_t *pte;
+	pte_t pte;
 	
 	badvaddr = cp0_badvaddr_read();
 
-	pte = page_mapping_find(AS, badvaddr, true);
-	if (pte && pte->p) {
+	bool found = page_mapping_find(AS, badvaddr, true, &pte);
+	if (found && pte.p) {
 		/*
 		 * Record access to PTE.
 		 */
-		pte->a = 1;
-
-		tlb_prepare_entry_lo(&lo, pte->g, pte->p, pte->d,
-		    pte->cacheable, pte->pfn);
+		pte.a = 1;
+
+		tlb_prepare_entry_lo(&lo, pte.g, pte.p, pte.d,
+		    pte.cacheable, pte.pfn);
 
 		/*
@@ -138,5 +138,5 @@
 	tlb_index_t index;
 	uintptr_t badvaddr;
-	pte_t *pte;
+	pte_t pte;
 
 	/*
@@ -162,6 +162,6 @@
 	badvaddr = cp0_badvaddr_read();
 
-	pte = page_mapping_find(AS, badvaddr, true);
-	if (pte && pte->p) {
+	bool found = page_mapping_find(AS, badvaddr, true, &pte);
+	if (found && pte.p) {
 		/*
 		 * Read the faulting TLB entry.
@@ -172,8 +172,8 @@
 		 * Record access to PTE.
 		 */
-		pte->a = 1;
-
-		tlb_prepare_entry_lo(&lo, pte->g, pte->p, pte->d,
-		    pte->cacheable, pte->pfn);
+		pte.a = 1;
+
+		tlb_prepare_entry_lo(&lo, pte.g, pte.p, pte.d,
+		    pte.cacheable, pte.pfn);
 
 		/*
@@ -200,5 +200,5 @@
 	tlb_index_t index;
 	uintptr_t badvaddr;
-	pte_t *pte;
+	pte_t pte;
 
 	badvaddr = cp0_badvaddr_read();
@@ -224,6 +224,6 @@
 	}
 
-	pte = page_mapping_find(AS, badvaddr, true);
-	if (pte && pte->p && pte->w) {
+	bool found = page_mapping_find(AS, badvaddr, true, &pte);
+	if (found && pte.p && pte.w) {
 		/*
 		 * Read the faulting TLB entry.
@@ -234,9 +234,9 @@
 		 * Record access and write to PTE.
 		 */
-		pte->a = 1;
-		pte->d = 1;
-
-		tlb_prepare_entry_lo(&lo, pte->g, pte->p, pte->w,
-		    pte->cacheable, pte->pfn);
+		pte.a = 1;
+		pte.d = 1;
+
+		tlb_prepare_entry_lo(&lo, pte.g, pte.p, pte.w,
+		    pte.cacheable, pte.pfn);
 
 		/*