Index: arch/mips32/Makefile.inc
===================================================================
--- arch/mips32/Makefile.inc	(revision 6bc4dbd6d4af05219158da97d48e6440649362af)
+++ arch/mips32/Makefile.inc	(revision 389f41e06a14f0aba9a75b27009ea4d49471a04d)
@@ -30,5 +30,4 @@
 #
 
-BFD_NAME = elf32-i386
 BFD_ARCH = mips
 TARGET = mipsel-linux-gnu
@@ -38,28 +37,59 @@
 #
 
-ifndef CPU
-	CPU = pentium4
+ifndef MACHINE
+	MACHINE = msim
 endif
 
-## Accepted CPUs
+KERNEL_LOAD_ADDRESS = 0x80100000
+CFLAGS += -mno-abicalls -G 0 -fno-zero-initialized-in-bss
+DEFS += -DMACHINE=${MACHINE} -DKERNEL_LOAD_ADDRESS=${KERNEL_LOAD_ADDRESS}
+
+## Accepted MACHINEs
 #
 
-ifeq ($(CPU),athlon-xp)
-	CFLAGS += -march=athlon-xp -mmmx -msse -m3dnow
-	DEFS += -DFENCES=486
-	CONFIG_SMP = n
-	CONFIG_HT = n
+ifeq ($(MACHINE),indy)
+	# GCC 4.0.1 compiled for mipsEL has problems compiling in 
+	# BigEndian mode with the swl/swr/lwl/lwr instructions.
+	# We have to compile it with mips-sgi-irix5 to get it right.
+	
+	BFD_NAME = elf32-bigmips
+	BFD = ecoff-bigmips
+	TARGET = mips-sgi-irix5
+	TOOLCHAIN_DIR = /usr/local/mips/bin
+	KERNEL_LOAD_ADDRESS = 0x88002000
+	CFLAGS += -EB -DBIG_ENDIAN -DHAVE_FPU -march=r4600
 endif
-ifeq ($(CPU),athlon-mp)
-	CFLAGS += -march=athlon-mp -mmmx -msse -m3dnow
-	DEFS += -DFENCES=486
+ifeq ($(MACHINE}),lgxemul)
+	BFD_NAME=elf32-tradlittlemips
+	BFD = ecoff-littlemips
+	CFLAGS += -DHAVE_FPU -mips3
 endif
-ifeq ($(CPU),pentium3)
-	CFLAGS += -march=pentium3 -mmmx -msse -msse2
-	DEFS += -DFENCES=486
+ifeq ($(MACHINE),bgxemul)
+	BFD_NAME=elf32-bigmips
+	BFD = ecoff-bigmips
+	TARGET = mips-sgi-irix5
+	TOOLCHAIN_DIR = /usr/local/mips/bin
+	CFLAGS += -EB -DBIG_ENDIAN -DHAVE_FPU -mips3
 endif
-ifeq ($(CPU),pentium4)
-	CFLAGS += -march=pentium4 -mfpmath=sse -mmmx -msse -msse2 -msse3
-	DEFS += -DFENCES=p4
+ifeq ($(MACHINE),msim4kc)
+	# MSIM needs lwl/swl patch & 4kc instruction patch to work
+	# otherwise add -mmemcpy -mips3
+	
+	BFD_NAME = elf32-tradlittlemips
+	BFD = binary
+	CFLAGS += -mhard-float -march=4kc 
+endif
+ifeq ($(MACHINE),simics)
+	# SIMICS 4kc emulation is broken, although for instructions
+	# that do not bother us
+	
+	BFD_NAME = elf32-tradlittlemips
+	BFD = elf32-tradlittlemips
+	CFLAGS += -mhard-float -mips3
+endif
+ifeq ($(MACHINE),msim)
+	BFD_NAME = elf32-tradlittlemips
+	BFD = binary
+	CFLAGS += -mhard-float -mips3
 endif
 
@@ -67,15 +97,9 @@
 #
 
-CONFIG_ACPI = y
+CONFIG_OFW = y
 
 ## Accepted configuration directives
 #
 
-ifeq ($(CONFIG_SMP),y)
-	DEFS += -DSMP
-endif
-ifeq ($(CONFIG_HT),y)
-	DEFS += -DHT
-endif
 ifeq ($(CONFIG_FPU_LAZY),y)
 	DEFS += -DFPU_LAZY
@@ -83,131 +107,21 @@
 
 ARCH_SOURCES = \
-	arch/$(ARCH)/src/context.s \
-	arch/$(ARCH)/src/debug/panic.s \
-	arch/$(ARCH)/src/delay.s \
+	arch/$(ARCH)/src/start.S \
+	arch/$(ARCH)/src/context.S \
+	arch/$(ARCH)/src/panic.S \
+	arch/$(ARCH)/src/mips32.c \
+	arch/$(ARCH)/src/dummy.S \
+	arch/$(ARCH)/src/console.c \
 	arch/$(ARCH)/src/asm.S \
-	arch/$(ARCH)/src/proc/scheduler.c \
-	arch/$(ARCH)/src/bios/bios.c \
-	arch/$(ARCH)/src/smp/ap.S \
-	arch/$(ARCH)/src/smp/apic.c \
-	arch/$(ARCH)/src/smp/mps.c \
-	arch/$(ARCH)/src/smp/smp.c \
-	arch/$(ARCH)/src/atomic.S \
-	arch/$(ARCH)/src/smp/ipi.c \
-	arch/$(ARCH)/src/ia32.c \
+	arch/$(ARCH)/src/exception.c \
 	arch/$(ARCH)/src/interrupt.c \
-	arch/$(ARCH)/src/pm.c \
-	arch/$(ARCH)/src/userspace.c \
+	arch/$(ARCH)/src/cache.c \
 	arch/$(ARCH)/src/cpu/cpu.c \
+	arch/$(ARCH)/src/mm/asid.c \
 	arch/$(ARCH)/src/mm/frame.c \
-	arch/$(ARCH)/src/mm/memory_init.c \
 	arch/$(ARCH)/src/mm/page.c \
 	arch/$(ARCH)/src/mm/tlb.c \
-	arch/$(ARCH)/src/drivers/i8042.c \
-	arch/$(ARCH)/src/drivers/i8254.c \
-	arch/$(ARCH)/src/drivers/i8259.c \
-	arch/$(ARCH)/src/drivers/ega.c \
-	arch/$(ARCH)/src/boot/boot.S \
-	arch/$(ARCH)/src/boot/memmap.S \
-	arch/$(ARCH)/src/fpu_context.c\
-	arch/$(ARCH)/src/fmath.c
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-DEFS= -DMACHINE=${MACHINE} -DKERNEL_LOAD_ADDRESS=${KERNEL_LOAD_ADDRESS}
-CFLAGS=-mno-abicalls -G 0 -nostdlib -fno-builtin -O2  -fno-zero-initialized-in-bss
-LFLAGS=
-
-# GCC 4.0.1 compiled for mipsEL has problems compiling in 
-# BigEndian mode with the swl/swr/lwl/lwr instructions.
-# We have to compile it with mips-sgi-irix5 to get it right.
-ifeq (${MACHINE},indy)
- MIPS_TARGET=mips-sgi-irix5
- MIPS_CC_DIR=/usr/local/mips/bin
- MIPS_BINUTILS_DIR=/usr/local/mips/bin
-
- CFLAGS += -EB -DBIG_ENDIAN -DHAVE_FPU -DFPU_LAZY -march=r4600
- BFD = ecoff-bigmips
- KERNEL_LOAD_ADDRESS = 0x88002000
- BFD_NAME=elf32-bigmips
-endif
-
-ifeq (${MACHINE},lgxemul)
- CFLAGS += -DHAVE_FPU -DFPU_LAZY -mips3
- BFD = ecoff-littlemips
- KERNEL_LOAD_ADDRESS = 0x80100000
- BFD_NAME=elf32-tradlittlemips
-endif
-
-ifeq (${MACHINE},bgxemul)
- MIPS_TARGET=mips-sgi-irix5
- MIPS_CC_DIR=/usr/local/mips/bin
- MIPS_BINUTILS_DIR=/usr/local/mips/bin
-
- CFLAGS += -EB -DBIG_ENDIAN -DHAVE_FPU -DFPU_LAZY -mips3
- BFD = ecoff-bigmips
- KERNEL_LOAD_ADDRESS = 0x80100000
- BFD_NAME=elf32-bigmips
-endif
-
-# MSIM needs lwl/swl patch & 4kc instruction patch to work
-# otherwise add -mmemcpy -mips3
-ifeq (${MACHINE},msim4kc)
- BFD = binary
- CFLAGS += -mhard-float -march=4kc 
- KERNEL_LOAD_ADDRESS = 0x80100000
- BFD_NAME=elf32-tradlittlemips
-endif
-
-ifeq (${MACHINE},msim)
- BFD = binary
- CFLAGS += -mhard-float -mips3
- KERNEL_LOAD_ADDRESS = 0x80100000
- BFD_NAME=elf32-tradlittlemips
-endif
-
-# SIMICS 4kc emulation is broken, although for instructions
-# that do not bother us
-ifeq (${MACHINE},simics)
- BFD = elf32-tradlittlemips
- CFLAGS += -mhard-float -mips3
- KERNEL_LOAD_ADDRESS = 0x80100000
- BFD_NAME=elf32-tradlittlemips
-endif
-
-arch/$(ARCH)/_link.ld: arch/$(ARCH)/_link.ld.in
-	$(CC) $(CFLAGS) -C -DBFD=${BFD} -E -x c $< | grep -v "^\#" > $@
-
-arch_sources= \
-	generic/src/arch/start.S \
-	generic/src/arch/context.S \
-	generic/src/arch/panic.S \
-	generic/src/arch/mips32.c \
-	generic/src/arch/dummy.S \
-	generic/src/arch/console.c \
-	generic/src/arch/asm.S \
-	generic/src/arch/exception.c \
-	generic/src/arch/interrupt.c \
-	generic/src/arch/cache.c \
-	generic/src/arch/cpu/cpu.c \
-	generic/src/arch/mm/asid.c \
-	generic/src/arch/mm/frame.c \
-	generic/src/arch/mm/page.c \
-	generic/src/arch/mm/tlb.c \
-	generic/src/arch/mm/vm.c \
-	generic/src/arch/fpu_context.c \
-	generic/src/arch/fmath.c \
-	generic/src/arch/drivers/arc.c
+	arch/$(ARCH)/src/mm/vm.c \
+	arch/$(ARCH)/src/fpu_context.c \
+	arch/$(ARCH)/src/fmath.c \
+	arch/$(ARCH)/src/drivers/arc.c
Index: arch/mips32/_link.ld.in
===================================================================
--- arch/mips32/_link.ld.in	(revision 6bc4dbd6d4af05219158da97d48e6440649362af)
+++ arch/mips32/_link.ld.in	(revision 389f41e06a14f0aba9a75b27009ea4d49471a04d)
@@ -10,5 +10,4 @@
 
 OUTPUT_FORMAT(BFD)
-
 OUTPUT_ARCH(mips)
 
Index: arch/mips32/boot/Makefile
===================================================================
--- arch/mips32/boot/Makefile	(revision 6bc4dbd6d4af05219158da97d48e6440649362af)
+++ arch/mips32/boot/Makefile	(revision 389f41e06a14f0aba9a75b27009ea4d49471a04d)
@@ -1,26 +1,15 @@
-MIPS_BINUTILS_DIR=/usr/local/mipsel/bin
-MIPS_TARGET=mipsel-linux-gnu
+.PHONY: build clean
 
-.PHONY: nothing build
-
-nothing:
+CFLAGS = -nostdinc -nostdlib -fno-builtin -Werror-implicit-function-declaration -Wmissing-prototypes -Werror -O3 -mips3 -I../include
 
 build: boot.bin
 	cp boot.bin ../../../load.bin
 
-AS=$(MIPS_BINUTILS_DIR)/$(MIPS_TARGET)-as
-CC=$(MIPS_BINUTILS_DIR)/$(MIPS_TARGET)-gcc
-LD=$(MIPS_BINUTILS_DIR)/$(MIPS_TARGET)-ld
+boot.bin: boot.o
+	$(LD) -e start -T _link.ld boot.o -o $@
 
-AFLAGS=-mips2 -I../../../generic/include
-LFLAGS=--oformat=binary -e start -T _link.ld 
-
-.S.o:
-	$(CC) $(ASFLAGS) -c -o $@ $<
-
-boot.bin: boot.o
-	$(LD) $(LFLAGS) $< -o $@
-
+boot.o: boot.S
+	$(CC) $(CFLAGS) -c boot.S -o $@
 
 clean:
-	-rm *.o *.bin
+	-rm -f boot.o boot.bin ../../../load.bin
Index: arch/mips32/boot/boot.S
===================================================================
--- arch/mips32/boot/boot.S	(revision 6bc4dbd6d4af05219158da97d48e6440649362af)
+++ arch/mips32/boot/boot.S	(revision 389f41e06a14f0aba9a75b27009ea4d49471a04d)
@@ -33,9 +33,5 @@
 .set nomacro
 
-#include <arch/asm/boot.h>
-
-#ifndef KERNEL_LOAD_ADDRESS
-# define KERNEL_LOAD_ADDRESS 0x80100000
-#endif
+#define KERNEL_LOAD_ADDRESS 0x80100000
 	
 .global start
Index: arch/mips32/include/context_offset.h
===================================================================
--- arch/mips32/include/context_offset.h	(revision 389f41e06a14f0aba9a75b27009ea4d49471a04d)
+++ arch/mips32/include/context_offset.h	(revision 389f41e06a14f0aba9a75b27009ea4d49471a04d)
@@ -0,0 +1,51 @@
+/* This file is automatically generated by gencontext.c. */
+/* struct context */
+#define OFFSET_SP  0x0
+#define OFFSET_PC  0x4
+#define OFFSET_S0  0x8
+#define OFFSET_S1  0xc
+#define OFFSET_S2  0x10
+#define OFFSET_S3  0x14
+#define OFFSET_S4  0x18
+#define OFFSET_S5  0x1c
+#define OFFSET_S6  0x20
+#define OFFSET_S7  0x24
+#define OFFSET_S8  0x28
+#define OFFSET_GP  0x2c
+
+
+/* struct register_dump */
+#define EOFFSET_AT  0x0
+#define EOFFSET_V0  0x4
+#define EOFFSET_V1  0x8
+#define EOFFSET_A0  0xc
+#define EOFFSET_A1  0x10
+#define EOFFSET_A2  0x14
+#define EOFFSET_A3  0x18
+#define EOFFSET_T0  0x1c
+#define EOFFSET_T1  0x20
+#define EOFFSET_T2  0x24
+#define EOFFSET_T3  0x28
+#define EOFFSET_T4  0x2c
+#define EOFFSET_T5  0x30
+#define EOFFSET_T6  0x34
+#define EOFFSET_T7  0x38
+#define EOFFSET_S0  0x3c
+#define EOFFSET_S1  0x40
+#define EOFFSET_S2  0x44
+#define EOFFSET_S3  0x48
+#define EOFFSET_S4  0x4c
+#define EOFFSET_S5  0x50
+#define EOFFSET_S6  0x54
+#define EOFFSET_S7  0x58
+#define EOFFSET_T8  0x5c
+#define EOFFSET_T9  0x60
+#define EOFFSET_GP  0x64
+#define EOFFSET_SP  0x68
+#define EOFFSET_S8  0x6c
+#define EOFFSET_RA  0x70
+#define EOFFSET_LO  0x74
+#define EOFFSET_HI  0x78
+#define EOFFSET_STATUS  0x7c
+#define EOFFSET_EPC  0x80
+#define REGISTER_SPACE  132
