Index: arch/amd64/include/asm.h
===================================================================
--- arch/amd64/include/asm.h	(revision dd4d6b00d0c3e88b7dd79f5e3fcc541f04c5289e)
+++ arch/amd64/include/asm.h	(revision 37b451f7a8c252d1c0a3c5b78efd144d682378ec)
@@ -73,4 +73,7 @@
 static inline void outb(__u16 port, __u8 val) { __asm__ volatile ("outb %b0, %w1\n" : : "a" (val), "d" (port) ); }
 
+/** Swap Hidden part of GS register with visible one */
+static inline void swapgs(void) { __asm__ volatile("swapgs"); }
+
 /** Enable interrupts.
  *
Index: arch/amd64/include/cpu.h
===================================================================
--- arch/amd64/include/cpu.h	(revision dd4d6b00d0c3e88b7dd79f5e3fcc541f04c5289e)
+++ arch/amd64/include/cpu.h	(revision 37b451f7a8c252d1c0a3c5b78efd144d682378ec)
@@ -42,4 +42,5 @@
 #define AMD_MSR_LSTAR   0xc0000082
 #define AMD_MSR_SFMASK  0xc0000084
+#define AMD_MSR_GS      0xc0000101
 
 #ifndef __ASM__
Index: arch/amd64/src/asm_utils.S
===================================================================
--- arch/amd64/src/asm_utils.S	(revision dd4d6b00d0c3e88b7dd79f5e3fcc541f04c5289e)
+++ arch/amd64/src/asm_utils.S	(revision 37b451f7a8c252d1c0a3c5b78efd144d682378ec)
@@ -193,8 +193,27 @@
 	
 syscall_entry:
-	# TODO:	Switch to kernel stack
+	# Switch to hidden gs	
+	swapgs
+
+	# TODO:	I would like LEA instead of thes 2 instrs,
+	# why does not it work???
+	mov %gs:0, %r10     # We have a stack in r10
+	addq $0x0ff0, %r10
+	
+	movq %rsp, 0(%r10)  # Save old stack pointer to stack
+	movq %r10, %rsp     # Change to new stack
+	pushq %rcx          # Return address
+	pushq %r11          # Save flags
+
+	# Switch back to remain consistent
+	swapgs 
+
+	movq %r9, %rcx      # Exchange last parameter as a third
 	call syscall_handler
-	# Switch back
-	sysret
+	
+	popq %r11
+	popq %rcx
+	movq 0(%rsp), %rsp
+	sysretq
 		
 .data
Index: arch/amd64/src/proc/scheduler.c
===================================================================
--- arch/amd64/src/proc/scheduler.c	(revision dd4d6b00d0c3e88b7dd79f5e3fcc541f04c5289e)
+++ arch/amd64/src/proc/scheduler.c	(revision 37b451f7a8c252d1c0a3c5b78efd144d682378ec)
@@ -32,7 +32,14 @@
 #include <arch.h>
 #include <arch/context.h>	/* SP_DELTA */
+#include <arch/asm.h>
 
 void before_thread_runs_arch(void)
 {
 	CPU->arch.tss->rsp0 = (__address) &THREAD->kstack[THREAD_STACK_SIZE-SP_DELTA];
+
+	/* Syscall support - write thread address to hidden part of gs */
+	swapgs();
+	write_msr(AMD_MSR_GS,
+		  (__u64)&THREAD->kstack);
+	swapgs();
 }
Index: arch/amd64/src/syscall.c
===================================================================
--- arch/amd64/src/syscall.c	(revision dd4d6b00d0c3e88b7dd79f5e3fcc541f04c5289e)
+++ arch/amd64/src/syscall.c	(revision 37b451f7a8c252d1c0a3c5b78efd144d682378ec)
@@ -35,4 +35,5 @@
 
 #include <print.h>
+#include <arch/cpu.h>
 
 extern void syscall_entry(void);
@@ -55,7 +56,8 @@
 	write_msr(AMD_MSR_LSTAR, (__u64)syscall_entry);
 	/* Mask RFLAGS on syscall 
-	 * - we do not care what is in the flags field
+	 * - disable interrupts, until we exchange the stack register
+	 *   (mask the IE bit)
 	 */
-	write_msr(AMD_MSR_SFMASK, 0);
+	write_msr(AMD_MSR_SFMASK, 0x200);
 }
 
@@ -63,8 +65,9 @@
 __native syscall_handler(__native id, __native a1, __native a2, __native a3)
 {
+	interrupts_enable();
 	if (id < SYSCALL_END)
 		return syscall_table[id](a1,a2,a3);
 	else
 		panic("Undefined syscall %d", id);
-	
+	interrupts_disable();
 }