Changeset 371bd7d in mainline for kernel/arch/arm32/include
- Timestamp:
- 2010-03-27T09:22:17Z (16 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 36a75a2
- Parents:
- cd82bb1 (diff), eaf22d4 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the(diff)links above to see all the changes relative to each parent. - Location:
- kernel/arch/arm32/include
- Files:
-
- 1 added
- 15 edited
-
asm.h (modified) (2 diffs)
-
atomic.h (modified) (8 diffs)
-
context.h (modified) (2 diffs)
-
cpu.h (modified) (1 diff)
-
exception.h (modified) (4 diffs)
-
faddr.h (modified) (1 diff)
-
fpu_context.h (modified) (1 diff)
-
interrupt.h (modified) (1 diff)
-
machine_func.h (modified) (1 diff)
-
memstr.h (modified) (2 diffs)
-
mm/as.h (modified) (1 diff)
-
mm/asid.h (modified) (1 diff)
-
mm/frame.h (modified) (1 diff)
-
mm/page_fault.h (modified) (1 diff)
-
ras.h (added)
-
types.h (modified) (3 diffs)
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/arm32/include/asm.h
rcd82bb1 r371bd7d 38 38 39 39 #include <typedefs.h> 40 #include <arch/types.h>41 40 #include <arch/stack.h> 42 41 #include <config.h> … … 96 95 } 97 96 98 extern void cpu_halt(void) ;97 extern void cpu_halt(void) __attribute__((noreturn)); 99 98 extern void asm_delay_loop(uint32_t t); 100 99 extern void userspace_asm(uintptr_t ustack, uintptr_t uspace_uarg, -
kernel/arch/arm32/include/atomic.h
rcd82bb1 r371bd7d 37 37 #define KERN_arm32_ATOMIC_H_ 38 38 39 #include <arch/asm.h> 40 39 41 /** Atomic addition. 40 42 * … … 45 47 * 46 48 */ 47 static inline long atomic_add(atomic_t *val, int i)49 static inline atomic_count_t atomic_add(atomic_t *val, atomic_count_t i) 48 50 { 49 int ret; 50 volatile long *mem = &(val->count); 51 52 asm volatile ( 53 "1:\n" 54 "ldr r2, [%[mem]]\n" 55 "add r3, r2, %[i]\n" 56 "str r3, %[ret]\n" 57 "swp r3, r3, [%[mem]]\n" 58 "cmp r3, r2\n" 59 "bne 1b\n" 60 : [ret] "=m" (ret) 61 : [mem] "r" (mem), [i] "r" (i) 62 : "r3", "r2" 63 ); 51 /* 52 * This implementation is for UP pre-ARMv6 systems where we do not have 53 * the LDREX and STREX instructions. 54 */ 55 ipl_t ipl = interrupts_disable(); 56 val->count += i; 57 atomic_count_t ret = val->count; 58 interrupts_restore(ipl); 64 59 65 60 return ret; … … 69 64 * 70 65 * @param val Variable to be incremented. 66 * 71 67 */ 72 68 static inline void atomic_inc(atomic_t *val) … … 78 74 * 79 75 * @param val Variable to be decremented. 76 * 80 77 */ 81 78 static inline void atomic_dec(atomic_t *val) { … … 87 84 * @param val Variable to be incremented. 88 85 * @return Value after incrementation. 86 * 89 87 */ 90 static inline longatomic_preinc(atomic_t *val)88 static inline atomic_count_t atomic_preinc(atomic_t *val) 91 89 { 92 90 return atomic_add(val, 1); … … 97 95 * @param val Variable to be decremented. 98 96 * @return Value after decrementation. 97 * 99 98 */ 100 static inline longatomic_predec(atomic_t *val)99 static inline atomic_count_t atomic_predec(atomic_t *val) 101 100 { 102 101 return atomic_add(val, -1); … … 107 106 * @param val Variable to be incremented. 108 107 * @return Value before incrementation. 108 * 109 109 */ 110 static inline longatomic_postinc(atomic_t *val)110 static inline atomic_count_t atomic_postinc(atomic_t *val) 111 111 { 112 112 return atomic_add(val, 1) - 1; … … 117 117 * @param val Variable to be decremented. 118 118 * @return Value before decrementation. 119 * 119 120 */ 120 static inline longatomic_postdec(atomic_t *val)121 static inline atomic_count_t atomic_postdec(atomic_t *val) 121 122 { 122 123 return atomic_add(val, -1) + 1; -
kernel/arch/arm32/include/context.h
rcd82bb1 r371bd7d 43 43 #define SP_DELTA (0 + ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT)) 44 44 45 #define context_set(c, _pc, stack, size) \ 46 do { \ 47 (c)->pc = (uintptr_t) (_pc); \ 48 (c)->sp = ((uintptr_t) (stack)) + (size) - SP_DELTA; \ 49 (c)->fp = 0; \ 50 } while (0) 51 45 52 #ifndef __ASM__ 46 53 47 #include < arch/types.h>54 #include <typedefs.h> 48 55 49 56 /** Thread context containing registers that must be preserved across function … … 62 69 uint32_t r9; 63 70 uint32_t r10; 64 uint32_t r11;71 uint32_t fp; /* r11 */ 65 72 66 73 ipl_t ipl; -
kernel/arch/arm32/include/cpu.h
rcd82bb1 r371bd7d 37 37 #define KERN_arm32_CPU_H_ 38 38 39 #include < arch/types.h>39 #include <typedefs.h> 40 40 #include <arch/asm.h> 41 41 -
kernel/arch/arm32/include/exception.h
rcd82bb1 r371bd7d 38 38 #define KERN_arm32_EXCEPTION_H_ 39 39 40 #include < arch/types.h>40 #include <typedefs.h> 41 41 #include <arch/regutils.h> 42 42 … … 86 86 87 87 /** Struct representing CPU state saved when an exception occurs. */ 88 typedef struct {88 typedef struct istate { 89 89 uint32_t spsr; 90 90 uint32_t sp; … … 102 102 uint32_t r9; 103 103 uint32_t r10; 104 uint32_t r11;104 uint32_t fp; 105 105 uint32_t r12; 106 106 … … 133 133 } 134 134 135 static inline unative_t istate_get_fp(istate_t *istate) 136 { 137 return istate->fp; 138 } 139 135 140 136 141 extern void install_exception_handlers(void); -
kernel/arch/arm32/include/faddr.h
rcd82bb1 r371bd7d 37 37 #define KERN_arm32_FADDR_H_ 38 38 39 #include < arch/types.h>39 #include <typedefs.h> 40 40 41 41 /** Calculate absolute address of function referenced by fptr pointer. -
kernel/arch/arm32/include/fpu_context.h
rcd82bb1 r371bd7d 39 39 #define KERN_arm32_FPU_CONTEXT_H_ 40 40 41 #include < arch/types.h>41 #include <typedefs.h> 42 42 43 43 #define FPU_CONTEXT_ALIGN 0 -
kernel/arch/arm32/include/interrupt.h
rcd82bb1 r371bd7d 37 37 #define KERN_arm32_INTERRUPT_H_ 38 38 39 #include < arch/types.h>39 #include <typedefs.h> 40 40 #include <arch/exception.h> 41 41 -
kernel/arch/arm32/include/machine_func.h
rcd82bb1 r371bd7d 43 43 44 44 #include <console/console.h> 45 #include < arch/types.h>45 #include <typedefs.h> 46 46 #include <arch/exception.h> 47 47 -
kernel/arch/arm32/include/memstr.h
rcd82bb1 r371bd7d 27 27 */ 28 28 29 /** @addtogroup arm32 29 /** @addtogroup arm32 30 30 * @{ 31 31 */ … … 39 39 #define memcpy(dst, src, cnt) __builtin_memcpy((dst), (src), (cnt)) 40 40 41 extern void memsetw(void *dst, size_t cnt, uint16_t x); 42 extern void memsetb(void *dst, size_t cnt, uint8_t x); 43 44 extern int memcmp(const void *a, const void *b, size_t cnt); 41 extern void memsetw(void *, size_t, uint16_t); 42 extern void memsetb(void *, size_t, uint8_t); 45 43 46 44 #endif -
kernel/arch/arm32/include/mm/as.h
rcd82bb1 r371bd7d 54 54 #define as_destructor_arch(as) (as != as) 55 55 #define as_create_arch(as, flags) (as != as) 56 #define as_install_arch(as)57 56 #define as_deinstall_arch(as) 58 57 #define as_invalidate_translation_cache(as, page, cnt) -
kernel/arch/arm32/include/mm/asid.h
rcd82bb1 r371bd7d 39 39 #define KERN_arm32_ASID_H_ 40 40 41 #include < arch/types.h>41 #include <typedefs.h> 42 42 43 43 #define ASID_MAX_ARCH 3 /* minimal required number */ -
kernel/arch/arm32/include/mm/frame.h
rcd82bb1 r371bd7d 43 43 #ifndef __ASM__ 44 44 45 #include < arch/types.h>45 #include <typedefs.h> 46 46 47 47 #define BOOT_PAGE_TABLE_SIZE 0x4000 -
kernel/arch/arm32/include/mm/page_fault.h
rcd82bb1 r371bd7d 37 37 #define KERN_arm32_PAGE_FAULT_H_ 38 38 39 #include < arch/types.h>39 #include <typedefs.h> 40 40 41 41 -
kernel/arch/arm32/include/types.h
rcd82bb1 r371bd7d 27 27 */ 28 28 29 /** @addtogroup arm32 29 /** @addtogroup arm32 30 30 * @{ 31 31 */ … … 38 38 39 39 #ifndef DOXYGEN 40 # define ATTRIBUTE_PACKED __attribute__((packed))40 #define ATTRIBUTE_PACKED __attribute__((packed)) 41 41 #else 42 #define ATTRIBUTE_PACKED42 #define ATTRIBUTE_PACKED 43 43 #endif 44 45 typedef signed char int8_t;46 typedef signed short int16_t;47 typedef signed long int32_t;48 typedef signed long long int64_t;49 50 typedef unsigned char uint8_t;51 typedef unsigned short uint16_t;52 typedef unsigned long uint32_t;53 typedef unsigned long long uint64_t;54 44 55 45 typedef uint32_t size_t; … … 62 52 typedef uint32_t unative_t; 63 53 typedef int32_t native_t; 54 typedef uint32_t atomic_count_t; 64 55 65 56 typedef struct { 66 57 } fncptr_t; 67 58 68 #define PRIp "x" /**< Format for uintptr_t. */69 #define PRIs "u" /**< Format for size_t. */59 #define PRIp "x" /**< Format for uintptr_t. */ 60 #define PRIs "u" /**< Format for size_t. */ 70 61 71 #define PRId8 "d" /**< Format for int8_t. */72 #define PRId16 "d" /**< Format for int16_t. */73 #define PRId32 "d" /**< Format for int32_t. */74 #define PRId64 "lld" /**< Format for int64_t. */75 #define PRIdn "d" /**< Format for native_t. */62 #define PRId8 "d" /**< Format for int8_t. */ 63 #define PRId16 "d" /**< Format for int16_t. */ 64 #define PRId32 "d" /**< Format for int32_t. */ 65 #define PRId64 "lld" /**< Format for int64_t. */ 66 #define PRIdn "d" /**< Format for native_t. */ 76 67 77 #define PRIu8 "u" /**< Format for uint8_t. */78 #define PRIu16 "u" /**< Format for uint16_t. */79 #define PRIu32 "u" /**< Format for uint32_t. */80 #define PRIu64 "llu" /**< Format for uint64_t. */81 #define PRIun "u" /**< Format for unative_t. */68 #define PRIu8 "u" /**< Format for uint8_t. */ 69 #define PRIu16 "u" /**< Format for uint16_t. */ 70 #define PRIu32 "u" /**< Format for uint32_t. */ 71 #define PRIu64 "llu" /**< Format for uint64_t. */ 72 #define PRIun "u" /**< Format for unative_t. */ 82 73 83 #define PRIx8 "x" /**< Format for hexadecimal (u)int8_t. */84 #define PRIx16 "x" /**< Format for hexadecimal (u)int16_t. */85 #define PRIx32 "x" /**< Format for hexadecimal (u)uint32_t. */86 #define PRIx64 "llx" /**< Format for hexadecimal (u)int64_t. */87 #define PRIxn "x" /**< Format for hexadecimal (u)native_t. */74 #define PRIx8 "x" /**< Format for hexadecimal (u)int8_t. */ 75 #define PRIx16 "x" /**< Format for hexadecimal (u)int16_t. */ 76 #define PRIx32 "x" /**< Format for hexadecimal (u)uint32_t. */ 77 #define PRIx64 "llx" /**< Format for hexadecimal (u)int64_t. */ 78 #define PRIxn "x" /**< Format for hexadecimal (u)native_t. */ 88 79 89 80 #endif
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