Changeset 371bd7d in mainline for kernel/arch/arm32
- Timestamp:
- 2010-03-27T09:22:17Z (16 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 36a75a2
- Parents:
- cd82bb1 (diff), eaf22d4 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the(diff)links above to see all the changes relative to each parent. - Location:
- kernel/arch/arm32
- Files:
-
- 4 added
- 29 edited
-
Makefile.inc (modified) (2 diffs)
-
_link.ld.in (modified) (1 diff)
-
include/asm.h (modified) (2 diffs)
-
include/atomic.h (modified) (8 diffs)
-
include/context.h (modified) (2 diffs)
-
include/cpu.h (modified) (1 diff)
-
include/exception.h (modified) (4 diffs)
-
include/faddr.h (modified) (1 diff)
-
include/fpu_context.h (modified) (1 diff)
-
include/interrupt.h (modified) (1 diff)
-
include/machine_func.h (modified) (1 diff)
-
include/memstr.h (modified) (2 diffs)
-
include/mm/as.h (modified) (1 diff)
-
include/mm/asid.h (modified) (1 diff)
-
include/mm/frame.h (modified) (1 diff)
-
include/mm/page_fault.h (modified) (1 diff)
-
include/ras.h (added)
-
include/types.h (modified) (3 diffs)
-
src/arm32.c (modified) (6 diffs)
-
src/cpu/cpu.c (modified) (3 diffs)
-
src/ddi/ddi.c (modified) (1 diff)
-
src/debug/stacktrace.c (added)
-
src/debug/stacktrace_asm.S (added)
-
src/dummy.S (modified) (1 diff)
-
src/exc_handler.S (modified) (8 diffs)
-
src/exception.c (modified) (2 diffs)
-
src/mm/as.c (modified) (2 diffs)
-
src/mm/page.c (modified) (2 diffs)
-
src/mm/page_fault.c (modified) (2 diffs)
-
src/mm/tlb.c (modified) (1 diff)
-
src/ras.c (added)
-
src/start.S (modified) (1 diff)
-
src/userspace.c (modified) (2 diffs)
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/arm32/Makefile.inc
rcd82bb1 r371bd7d 27 27 # 28 28 29 ## Toolchain configuration30 #31 32 29 BFD_NAME = elf32-littlearm 33 30 BFD_ARCH = arm 34 31 BFD = binary 35 TARGET = arm-linux-gnu36 TOOLCHAIN_DIR = $(CROSS_PREFIX)/arm3237 32 38 33 ATSIGN = % 39 34 40 GCC_CFLAGS += -fno-zero-initialized-in-bss 35 GCC_CFLAGS += -fno-zero-initialized-in-bss -mapcs-frame 41 36 42 37 BITS = 32 … … 57 52 arch/$(KARCH)/src/exception.c \ 58 53 arch/$(KARCH)/src/userspace.c \ 54 arch/$(KARCH)/src/debug/stacktrace.c \ 55 arch/$(KARCH)/src/debug/stacktrace_asm.S \ 59 56 arch/$(KARCH)/src/mm/as.c \ 60 57 arch/$(KARCH)/src/mm/frame.c \ 61 58 arch/$(KARCH)/src/mm/page.c \ 62 59 arch/$(KARCH)/src/mm/tlb.c \ 63 arch/$(KARCH)/src/mm/page_fault.c 60 arch/$(KARCH)/src/mm/page_fault.c \ 61 arch/$(KARCH)/src/ras.c 64 62 65 63 ifeq ($(MACHINE),testarm) -
kernel/arch/arm32/_link.ld.in
rcd82bb1 r371bd7d 34 34 *(.sdata); 35 35 *(.reginfo); 36 . = ALIGN(8); 36 37 symbol_table = .; 37 38 *(symtab.*); -
kernel/arch/arm32/include/asm.h
rcd82bb1 r371bd7d 38 38 39 39 #include <typedefs.h> 40 #include <arch/types.h>41 40 #include <arch/stack.h> 42 41 #include <config.h> … … 96 95 } 97 96 98 extern void cpu_halt(void) ;97 extern void cpu_halt(void) __attribute__((noreturn)); 99 98 extern void asm_delay_loop(uint32_t t); 100 99 extern void userspace_asm(uintptr_t ustack, uintptr_t uspace_uarg, -
kernel/arch/arm32/include/atomic.h
rcd82bb1 r371bd7d 37 37 #define KERN_arm32_ATOMIC_H_ 38 38 39 #include <arch/asm.h> 40 39 41 /** Atomic addition. 40 42 * … … 45 47 * 46 48 */ 47 static inline long atomic_add(atomic_t *val, int i)49 static inline atomic_count_t atomic_add(atomic_t *val, atomic_count_t i) 48 50 { 49 int ret; 50 volatile long *mem = &(val->count); 51 52 asm volatile ( 53 "1:\n" 54 "ldr r2, [%[mem]]\n" 55 "add r3, r2, %[i]\n" 56 "str r3, %[ret]\n" 57 "swp r3, r3, [%[mem]]\n" 58 "cmp r3, r2\n" 59 "bne 1b\n" 60 : [ret] "=m" (ret) 61 : [mem] "r" (mem), [i] "r" (i) 62 : "r3", "r2" 63 ); 51 /* 52 * This implementation is for UP pre-ARMv6 systems where we do not have 53 * the LDREX and STREX instructions. 54 */ 55 ipl_t ipl = interrupts_disable(); 56 val->count += i; 57 atomic_count_t ret = val->count; 58 interrupts_restore(ipl); 64 59 65 60 return ret; … … 69 64 * 70 65 * @param val Variable to be incremented. 66 * 71 67 */ 72 68 static inline void atomic_inc(atomic_t *val) … … 78 74 * 79 75 * @param val Variable to be decremented. 76 * 80 77 */ 81 78 static inline void atomic_dec(atomic_t *val) { … … 87 84 * @param val Variable to be incremented. 88 85 * @return Value after incrementation. 86 * 89 87 */ 90 static inline longatomic_preinc(atomic_t *val)88 static inline atomic_count_t atomic_preinc(atomic_t *val) 91 89 { 92 90 return atomic_add(val, 1); … … 97 95 * @param val Variable to be decremented. 98 96 * @return Value after decrementation. 97 * 99 98 */ 100 static inline longatomic_predec(atomic_t *val)99 static inline atomic_count_t atomic_predec(atomic_t *val) 101 100 { 102 101 return atomic_add(val, -1); … … 107 106 * @param val Variable to be incremented. 108 107 * @return Value before incrementation. 108 * 109 109 */ 110 static inline longatomic_postinc(atomic_t *val)110 static inline atomic_count_t atomic_postinc(atomic_t *val) 111 111 { 112 112 return atomic_add(val, 1) - 1; … … 117 117 * @param val Variable to be decremented. 118 118 * @return Value before decrementation. 119 * 119 120 */ 120 static inline longatomic_postdec(atomic_t *val)121 static inline atomic_count_t atomic_postdec(atomic_t *val) 121 122 { 122 123 return atomic_add(val, -1) + 1; -
kernel/arch/arm32/include/context.h
rcd82bb1 r371bd7d 43 43 #define SP_DELTA (0 + ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT)) 44 44 45 #define context_set(c, _pc, stack, size) \ 46 do { \ 47 (c)->pc = (uintptr_t) (_pc); \ 48 (c)->sp = ((uintptr_t) (stack)) + (size) - SP_DELTA; \ 49 (c)->fp = 0; \ 50 } while (0) 51 45 52 #ifndef __ASM__ 46 53 47 #include < arch/types.h>54 #include <typedefs.h> 48 55 49 56 /** Thread context containing registers that must be preserved across function … … 62 69 uint32_t r9; 63 70 uint32_t r10; 64 uint32_t r11;71 uint32_t fp; /* r11 */ 65 72 66 73 ipl_t ipl; -
kernel/arch/arm32/include/cpu.h
rcd82bb1 r371bd7d 37 37 #define KERN_arm32_CPU_H_ 38 38 39 #include < arch/types.h>39 #include <typedefs.h> 40 40 #include <arch/asm.h> 41 41 -
kernel/arch/arm32/include/exception.h
rcd82bb1 r371bd7d 38 38 #define KERN_arm32_EXCEPTION_H_ 39 39 40 #include < arch/types.h>40 #include <typedefs.h> 41 41 #include <arch/regutils.h> 42 42 … … 86 86 87 87 /** Struct representing CPU state saved when an exception occurs. */ 88 typedef struct {88 typedef struct istate { 89 89 uint32_t spsr; 90 90 uint32_t sp; … … 102 102 uint32_t r9; 103 103 uint32_t r10; 104 uint32_t r11;104 uint32_t fp; 105 105 uint32_t r12; 106 106 … … 133 133 } 134 134 135 static inline unative_t istate_get_fp(istate_t *istate) 136 { 137 return istate->fp; 138 } 139 135 140 136 141 extern void install_exception_handlers(void); -
kernel/arch/arm32/include/faddr.h
rcd82bb1 r371bd7d 37 37 #define KERN_arm32_FADDR_H_ 38 38 39 #include < arch/types.h>39 #include <typedefs.h> 40 40 41 41 /** Calculate absolute address of function referenced by fptr pointer. -
kernel/arch/arm32/include/fpu_context.h
rcd82bb1 r371bd7d 39 39 #define KERN_arm32_FPU_CONTEXT_H_ 40 40 41 #include < arch/types.h>41 #include <typedefs.h> 42 42 43 43 #define FPU_CONTEXT_ALIGN 0 -
kernel/arch/arm32/include/interrupt.h
rcd82bb1 r371bd7d 37 37 #define KERN_arm32_INTERRUPT_H_ 38 38 39 #include < arch/types.h>39 #include <typedefs.h> 40 40 #include <arch/exception.h> 41 41 -
kernel/arch/arm32/include/machine_func.h
rcd82bb1 r371bd7d 43 43 44 44 #include <console/console.h> 45 #include < arch/types.h>45 #include <typedefs.h> 46 46 #include <arch/exception.h> 47 47 -
kernel/arch/arm32/include/memstr.h
rcd82bb1 r371bd7d 27 27 */ 28 28 29 /** @addtogroup arm32 29 /** @addtogroup arm32 30 30 * @{ 31 31 */ … … 39 39 #define memcpy(dst, src, cnt) __builtin_memcpy((dst), (src), (cnt)) 40 40 41 extern void memsetw(void *dst, size_t cnt, uint16_t x); 42 extern void memsetb(void *dst, size_t cnt, uint8_t x); 43 44 extern int memcmp(const void *a, const void *b, size_t cnt); 41 extern void memsetw(void *, size_t, uint16_t); 42 extern void memsetb(void *, size_t, uint8_t); 45 43 46 44 #endif -
kernel/arch/arm32/include/mm/as.h
rcd82bb1 r371bd7d 54 54 #define as_destructor_arch(as) (as != as) 55 55 #define as_create_arch(as, flags) (as != as) 56 #define as_install_arch(as)57 56 #define as_deinstall_arch(as) 58 57 #define as_invalidate_translation_cache(as, page, cnt) -
kernel/arch/arm32/include/mm/asid.h
rcd82bb1 r371bd7d 39 39 #define KERN_arm32_ASID_H_ 40 40 41 #include < arch/types.h>41 #include <typedefs.h> 42 42 43 43 #define ASID_MAX_ARCH 3 /* minimal required number */ -
kernel/arch/arm32/include/mm/frame.h
rcd82bb1 r371bd7d 43 43 #ifndef __ASM__ 44 44 45 #include < arch/types.h>45 #include <typedefs.h> 46 46 47 47 #define BOOT_PAGE_TABLE_SIZE 0x4000 -
kernel/arch/arm32/include/mm/page_fault.h
rcd82bb1 r371bd7d 37 37 #define KERN_arm32_PAGE_FAULT_H_ 38 38 39 #include < arch/types.h>39 #include <typedefs.h> 40 40 41 41 -
kernel/arch/arm32/include/types.h
rcd82bb1 r371bd7d 27 27 */ 28 28 29 /** @addtogroup arm32 29 /** @addtogroup arm32 30 30 * @{ 31 31 */ … … 38 38 39 39 #ifndef DOXYGEN 40 # define ATTRIBUTE_PACKED __attribute__((packed))40 #define ATTRIBUTE_PACKED __attribute__((packed)) 41 41 #else 42 #define ATTRIBUTE_PACKED42 #define ATTRIBUTE_PACKED 43 43 #endif 44 45 typedef signed char int8_t;46 typedef signed short int16_t;47 typedef signed long int32_t;48 typedef signed long long int64_t;49 50 typedef unsigned char uint8_t;51 typedef unsigned short uint16_t;52 typedef unsigned long uint32_t;53 typedef unsigned long long uint64_t;54 44 55 45 typedef uint32_t size_t; … … 62 52 typedef uint32_t unative_t; 63 53 typedef int32_t native_t; 54 typedef uint32_t atomic_count_t; 64 55 65 56 typedef struct { 66 57 } fncptr_t; 67 58 68 #define PRIp "x" /**< Format for uintptr_t. */69 #define PRIs "u" /**< Format for size_t. */59 #define PRIp "x" /**< Format for uintptr_t. */ 60 #define PRIs "u" /**< Format for size_t. */ 70 61 71 #define PRId8 "d" /**< Format for int8_t. */72 #define PRId16 "d" /**< Format for int16_t. */73 #define PRId32 "d" /**< Format for int32_t. */74 #define PRId64 "lld" /**< Format for int64_t. */75 #define PRIdn "d" /**< Format for native_t. */62 #define PRId8 "d" /**< Format for int8_t. */ 63 #define PRId16 "d" /**< Format for int16_t. */ 64 #define PRId32 "d" /**< Format for int32_t. */ 65 #define PRId64 "lld" /**< Format for int64_t. */ 66 #define PRIdn "d" /**< Format for native_t. */ 76 67 77 #define PRIu8 "u" /**< Format for uint8_t. */78 #define PRIu16 "u" /**< Format for uint16_t. */79 #define PRIu32 "u" /**< Format for uint32_t. */80 #define PRIu64 "llu" /**< Format for uint64_t. */81 #define PRIun "u" /**< Format for unative_t. */68 #define PRIu8 "u" /**< Format for uint8_t. */ 69 #define PRIu16 "u" /**< Format for uint16_t. */ 70 #define PRIu32 "u" /**< Format for uint32_t. */ 71 #define PRIu64 "llu" /**< Format for uint64_t. */ 72 #define PRIun "u" /**< Format for unative_t. */ 82 73 83 #define PRIx8 "x" /**< Format for hexadecimal (u)int8_t. */84 #define PRIx16 "x" /**< Format for hexadecimal (u)int16_t. */85 #define PRIx32 "x" /**< Format for hexadecimal (u)uint32_t. */86 #define PRIx64 "llx" /**< Format for hexadecimal (u)int64_t. */87 #define PRIxn "x" /**< Format for hexadecimal (u)native_t. */74 #define PRIx8 "x" /**< Format for hexadecimal (u)int8_t. */ 75 #define PRIx16 "x" /**< Format for hexadecimal (u)int16_t. */ 76 #define PRIx32 "x" /**< Format for hexadecimal (u)uint32_t. */ 77 #define PRIx64 "llx" /**< Format for hexadecimal (u)int64_t. */ 78 #define PRIxn "x" /**< Format for hexadecimal (u)native_t. */ 88 79 89 80 #endif -
kernel/arch/arm32/src/arm32.c
rcd82bb1 r371bd7d 47 47 #include <userspace.h> 48 48 #include <macros.h> 49 #include <string.h> 49 #include <str.h> 50 #include <arch/ras.h> 50 51 51 52 #ifdef MACHINE_testarm … … 88 89 exception_init(); 89 90 interrupt_init(); 91 92 /* Initialize Restartable Atomic Sequences support. */ 93 ras_init(); 90 94 91 95 machine_output_init(); … … 136 140 uint8_t *stck; 137 141 138 tlb_invalidate_all();139 142 stck = &THREAD->kstack[THREAD_STACK_SIZE - SP_DELTA]; 140 143 supervisor_sp = (uintptr_t) stck; … … 152 155 void cpu_halt(void) 153 156 { 154 machine_cpu_halt(); 157 while (true) 158 machine_cpu_halt(); 155 159 } 156 160 … … 159 163 { 160 164 /* not implemented */ 161 while ( 1);165 while (true); 162 166 } 163 167 … … 176 180 } 177 181 182 void irq_initialize_arch(irq_t *irq) 183 { 184 (void) irq; 185 } 186 178 187 /** @} 179 188 */ -
kernel/arch/arm32/src/cpu/cpu.c
rcd82bb1 r371bd7d 43 43 44 44 /** Implementators (vendor) names */ 45 static c har *imp_data[] = {45 static const char *imp_data[] = { 46 46 "?", /* IMP_DATA_START_OFFSET */ 47 47 "ARM Ltd", /* 0x41 */ … … 60 60 61 61 /** Architecture names */ 62 static c har *arch_data[] = {62 static const char *arch_data[] = { 63 63 "?", /* 0x0 */ 64 64 "4", /* 0x1 */ … … 108 108 void cpu_print_report(cpu_t *m) 109 109 { 110 c har *vendor = imp_data[0];111 c har *architecture = arch_data[0];110 const char *vendor = imp_data[0]; 111 const char *architecture = arch_data[0]; 112 112 cpu_arch_t * cpu_arch = &m->arch; 113 113 -
kernel/arch/arm32/src/ddi/ddi.c
rcd82bb1 r371bd7d 36 36 #include <ddi/ddi.h> 37 37 #include <proc/task.h> 38 #include < arch/types.h>38 #include <typedefs.h> 39 39 40 40 /** Enable I/O space range for task. -
kernel/arch/arm32/src/dummy.S
rcd82bb1 r371bd7d 1 1 # 2 # Copyright (c) 2007 Michal Kebr y, Pavel Jancik, Petr Stepan2 # Copyright (c) 2007 Michal Kebrt, Pavel Jancik, Petr Stepan 3 3 # All rights reserved. 4 4 # -
kernel/arch/arm32/src/exc_handler.S
rcd82bb1 r371bd7d 123 123 stmfd r13!, {r2} 124 124 2: 125 # Stop stack traces here 126 mov fp, #0 125 127 .endm 126 128 … … 148 150 mov r0, #0 149 151 mov r1, r13 150 bl exc_dispatch152 bl ras_check 151 153 LOAD_REGS_FROM_STACK 152 154 … … 156 158 mov r0, #5 157 159 mov r1, r13 158 bl exc_dispatch160 bl ras_check 159 161 LOAD_REGS_FROM_STACK 160 162 … … 164 166 mov r0, #6 165 167 mov r1, r13 166 bl exc_dispatch168 bl ras_check 167 169 LOAD_REGS_FROM_STACK 168 170 … … 171 173 mov r0, #1 172 174 mov r1, r13 173 bl exc_dispatch175 bl ras_check 174 176 LOAD_REGS_FROM_STACK 175 177 … … 179 181 mov r0, #3 180 182 mov r1, r13 181 bl exc_dispatch183 bl ras_check 182 184 LOAD_REGS_FROM_STACK 183 185 … … 187 189 mov r0, #4 188 190 mov r1, r13 189 bl exc_dispatch191 bl ras_check 190 192 LOAD_REGS_FROM_STACK 191 193 … … 195 197 mov r0, #2 196 198 mov r1, r13 197 bl exc_dispatch198 LOAD_REGS_FROM_STACK 199 199 bl ras_check 200 LOAD_REGS_FROM_STACK 201 -
kernel/arch/arm32/src/exception.c
rcd82bb1 r371bd7d 42 42 #include <print.h> 43 43 #include <syscall/syscall.h> 44 #include <stacktrace.h> 44 45 45 46 #ifdef MACHINE_testarm … … 183 184 printf(" r4: %x r5: %x r6: %x r7: %x\n", 184 185 istate->r4, istate->r5, istate->r6, istate->r7); 185 printf(" r8: %x r8: %x r10: %x r11: %x\n",186 istate->r8, istate->r9, istate->r10, istate-> r11);186 printf(" r8: %x r8: %x r10: %x fp: %x\n", 187 istate->r8, istate->r9, istate->r10, istate->fp); 187 188 printf(" r12: %x sp: %x lr: %x spsr: %x\n", 188 189 istate->r12, istate->sp, istate->lr, istate->spsr); 189 190 190 191 printf(" pc: %x\n", istate->pc); 192 193 stack_trace_istate(istate); 191 194 } 192 195 -
kernel/arch/arm32/src/mm/as.c
rcd82bb1 r371bd7d 36 36 #include <arch/mm/as.h> 37 37 #include <genarch/mm/as_pt.h> 38 #include <genarch/mm/page_pt.h> 38 39 #include <genarch/mm/asid_fifo.h> 39 40 #include <mm/as.h> 41 #include <mm/tlb.h> 40 42 #include <arch.h> 41 43 … … 49 51 } 50 52 53 void as_install_arch(as_t *as) 54 { 55 tlb_invalidate_all(); 56 } 57 51 58 /** @} 52 59 */ -
kernel/arch/arm32/src/mm/page.c
rcd82bb1 r371bd7d 41 41 #include <arch/exception.h> 42 42 #include <typedefs.h> 43 #include <arch/types.h>44 43 #include <interrupt.h> 45 44 #include <arch/mm/frame.h> … … 88 87 KA2PA(KERNEL_ADDRESS_SPACE_END_ARCH)) { 89 88 panic("Unable to map physical memory %p (%d bytes).", 90 physaddr, size) 89 physaddr, size); 91 90 } 92 91 -
kernel/arch/arm32/src/mm/page_fault.c
rcd82bb1 r371bd7d 181 181 182 182 if (ret == AS_PF_FAULT) { 183 fault_if_from_uspace(istate, "Page fault: %#x.", badvaddr); 183 184 print_istate(istate); 184 185 printf("page fault - pc: %x, va: %x, status: %x(%x), " … … 186 187 access); 187 188 188 fault_if_from_uspace(istate, "Page fault: %#x.", badvaddr);189 189 panic("Page fault."); 190 190 } -
kernel/arch/arm32/src/mm/tlb.c
rcd82bb1 r371bd7d 37 37 #include <arch/mm/asid.h> 38 38 #include <arch/asm.h> 39 #include < arch/types.h>39 #include <typedefs.h> 40 40 #include <arch/mm/page.h> 41 41 -
kernel/arch/arm32/src/start.S
rcd82bb1 r371bd7d 69 69 bl arch_pre_main 70 70 71 # 72 # Create the first stack frame. 73 # 74 mov fp, #0 75 mov ip, sp 76 push {fp, ip, lr, pc} 77 sub fp, ip, #4 78 71 79 bl main_bsp 72 80 -
kernel/arch/arm32/src/userspace.c
rcd82bb1 r371bd7d 35 35 36 36 #include <userspace.h> 37 #include <arch/ras.h> 37 38 38 39 /** Struct for holding all general purpose registers. … … 74 75 ustate.r1 = 0; 75 76 77 /* pass the RAS page address in %r2 */ 78 ustate.r2 = (uintptr_t) ras_page; 79 76 80 /* clear other registers */ 77 ustate.r 2 = ustate.r3 = ustate.r4 = ustate.r5=78 ustate.r 6 = ustate.r7 = ustate.r8 = ustate.r9 = ustate.r10 =79 ustate. r11 = ustate.r12 = ustate.lr = 0;81 ustate.r3 = ustate.r4 = ustate.r5 = ustate.r6 = ustate.r7 = 82 ustate.r8 = ustate.r9 = ustate.r10 = ustate.r11 = ustate.r12 = 83 ustate.lr = 0; 80 84 81 85 /* set user stack */
Note:
See TracChangeset
for help on using the changeset viewer.
