Changeset 371bd7d in mainline for kernel/arch/amd64/include


Ignore:
Timestamp:
2010-03-27T09:22:17Z (16 years ago)
Author:
Jiri Svoboda <jiri@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/fix-logger-deadlock, topic/msim-upgrade, topic/simplify-dev-export
Children:
36a75a2
Parents:
cd82bb1 (diff), eaf22d4 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.
Message:

Merge mainline changes.

Location:
kernel/arch/amd64/include
Files:
13 edited

Legend:

Unmodified
Added
Removed

  • kernel/arch/amd64/include/asm.h

    rcd82bb1 r371bd7d  
    3737
    3838#include <config.h>
    39 #include <arch/types.h>
    4039#include <typedefs.h>
    4140
    … …  
    6867}
    6968
    70 static inline void cpu_halt(void)
    71 {
    72         asm volatile (
    73                 "0:\n"
    74                 "       hlt\n"
    75                 "       jmp 0b\n"
    76         );
     69static inline void __attribute__((noreturn)) cpu_halt(void)
     70{
     71        while (true) {
     72                asm volatile (
     73                        "hlt\n"
     74                );
     75        }
    7776}
    7877

  • kernel/arch/amd64/include/atomic.h

    rcd82bb1 r371bd7d  
    3636#define KERN_amd64_ATOMIC_H_
    3737
    38 #include <arch/types.h>
     38#include <typedefs.h>
    3939#include <arch/barrier.h>
    4040#include <preemption.h>
    4141
    42 static inline void atomic_inc(atomic_t *val) {
     42static inline void atomic_inc(atomic_t *val)
     43{
    4344#ifdef CONFIG_SMP
    4445        asm volatile (
    … …  
    5455}
    5556
    56 static inline void atomic_dec(atomic_t *val) {
     57static inline void atomic_dec(atomic_t *val)
     58{
    5759#ifdef CONFIG_SMP
    5860        asm volatile (
    … …  
    6870}
    6971
    70 static inline long atomic_postinc(atomic_t *val)
     72static inline atomic_count_t atomic_postinc(atomic_t *val)
    7173{
    72         long r = 1;
     74        atomic_count_t r = 1;
    7375       
    7476        asm volatile (
    7577                "lock xaddq %[r], %[count]\n"
    76                 : [count] "+m" (val->count), [r] "+r" (r)
     78                : [count] "+m" (val->count),
     79                  [r] "+r" (r)
    7780        );
    7881       
    … …  
    8083}
    8184
    82 static inline long atomic_postdec(atomic_t *val)
     85static inline atomic_count_t atomic_postdec(atomic_t *val)
    8386{
    84         long r = -1;
     87        atomic_count_t r = -1;
    8588       
    8689        asm volatile (
    8790                "lock xaddq %[r], %[count]\n"
    88                 : [count] "+m" (val->count), [r] "+r" (r)
     91                : [count] "+m" (val->count),
     92                  [r] "+r" (r)
    8993        );
    9094       
    … …  
    9599#define atomic_predec(val)  (atomic_postdec(val) - 1)
    96100
    97 static inline uint64_t test_and_set(atomic_t *val) {
    98         uint64_t v;
     101static inline atomic_count_t test_and_set(atomic_t *val)
     102{
     103        atomic_count_t v = 1;
    99104       
    100105        asm volatile (
    101                 "movq $1, %[v]\n"
    102106                "xchgq %[v], %[count]\n"
    103                 : [v] "=r" (v), [count] "+m" (val->count)
     107                : [v] "+r" (v),
     108                  [count] "+m" (val->count)
    104109        );
    105110       
    … …  
    107112}
    108113
    109 
    110114/** amd64 specific fast spinlock */
    111115static inline void atomic_lock_arch(atomic_t *val)
    112116{
    113         uint64_t tmp;
     117        atomic_count_t tmp;
    114118       
    115119        preemption_disable();
    … …  
    125129                "testq %[tmp], %[tmp]\n"
    126130                "jnz 0b\n"
    127                 : [count] "+m" (val->count), [tmp] "=&r" (tmp)
     131                : [count] "+m" (val->count),
     132                  [tmp] "=&r" (tmp)
    128133        );
     134       
    129135        /*
    130136         * Prevent critical section code from bleeding out this way up.

  • kernel/arch/amd64/include/context.h

    rcd82bb1 r371bd7d  
    3838#ifdef KERNEL
    3939
    40 #include <arch/types.h>
     40#include <typedefs.h>
    4141
    4242/* According to ABI the stack MUST be aligned on
    … …  
    4545 */
    4646#define SP_DELTA     16
     47
     48#define context_set(c, _pc, stack, size) \
     49        do { \
     50                (c)->pc = (uintptr_t) (_pc); \
     51                (c)->sp = ((uintptr_t) (stack)) + (size) - SP_DELTA; \
     52                (c)->rbp = 0; \
     53        } while (0)
    4754
    4855#endif /* KERNEL */

  • kernel/arch/amd64/include/cpuid.h

    rcd82bb1 r371bd7d  
    4848#ifndef __ASM__
    4949
    50 #include <arch/types.h>
     50#include <typedefs.h>
    5151
    5252typedef struct {

  • kernel/arch/amd64/include/debugger.h

    rcd82bb1 r371bd7d  
    3636#define KERN_amd64_DEBUGGER_H_
    3737
    38 #include <arch/types.h>
     38#include <typedefs.h>
    3939
    4040#define BKPOINTS_MAX 4

  • kernel/arch/amd64/include/faddr.h

    rcd82bb1 r371bd7d  
    3636#define KERN_amd64_FADDR_H_
    3737
    38 #include <arch/types.h>
     38#include <typedefs.h>
    3939
    4040#define FADDR(fptr)             ((uintptr_t) (fptr))

  • kernel/arch/amd64/include/interrupt.h

    rcd82bb1 r371bd7d  
    3636#define KERN_amd64_INTERRUPT_H_
    3737
    38 #include <arch/types.h>
     38#include <typedefs.h>
    3939#include <arch/pm.h>
    4040
    … …  
    5454#define IRQ_PIC_SPUR            7
    5555#define IRQ_MOUSE               12
     56#define IRQ_DP8390              9
    5657
    5758/* this one must have four least significant bits set to ones */
    … …  
    7071
    7172/** This is passed to interrupt handlers */
    72 typedef struct {
     73typedef struct istate {
    7374        uint64_t rax;
    7475        uint64_t rcx;
    … …  
    8081        uint64_t r10;
    8182        uint64_t r11;
     83        uint64_t rbp;
    8284        uint64_t error_word;
    8385        uint64_t rip;
    … …  
    101103        return istate->rip;
    102104}
     105static inline unative_t istate_get_fp(istate_t *istate)
     106{
     107        return istate->rbp;
     108}
    103109
    104110extern void (* disable_irqs_function)(uint16_t irqmask);

  • kernel/arch/amd64/include/memstr.h

    rcd82bb1 r371bd7d  
    2727 */
    2828
    29 /** @addtogroup amd64   
     29/** @addtogroup amd64
    3030 * @{
    3131 */
    … …  
    3838#define memcpy(dst, src, cnt)  __builtin_memcpy((dst), (src), (cnt))
    3939
    40 extern void memsetw(void *dst, size_t cnt, uint16_t x);
    41 extern void memsetb(void *dst, size_t cnt, uint8_t x);
    42 
    43 extern int memcmp(const void *a, const void *b, size_t cnt);
     40extern void memsetw(void *, size_t, uint16_t);
     41extern void memsetb(void *, size_t, uint8_t);
    4442
    4543#endif

  • kernel/arch/amd64/include/mm/frame.h

    rcd82bb1 r371bd7d  
    3737
    3838#ifndef __ASM__
    39 #include <arch/types.h>
     39#include <typedefs.h>
    4040#endif /* __ASM__ */
    4141

  • kernel/arch/amd64/include/mm/page.h

    rcd82bb1 r371bd7d  
    5757#ifndef __ASM__
    5858#       include <mm/mm.h>
    59 #       include <arch/types.h>
     59#       include <typedefs.h>
    6060#       include <arch/interrupt.h>
    6161

  • kernel/arch/amd64/include/pm.h

    rcd82bb1 r371bd7d  
    3737
    3838#ifndef __ASM__
    39         #include <arch/types.h>
     39        #include <typedefs.h>
    4040        #include <arch/context.h>
    4141#endif

  • kernel/arch/amd64/include/proc/task.h

    rcd82bb1 r371bd7d  
    3636#define KERN_amd64_TASK_H_
    3737
    38 #include <arch/types.h>
     38#include <typedefs.h>
    3939#include <adt/bitmap.h>
    4040

  • kernel/arch/amd64/include/types.h

    rcd82bb1 r371bd7d  
    3636#define KERN_amd64_TYPES_H_
    3737
    38 typedef signed char int8_t;
    39 typedef signed short int16_t;
    40 typedef signed int int32_t;
    41 typedef signed long long int64_t;
    42 
    43 typedef unsigned char uint8_t;
    44 typedef unsigned short uint16_t;
    45 typedef unsigned int uint32_t;
    46 typedef unsigned long long uint64_t;
    47 
    4838typedef uint64_t size_t;
    4939
    … …  
    5545typedef uint64_t unative_t;
    5646typedef int64_t native_t;
     47typedef uint64_t atomic_count_t;
    5748
    5849typedef struct {
    … …  
    6051
    6152/**< Formats for uintptr_t, size_t */
    62 #define PRIp "llx"
    63 #define PRIs "llu"
     53#define PRIp  "llx"
     54#define PRIs  "llu"
    6455
    6556/**< Formats for (u)int8_t, (u)int16_t, (u)int32_t, (u)int64_t and (u)native_t */
    66 #define PRId8 "d"
    67 #define PRId16 "d"
    68 #define PRId32 "d"
    69 #define PRId64 "lld"
    70 #define PRIdn "lld"
     57#define PRId8   "d"
     58#define PRId16  "d"
     59#define PRId32  "d"
     60#define PRId64  "lld"
     61#define PRIdn   "lld"
    7162
    72 #define PRIu8 "u"
    73 #define PRIu16 "u"
    74 #define PRIu32 "u"
    75 #define PRIu64 "llu"
    76 #define PRIun "llu"
     63#define PRIu8   "u"
     64#define PRIu16  "u"
     65#define PRIu32  "u"
     66#define PRIu64  "llu"
     67#define PRIun   "llu"
    7768
    78 #define PRIx8 "x"
    79 #define PRIx16 "x"
    80 #define PRIx32 "x"
    81 #define PRIx64 "llx"
    82 #define PRIxn "llx"
     69#define PRIx8   "x"
     70#define PRIx16  "x"
     71#define PRIx32  "x"
     72#define PRIx64  "llx"
     73#define PRIxn   "llx"
    8374
    8475#endif
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